Display driving circuit and display device

By introducing a screen crosstalk detection module and a refresh rate adjustment module into the LCD, the crosstalk problem caused by common voltage offset at high refresh rates is solved, achieving a higher quality display effect.

CN120636342AActive Publication Date: 2025-09-12HKC CORP LTD
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Patent Information

Application Number
CN202511104212.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-08-07
Publication Date
2025-09-12
Estimated Expiration
2045-08-07

AI Technical Summary

Technical Problem

Liquid crystal displays are prone to crosstalk caused by common voltage offset at high refresh rates, which affects the display effect, especially when displaying dynamic images.

Method used

The system uses a screen crosstalk detection module and a refresh rate adjustment module to detect the severity of crosstalk in the display screen and adjust the refresh rate of the display panel to reduce crosstalk. It includes the combined use of a gate drive circuit, a refresh rate adjustment module and a data signal processing module to control the output of scan signals and data signals.

Benefits of technology

The crosstalk caused by the common voltage offset is effectively reduced, and the display quality of the liquid crystal display is improved. In particular, the recovery time of the common voltage can be extended at a high refresh rate, thereby improving the display effect.

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Abstract

The invention belongs to the field of display, and particularly relates to a display driving circuit and a display device.The display driving circuit comprises a picture crosstalk detecting module, a refresh rate adjusting module and a gate driving circuit, the gate driving circuit is used for being connected with a scanning line of a display panel, and the refresh rate adjusting module is connected with the end, away from the scanning line, of the gate driving circuit; the refresh rate adjusting module is connected between the gate driving circuit and a scanning line and controls the refresh rate of the display panel by controlling a scanning signal generated by the gate driving circuit, or the refresh rate adjusting module is connected between the gate driving circuit and the scanning line and controls the refresh rate of the display panel by controlling the output of the scanning signal, and the picture crosstalk detection module is connected with the refresh rate adjusting module. And the processor is used for detecting crosstalk of the display picture and controlling the refresh rate adjusting module to adjust the refresh rate according to the crosstalk severity, so that the refresh rate is negatively correlated with the crosstalk severity. When the crosstalk of the display image is serious, the refresh rate is reduced, the common voltage recovery time is prolonged, the crosstalk can be improved or eliminated, and the display image quality of the display panel is improved.
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Description

Technical Field

[0001] The present application belongs to the field of display, and specifically relates to a display driving circuit and a display device. Background Art

[0002] When an LCD displays a picture, the pixel electrode and the common electrode form a liquid crystal capacitor (CLC), which drives the deflection of the liquid crystal molecules, controlling the brightness of each sub-pixel to achieve the displayed image. If a single electric field is applied to the liquid crystal molecules for a long time, the liquid crystal molecules may become polarized, resulting in a decrease in display quality and even damage to the liquid crystal material. By inverting the polarity and alternating the direction of the electric field, polarization of the liquid crystal molecules can be effectively avoided.

[0003] The data line provides data voltage to the pixel electrode. Polarity reversal makes the data voltage greater than or less than the common voltage (Vcom) of the common electrode. The coupling capacitance (Cdc) formed between the data line and the pixel electrode will cause the common voltage to shift. The common voltage shift will cause crosstalk, affecting the display effect of the LCD.

[0004] The display refresh rate is the number of times the screen refreshes per second. The higher the refresh rate, the smoother the display (such as when displaying dynamic images, such as games). However, the higher the refresh rate, the shorter the time left for the common voltage to recover, the more severe the crosstalk caused by common voltage offsets, and the more noticeable the degradation of the LCD display quality. Summary of the Invention

[0005] The purpose of the present application is to provide a display driving circuit and a display device to improve or eliminate crosstalk and enhance the display quality of a liquid crystal display.

[0006] To achieve the above-mentioned object, the present application provides a display driving circuit, including a gate driving circuit, wherein the gate driving circuit is used to connect to the scan lines of the display panel, and the display driving circuit further includes: a refresh rate adjustment module, the refresh rate adjustment module being connected to an end of the gate drive circuit away from the scan line and controlling the refresh rate of the display panel by controlling the scan signal generated by the gate drive circuit, or the refresh rate adjustment module being connected between the gate drive circuit and the scan line and controlling the refresh rate of the display panel by controlling the output of the scan signal; A screen crosstalk detection module is connected to the refresh rate adjustment module. The screen crosstalk detection module is used to detect the crosstalk of the display screen of the display panel and control the refresh rate adjustment module to adjust the refresh rate of the display panel according to the severity of the crosstalk, so that the refresh rate is negatively correlated with the severity of the crosstalk.

[0007] Optionally, the refresh rate adjustment module is connected to an end of the gate driving circuit away from the scan line, and the refresh rate adjustment module is a timing controller.

[0008] Optionally, the display driving circuit also includes a data signal processing module, the data signal processing module includes a sampling unit and a selection unit, the selection unit is connected to the system-level chip, the timing controller and the screen crosstalk detection module, when the refresh rate of the display panel remains unchanged, the screen crosstalk detection module controls the selection unit to work, so that the system-level chip is directly connected to the timing controller, when the refresh rate of the display panel is reduced, the screen crosstalk detection module controls the selection unit to work, so that the system-level chip is indirectly connected to the timing controller through the sampling unit, the data signal output by the system-level chip includes m frames of display pictures, and the sampling unit is used to extract part of the m frames of display pictures and output it to the timing controller.

[0009] Optionally, the nth frame display picture extracted by the sampling unit is composed of a partial data signal of the (n-1)th frame display picture and a partial data signal of the (n+1)th frame display picture.

[0010] Optionally, the refresh rate adjustment module is connected between the gate drive circuit and the scan line, and the refresh rate adjustment module includes a first transistor and a second transistor, the control end of the first transistor and the control end of the second transistor are both connected to the screen crosstalk detection module, the first end of the first transistor is connected to the gate drive circuit, the second end of the first transistor is connected to the scan line, the first end of the second transistor is connected to the first power supply, and the second end of the second transistor is connected to the scan line, the channel types of the first transistor and the second transistor are different, and the first power supply provides a control voltage for turning off the drive transistor connected to the scan line.

[0011] Optionally, the screen crosstalk detection module is connected to a system-on-chip, and the screen crosstalk detection module determines the severity of the crosstalk of the display screen according to a data signal output by the system-on-chip.

[0012] Optionally, the screen crosstalk detection module is connected to the common electrode of the display panel, and the screen crosstalk detection module determines the severity of the crosstalk of the display screen according to the deviation of the measured voltage of the common electrode from the set voltage of the common electrode.

[0013] Optionally, the screen crosstalk detection module includes a first operational amplifier, a second operational amplifier, a third operational amplifier and a fourth operational amplifier, the non-inverting input terminal of the first operational amplifier is connected to the common electrode of the display panel, the inverting input terminal of the first operational amplifier is connected to the second power supply, the second power supply provides a set voltage for the common electrode, the non-inverting input terminal of the second operational amplifier is connected to the third power supply, the inverting input terminal of the second operational amplifier is connected to the output terminal of the first operational amplifier, the non-inverting input terminal of the third operational amplifier is connected to the fourth power supply, and the inverting input terminal of the third operational amplifier is connected to the output terminal of the first operational amplifier , one power input terminal of the second operational amplifier and the third operational amplifier is connected to the fifth power supply, the voltage of the fifth power supply is equal to the voltage of the high-level signal, the other power input terminal of the second operational amplifier and the third operational amplifier is grounded, the third power supply provides the upper limit voltage when the refresh rate of the display panel is reduced, the fourth power supply provides the lower limit voltage when the refresh rate of the display panel is reduced, the non-inverting input terminal of the fourth operational amplifier is connected to the output terminal of the second operational amplifier, the inverting input terminal of the fourth operational amplifier is connected to the output terminal of the third operational amplifier, and the output terminal of the fourth operational amplifier is connected to the refresh rate adjustment module.

[0014] Optionally, the screen crosstalk detection module also includes a first inverter, a thermistor and an AND gate logic device, the first input end of the AND gate logic device is connected to the output end of the fourth operational amplifier through the first inverter, the second input end of the AND gate logic device is connected to the sixth power supply through the thermistor, and the voltage of the sixth power supply is equal to the voltage of the high-level signal.

[0015] The present application also provides a display device, comprising: the display driving circuit; The display panel is connected to the display driving circuit.

[0016] The display driving circuit and display device disclosed in this application have the following beneficial effects: In the present application, the display driver circuit includes a screen crosstalk detection module, a refresh rate adjustment module, and a gate driver circuit. The gate driver circuit is used to connect the scan lines of the display panel. The refresh rate adjustment module is connected to the end of the gate driver circuit away from the scan lines and controls the refresh rate of the display panel by controlling the scan signals generated by the gate driver circuit. Alternatively, the refresh rate adjustment module is connected between the gate driver circuit and the scan lines and controls the refresh rate of the display panel by controlling the output of the scan signals. The screen crosstalk detection module is connected to the refresh rate adjustment module and is used to detect crosstalk of the display screen of the display panel. The refresh rate adjustment module adjusts the refresh rate of the display panel according to the severity of the crosstalk, so that the refresh rate is negatively correlated with the severity of the crosstalk. When the crosstalk of the display screen is serious, the refresh rate is reduced and the common voltage recovery time is prolonged, thereby improving or eliminating the crosstalk and improving the display quality of the display panel.

[0017] Other features and advantages of the present application will become apparent from the following detailed description, or may be learned in part by practice of the present application.

[0018] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The accompanying drawings are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the present application, and together with the specification, are used to explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application, and those skilled in the art can derive other drawings based on these drawings without inventive effort.

[0020] Figure 1 Schematic diagram of the structure of the display driving circuit in the first embodiment of the present application.

[0021] Figure 2 This is a working logic diagram of the display driving circuit in Example 1 of the present application.

[0022] Figure 3 3 is a waveform diagram of the measured voltage of the common voltage in Example 1 of the present application.

[0023] Figure 4 2 is a schematic diagram of the structure of the screen crosstalk detection module in the first embodiment of the present application.

[0024] Figure 5 This is a schematic diagram showing the negative correlation between the resistance value of the temperature-sensitive resistor and the ambient temperature in Example 1 of the present application.

[0025] Figure 6 It is a structural diagram of the display driving circuit in the second embodiment of the present application.

[0026] Figure 7 It is a structural diagram of the display device in Example 3 of the present application.

[0027] Description of reference numerals: 100, screen crosstalk detection module; 110, first operational amplifier; 120, second operational amplifier; 130, third operational amplifier; 140, fourth operational amplifier; 150, first inverter; 160, temperature sensitive resistor; 170, AND gate logic; 200, refresh rate adjustment module; 210, first transistor; 220, second transistor; 300, gate drive circuit; 400, data signal processing module; 410, sampling unit; 420, selection unit; 421, third transistor; 422, fourth transistor; 423, second inverter; 501, first power supply; 502, second power supply; 503, third power supply; 504, fourth power supply; 505, fifth power supply; 506, sixth power supply; 10. Display driver circuit; 20. Display panel; 30. System-on-chip. DETAILED DESCRIPTION

[0028] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this application will be thorough and complete and will fully convey the concepts of the example embodiments to those skilled in the art.

[0029] In addition, described feature, structure or characteristic can be combined in one or more embodiments in any suitable manner.In the following description, many specific details are provided so as to provide a full understanding of the embodiments of the present application. However, it will be appreciated by those skilled in the art that the technical scheme of the present application can be put into practice without one or more of the specific details, or other methods, components, devices, steps etc. can be adopted. In other cases, known methods, devices, implementations or operations are not shown or described in detail to avoid blurring the various aspects of the application.

[0030] The present application is further described below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the technical features involved in the various embodiments of the present application described below can be combined with each other as long as they do not conflict with each other. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be understood as limiting the present application.

[0031] Example 1 See also Figure 1 and Figure 2As shown, in this embodiment, the display driver circuit 10 includes a crosstalk detection module 100, a refresh rate adjustment module 200, and a gate driver circuit 300. The gate driver circuit 300 is connected to the scan lines of the display panel 20. The gate driver circuit 300 outputs a scan signal to control the driving transistor connected to the scan line to turn on, allowing the data voltage of the data line to be written to the pixel electrode. The gate driver circuit 300 includes a gate driver chip and an array substrate row driver circuit (GOA). The array substrate row driver circuit can be fabricated on the display panel 20.

[0032] The refresh rate adjustment module 200 is connected to the end of the gate drive circuit 300 away from the scan lines, and controls the refresh rate of the display panel 20 by controlling the scan signals generated by the gate drive circuit 300. For example, if the drive transistors of the display panel 20 are N-channel thin film transistors, the refresh rate adjustment module 200 controls the interval between high-level signals H in the scan signals to control the refresh rate of the display panel 20.

[0033] The refresh rate adjustment module 200 can also be connected between the gate drive circuit 300 and the scan lines, and controls the refresh rate of the display panel 20 by controlling the output of the scan signals. When the refresh rate adjustment module 200 is turned on, the gate drive circuit 300 is electrically connected to the scan lines, the scan signals can be output to the scan lines, and the drive transistors connected to the scan lines are turned on. When the refresh rate adjustment module 200 is turned off, the gate drive circuit 300 is disconnected from the scan lines, the scan signals cannot be output to the scan lines, and the drive transistors connected to the scan lines are turned off.

[0034] The crosstalk detection module 100 is connected to the refresh rate adjustment module 200. The crosstalk detection module 100 is used to detect crosstalk in the display image of the display panel 20 and control the refresh rate adjustment module 200 to adjust the refresh rate of the display panel 20 based on the severity of the crosstalk, so that the refresh rate is negatively correlated with the severity of the crosstalk. In other words, when the display image has severe crosstalk, the refresh rate adjustment module 200 reduces the refresh rate of the display panel 20, and the more severe the crosstalk, the lower the refresh rate. When the display image has no crosstalk or has minimal crosstalk, the refresh rate adjustment module 200 maintains the refresh rate of the display panel 20 unchanged.

[0035] It should be understood that the data line provides the pixel electrode with a data voltage. Polarity reversal causes the data voltage to be greater than or less than the common voltage. The coupling capacitance formed between the data line and the pixel electrode causes the common voltage to shift, and this common voltage shift can cause crosstalk. The higher the refresh rate, the shorter the time left for the common voltage to recover, and the more severe the crosstalk caused by the common voltage shift. When the display screen has severe crosstalk, the refresh rate adjustment module 200 lowers the refresh rate of the display panel 20 to extend the common voltage recovery time and eliminate the crosstalk caused by the common voltage shift.

[0036] In this embodiment, the display driver circuit 10 includes a crosstalk detection module 100, a refresh rate adjustment module 200, and a gate driver circuit 300. The gate driver circuit 300 is used to connect to the scan lines of the display panel 20. The refresh rate adjustment module 200 is connected to the end of the gate driver circuit 300 away from the scan lines and controls the refresh rate of the display panel 20 by controlling the scan signals generated by the gate driver circuit 300. Alternatively, the refresh rate adjustment module 200 is connected between the gate driver circuit 300 and the scan lines and controls the refresh rate of the display panel 20 by controlling the output of the scan signals. The crosstalk detection module 100 is connected to the refresh rate adjustment module 200 and is used to detect crosstalk in the display image of the display panel 20. The refresh rate adjustment module 200 adjusts the refresh rate of the display panel 20 according to the severity of the crosstalk, so that the refresh rate is negatively correlated with the severity of the crosstalk. When the crosstalk of the display image is severe, the refresh rate is reduced and the common voltage recovery time is prolonged, thereby improving or eliminating the crosstalk and enhancing the display quality of the display panel 20.

[0037] In some embodiments, the refresh rate adjustment module 200 is connected to the gate drive circuit 300 away from one end of the scan line, and the refresh rate adjustment module 200 may be a timing controller. For example, the refresh rate corresponding to the data signal of the display screen is F1, and F1 is greater than 60Hz. When the screen crosstalk detection module 100 detects that the display screen crosstalk is serious, the refresh rate adjustment module 200 reduces the refresh rate of the display panel 20 to F2, F2 is less than F1, and F2 may be 60Hz. It should be understood that the timing controller can store the correspondence between the severity of the display screen crosstalk and the refresh rate to achieve stepless and continuous adjustment of the refresh rate.

[0038] The timing controller receives display screen data signals from the system-on-a-chip (SOC) 30, controls the source driver circuit to generate data voltages based on the data signals, and controls the scanning signals generated by the gate driver circuit 300 to write the data voltages row by row into the pixel electrodes, enabling the display panel 20 to display the screen. Adjusting the refresh rate of the display panel 20 through the timing controller eliminates the need for additional circuitry, reducing the manufacturing cost of the display driver circuit 10.

[0039] In some embodiments, the display driver circuit 10 further includes a data signal processing module 400, which includes a sampling unit 410 and a selection unit 420. The selection unit 420 is connected to the system-on-chip 30, the timing controller, and the crosstalk detection module 100. When the refresh rate of the display panel 20 remains unchanged, the crosstalk detection module 100 controls the selection unit 420 to operate, directly connecting the system-on-chip 30 to the timing controller. When the refresh rate of the display panel 20 decreases, the crosstalk detection module 100 controls the selection unit 420 to operate, indirectly connecting the system-on-chip 30 to the timing controller through the sampling unit 410.

[0040] The data signal output by the system-on-chip 30 includes m frames of display images, and the sampling unit 410 is used to extract a portion of the m frames of display images and output it to the timing controller. The sampling ratio of the sampling unit 410 is F2 / F1.

[0041] When the refresh rate of the display panel 20 is reduced, the number of display frames output to the timing controller is reduced accordingly, which can not only reduce the amount of calculation of the timing controller, the source driver circuit and the gate driver circuit 300, but also avoid the mismatch between the number of display frames provided by the system-level chip 30 and the actual number of displayed frames, resulting in display abnormalities.

[0042] In some embodiments, the selection unit 420 may include a third transistor 421 and a fourth transistor 422. The control end of the third transistor 421 and the control end of the fourth transistor 422 are both connected to the screen crosstalk detection module 100. The first end of the third transistor 421 and the first end of the fourth transistor 422 are both connected to the system-on-chip 30. The second end of the third transistor 421 is indirectly connected to the timing controller via the sampling unit 410, and the second end of the fourth transistor 422 is directly connected to the timing controller. One of the third transistor 421 and the fourth transistor 422 is an N-channel transistor and the other is a P-channel transistor.

[0043] For example, the third transistor 421 is an N-channel transistor, and the fourth transistor 422 is a P-channel transistor. When the refresh rate of the display panel 20 remains unchanged, the control signal (P) output by the image crosstalk detection module 100 is a low-level signal L, the third transistor 421 is turned off, and the fourth transistor 422 is turned on. The data signal of the display image output by the system-on-chip 30 is directly output to the timing controller. When the refresh rate of the display panel 20 decreases, the control signal (P) output by the image crosstalk detection module 100 is a high-level signal H, the third transistor 421 is turned on, and the fourth transistor 422 is turned off. The data signal of the display image output by the system-on-chip 30 is sampled and processed by the sampling unit 410 and then output to the timing controller.

[0044] It should be noted that the fourth transistor 422 can be a P-channel transistor, but is not limited thereto. The fourth transistor 422 can also be replaced by an N-channel transistor, and a second inverter 423 is set in front of the control end of the fourth transistor 422, depending on the specific situation.

[0045] In some embodiments, the nth display frame sampled by the sampling unit 410 is composed of a portion of the data signal of the n-1th display frame and a portion of the data signal of the n+1th display frame. For example, the nth display frame is composed of the first half of the n-1th display frame and the second half of the n+1th display frame.

[0046] The n-th display frame extracted by the sampling unit 410 includes the display frames of the previous and next frames, which can reduce the impact of the reduction in the refresh rate of the display panel 20 and make the sampled display data signal transition smoother on the display panel 20.

[0047] In some embodiments, the crosstalk detection module 100 is connected to the system-on-chip 30. The crosstalk detection module 100 determines the severity of crosstalk in the displayed image based on the data signal output by the system-on-chip 30. Crosstalk is more likely to occur when the display panel 20 displays special images, such as Excel images (images similar to Excel spreadsheets). The severity of crosstalk can be determined based on the size of the crosstalk area in the displayed image. For example, a display image with crosstalk exceeding half the screen is considered severely crosstalked.

[0048] The image crosstalk detection module 100 detects the display image to determine the severity of the crosstalk, thereby preventing the crosstalk image from being displayed on the display panel 20 and improving the display quality of the display panel 20 .

[0049] In some embodiments, the crosstalk detection module 100 is connected to the common electrode of the display panel 20 . The crosstalk detection module 100 determines the severity of crosstalk in the display image based on the deviation of the measured voltage (VcomFB) of the common electrode from the set voltage (Vcom) of the common electrode.

[0050] The coupling capacitance formed between the data line and the pixel electrode will cause the common voltage to shift. In the screen crosstalk detection module 100, an interval value is set according to the common voltage Vcom, that is, an upper limit voltage Vmax and a lower limit voltage Vmin are set. Figure 3 As shown, when the screen crosstalk detection module 100 identifies that the common voltage Vcom exceeds the preset range (greater than Vmax or less than Vmin, indicating severe horizontal crosstalk), it outputs a high level signal H. Conversely, when the common voltage Vcom does not exceed the preset range, it outputs a low level signal L.

[0051] Using a timing controller to monitor the display screen may not be able to detect some complex screens. Furthermore, detection depends on the pixel arrangement structure and number. Existing known horizontal crosstalk images may not be complete. If a new screen with horizontal crosstalk later on exhibits a different pixel structure than the existing one, the timing controller will also be unable to detect it. Furthermore, the lateral crosstalk phenomenon varies between different LCDs, and a unified setting cannot be fully compatible, which wastes even more debugging time.

[0052] In this embodiment, the screen crosstalk detection module 100 is connected to the common electrode of the display panel 20. The screen crosstalk detection module 100 determines the severity of the crosstalk of the display screen based on the measured voltage of the common electrode. Compared with the solution of using a timing controller to detect the display screen, the screen crosstalk detection module 100 can be used to detect different types of horizontal crosstalk.

[0053] See also Figure 4 As shown, the screen crosstalk detection module 100 includes a first operational amplifier 110, a second operational amplifier 120, a third operational amplifier 130, and a fourth operational amplifier 140. The non-inverting input terminal of the first operational amplifier 110 is connected to the common electrode of the display panel 20, and the inverting input terminal of the first operational amplifier 110 is connected to the second power supply 502, which provides a set voltage Vcom for the common electrode.

[0054] The non-inverting input terminal of the second operational amplifier 120 is connected to the third power supply 503, and the inverting input terminal of the second operational amplifier 120 is connected to the output terminal of the first operational amplifier 110. The non-inverting input terminal of the third operational amplifier 130 is connected to the fourth power supply 504, and the inverting input terminal of the third operational amplifier 130 is connected to the output terminal of the first operational amplifier 110. The third power supply 503 provides an upper limit voltage Vmax when the refresh rate of the display panel 20 is reduced, and the fourth power supply 504 provides a lower limit voltage Vmin when the refresh rate of the display panel 20 is reduced.

[0055] One power input terminal of the second operational amplifier 120 and the third operational amplifier 130 is connected to the fifth power supply 505. The voltage V H The voltage of the high-level signal H is equal to the voltage of the second operational amplifier 120 and the third operational amplifier 130. The other power input terminal of the second operational amplifier 120 and the third operational amplifier 130 is grounded, and the ground voltage is GND. The non-inverting input terminal of the fourth operational amplifier 140 is connected to the output terminal of the second operational amplifier 120, the inverting input terminal of the fourth operational amplifier 140 is connected to the output terminal of the third operational amplifier 130, and the output terminal of the fourth operational amplifier 140 is connected to the refresh rate adjustment module 200.

[0056] The first operational amplifier 110 and the fourth operational amplifier 140 are configured as an anti-inverter, and the second operational amplifier 120 and the third operational amplifier 130 are configured as a comparator. The output voltage Vo1 of the first operational amplifier 110 is the difference between the measured common electrode voltage VcomFB and the set common electrode voltage Vcom, that is, Vo1 = VcomFB - Vcom.

[0057] When the crosstalk of the display panel 20 is serious, Vo<Vmin<Vmax, or Vo>Vmax>Vmin, the output voltage Vo2 of the second operational amplifier 120 is equal to GND, the output voltage Vo3 of the third operational amplifier 130 is equal to GND, and the output voltage Vo4 of the fourth operational amplifier 140 is equal to Vo2-Vo3, that is, the control signal output by the screen crosstalk detection module 100 is a low-level signal L; When the display panel 20 has no crosstalk or slight crosstalk, Vmin<Vo<Vmax, the output voltage of the second operational amplifier 120 Vo2=V H , the output terminal voltage Vo3 of the third operational amplifier 130 = GND, and the output terminal voltage Vo4 of the fourth operational amplifier 140 = Vo2 - Vo3 , that is, the control signal output by the screen crosstalk detection module 100 is a high level signal H.

[0058] By using four operational amplifiers to detect the actual voltage of the common electrode, the crosstalk detection module 100 has a simple structure, which can reduce the manufacturing cost of the display driving circuit 10 .

[0059] In some embodiments, the crosstalk detection module 100 further includes a first inverter 150 . The input of the first inverter 150 is connected to the output of the fourth operational amplifier 140 . The output of the first inverter 150 is the output of the crosstalk detection module 100 .

[0060] The first inverter 150 can invert the control signal output by the fourth operational amplifier 140. When the display panel 20 has severe crosstalk, the control signal output by the screen crosstalk detection module 100 is a high-level signal H. When the display panel 20 has no crosstalk or slight crosstalk, the control signal output by the screen crosstalk detection module 100 is a low-level signal L.

[0061] In some embodiments, the crosstalk detection module 100 further includes a temperature-sensitive resistor 160 and an AND gate logic 170. The first input terminal of the AND gate logic 170 is connected to the output terminal of the fourth operational amplifier 140 through the first inverter 150. The second input terminal of the AND gate logic 170 is connected to the sixth power supply 506 through the temperature-sensitive resistor 160. The voltage V H Equal to the voltage of the high-level signal H.

[0062] See also Figure 5 As shown, the resistance value of the temperature-sensitive resistor 160 is negatively correlated with the ambient temperature. When the ambient temperature rises, the resistance value of the temperature-sensitive resistor 160 decreases, and the voltage at the second input terminal of the AND gate logic 170 is approximately equal to V H When the ambient temperature decreases, the resistance value of the thermistor 160 increases, and the voltage at the second input terminal of the AND gate logic 170 is approximately equal to the voltage of the low-level signal L.

[0063] When displaying the same image on the display panel 20, crosstalk on the display panel 20 is relatively more severe when the ambient temperature is high, and relatively less severe when the ambient temperature is low. Thermistor 160 and AND gate logic 170 are provided to adjust the control signal of the image crosstalk detection module 100 according to the ambient temperature. When the ambient temperature is high, the refresh rate is reduced, which can improve or eliminate crosstalk and enhance the display quality of the display panel 20.

[0064] Example 2 The difference between the second embodiment and the first embodiment lies in the structure of the refresh rate adjustment module 200 and the position in the display driving circuit 10 .

[0065] See also Figure 6 As shown, the refresh rate adjustment module 200 is connected between the gate driving circuit 300 and the scan line of the display panel 20. The refresh rate adjustment module 200 includes a first transistor 210 and a second transistor 220. The control end of the first transistor 210 and the control end of the second transistor 220 are both connected to the screen crosstalk detection module 100. The first end of the first transistor 210 is connected to the gate driving circuit 300, and the second end of the first transistor 210 is connected to the scan line. The first end of the second transistor 220 is connected to the first power supply 501, and the second end of the second transistor 220 is connected to the scan line.

[0066] The gate drive circuit 300 includes a gate drive chip and an array substrate row drive circuit. The array substrate row drive circuit can be provided on the display panel 20. The first transistor 210 and the second transistor 220 have different channel types. For example, the first transistor 210 can be a P-channel transistor, and the second transistor 220 can be an N-channel transistor. The first power supply 501 provides a control signal for turning off the drive transistor connected to the scan line. For example, if the drive transistor connected to the scan line is an N-channel thin film transistor, the control signal provided by the first power supply 501 is a low-level signal L.

[0067] When there is no crosstalk or slight crosstalk in the display screen, the control signal output by the screen crosstalk detection module 100 is a low-level signal L, the first transistor 210 is turned on and the second transistor 220 is turned off, and the scan signal of the gate drive circuit 300 can be output to the upper scan line, that is, the refresh rate adjustment module 200 maintains the refresh rate of the display panel 20 unchanged.

[0068] When the display screen has severe crosstalk, the control signal output by the screen crosstalk detection module 100 is a high-level signal H, the first transistor 210 is turned off and the second transistor 220 is turned on, the scanning signal of the gate drive circuit 300 cannot be output to the scanning line, and the first power supply 501 outputs a low-level signal L to turn off the driving transistor connected to the scanning line. The data voltage provided by the data line cannot be written into the pixel electrode, and the brightness of the sub-pixel remains unchanged until the common voltage is restored, that is, the refresh rate adjustment module 200 lowers the refresh rate of the display panel 20.

[0069] It should be noted that the gate driver circuit 300 may include multiple array substrate row driver circuits, each of which is connected to at least one scan line. Accordingly, multiple crosstalk detection modules 100 may be provided, each configured to detect a display area controlled by at least one array substrate row driver circuit. This design allows different display areas of the display panel 20 to have different refresh rates.

[0070] Example 3 See also Figure 7 As shown, the display device in this embodiment includes the display driving circuit 10 and the display panel 20 disclosed in the first or second embodiment, and the display panel 20 is connected to the display driving circuit 10 .

[0071] The display device includes a display driver circuit 10, which includes a crosstalk detection module 100, a refresh rate adjustment module 200, and a gate driver circuit 300. The gate driver circuit 300 is used to connect to the scan lines of the display panel 20. The refresh rate adjustment module 200 is connected to the end of the gate driver circuit 300 away from the scan lines and controls the refresh rate of the display panel 20 by controlling the scan signals generated by the gate driver circuit 300. Alternatively, the refresh rate adjustment module 200 is connected between the gate driver circuit 300 and the scan lines and controls the refresh rate of the display panel 20 by controlling the output of the scan signals. The crosstalk detection module 100 is connected to the refresh rate adjustment module 200 and is used to detect crosstalk in the display image of the display panel 20. The refresh rate adjustment module 200 adjusts the refresh rate of the display panel 20 based on the severity of the crosstalk, so that the refresh rate is negatively correlated with the severity of the crosstalk. When the crosstalk in the display image is severe, the refresh rate is reduced and the common voltage recovery time is prolonged, thereby improving or eliminating the crosstalk and enhancing the display quality of the display panel 20 and the display device.

[0072] The terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature identified with "first," "second," etc., may explicitly or implicitly include one or more of such features. Throughout the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0073] In this application, unless otherwise specified or limited, terms such as "assembly" and "connection" should be understood in a broad sense. For example, they can refer to fixed connection, detachable connection, or integration; mechanical connection, electrical connection; direct connection, or indirect connection through an intermediate medium; internal communication between two components, or interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on specific circumstances.

[0074] In the description of this specification, the reference terms "some embodiments", "exemplarily", etc. mean that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification and features of different embodiments or examples without contradiction.

[0075] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application. Therefore, any changes or modifications made in accordance with the claims and description of the present application should fall within the scope of the patent application.

Claims

1. A display driving circuit, comprising a gate driving circuit, wherein the gate driving circuit is used to connect a scan line of a display panel, characterized in that: The display driving circuit further includes: a refresh rate adjustment module, the refresh rate adjustment module being connected to an end of the gate drive circuit away from the scan line and controlling the refresh rate of the display panel by controlling the scan signal generated by the gate drive circuit, or the refresh rate adjustment module being connected between the gate drive circuit and the scan line and controlling the refresh rate of the display panel by controlling the output of the scan signal; A screen crosstalk detection module is connected to the refresh rate adjustment module. The screen crosstalk detection module is used to detect the crosstalk of the display screen of the display panel and control the refresh rate adjustment module to adjust the refresh rate of the display panel according to the severity of the crosstalk, so that the refresh rate is negatively correlated with the severity of the crosstalk.

2. The display driving circuit according to claim 1, wherein: The refresh rate adjustment module is connected to the gate driving circuit at one end away from the scanning line, and the refresh rate adjustment module is a timing controller.

3. The display driving circuit according to claim 2, wherein: The display driving circuit also includes a data signal processing module, which includes a sampling unit and a selection unit. The selection unit is connected to the system-level chip, the timing controller and the screen crosstalk detection module. When the refresh rate of the display panel remains unchanged, the screen crosstalk detection module controls the selection unit to operate so that the system-level chip is directly connected to the timing controller. When the refresh rate of the display panel decreases, the screen crosstalk detection module controls the selection unit to operate so that the system-level chip is indirectly connected to the timing controller through the sampling unit. The data signal output by the system-level chip includes m frames of display pictures, and the sampling unit is used to extract part of the m frames of display pictures and output it to the timing controller.

4. The display driving circuit according to claim 3, wherein: The n-th frame display picture extracted by the sampling unit is composed of a part of the data signal of the n-1-th frame display picture and a part of the data signal of the n+1-th frame display picture.

5. The display driving circuit according to claim 1, wherein: The refresh rate adjustment module is connected between the gate drive circuit and the scan line. The refresh rate adjustment module includes a first transistor and a second transistor. The control end of the first transistor and the control end of the second transistor are both connected to the screen crosstalk detection module. The first end of the first transistor is connected to the gate drive circuit, the second end of the first transistor is connected to the scan line, the first end of the second transistor is connected to the first power supply, and the second end of the second transistor is connected to the scan line. The channel types of the first transistor and the second transistor are different. The first power supply provides a control voltage for turning off the drive transistor connected to the scan line.

6. The display driving circuit according to claim 1, wherein: The screen crosstalk detection module is connected to the system-on-chip, and the screen crosstalk detection module determines the severity of the crosstalk of the display screen according to the data signal output by the system-on-chip.

7. The display driving circuit according to claim 1, wherein: The screen crosstalk detection module is connected to the common electrode of the display panel, and determines the severity of the crosstalk of the display screen according to the deviation of the measured voltage of the common electrode from the set voltage of the common electrode.

8. The display driving circuit according to claim 7, wherein: The screen crosstalk detection module includes a first operational amplifier, a second operational amplifier, a third operational amplifier, and a fourth operational amplifier. The non-inverting input of the first operational amplifier is connected to the common electrode of the display panel, the inverting input of the first operational amplifier is connected to the second power supply, the second power supply provides a set voltage for the common electrode, the non-inverting input of the second operational amplifier is connected to the third power supply, the inverting input of the second operational amplifier is connected to the output of the first operational amplifier, the non-inverting input of the third operational amplifier is connected to the fourth power supply, the inverting input of the third operational amplifier is connected to the output of the first operational amplifier, one power input of the second operational amplifier and the third operational amplifier is connected to a fifth power supply, the voltage of the fifth power supply is equal to the voltage of a high-level signal, the other power input of the second operational amplifier and the third operational amplifier is grounded, the third power supply provides an upper limit voltage when the refresh rate of the display panel is reduced, the fourth power supply provides a lower limit voltage when the refresh rate of the display panel is reduced, the non-inverting input of the fourth operational amplifier is connected to the output of the second operational amplifier, the inverting input of the fourth operational amplifier is connected to the output of the third operational amplifier, and the output of the fourth operational amplifier is connected to the refresh rate adjustment module.

9. The display driving circuit according to claim 8, wherein: The screen crosstalk detection module also includes a first inverter, a temperature-sensitive resistor and an AND gate logic device. The first input end of the AND gate logic device is connected to the output end of the fourth operational amplifier through the first inverter, and the second input end of the AND gate logic device is connected to the sixth power supply through the temperature-sensitive resistor. The voltage of the sixth power supply is equal to the voltage of the high-level signal.

10. A display device, characterized in that: include: The display driving circuit according to any one of claims 1 to 9; The display panel is connected to the display driving circuit.

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