Double-fed asynchronous motor debugging method and system based on back-to-back converter

Abstract

The invention relates to a double-fed asynchronous motor debugging method and system based on a back-to-back converter, and belongs to the technical field of motor control. Comprising the following steps: supplying power to a three-phase alternating-current voltage regulator, and charging a direct-current bus capacitor by connecting a grid-side alternating-current contactor with a buffer resistor in parallel; when the DC bus capacitor is charged to a preset amplitude, the digital signal processor sends a closing signal to the AC contactor; after the alternating current contactor is switched on, pure open-loop debugging, current closed-loop debugging and rotating speed closed-loop debugging are respectively carried out on the rotor side; the upper computer controls the pulse width modulator to work, carries out excitation on the rotor, and monitors the voltage and phase of the stator end; when the voltage rises to a preset value and the phase is synchronized with the power grid, a closing signal is sent to the AC contactor at the stator side, and the motor stator is connected to the power grid. The problems that a traditional doubly-fed asynchronous motor is too large in starting current and complex in control link decoupling are solved, and the debugging reliability and efficiency are improved. In addition, debugging does not depend on additional prime mover dragging.

Description

Technical Field

[0001] The present invention relates to the technical field of motor control, and in particular to a method and system for debugging a doubly-fed asynchronous motor based on a back-to-back converter. Background Art

[0002] As marine propulsion systems accelerate their transition to all-electric propulsion, doubly-fed asynchronous motors (DFINMs), with their superior technological advantages, are becoming a key driver in the marine propulsion sector. These motors feature slip power regeneration and require minimal converter capacity, improving the overall energy efficiency and economics of marine propulsion systems.

[0003] However, the debugging process of doubly-fed asynchronous motors faces many technical bottlenecks. Traditional debugging methods rely on an external prime mover such as a diesel engine to drag the rotor to a subsynchronous speed, which leads to complex hardware systems, high debugging costs, and an inability to independently verify the coordinated performance of the converter and motor. In addition, when powered on directly, the rotor winding will generate a large excitation inrush current because the back electromotive force has not yet been established. At the same time, the phase difference of the stator side grid connection can easily cause overcurrent, threatening the safety of power devices such as IGBTs. The stator voltage is constrained by the grid, resulting in a strong coupling relationship between the excitation component and the torque component of the rotor current, further increasing the complexity of debugging. The fixed hardware interface of the existing converter platform requires frequent rewiring during debugging, which is not only time-consuming but also reduces the reliability of debugging.

[0004] In summary, existing debugging solutions for doubly-fed asynchronous motors (DFINMs) suffer from numerous issues, resulting in time-consuming debugging and poor reliability. Therefore, a systematic debugging method based on a dedicated hardware platform is urgently needed to ensure controllable startup, convenient parameter decoupling, and testable module functionality. Summary of the Invention

[0005] To this end, the technical problem to be solved by the present invention is to overcome the problems in the prior art that the debugging process of the doubly-fed asynchronous motor relies on the drag of an external prime mover, the hardware system is complex, the debugging cost is high, the coordinated performance of the converter and the motor cannot be independently verified, excitation surge current and overcurrent are easily generated when directly powered on, the stator voltage is constrained by the power grid, resulting in strong coupling of the rotor current excitation and torque components, and the fixed hardware interface of the converter platform needs to be frequently rewired.

[0006] In a first aspect, to solve the above technical problems, the present invention provides a method for debugging a doubly-fed asynchronous motor based on a back-to-back converter, comprising:

[0007] Powering the three-phase AC voltage regulator and charging the DC bus capacitor through the first AC contactor connected in parallel with the buffer resistor on the grid side; wherein the grid side includes a digital signal processor;

[0008] When the DC bus capacitor is charged to a preset amplitude, the digital signal processor sends a closing signal to the first AC contactor;

[0009] After the first AC contactor is closed, the rotor-side converter is subjected to pure open-loop debugging, current closed-loop debugging, and speed closed-loop debugging, respectively; wherein the voltage and phase of the stator end are monitored during the pure open-loop debugging, current closed-loop debugging, and speed closed-loop debugging;

[0010] When the voltage rises to a preset value and the phase is synchronized with the power grid, a closing signal is sent to the second AC contactor on the stator side, and the motor stator is connected to the power grid.

[0011] In one embodiment of the present invention, after the first AC contactor is closed, before performing pure open-loop debugging, current closed-loop debugging, and speed closed-loop debugging on the rotor-side converter, dual closed-loop control is also performed on the grid side.

[0012] In one embodiment of the present invention, the steps of performing dual closed-loop control on the grid side are:

[0013] The voltage outer loop sets a target voltage value with the goal of controlling the DC bus voltage; based on the target value, a regulator generates a grid-side converter d-axis current setpoint;

[0014] The current inner loop collects the grid-side current, transforms the grid-side current, and decomposes the transformed grid-side current into active and reactive components;

[0015] Harmonics are suppressed and current decoupling is achieved through proportional-integral, and a voltage instruction is output to a space vector pulse width modulation module to generate a pulse width modulation signal. The pulse width modulation signal is used to drive the bridge arm of the device.

[0016] In one embodiment of the present invention, the voltage outer loop sets a target voltage value with the goal of controlling the DC bus voltage; and based on the target value, the steps of generating a given value of the grid-side converter d-axis current through the regulator are as follows:

[0017] Setting the target value of the DC bus voltage by the host computer;

[0018] Configuring the voltage outer loop dynamic parameters according to the target value; wherein, when configuring the voltage outer loop dynamic parameters, a ramp function is used to achieve segmented increments; the voltage outer loop dynamic parameters include a proportional coefficient and an integral coefficient of a regulator;

[0019] Outputting a limit according to the proportional coefficient and the integral coefficient of the regulator;

[0020] According to the amplitude limiting, the output voltage of the three-phase AC voltage regulator is controlled to a set trigger voltage value, and a given value of the d-axis current of the grid-side converter is generated.

[0021] In one embodiment of the present invention, the step of controlling the output voltage of the three-phase AC voltage regulator to a set trigger voltage value is as follows: burning the control board code on the network side, turning the knob of the three-phase AC voltage regulator to power on for pre-charging, and gradually increasing the output voltage of the three-phase AC voltage regulator to the set trigger voltage value after the voltage stabilizes.

[0022] In one embodiment of the present invention, the steps of pure open-loop debugging are:

[0023] connecting the rotor-side converter to the motor rotor winding;

[0024] Setting the grid-side converter to power the rotor side, configuring the pulse width modulation output pin to drive the bridge arm in the rotor side, and setting the carrier frequency and dead time;

[0025] The initial rotor voltage and frequency values ​​are set by code, and the rotor-side converter output is monitored and adjusted using an oscilloscope.

[0026] In one embodiment of the present invention, the steps of current closed-loop debugging are:

[0027] The control mode is switched by the host computer command, the regulator in the current inner loop is activated to perform current closed-loop control, and the open-loop voltage setting is closed at the same time;

[0028] Adjusting the proportional coefficient and the integral coefficient of the regulator;

[0029] The conduction duty cycle of each bridge arm in the rotor side is adjusted according to the adjusted control signal output by the regulator, and the rotor current is corrected in real time.

[0030] In one embodiment of the present invention, the steps of speed closed-loop debugging are:

[0031] Set the target speed, configure the speed outer loop regulator parameters, and verify the encoder signal;

[0032] Start the motor under no-load and load conditions and verify the dynamic response performance of the current inner loop and speed outer loop;

[0033] Real-time monitoring of the stator terminal voltage and phase, when the voltage and phase meet the grid connection requirements, triggering the closing signal on the rotor side, so that the motor can be smoothly connected to the grid;

[0034] By changing the motor speed, the bidirectional power flow characteristics of the motor in subsynchronous or supersynchronous state are verified.

[0035] In a second aspect, to solve the above technical problems, the present invention provides a doubly-fed asynchronous motor debugging system based on a back-to-back converter, comprising:

[0036] A charging module, configured to supply power to the three-phase AC voltage regulator and charge the DC bus capacitor via a first AC contactor connected in parallel with a buffer resistor on the grid side; wherein the grid side includes a digital signal processor;

[0037] a closing module, configured to cause the digital signal processor to send a closing signal to the first AC contactor when the DC bus capacitor is charged to a preset amplitude;

[0038] a rotor-side debugging module, configured to perform pure open-loop debugging, current closed-loop debugging, and speed closed-loop debugging on the rotor-side converter after the first AC contactor is closed; wherein the voltage and phase of the stator end are monitored during the pure open-loop debugging, current closed-loop debugging, and speed closed-loop debugging;

[0039] The grid-connected module is used to send a closing signal to the second AC contactor on the stator side when the voltage rises to a preset value and the phase is synchronized with the grid, so that the motor stator is connected to the grid.

[0040] In a third aspect, in order to solve the above technical problems, the present invention provides a doubly-fed asynchronous motor debugging platform, including the above-mentioned doubly-fed asynchronous motor debugging system based on back-to-back converter.

[0041] The above technical solution of the present invention has the following beneficial effects compared with the prior art:

[0042] (1) The method and system for debugging a doubly-fed asynchronous motor based on a back-to-back converter described in the present invention charges the DC bus capacitor through a first AC contactor in parallel with a buffer resistor, effectively avoiding the current shock that may be caused by direct charging. This buffer charging method can not only protect the DC bus capacitor and extend its service life, but also reduce the risk of system failure caused by current mutation. A digital signal processor is used to detect the charging state of the DC bus capacitor in real time, and a closing signal is issued when the charging reaches a preset amplitude, thereby achieving precise control of the charging process. This precise control method effectively avoids the problem of undercharging or overcharging the capacitor, and further ensures the stability and reliability of the doubly-fed asynchronous motor. During the debugging process on the rotor side, a phased debugging strategy is adopted, and pure open-loop debugging, current closed-loop debugging and speed closed-loop debugging are carried out in sequence. This step-by-step optimization debugging method can ensure that the performance of the motor reaches the best state in each link. During the motor grid-connected stage, the host computer controls the pulse width modulator (PWM) to work, excites the rotor, and detects in real time whether the stator terminal voltage rises to a preset value and the phase is synchronized with the grid. By combining synchronous detection with excitation control, the motor's voltage and phase are fully matched to the grid at the moment of grid connection, thus avoiding the current surge and voltage fluctuations that occur during grid connection. The debugging process of this invention does not rely on an additional prime mover. Instead, through the signal interaction design of the hardware platform and the adaptive adjustment of software parameters, it solves the problems of excessive starting current and complex control link decoupling in traditional doubly fed asynchronous motors, thereby improving the reliability and debugging efficiency of doubly fed asynchronous motors.

[0043] (2) The present invention adopts a three-level control logic that combines hardware protection, parameter margin setting, and software compensation, providing a solution for debugging the back-to-back converter platform and improving the reliability and anti-interference capability of the doubly-fed asynchronous motor under complex working conditions. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] In order to make the content of the present invention more clearly understood, the present invention is further described in detail below based on specific embodiments of the present invention in conjunction with the accompanying drawings, wherein:

[0045] Figure 1 This is a flow chart of a method for debugging a doubly-fed asynchronous motor based on a back-to-back converter in a preferred embodiment of the present invention;

[0046] Figure 2 This is a schematic diagram of the debugging circuit structure in a preferred embodiment of the present invention;

[0047] Figure 3 Schematic diagram of the connection of the doubly-fed asynchronous motor in a preferred embodiment of the present invention.

[0048] Explanation of the accompanying drawings in the specification: 1. Transformer; 2. Three-phase AC voltage regulator; 3. Buffer resistor; 4. First AC contactor; 5. Second AC contactor; 6. Grid side; 7. Rotor side; 8. Stator side. DETAILED DESCRIPTION

[0049] The present invention will be further described below with reference to the accompanying drawings and specific embodiments so that those skilled in the art can better understand the present invention and implement it. However, the embodiments are not intended to limit the present invention.

[0050] Example 1

[0051] Reference Figures 1 to 2 As shown, an embodiment of the present invention provides a method for debugging a doubly-fed asynchronous motor based on a back-to-back converter, including but not limited to the following steps:

[0052] S1, supplying power to the three-phase AC voltage regulator 2, and charging the DC bus capacitor through the first AC contactor 4 in parallel with the buffer resistor 3 on the grid side 6; wherein the grid side 6 includes a digital signal processor;

[0053] S2. When the DC bus capacitor is charged to a preset amplitude, the digital signal processor sends a closing signal to the first AC contactor 4;

[0054] S3. After the first AC contactor 4 is closed, the rotor-side converter is subjected to pure open-loop debugging, current closed-loop debugging, and speed closed-loop debugging, respectively. The voltage and phase at the stator end are monitored during the pure open-loop debugging, current closed-loop debugging, and speed closed-loop debugging.

[0055] S4. When the voltage rises to a preset value and the phase is synchronized with the grid, a closing signal is sent to the second AC contactor 5 on the stator side 8, and the motor stator is connected to the grid.

[0056] An embodiment of the present invention provides a method for debugging a doubly-fed asynchronous motor based on a back-to-back converter. The DC bus capacitor is charged via a first AC contactor 4 in parallel with a buffer resistor 3, avoiding the current surge that may be caused by direct charging. This buffer charging method can effectively protect the DC bus capacitor, extend its service life, and reduce the risk of system failure due to sudden current changes. A digital signal processor (DSP) is used to detect the charging state of the DC bus capacitor and issue a closing signal when the capacitor is charged to a preset amplitude, ensuring precise control of the charging process. This precise control avoids undercharging or overcharging the capacitor, ensuring the stability and reliability of the entire system. The debugging of the rotor side 7 is divided into pure open-loop debugging, current closed-loop debugging, and speed closed-loop debugging. This phased debugging method can gradually optimize the motor's operating state and ensure optimal performance in each link. Pure open-loop debugging can initially confirm the motor's basic operating capabilities, current closed-loop debugging can accurately control the motor's current output, and speed closed-loop debugging can further improve the motor's speed control accuracy. The rotor side 7 is vector controlled and the decoupling debugging of the rotor current is completed. This control method can significantly improve the dynamic performance and steady-state accuracy of the motor. At the same time, the decoupling debugging can eliminate the interference caused by current coupling and further improve the control effect of the motor. The upper computer controls the operation of the pulse width modulator to excite the rotor, and at the same time detects whether the stator terminal voltage rises to the preset value and the phase is synchronized with the power grid. This combination of synchronous detection and excitation control can ensure that the motor is fully matched with the voltage and phase of the power grid at the moment of grid connection, avoiding the current shock and voltage fluctuation at the moment of grid connection. This debugging process does not rely on the drag of an additional prime mover. Through the signal interaction design of the hardware platform and the adaptive adjustment of software parameters, it solves the problems of excessive starting current and complex decoupling of the control link of traditional doubly fed motors, thereby improving system reliability and debugging efficiency.

[0057] Specifically, in step S1, power is supplied to the three-phase AC voltage regulator 2, and the DC bus capacitor is charged through the first AC contactor 4 in parallel with the buffer resistor 3 on the grid side 6, as shown in FIG. Figure 2 As shown. Figure 2 In the symbol L g Indicates filter inductance, symbol R g Represents a resistor used for filtering and limiting current. Symbols S1 to S 12Represents switching devices, which are composed of power electronic devices (such as IGBTs or MOSFETs) and are used to control the flow of current. Symbols C1 and C2 represent DC bus capacitors, which are used to smooth the DC voltage. Symbols A, B, and C represent the three phases of three-phase AC power. DFIM (Doubly Fed Induction Machine, abbreviated as DFIM) represents a doubly fed asynchronous motor. Contactor K1 (i.e., the first AC contactor 4) and contactor K2 (i.e., the second AC contactor 5) are used to control the power connection and disconnection of the entire system. The power grid converts the voltage to 380V by using transformer 1 (two parallel coils on the left side of the grid). It should be noted that the number of buffer resistors 3 and DC bus capacitors can be flexibly set according to actual debugging requirements.

[0058] Furthermore, during the execution of step S1, the transformer 1 first converts the grid voltage to a voltage suitable for the motor (it should be noted that the double-fed asynchronous motor is simply referred to as the motor), for example, 380V. Subsequently, the three-phase AC voltage regulator 2 receives this voltage and starts working. g and resistor R g Together, they form a filter circuit that reduces harmonics in the current and limits its peak value, improving power quality and protecting system components. After charging, the DC bus capacitors C1 and C2 provide a stable DC voltage, providing the necessary power for subsequent energy conversion and motor drive.

[0059] Specifically, refer to Figure 3 As shown in FIG, the doubly-fed asynchronous motor system includes a grid side 6 and a rotor side 7. The grid side 6 refers to the part directly connected to the power grid, including the grid-side converter (GSC). The rotor side 7 refers to the part connected to the motor rotor, including the rotor-side converter (RSC). Figure 3 In the figure, the RST interface of the grid-side converter part is connected to the output end of the three-phase AC voltage regulator 2 and is used for the AC input or output of the grid-side converter; the UVW interface represents the three-phase AC grid connection end and is used for the input of the 380V three-phase AC grid; the ABC interface represents the stator three-phase winding connection end and is used for direct stator grid connection; the RST interface of the rotor-side converter part represents the rotor three-phase winding connection end and is used for the AC input or output of the rotor-side converter.

[0060] Specifically, the doubly-fed asynchronous motor control system includes a three-phase AC voltage regulator 2, a doubly-fed asynchronous motor, a back-to-back power converter, and a controller. The three-phase AC voltage regulator 2 connects the power grid to downstream equipment and regulates power. Its input is connected to the power grid, and its output is connected to the grid-side converter. The grid-side converter converts the input AC power to DC power, and the output DC voltage is supplied by the DC bus capacitor, providing a stable DC power supply for the entire system. The doubly-fed asynchronous motor is the core power component of the control system. Its stator side 8 is connected to the power grid, and its rotor side 7 is connected to the rotor-side power converter. This converter enables precise control of the rotor current, thereby enabling flexible regulation of the motor's operating state. The back-to-back power converter is a key component in the control system for power conversion and control. It comprises multiple bridge arms and DC bus capacitors. Each bridge arm consists of an upper switching transistor and a lower switching transistor. The emitter of the upper switching transistor is connected to the collector of the lower switching transistor. This connection point serves as the specific interface of the bridge arm. Specifically, the interface on the grid-side converter bridge arm serves as the input, connected to the output of the three-phase AC voltage regulator 2, receiving three-phase AC power from it. The interface on the rotor-side power converter bridge arm serves as the output, connected to one end of the rotor winding of the doubly-fed asynchronous motor to provide appropriate power to the rotor. One end of the DC bus capacitor is connected to the collector of the switching transistor on each bridge arm, and the other end is connected to the emitter of the switching transistor on each bridge arm. Its function is to stabilize the DC bus voltage and reduce the impact of voltage fluctuations on the motor.

[0061] Furthermore, in this embodiment of the present invention, the three-phase AC voltage regulator 2 uses a thyristor voltage regulator module, with the input side connected to the industrial frequency grid and the output side connected to the grid-side converter via an LC filter to achieve smooth regulation of the input voltage. The back-to-back converter includes six IGBT modules, which together form a dual three-phase bridge structure. The DC bus is equipped with an 820μF electrolytic capacitor, and the grid-side converter and rotor-side converter are connected via the DC bus capacitor. The rated power of the doubly-fed asynchronous motor is set to 1.5kW, the number of pole pairs is set to 3, the stator winding is directly connected to the grid, and the rotor winding is connected to the rotor-side converter via slip rings.

[0062] Specifically, after the first AC contactor 4 is closed in step S3 , before the pure open-loop debugging, current closed-loop debugging and speed closed-loop debugging of the rotor-side converter are respectively performed, corresponding control of the grid-side converter and the rotor-side converter is also included.

[0063] Furthermore, the grid-side 6 also includes a rectifier. The dual closed-loop operating principle of the grid-side rectifier is as follows: To address the problems of large current surges, significant bus voltage fluctuations, and insufficient grid phase synchronization accuracy encountered during the startup process of the grid-side converter of a doubly-fed motor, a dual closed-loop control method is provided. Through adaptive soft start, coordinate transformation decoupling, and intelligent phase detection technology, high-precision and stable control of the DC bus voltage and harmonic suppression of the grid-side current are achieved. A dual closed-loop control structure consisting of an outer voltage loop and an inner current loop is constructed, and rectifier control of the grid-side converter (GSC) is implemented using a DSP28335 controller. The outer voltage loop controls the DC bus voltage, while the inner current loop achieves grid-side current decoupling and harmonic suppression, and phase-locked loop (PLL) technology is used to achieve grid phase synchronization.

[0064] Specifically, in step S2, when the first AC contactor 4 receives the closing signal, it immediately starts the closing action. After the closing is completed, based on the above-mentioned double closed-loop working principle of the grid-side rectifier, double closed-loop control will be implemented on the grid side 6. The specific steps of the double closed-loop control are:

[0065] S210, the voltage outer loop, aims to control the DC bus voltage. It collects the actual voltage in real time through sensors and compares it with the set value. The proportional-integral (PI) regulator generates a set value for the grid-side converter's d-axis current to ensure bus voltage stability.

[0066] S220: The current inner loop collects the grid-side current and transforms the grid-side current. The transformation method is preferably Clark transformation and Park transformation. The grid-side current is decomposed into active and reactive components through Clark transformation and Park transformation.

[0067] S230 suppresses harmonics and achieves current decoupling through PI regulation, outputs voltage commands to the space vector pulse width modulation (SVPWM) module, and generates a 10kHz PWM signal to drive the fully controlled IGBT bridge arm.

[0068] Furthermore, during the control process, a phase-locked loop (PLL) tracks the grid voltage phase in real time to ensure that the SVPWM module modulation is synchronized with the grid; during the startup phase, the bus voltage is increased at a rate of 50V / s through the pre-charge resistor and ramp generator to suppress the startup inrush current; when the bus voltage stabilizes within the target value ±5% range (such as 190-210V at 200V), the rotor side 7 closed-loop control is triggered.

[0069] Furthermore, the system integrates hardware overcurrent (e.g. 16A) and overvoltage (e.g. 300V) protection mechanisms, controls the access of pre-charging resistors and braking resistors through relays, and cooperates with software limiting logic to form multi-level safety protection, ultimately achieving high-precision stability of the DC bus voltage (steady-state error ±1%) and grid-side current harmonic suppression (THD≤5%), providing a reliable DC power supply for the efficient operation of the doubly-fed motor.

[0070] Furthermore, based on the above principle flow and dual closed-loop control steps, the specific steps of the grid-side controller debugging process are as follows:

[0071] First, perform auxiliary power-on operation through a preset voltage (e.g., 220V) adapter plug to confirm that the power supply of the cooling fan of the grid-side converter IGBT module is connected.

[0072] Secondly, set the parameters in the corresponding software interface. Specifically, set the DC bus voltage target value through the host computer (set to 200V according to the requirements of this experiment), and configure the voltage outer loop dynamic parameters according to this target value. The ramp function is used to achieve step-by-step increments (the ramp rate is set to 50V / s in this experiment), set the voltage outer loop PI modulator proportional coefficient Kp = 0.1, the integral coefficient Ki = 0.5Ts (Ts is the control period), and the output limit is [-8V, 8V].

[0073] Finally, the output voltage of the three-phase AC voltage regulator is controlled to the set trigger voltage value to generate the grid-side converter d-axis current set value. The specific steps of this process are:

[0074] After burning the code for the network-side 6 control board using CCS (Code Composer Studio, abbreviated as CCS), turn the knob on the three-phase AC voltage regulator 2 to power it on. The back-to-back converter platform (hereinafter referred to as the platform) will first perform a precharge operation. After the voltage stabilizes, it gradually increases the output voltage of the three-phase AC voltage regulator 2 to the set trigger voltage value, and the relay closes to initiate closed-loop control. CCS is an integrated development environment used in this embodiment of the present invention to burn the code for the network-side 6 control board.

[0075] It should be noted that the settings of the above parameters have been verified through multiple experiments to ensure that the correlation coefficients can adapt to various bus voltage target values ​​and have demonstrated excellent modulation effects in practical applications.

[0076] Furthermore, the platform's corresponding code implements circuit protection logic. Dual closed-loop control can only be enabled if the voltage and current requirements of the protection logic are met, as well as the voltage trigger conditions. This circuit protection logic includes the following: If the user neglects the pre-charge phase during commissioning, the three-phase AC voltage regulator 2 may initially rotate too quickly, potentially causing the bus voltage to reach the target value but the relay to fail to close. Similarly, the bus voltage trigger value and target value must be properly set, and the trigger threshold must allow for 5% voltage fluctuations to avoid false triggering of the control due to slight bus voltage fluctuations.

[0077] Furthermore, the parameter considerations in the remaining debugging process are explained using specific target values ​​and trigger values ​​as examples, as follows:

[0078] In case 1, the trigger value is set to 25V and the target value is set to 130V. The problem that arises is that the platform will work according to the above-mentioned process, but after the relay is closed, the dual closed-loop control may be activated, the bus voltage error range may exceed 5%, and the relay may pop open. It is important to note that if the difference between the trigger value and the target value is too large, a large inrush current will be generated, triggering the circuit protection logic to pop open the relay. This platform problem can be solved by changing the trigger value and adjusting the software operation logic such as the ramp-up rate. During the experiment, this problem was gradually eliminated and solved by delaying the protection logic function and capturing the voltage and current values ​​at the moment of triggering with an oscilloscope.

[0079] Case 2: During debugging, overshoot and PI loop control failure may occur due to improper trigger and target value settings. The trigger value is set to 90V, and the bus voltage target value is set to 110V. Following the above process, the CCS variable observation module online observed that the bus voltage overshoot range is large, specifically around 125V. After a few tens of seconds of operation, the voltage suddenly spikes out of control to around 270V. This requires first explaining the principle of the rectifier bridge. In the initial phase of relay closing for a fully controlled bridge converter, if no trigger pulse is applied (i.e., in the "natural rectification" state, equivalent to an uncontrolled rectifier bridge), the output DC voltage is directly determined by the AC grid voltage. For a three-phase uncontrolled bridge rectifier circuit, the average output DC voltage is: Ud = 1.35Uac (where Uac is the effective value of the AC input line voltage). If the actual grid voltage fluctuates or the initial closing phase is near its peak, the instantaneous voltage can reach a peak value significantly higher than the average. At this point, after the dual closed-loop control is activated, the voltage outer loop PI regulator saturates its output due to excessive initial error, causing a surge in the current inner loop command. The fully controlled bridge may continue rectifying at the minimum trigger angle (such as 0°), further exacerbating energy injection and forming a positive feedback loop of voltage overshoot, PI saturation, current loss of control, and voltage surge. The main reasons for the loss of control include:

[0080] First, the trigger value was set too high, with insufficient margin. Specifically, the trigger value only considered the average rectifier voltage and was set close to or even exceeded the target value under certain voltage fluctuations, without sufficient margin for the peak voltage at the moment of closing. This made it easy for the bus voltage to exceed the target value during the natural rectification phase, and the dual closed-loop control system faced overshoot pressure before it could fully exert its regulatory effect.

[0081] Secondly, the PI loop's dynamic response lags. Specifically, the integral phase of the voltage outer loop's PI regulator requires time to accumulate, and the instantaneous high-voltage input from natural rectification is equivalent to a step disturbance. If the proportional coefficient (Kp) is insufficient or the integral time constant (Ts) is too long, the voltage rise cannot be suppressed in time, ultimately leading to PI loop loss of control.

[0082] The debugging and correction direction is mainly to set the trigger value reasonably, leaving enough margin. The trigger value should be at least a certain percentage lower than the natural rectification average value, and at the same time ensure that there is a suitable gap with the target value, which is generally set to no more than 0.9 times. In actual operation, the problem of unreasonable parameter setting can also be overcome by soft start and ramp limit at the software level. Specifically, after the relay is closed, the trigger angle is set by software to gradually decrease from 90° (such as ramp up), so that the output voltage of the fully controlled bridge rises linearly from 0 to the target value to avoid instantaneous high-voltage shock. This allows the dual closed-loop control (including the current inner loop and the speed outer loop) to have enough time to respond and adjust to voltage changes.

[0083] The embodiment of the present invention provides a solution for debugging the doubly-fed converter platform through a three-level control logic of hardware protection, parameter margin, and software compensation, thereby improving the reliability and anti-interference capability of the doubly-fed asynchronous motor control system under complex working conditions.

[0084] Furthermore, after the DC bus voltage on the grid side 6 is modulated, it is essentially a DC source with bidirectional power flow, supplying power to the rotor side converter. In step S3, the vector control strategy and debugging phase of the rotor side 7 specifically includes:

[0085] S310, pure open-loop debugging stage. During the initial debugging phase of the rotor-side converter (RSC), an open-loop voltage injection strategy is used to verify the correctness of the power circuit and signal acquisition. The rotor winding d-axis voltage vd and q-axis voltage vq (e.g., vd = 100V, vq = 50V) are directly given by the host computer. The α / β-axis voltage instructions are generated through the inverse Park transform, and the drive signal is generated through the SVPWM module. The specific debugging process is as follows:

[0086] S311. Hardware connection and parameter configuration, including connecting the rotor-side converter to the motor rotor winding; setting the grid-side converter to power the rotor-side converter 7; configuring the pulse-width modulation output pins to drive the bridge arms in rotor-side converter 7; and setting the carrier frequency and dead time. Specifically, disconnect the stator-side converter 8 from the grid. Connect only the three-phase output terminals of the rotor-side converter to the motor rotor windings (R1 / R2 / R3) via slip rings, ensuring the correct phase sequence (R1 to converter U phase, R2 to V phase, and R3 to W phase). The grid-side converter has been commissioned, and the DC bus voltage is stable at 200V. Power is supplied to the rotor-side converter via the DC bus. The DSP28335's PWM output pins (EPwm1 / EPwm2 / EPwm3) are connected to the rotor-side IGBT bridge arms via the driver board. A 10kHz carrier frequency is enabled, and the dead time is configured to 2μs.

[0087] S312. Parameter setting and observation, including setting the initial rotor voltage and frequency values ​​through code. Specifically, the initial rotor voltage value is hard-coded in the code, and the frequency is set to 5Hz. The output voltage of the rotor-side converter (R1-R2 / R2-R3 / R3-R1) is measured using an oscilloscope, which should show a three-phase sine wave with a frequency of 5Hz and an amplitude of approximately 150V. Gradually increase the frequency to 50Hz, and observe that the amplitude of the induced voltage on the stator side 8 rises to 380V±5%, and the phase is synchronized with the rotor excitation voltage (phase difference ≤2°).

[0088] S313. Experimental Results and Waveforms. This process includes stator voltage establishment and waveform observation. An oscilloscope is used to monitor and adjust the rotor-side converter output. Specifically, when the frequency rises to 50 Hz, the stator voltage RMS stabilizes at 385 V, with a total harmonic distortion (THD) of 7.2%, meeting the grid-connected amplitude requirements. The oscilloscope shows that the rotor-side converter output voltage waveform is symmetrical, with THD ≤ 8%, and a phase difference of ≤ 1.5° between the stator-side induced voltage and the rotor excitation voltage.

[0089] S320, current closed-loop debugging phase. After completing the open-loop voltage injection verification, the current closed-loop control phase begins. The core goal is to achieve accurate decoupling and tracking of the rotor current d / q axis. The main debugging steps are as follows:

[0090] S321. Switch the control mode through the host computer instruction, activate the regulator in the current inner loop to perform current closed-loop control, and at the same time close the open-loop voltage setting.

[0091] Specifically, the host computer sends a mode switching command to enable the current inner loop PI regulator and disable the open-loop voltage setting; the d-axis excitation current i_d*=5A and the q-axis torque current i_q*=0A (no-load) are given, and the current feedback value is monitored in real time through CAN communication.

[0092] S322. Adjust the proportional coefficient Kp and integral coefficient Ki of the PI regulator.

[0093] Specifically, the PI regulator parameters are tuned to make the rise time ≤ 30ms, the overshoot ≤ 10%, and the steady-state error ≤ 2% (Kp and Ki are modified online through CCS).

[0094] S323 , adjusting the conduction duty cycle of each bridge arm in the rotor side 7 according to the adjusted control signal output by the regulator, and correcting the rotor current in real time.

[0095] Specifically, a 5Hz sinusoidal disturbance is injected into i_d*, and the current waveform is observed to verify the dynamic response capability after decoupling. In terms of hardware coordination, the IGBT module adjusts its on-duty cycle based on the modulation voltage output by the PI regulator, correcting the rotor current in real time, thus forming a closed loop of acquisition, regulation, and drive.

[0096] S330, speed closed-loop debugging phase (speed control and grid synchronization). This phase includes speed loop parameter configuration and encoder verification, dual closed-loop system dynamic debugging, grid connection condition detection and closing control, and verification of bidirectional power flow after grid connection. The main debugging steps are as follows:

[0097] S331. During the speed loop parameter configuration and encoder verification process, the target speed is set, the speed outer loop regulator parameters are configured, and the encoder signal is verified to ensure that the actual motor speed can accurately reflect and respond to the set target speed.

[0098] Specifically, the host computer set the target speed to 950 rpm and enabled the outer speed loop PI regulator (initial proportional coefficient Kp = 2.0, integral coefficient Ki = 0.1 times the control period). Manually rotate the motor shaft to observe that the actual speed display value should change linearly with the mechanical speed, without pulse loss or angle jumps, ensuring that the incremental encoder (4096 pulses / rev, pole pair number 3) is collecting signals normally.

[0099] S332. During the dynamic debugging of the dual closed-loop system, the motor is started under no-load and load conditions to ensure that the speed can smoothly reach the target value and quickly return to stability, so as to verify the dynamic response performance of the dual closed-loop control system.

[0100] Specifically, when starting the motor with no load, the speed waveform should rise smoothly to the target value, and during steady-state operation, the speed fluctuation rate should be ≤0.5% (i.e., the speed fluctuation range should be ≤7.5 rpm). When a 50% rated load (0.75kW) is suddenly applied, the speed should return to stability within 50 milliseconds, with an overshoot of ≤8% (i.e., the instantaneous maximum speed should be ≤1620 rpm). If this is not achieved, the speed loop PI parameters should be gradually adjusted (increasing Kp to improve response speed and adjusting Ki to reduce steady-state error).

[0101] S333. During the grid-connected condition detection and closing control process, including real-time monitoring and ensuring that the stator voltage and phase meet the grid-connected requirements, the closing signal of the rotor side 7 is triggered to smoothly connect the motor to the grid.

[0102] Specifically, the effective value of the stator voltage is monitored in real time and must be stabilized within a range of 361 to 399 V (i.e., ±5% of the rated voltage of 380 V). Simultaneously, a phase-locked loop algorithm is used to calculate the phase difference between the stator voltage and the grid voltage, ensuring that the phase difference is ≤1° (approximately 0.01745 radians). When both conditions are met, the "grid connection conditions met" flag is triggered, controlling the closing of the second AC contactor 5 on the stator side 8. At the moment of grid connection, the stator current surge peak, measured using an oscilloscope, should be ≤1.5 times the rated current (at a rated current of 3.9 A, the surge current is ≤5.85 A), and the DC bus voltage fluctuation amplitude is ≤±10 V to prevent damage to the device from overvoltage and overcurrent.

[0103] S334. During the verification process of bidirectional power flow after grid connection, the bidirectional power flow characteristics of the motor in the subsynchronous or supersynchronous state are verified by changing the motor speed to ensure that the coordinated control capability of the rotor-side converter meets the requirements.

[0104] Specifically, by adjusting the motor speed to the subsynchronous (speed < synchronous speed) or supersynchronous (speed > synchronous speed) state, the grid-side converter power factor is observed to be close to 1 (indicating unity power factor operation), and at the same time, the rotor-side converter current direction switches correctly with the speed change (the rotor absorbs power in subsynchronous mode and feeds back power in supersynchronous mode), verifying the bidirectional power flow characteristics of the doubly-fed asynchronous motor in different operating modes and the converter's coordinated control capability.

[0105] In the above three stages (ie, step S310 to step S330 ), the soft start control code is used to limit the startup current to reduce the startup impact.

[0106] Furthermore, the technical indicators and debugging key points of the above three stages mainly include: In terms of speed control accuracy, relying on the encoder's high resolution (4096 pulses / rev) and PI parameter optimization to ensure a steady-state error of ≤0.5%, meeting the requirements of high-precision drive. In terms of grid connection safety, through dual detection of stator voltage amplitude and phase, combined with hardware relays and software limiting logic, the inrush current is suppressed to within 1.5 times the rated value, ensuring the safety of the converter IGBT module. In terms of power conversion efficiency, after grid connection, the observed grid-side 6 power factor is close to 1, indicating low system reactive power loss, meeting the high-efficiency requirements of scenarios such as all-electric ship propulsion.

[0107] During the debugging process, the embodiment of the present invention sequentially performs speed loop parameter tuning, dual closed-loop dynamic verification, precise detection of grid-connected conditions, and power flow characteristic testing. This comprehensively and systematically verifies the full-process performance of the doubly-fed asynchronous motor from speed control to grid-connected operation, fully ensuring the efficient coordination and high reliability of the hardware and control algorithm.

[0108] To better illustrate the debugging method provided by the embodiment of the present invention, the DSP28335 back-to-back converter is used as an example of the core controller. The specific debugging steps are as follows:

[0109] Step 1: Burn the network side 6 control code into DSP28335 through the emulator.

[0110] Step 2: Power on the three-phase AC voltage regulator 2. The grid-side DC bus 6 is charged through the first AC contactor 4 in parallel with the buffer resistor 3. When the DC bus voltage rises to a preset threshold and stabilizes, the DSP sends a signal to close the first AC contactor 4.

[0111] Step 3: The PWM signal starts to be enabled and enters the working state. By precisely controlling the PWM duty cycle, the DC bus voltage is adjusted to the required target value to ensure its stable operation.

[0112] Step 4: After completing the grid side 6 debugging, use the emulator to burn the rotor side 7 control code into the DSP28335.

[0113] Step 5: The host computer controls the PWM signal to excite the rotor. After the stator voltage reaches 380V and its phase is synchronized with the grid, the rotor-side DSP sends a signal to close the second AC contactor 5, connecting the motor stator to the grid. The motor then enters normal operation.

[0114] Through the above design, the method described in the embodiment of the present invention achieves prime mover-free starting, low-inrush current debugging, and online adaptive parameter tuning of the doubly-fed asynchronous motor through the coordination of hardware architecture optimization and software strategy. This not only significantly improves the debugging efficiency of the doubly-fed asynchronous motor, but also enhances the reliability of the entire system. In addition, this method effectively overcomes the problems in the prior art of the doubly-fed asynchronous motor debugging process, which relies on external prime mover drag, has a complex hardware system, high debugging costs, cannot independently verify the coordinated performance of the converter and motor, is prone to excitation inrush current and overcurrent when directly powered on, the stator voltage is constrained by the power grid, resulting in strong coupling of the rotor current excitation and torque components, and the need for frequent rewiring of the fixed hardware interface of the converter platform.

[0115] Example 2

[0116] Based on the same inventive concept, this embodiment provides a doubly-fed asynchronous motor debugging system based on a back-to-back converter. The principle of solving the problem is similar to the doubly-fed asynchronous motor debugging method based on a back-to-back converter provided in Example 1, and the repeated parts will not be repeated.

[0117] This embodiment provides a doubly-fed asynchronous motor debugging system based on a back-to-back converter, comprising:

[0118] A charging module is used to supply power to the three-phase AC voltage regulator 2 and charge the DC bus capacitor through the first AC contactor 4 in parallel with the buffer resistor 3 on the grid side 6; wherein the grid side 6 includes a digital signal processor;

[0119] A closing module, configured to cause the digital signal processor to send a closing signal to the first AC contactor 4 when the DC bus capacitor is charged to a preset amplitude;

[0120] The rotor-side debugging module is used to perform pure open-loop debugging, current closed-loop debugging, and speed closed-loop debugging on the rotor-side converter after the first AC contactor 4 is closed; wherein, the voltage and phase of the stator end are monitored during the pure open-loop debugging, current closed-loop debugging, and speed closed-loop debugging;

[0121] The grid-connected module is used to send a closing signal to the second AC contactor 5 on the stator side 8 when the voltage rises to a preset value and the phase is synchronized with the grid, so that the motor stator is connected to the grid.

[0122] Example 3

[0123] This embodiment provides a doubly-fed asynchronous motor debugging platform, including a doubly-fed asynchronous motor debugging system based on a back-to-back converter provided in the second embodiment.

[0124] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0125] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0126] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0127] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0128] Obviously, the above embodiments are merely examples for clarity of explanation and are not intended to limit the implementation methods. Those skilled in the art will appreciate that other variations or modifications can be made based on the above description. It is not necessary and impossible to enumerate all implementation methods here. Obvious variations or modifications arising therefrom remain within the scope of protection of the present invention.

Claims

1. A method for debugging a doubly-fed asynchronous motor based on a back-to-back converter, characterized in that: include: Powering the three-phase AC voltage regulator and charging the DC bus capacitor through the first AC contactor connected in parallel with the buffer resistor on the grid side; wherein the grid side includes a digital signal processor; When the DC bus capacitor is charged to a preset amplitude, the digital signal processor sends a closing signal to the first AC contactor; After the first AC contactor is closed, the rotor-side converter is subjected to pure open-loop debugging, current closed-loop debugging, and speed closed-loop debugging, respectively; wherein the voltage and phase of the stator end are monitored during the pure open-loop debugging, current closed-loop debugging, and speed closed-loop debugging; When the voltage rises to a preset value and the phase is synchronized with the power grid, a closing signal is sent to the second AC contactor on the stator side, and the motor stator is connected to the power grid.

2. The method for debugging a doubly-fed asynchronous motor based on a back-to-back converter according to claim 1, characterized in that: After the first AC contactor is closed, before the pure open-loop debugging, current closed-loop debugging and speed closed-loop debugging of the rotor-side converter are respectively performed, dual closed-loop control is also performed on the grid side.

3. The method for debugging a doubly-fed asynchronous motor based on a back-to-back converter according to claim 2, characterized in that: The steps of performing double closed-loop control on the grid side are: The voltage outer loop sets a target voltage value with the goal of controlling the DC bus voltage; based on the target value, a regulator generates a grid-side converter d-axis current setpoint; The current inner loop collects the grid-side current, transforms the grid-side current, and decomposes the transformed grid-side current into active and reactive components; Harmonics are suppressed and current decoupling is achieved through proportional-integral, and a voltage instruction is output to a space vector pulse width modulation module to generate a pulse width modulation signal. The pulse width modulation signal is used to drive the bridge arm of the device.

4. The method for debugging a doubly-fed asynchronous motor based on a back-to-back converter according to claim 3, characterized in that: The voltage outer loop sets a target voltage value with the goal of controlling the DC bus voltage. Based on the target value, the steps of generating a grid-side converter d-axis current given value through the regulator are as follows: Setting the target value of the DC bus voltage by the host computer; Configuring the voltage outer loop dynamic parameters according to the target value; wherein, when configuring the voltage outer loop dynamic parameters, a ramp function is used to achieve segmented increments; the voltage outer loop dynamic parameters include a proportional coefficient and an integral coefficient of a regulator; Outputting a limit according to the proportional coefficient and the integral coefficient of the regulator; According to the amplitude limiting, the output voltage of the three-phase AC voltage regulator is controlled to a set trigger voltage value, and a given value of the d-axis current of the grid-side converter is generated.

5. The method for debugging a doubly-fed asynchronous motor based on a back-to-back converter according to claim 4, characterized in that: The steps of controlling the output voltage of the three-phase AC voltage regulator to the set trigger voltage value are: burning the control board code on the network side, twisting the knob of the three-phase AC voltage regulator to power on for pre-charging, and gradually increasing the output voltage of the three-phase AC voltage regulator to the set trigger voltage value after the voltage stabilizes.

6. The method for debugging a doubly-fed asynchronous motor based on a back-to-back converter according to claim 1, characterized in that: The steps of pure open-loop debugging are: connecting the rotor-side converter to the motor rotor winding; Setting the grid-side converter to power the rotor side, configuring the pulse width modulation output pin to drive the bridge arm in the rotor side, and setting the carrier frequency and dead time; The initial rotor voltage and frequency values ​​are set by code, and the rotor-side converter output is monitored and adjusted using an oscilloscope.

7. The method for debugging a doubly-fed asynchronous motor based on a back-to-back converter according to claim 1, characterized in that: The steps of current closed-loop debugging are: The control mode is switched by the host computer command, the regulator in the current inner loop is activated to perform current closed-loop control, and the open-loop voltage setting is closed at the same time; Adjusting the proportional coefficient and the integral coefficient of the regulator; The conduction duty cycle of each bridge arm in the rotor side is adjusted according to the adjusted control signal output by the regulator, and the rotor current is corrected in real time.

8. The method for debugging a doubly-fed asynchronous motor based on a back-to-back converter according to claim 1, characterized in that: The steps of speed closed loop debugging are: Set the target speed, configure the speed outer loop regulator parameters, and verify the encoder signal; Start the motor under no-load and load conditions and verify the dynamic response performance of the current inner loop and speed outer loop; Real-time monitoring of the stator terminal voltage and phase, when the voltage and phase meet the grid connection requirements, triggering the closing signal on the rotor side, so that the motor can be smoothly connected to the grid; By changing the motor speed, the bidirectional power flow characteristics of the motor in subsynchronous or supersynchronous state are verified.

9. A doubly-fed asynchronous motor debugging system based on back-to-back converter, characterized in that: include: A charging module, configured to supply power to the three-phase AC voltage regulator and charge the DC bus capacitor via a first AC contactor connected in parallel with a buffer resistor on the grid side; wherein the grid side includes a digital signal processor; a closing module, configured to cause the digital signal processor to send a closing signal to the first AC contactor when the DC bus capacitor is charged to a preset amplitude; a rotor-side debugging module, configured to perform pure open-loop debugging, current closed-loop debugging, and speed closed-loop debugging on the rotor-side converter after the first AC contactor is closed; wherein the voltage and phase of the stator end are monitored during the pure open-loop debugging, current closed-loop debugging, and speed closed-loop debugging; The grid-connected module is used to send a closing signal to the second AC contactor on the stator side when the voltage rises to a preset value and the phase is synchronized with the grid, so that the motor stator is connected to the grid.

10. A double-fed asynchronous motor debugging platform, characterized in that: Including the double-fed asynchronous motor debugging system based on back-to-back converter as described in claim 9.

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