A Hardware Test Resource Allocation Method Based on Dynamic Topology Adaptation

Abstract

The present application relates to the technical field of electric digital data processing, and especially relates to a hardware test resource allocation method based on dynamic topology adaptation, which comprises the following steps: step 1: constructing a dynamic topology-aware network; collecting electrical connection signals between devices on a test backplane in real time, generating and periodically updating a topology connection matrix, wherein the matrix element value represents the on-off state of the physical link between devices, and the matrix is updated immediately when a device plugging event is detected; step 2: quantifying resource and task attributes; step 3: performing topology-driven dynamic resource matching; step 4: responding to topology changes for non-interruption migration; when the topology connection matrix is updated, step 3 is re-executed for the affected tasks, and non-interruption switching is realized through parallel initialization of new and old resources and signal deviation fault tolerance verification. Through the dynamic topology adaptation technology of the present application, test resources can be dynamically adjusted and matched according to real-time topology and task requirements, ensuring efficient use of resources.

Description

Technical Field

[0001] This invention relates to the field of electronic digital data processing technology, and in particular to a hardware test resource allocation method based on dynamic topology adaptation. Background Technology

[0002] In the field of hardware automation testing, especially in multi-device collaborative testing scenarios (such as chip production line testing and communication base station module testing), the test system needs to manage the dynamic connection relationships between heterogeneous test resources (including digital signal generators, power modules, high-speed acquisition cards, etc.) and the hardware under test. Existing technologies generally adopt a static resource allocation strategy. This strategy involves pre-binding a fixed mapping relationship between test resources and specific devices under test during the test initialization phase and maintaining this allocation unchanged throughout the entire test cycle. This technical solution has the following inherent drawbacks:

[0003] The hardware environment under test experiences frequent hot-swapping operations (such as replacing the chip module under test in the production line) and link failures (such as signal interruption caused by aging backplane connectors), while static allocation strategies require the topology to remain fixed. When such topology changes occur, the originally allocated resources cannot continue communication due to physical link breaks, causing the test task to be forcibly interrupted. For example, in communication base station testing, replacing a faulty RF module will cause the already bound signal analyzer resources to become invalid.

[0004] Static strategies match resources solely based on initial task requirements, ignoring resource status changes and topology dependencies during testing. Because the matching dimension between resource type and task requirements is singular (typically only considering functional type), high-value resources (such as high-speed acquisition cards) are often assigned to non-critical tasks, while urgent tasks remain in a waiting state due to resource type mismatch. Real-world test data shows that in a 200-node test environment, the peak idle rate of dedicated power modules under a static strategy can reach 35%.

[0005] After a topology change, manual intervention is required to reconfigure resource mapping relationships. The configuration process includes operations such as resource release, physical path switching, and task restart. Taking multi-channel memory testing as an example, the average test interruption caused by a single link failure repair takes more than 15 minutes, which seriously restricts the efficiency of high-throughput production lines.

[0006] Therefore, there is an urgent need for a hardware test resource allocation method based on dynamic topology adaptation to solve the above problems. Summary of the Invention

[0007] To achieve the above objectives, this invention provides a hardware test resource allocation method based on dynamic topology adaptation, comprising:

[0008] Step 1: Construct a dynamic topology-aware network: Real-time acquisition of electrical connection signals between devices on the test backplane, generation and periodic updating of the topology connection matrix, the matrix element values ​​representing the on / off status of physical links between devices, and matrix update is triggered immediately when a device plugging / unplugging event is detected;

[0009] Step 2: Quantify resource and task attributes:

[0010] Poll the hardware status register of the test resource to generate a resource status vector containing busy / idle status, remaining available time, and resource type encoding;

[0011] Parse the task type identifier, required resource type set, task criticality level, and waiting tolerance time in the test task request, and calculate the task priority weight value;

[0012] Step 3: Perform topology-driven dynamic resource matching:

[0013] The minimum hop path length from idle resources to the device under test is calculated based on the topology connection matrix, and the hop length increases with the number of relay devices.

[0014] The topology-aware matching value is generated by integrating resource type compatibility, hop count path length influencing factors, and real-time resource load rate.

[0015] The resource adaptation weight is obtained by multiplying the task priority weight value by the topology-aware matching value, and the highest weight combination is selected to allocate resources.

[0016] Step 4: Uninterrupted migration in response to topology changes: When the topology connection matrix is ​​updated, Step 3 is re-executed for the affected tasks, and uninterrupted switching is achieved through parallel initialization of old and new resources and fault tolerance verification of signal deviation.

[0017] The beneficial effects of this invention are:

[0018] 1. This invention incorporates bit error rate exceeding events and device response timeout events into its calculation, combining the severity and duration of each event for weighting, ensuring that the contribution of each event to the failure rate is accurately assessed. This event-characteristic-based update mechanism allows weight updates to truly reflect the actual impact of each event on the system, thereby improving the accuracy of failure rate weight updates.

[0019] 2. This invention introduces a sliding time window, enabling the update of failure rate weights to reflect the stability of the current environment in real time. The length of the sliding time window is negatively correlated with the stability of the test environment, allowing for flexible responses to different network or device state changes. This makes weight updates more timely, ensuring the system can quickly adjust when faced with new faults or changes.

[0020] 3. By normalizing the total contribution value of all events to the [0,1] interval, this invention ensures that the contribution values ​​of different events can be compared and integrated under the same standard. By using the historical maximum contribution value as the normalization benchmark, the weight update of each event can be carried out under the same benchmark, effectively avoiding the problem of a single event excessively affecting the stability of the system.

[0021] 4. This invention calculates the contribution value of each event, fully considering the severity and duration of the event, enabling the system to effectively cope with fault events of different scales. Severe fault events (such as long-term bit errors or timeouts) will have a greater impact on the weights, while short-lived, small-scale faults will not excessively affect the overall stability of the system. This allows the system to make reasonable adjustments based on the actual fault situation, improving the robustness and reliability of the network. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in this invention or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, those skilled in the art can obtain other drawings based on these drawings without creative effort.

[0023] Figure 1 This is a flowchart of the steps of the method of the present invention;

[0024] Figure 2 This is a flowchart of the steps for generating topology-aware matching values ​​in step 3 of the method of the present invention;

[0025] Figure 3 This is a flowchart illustrating the steps involved in determining the phase synchronization threshold using the method of the present invention. Detailed Implementation

[0026] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments. It should also be noted that, to make the embodiments more comprehensive, the following embodiments are the best and preferred embodiments, and those skilled in the art can use other alternative methods to implement some well-known technologies; moreover, the accompanying drawings are only for more specific description of the embodiments and are not intended to specifically limit the present invention.

[0027] Please see Figures 1-3This invention provides a hardware test resource allocation method based on dynamic topology adaptation. First, in the test environment, electrical connection signals between devices on the backplane are collected in real time. These signals are detected by sensors and converted into a topology connection matrix, which reflects the physical link status (on or off) between each device. When the system detects device insertion / removal or link failure, the topology matrix is ​​updated immediately to ensure that the topology information reflects the current real hardware connection status, thereby avoiding resource failure caused by link changes.

[0028] The system periodically polls the hardware status registers of the test resources to obtain information such as the usage status (e.g., busy / idle), remaining available time, and resource type for each resource, and generates a corresponding resource status vector. This information provides the foundational data for subsequent resource matching. In addition, the system parses information such as task type, resource requirements, task priority, and waiting tolerance time from the test task request, and then calculates the task priority weight. This calculation is based on the urgency and importance of the task to ensure that urgent tasks receive high-priority resources.

[0029] Based on a dynamic topology connection matrix, the system first calculates the minimum hop path length from idle resources to the device under test, taking into account the number of intermediary devices. A shorter hop path length means faster data transmission efficiency and response time. Then, combining resource type compatibility, the impact factor of the hop path, and the real-time load of the resources, a topology-aware matching value is calculated. The system further multiplies the task's priority weight by this matching value to obtain the adaptation weight of each task and resource, and finally selects the resource with the highest adaptation weight to allocate to the task.

[0030] When the topology connection matrix is ​​updated, the system reassesses the resource allocation for the affected tasks and re-executes the resource matching process in step 3. To avoid system interruption, the new resources are initialized in parallel with the existing resources, and signal deviation fault tolerance verification is performed to ensure that tasks can run smoothly on the new resources. This process requires no manual intervention, ensuring the continuity and efficiency of hardware resource allocation.

[0031] Through the dynamic topology adaptation technology of this invention, test resources can be dynamically adjusted and matched according to real-time topology and task requirements, ensuring efficient resource utilization. The topology-aware network can respond in real-time to device plugging / unplugging and link failures, avoiding resource failures and test interruptions caused by static allocation. Furthermore, dynamic resource matching allows tasks to be rationally allocated based on priority and the actual state of resources, improving testing efficiency. Especially in the high-throughput environment of a production line, the non-disruptive migration technology significantly reduces the time lost due to fault repair and link switching, improving the overall stability and response speed of the testing system.

[0032] In one possible implementation, whenever the topology connection matrix changes, the system records the time interval between the current change event and the previous event. In this way, the system can acquire a series of time interval data, which provides a basis for subsequent periodic adjustments.

[0033] The system calculates the average of all historical time intervals and sets a first scaling factor. If the latest time interval is less than this first scaling factor, it indicates that the topology changes are relatively frequent. In this case, the system determines that the test environment may be in a more dynamic state, thus requiring more frequent updates to the topology connectivity matrix. To adapt to this change, the system shortens the topology update cycle to a second scaling factor of the original cycle, ensuring that the system can respond to topology changes more promptly.

[0034] In addition to monitoring the frequency of changes, the system also observes the steady-state duration of the test environment. When the test environment remains stable for a period of time, the system compares it with the median of historical steady-state durations to determine whether it has entered a stable state. If the steady-state duration exceeds a set baseline threshold, the system considers the topology environment to be stabilizing, and therefore the update cycle can be appropriately extended. In this case, the system will extend the update cycle to a third proportional coefficient of the original cycle to reduce unnecessary topology updates and improve the efficiency of resource allocation.

[0035] The system sets the scaling factor by quantifying the complexity of the test environment. Complexity is determined by two factors: the number of devices online simultaneously and the frequency of topology changes. The system quantifies the complexity of the test environment based on the product of these two factors, thus providing a basis for setting the first, second, and third scaling factors. Specifically, the more complex the test environment (more devices, more frequent changes), the shorter the update cycle; conversely, when the environment is relatively stable, the update cycle can be relatively longer.

[0036] This dynamic adjustment of the update cycle significantly improves the flexibility and efficiency of topology matrix updates. In dynamic test environments with frequent device changes, shortening the update cycle ensures the real-time nature of topology information, responding promptly to changes in links and avoiding resource allocation errors or task execution delays caused by lagging topology information. Conversely, in steady-state test environments, extending the update cycle reduces unnecessary topology update operations, saving computing resources and time, and improving overall system performance.

[0037] By introducing complex quantification and scaling factor adjustment, the system can adaptively adjust the topology update strategy according to different testing environments, making test resource allocation more intelligent and flexible, and ensuring the efficiency and stability of the testing process.

[0038] In one possible implementation, firstly, an appropriate base weight coefficient is selected from a preset weight coefficient table based on the task's criticality level (i.e., the urgency or importance of the task). The criticality level of a task is determined by the nature of the task or external requirements. For tasks with higher criticality levels, the system will assign them higher base weight coefficients to ensure their higher priority in resource scheduling.

[0039] The calculation of the decay factor is based on the ratio of a task's tolerable waiting time to the current average task waiting time. When a task's waiting time exceeds the preset tolerance time, the decay factor is smaller. Specifically, the larger the ratio, the smaller the decay factor, indicating that the task's waiting time has exceeded its tolerance range, and its priority should be lowered to avoid wasting resources on waiting for low-priority tasks for extended periods. This decay mechanism dynamically reflects the actual waiting situation of tasks, preventing excessively long-waiting tasks from consuming resources and impacting system efficiency.

[0040] The priority weight value of a task is obtained by multiplying the base weight coefficient selected from the weight coefficient table by the decay factor. This priority weight value determines the scheduling priority of the task; tasks with higher priority weight values ​​will receive higher priority during resource scheduling to ensure that critical tasks are completed on time.

[0041] The weighting coefficient table is constructed based on the cost losses caused by historical task interruptions. These cost losses are calculated by weighting two factors: the time required to redo the task and the idle cost of equipment during the task interruption. By analyzing historical data, the potential losses caused by task interruptions can be estimated, thereby setting corresponding basic weighting coefficients for different task categories. In this way, the system can reasonably adjust the priority of tasks based on their potential losses, avoiding maximizing losses.

[0042] This calculation method allows for precise adjustment of task priority weights based on actual task conditions. When a task's waiting time is too long, the system can promptly reduce its priority by calculating a decay factor, preventing excessive resource consumption due to prolonged waiting. Simultaneously, by using a weight coefficient table built based on loss costs, the system can effectively identify which tasks have a greater impact on system resources, thus prioritizing high-priority, high-loss-cost tasks and reducing losses incurred when tasks are interrupted or redone.

[0043] This method improves resource utilization efficiency while ensuring fairer and more reasonable task scheduling, reducing unnecessary resource waste, and optimizing the overall task execution process. This dynamic and intelligent priority adjustment mechanism makes task scheduling more aligned with actual needs, effectively improving the overall system performance and response speed.

[0044] In one possible implementation, the fit is first calculated by matching the set of resource types required for the task with the codes of candidate resource types bit by bit. The matching status of each bit represents whether a feature of the resource type meets the task requirements. The fit is calculated by multiplying the proportion of matching bits to the total number of bits by a type compatibility correction factor. The compatibility correction factor is obtained by querying a mapping table between electrical parameters and task requirements in the resource specifications. This correction factor adjusts the weight of the fit, ensuring that key factors such as electrical parameters are effectively considered. This process ensures a high degree of matching between resource types and task requirements, thereby improving the efficiency and accuracy of task execution.

[0045] When evaluating resources, the number of hops and path length also affect the final matching value. The number of hops refers to the number of devices traversed during data transmission or task execution. By inputting the minimum hop length into the piecewise function, a linear decay value is output when the hop count is less than or equal to a preset hop threshold; conversely, an exponential decay value is output when the hop count exceeds this threshold. This decay mechanism reflects the impact of path length on resource matching. Especially in long-path scenarios, signal or data transmission can be affected by interference or delays from relay devices, leading to reduced task execution efficiency. The dynamic adjustment of the decay slope is achieved through the signal attenuation coefficient of the relay devices, allowing for real-time adjustment of the attenuation factor based on actual conditions, thus more accurately reflecting the impact of different paths on task execution.

[0046] During resource scheduling, high resource load can negatively impact task execution. To avoid resource overload, the system applies a penalty coefficient to high-load resources, with the penalty strength directly proportional to the extent to which the load exceeds a critical value. This means that when a resource's load exceeds a certain range, its matching value will decrease, thus preventing tasks from being assigned to overloaded resources. This mechanism effectively prevents resource bottlenecks and improves task processing stability.

[0047] This method of generating topology-aware matching values ​​comprehensively considers multiple factors such as resource type suitability, path length, and resource load, ensuring that tasks are efficiently and rationally allocated to appropriate resources. Resource type suitability calculation ensures that the resources required by a task meet its specific requirements, while the hop count and path length impact factor effectively optimizes the transmission path, avoiding latency or losses caused by long paths. Load factor compensation, by penalizing high-load resources, ensures that tasks do not execute under resource overload, thereby improving the overall efficiency and stability of the system.

[0048] This method can dynamically adjust resource allocation strategies according to changes in the actual environment, avoiding inefficiencies or mismatches caused by static configuration, thereby optimizing task execution time and quality, and greatly improving resource utilization and task processing capabilities.

[0049] In one possible implementation, after a new resource is allocated, an initialization process is first performed. During this process, the new resource loads a standard test stimulus signal and performs a self-test. The self-test standard is to compare the output signal of the new resource with its nominal value. If the deviation between the two is less than a first tolerance value determined by the device's accuracy class, the self-test is considered to have passed. The purpose of this step is to ensure that the performance of the new resource meets predetermined standards, preparing for switchover. If the deviation exceeds the tolerance range, it indicates that the performance of the new resource has a problem and it cannot be used for switchover.

[0050] After the new resource passes its self-test, it enters the signal deviation verification stage. During this stage, the output signals of the old and new resources are simultaneously acquired within a preset overlap time. Through synchronous acquisition, the amplitude difference and phase difference between the two are calculated. The amplitude difference is used to determine the difference in signal strength, ensuring that the signal strength is within acceptable limits; while the phase difference is used to verify the synchronization of the signals, ensuring that the phase relationship between the switched resource and the original resource is consistent, avoiding errors caused by signal asynchrony.

[0051] After signal deviation verification is completed, the amplitude difference and phase difference are used to determine whether resource switching can proceed. If the amplitude difference is less than the lower limit of the device signal's allowable fluctuation range, and the phase difference is less than the set phase synchronization threshold, the signals of the old and new resources are considered to be consistent, and the old resource can be released and the switch to the new resource can proceed smoothly. If the amplitude or phase difference exceeds the set range, an alarm mechanism is triggered, indicating a problem with the switch. In this case, it is necessary to revert to step 3, reassess the resource's compatibility, or re-execute the verification process.

[0052] Through the aforementioned uninterrupted switching process, system stability and continuity can be ensured during task resource switching. The parallel initialization process ensures that new resources undergo rigorous self-checks before switching, guaranteeing they meet accuracy requirements and reducing erroneous switching due to unqualified resources. The signal deviation verification stage further ensures signal consistency during switching by accurately comparing the signals of the old and new resources, avoiding system anomalies caused by signal mismatch. The fault-tolerant switching decision mechanism makes reasonable decisions at critical moments, ensuring the system can respond flexibly to resource switching and promptly issue alarms and rollbacks when problems occur, reducing risks and system interruptions caused by resource issues and significantly improving system reliability and fault tolerance.

[0053] This uninterrupted switching method can effectively avoid pauses during task execution, improve the system's continuous working ability in complex environments, thereby improving the efficiency and reliability of task processing, and is suitable for task resource switching scenarios that require high stability and high precision.

[0054] In one possible implementation, a standard sine wave signal is first injected into each type of relay equipment in the test environment. This signal has a stable frequency and amplitude, serving as a standard input signal to ensure signal source consistency during the test. By injecting this signal, the test environment can simulate the signal changes as it passes through the relay equipment, facilitating subsequent measurement of the signal attenuation coefficient.

[0055] After a signal is transmitted through a relay device, the signal-to-noise ratio (SNR) change is measured using testing equipment. SNR is a crucial indicator of signal quality; after transmission, the SNR typically decreases, reflecting the degree of signal attenuation. Measuring this decrease in SNR directly reflects the attenuation effect of the relay device on the signal.

[0056] By collecting data on different hop counts (i.e., the number of relay devices the signal passes through) and the corresponding signal-to-noise ratio (SNR) drop values, data fitting is performed based on the relationship between the SNR drop value and the hop count. The result of the fitting is a signal attenuation curve, and the slope of the curve is the signal attenuation coefficient. The attenuation coefficient reflects the rate of signal quality degradation with each additional relay device. This coefficient is an important basis for evaluating how signal quality changes with the number of hops.

[0057] When the firmware of a relay device is upgraded, the device's signal processing capabilities may change, potentially affecting its signal attenuation characteristics. Therefore, the aforementioned measurement process needs to be re-executed to update the signal attenuation coefficient. After a firmware upgrade, the device's performance parameters and signal processing logic may differ, necessitating periodic remeasurement and updating of the attenuation coefficient to ensure the accuracy of the calculation results.

[0058] This method accurately obtains the signal attenuation characteristics of each relay device during signal transmission and quantifies these characteristics into a signal attenuation coefficient. This coefficient is crucial for path planning and optimization. Specifically, it helps evaluate the quality of paths with different hop counts, select paths with lower signal attenuation, and improve transmission efficiency and signal quality.

[0059] Furthermore, remeasuring and updating the attenuation coefficient after a device firmware upgrade ensures the system can adapt promptly to changes in device performance, thus avoiding performance fluctuations caused by firmware updates. This enhances the system's flexibility and adaptability, ensuring consistent and reliable signal transmission quality.

[0060] By accurately calculating the attenuation coefficient, the signal transmission path is optimized, improving communication quality and efficiency. In particular, in equipment upgrades and multi-hop path environments, it can effectively reduce the negative impact of signal attenuation on system performance.

[0061] In one possible implementation, the maximum clock jitter range needs to be obtained from the product specifications of the device under test (DUT). Clock jitter refers to the random fluctuations in the clock signal and is a key parameter for evaluating the synchronization performance of a device. The product specifications typically provide the device's clock jitter range, which represents the maximum fluctuation in the clock signal generated by the device under different operating conditions.

[0062] The phase sensitivity level is determined based on the type of the current test task. Different test tasks have different requirements for clock synchronization; some tasks may have relatively lenient phase synchronization requirements, while others require extremely high precision. Therefore, the phase sensitivity level needs to be evaluated and determined according to the task type. A higher phase sensitivity level indicates a more stringent requirement for synchronization accuracy, and correspondingly, the phase synchronization threshold should be lower to ensure that the accuracy requirements of the task are met.

[0063] Next, based on the determined phase sensitivity level, the maximum clock jitter range of the device is divided into multiple sub-intervals. The division method refines the clock jitter range based on different sensitivity levels. For example, when the sensitivity level is high, the sub-intervals are more finely divided to ensure a more accurate phase synchronization threshold; while when the sensitivity level is low, the sub-intervals are larger to accommodate more lenient synchronization requirements.

[0064] In the above division process, the median of the target sub-interval is selected as the phase synchronization threshold. The median is representative and provides a balance point within the clock jitter range, ensuring synchronization accuracy without affecting equipment performance or testing efficiency due to overly stringent requirements. This median is the final phase synchronization threshold, reflecting the balance between task requirements and equipment clock performance.

[0065] Finally, by analyzing the timing constraints in the test task requirements, the required phase sensitivity level was further confirmed. The timing constraints define the specific requirements for time accuracy during testing; analyzing these constraints helps to accurately determine the synchronization accuracy requirements, thereby allowing for the reasonable setting of the phase synchronization threshold.

[0066] This process allows for the precise selection of an appropriate phase synchronization threshold for each task, based on the device's clock jitter characteristics and the requirements of the test mission. Specifically, this method flexibly adjusts the synchronization threshold according to the device's maximum clock jitter range, while dynamically adjusting the threshold size in conjunction with the phase sensitivity level of the test mission, ensuring that the device meets synchronization accuracy requirements under different operating conditions.

[0067] Furthermore, this method allows for adjustment of synchronization accuracy based on the timing constraints of different tasks, enhancing adaptability and flexibility during testing. It not only improves testing accuracy but also optimizes the synchronization performance of equipment in actual operation, ensuring stable and accurate operation under various task conditions. This method also allows for more precise definition of clock synchronization boundaries, reducing system errors caused by inaccurate synchronization and improving the overall system stability and reliability.

[0068] In one possible implementation, the state of each node and connection in the network topology is represented by a topology connectivity matrix. This matrix records the direct connections between nodes and can be represented as an adjacency matrix. Each element of the matrix indicates whether there is a direct connection between the corresponding nodes. If there is a direct connection, the element has a value of 1; otherwise, it has a value of 0. This matrix is ​​used as the adjacency matrix for Dijkstra's algorithm, with resource nodes set as the starting point to calculate the shortest paths from resource nodes to other nodes.

[0069] In the traditional Dijkstra's algorithm, path weights typically only consider hop count or distance. However, in this method, the calculation of path weights further considers the historical failure rate of relay devices. Specifically, the path weight is not only determined by the number of hops but also weighted according to the historical failure rate of the relay devices traversed. Relay devices with higher failure rates have increased weights in the path, meaning the overall weight of the path will increase accordingly. This is to avoid selecting paths that pass through devices with high failure rates, thereby improving the overall reliability of the path.

[0070] When calculating the shortest path, if multiple paths with the same number of hops exist, this method further compares the sum of their historical failure rates. Specifically, when the number of hops is the same, paths with lower sums of historical failure rates of the intermediate devices they pass through are prioritized. This strategy reduces the risk of data transmission on high-failure-rate devices, thereby improving network stability and reliability.

[0071] The improved Dijkstra algorithm considers device failure history while selecting the shortest path, enhancing the intelligence and reliability of path selection. Traditional Dijkstra algorithms rely solely on path length or hop count for selection, while this method incorporates failure rate factors, avoiding paths passing through devices with high failure rates and reducing the risk of transmission interruptions or performance degradation due to relay device failures.

[0072] Furthermore, when multiple paths have the same hop count but different failure rates, this method prioritizes the path with the lowest sum of historical failure rates, which helps improve the overall stability of the network and avoids the risk of frequent network failures. This method is particularly suitable for scenarios with high network reliability requirements, such as real-time communication and data transmission in critical services.

[0073] Ultimately, this improved path selection method can effectively enhance network robustness, optimize resource utilization, and ensure the stability of data transmission paths, thereby improving the overall efficiency and stability of the system.

[0074] In one possible implementation, the system monitors and records the signal quality and device response in real time during each signal transmission. If abnormal events such as exceeding the bit error rate limit or device response timeout occur, these events are recorded and used for subsequent failure rate calculations. Exceeding the bit error rate limit indicates a high error rate during data transmission, while device response timeout means the device failed to respond promptly, potentially indicating a malfunction or performance problem.

[0075] The formula for calculating the contribution value of each event is as follows:

[0076] Individual event contribution value = event severity level × duration / standard testing cycle;

[0077] Among them, the severity level of an event is scored according to the nature of the event. Events with a high severity level (such as large-scale bit errors or long-term device response timeouts) will have a larger contribution value; the duration indicates the length of time the event occurs, and the longer the duration, the greater the impact on the failure rate; the standard test cycle serves as a benchmark, usually set as a fixed period, to standardize the contribution value of events.

[0078] In the actual failure rate update process, the system uses a sliding window to calculate the contribution of all events. The length of the sliding window is related to the stability of the test environment. A shorter window indicates higher sensitivity to the latest events, reflecting the dynamic changes in the test environment; while a longer window reflects the system's stability over a longer period. Through the sliding window mechanism, the system can adapt to different test environments and dynamically update the failure rate calculation.

[0079] The total contribution value of all events is normalized based on the maximum historical contribution value, ensuring that the contribution value is normalized to the [0,1] range. This normalization process ensures that the failure rate weight can be fairly compared with the weights of other path selections, avoiding the extreme impact of a single event. Using the maximum historical contribution value as the normalization benchmark means that the system normalizes the current weight value based on the most severe historical failure event, avoiding excessive expansion or contraction of the failure rate weight.

[0080] Through the above mechanism, the update of historical failure rate weights can not only reflect the actual impact of each event on network transmission, but also be dynamically adjusted according to different environments and event characteristics, ensuring the accuracy and timeliness of failure rate weights.

[0081] This update mechanism effectively combines the severity of events with their timing, reflecting network instability in a short period and preventing short-term failures from impacting long-term path selection reliability. The use of a sliding time window allows the system to automatically adjust failure rate weights based on changes in the testing environment, providing a more flexible and dynamic response capability.

[0082] By normalizing the historical maximum contribution value, all failure rate weights can be kept within a reasonable range, thereby preventing a single high-severity event from having an excessive impact on path selection and improving network stability and robustness. Furthermore, this method can adjust the availability of different paths in the network in real time based on the actual occurrence of failure events, further enhancing the network's intelligent management capabilities and reliability.

[0083] This invention encompasses any substitutions, modifications, equivalent methods, and solutions made within the spirit and scope of this invention. To provide the public with a thorough understanding of this invention, specific details are described in detail in the following preferred embodiments; however, those skilled in the art will fully understand the invention even without these details. Furthermore, to avoid unnecessary misunderstanding of the essence of this invention, well-known methods, processes, procedures, components, and circuits are not described in detail.

[0084] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A method for hardware test resource allocation based on dynamic topology adaptation, characterized in that, Comprise: Step 1: Constructing dynamic topology-aware network: Collecting electrical connection signals between devices on the test backplane in real time, generating and periodically updating the topology connection matrix, the matrix element value represents the on-off state of the physical link between devices, and the matrix update is triggered immediately when a device plugging event is detected; Step 2: Quantifying resource and task attributes: Polling the hardware status register of the test resource to generate a resource state vector containing busy state, remaining available time and resource type code; Parsing the task type identifier, required resource type set, task criticality level and waiting tolerance time in the test task request, and calculating the task priority weight value; Step 3: Executing topology-driven dynamic resource matching: Based on the topology connection matrix, the minimum hop length of the idle resource to the device under test is calculated, and the hop length increases with the number of transit devices; Fusion resource type compatibility, hop path length influence factor and resource real-time load rate to generate topology-aware matching value; Multiply the task priority weight value by the topology-aware matching value to get the resource adaptation weight, and select the highest weight combination to allocate resources; Step 4: Non-stop migration in response to topology changes: When the topology connection matrix is updated, re-execute step 3 for the affected tasks, and realize non-stop switching through parallel initialization of new and old resources and signal deviation fault tolerance verification.

2. The method of claim 1, wherein, The update cycle of the topology connection matrix in step 1 includes: Record the time interval sequence of the adjacent two matrix change events, when the latest interval is less than the first proportional coefficient of the statistical mean of the historical interval, shorten the update cycle to the second proportional coefficient of the original cycle; Monitor the duration of the test environment steady state, when the duration exceeds the reference threshold determined by the median of the historical steady state length, extend the update cycle to the third proportional coefficient of the original cycle; The first, second and third proportional coefficients are set according to the complexity level of the test environment, and the complexity is quantified by the product of the number of online devices and the topology change frequency.

3. The method of claim 1, wherein, The calculation process of the task priority weight value in step 2 includes: Select the basic weight coefficient from the preset weight coefficient table according to the task criticality level; Calculate the decay factor based on the ratio of the waiting tolerance time to the current average task waiting time, the larger the ratio, the smaller the decay factor; Multiply the basic weight coefficient by the decay factor to get the priority weight value; The weight coefficient table is constructed by analyzing the loss cost caused by historical task interruption, and the loss cost is calculated by the weighted sum of task redo time consumption and device idle cost.

4. The method of claim 1, wherein, The generation of topology-aware matching value in step 3 includes: Resource type compatibility calculation: Match the required resource type set of the task with the candidate resource type code bit by bit, the compatibility is the proportion of matching bits to total bits multiplied by the type compatibility correction factor, which is obtained by querying the compliance mapping table of electrical parameters in the resource specification book and task demand; Hop path length influence factor calculation: Input the minimum hop path length into the segmented function, output the linear decay value when the hop number is less than or equal to the hop number threshold, and output the exponential decay value when the hop number is greater than the threshold, and the decay slope is dynamically adjusted according to the signal attenuation coefficient of the transit device; Real-time load rate compensation: impose a penalty coefficient on high-load resources, the penalty intensity is positively correlated with the amplitude of load rate exceeding the critical value.

5. The method of claim 1, wherein, The step 4 of the method comprises: Parallel initialization process: the newly allocated resource loads standard test stimuli and performs self-checking, and the standard for passing the self-checking is that the deviation of the output signal from the nominal value is less than a first tolerance determined by the accuracy level of the device; Signal deviation verification: synchronously collect the output signals of the new and old resources within a preset overlap time, and calculate the amplitude difference and phase difference values thereof; Fault-tolerant switching decision: when the amplitude difference value is less than the lower limit of the allowable fluctuation range of the signal of the device under test and the phase difference value is less than a phase synchronization threshold value, the old resource is released and switched to the new resource, otherwise an alarm is triggered and the process is rolled back to step 3.

6. The method of claim 4, wherein, The signal attenuation coefficient in the calculation of the hop count path length influence factor is obtained in the following manner: For each type of relay device, a standard sinusoidal signal is injected in the test environment; The signal-to-noise ratio drop value after the signal is transmitted through the device is measured; An attenuation curve is fitted according to the corresponding relationship between the signal-to-noise ratio drop value and the hop count, and the slope of the curve is the signal attenuation coefficient; When the device firmware is upgraded, the above measurement process is re-executed to update the coefficient.

7. The method of claim 5, wherein, The determination process of the phase synchronization threshold value comprises: Obtain the maximum clock jitter range of the device under test specified in the product specification; Determine the phase sensitivity level according to the current test task type, the higher the sensitivity level, the smaller the threshold value; Divide the maximum clock jitter range into multiple subintervals according to the sensitivity level, and select the median value in the target subinterval as the phase synchronization threshold value; The phase sensitivity level is obtained by analyzing the timing constraint clauses in the task requirements.

8. The method of claim 1, wherein, The calculation of the minimum hop count path length uses an improved Dijkstra algorithm: Use the topology connection matrix as the adjacency matrix, and use the resource nodes as the source points; In the path weight assignment, the historical failure rate weight of the relay device is superimposed, and the higher the failure rate, the greater the path weight; When there are multiple paths with the same hop count, the path with the smallest sum of historical failure rates is preferentially selected.

9. The method of claim 8, wherein, The update mechanism of the historical failure rate weight comprises: Record the out-of-limit events of the bit error rate and the timeout events of the device response in each signal transmission process; The contribution value of a single event = event severity level x duration / standard test period; Statistically calculate the total contribution value in a sliding time window, and the window length is negatively correlated with the stability of the test environment; Normalize the total contribution value into a failure rate weight in the interval [0, 1], and the normalization reference value is the historical maximum contribution value.

10. The method of claim 5, wherein, The processing after rolling back to step 3 comprises: Increase the topology change penalty term in the resource adaptation weight calculation, and the penalty term intensity is positively correlated with the number of the last N switching failures; Mark the topology sensitivity identifier for the current task, and exclude the resource from the allocation eligibility when the minimum hop count path length of the candidate resource is greater than a safety hop count threshold value; The safety hop count threshold value is dynamically calculated according to the signal integrity requirement of the device under test, and the calculation method is: a. Obtain the minimum signal-to-noise ratio tolerance of the device receiving end; b. Calculate the median value of the single-hop signal attenuation according to the backplane channel model; c. Solve the maximum allowed hop count that satisfies the signal-to-noise ratio tolerance and take the integer part.

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