Gallium nitride power device on-resistance optimization device

Abstract

The invention relates to a gallium nitride power device on-resistance optimization device, which comprises a source electrode and a drain electrode of a bottom structure layer, a first structure layer on the bottom structure layer, a plurality of source electrode metal strips, a plurality of drain electrode metal blocks and a net shape formed by staggering the plurality of source electrode metal strips, each drain metal block is arranged in one empty slot at a preset position; at least part of the source electrode metal strips are used for being electrically connected with a source electrode, and each drain electrode metal block is used for being electrically connected with a drain electrode; the second structure layer on the first structure layer comprises a source electrode metal plate, a drain electrode metal plate and a plurality of drain electrode metal strips, the source electrode metal plate is electrically connected with at least part of the source electrode metal strips, the drain electrode metal strips are connected with the drain electrode metal plate, and each drain electrode metal strip is electrically connected with the drain electrode metal blocks. According to the invention, the current path can be shortened through the net-shaped first structure layer, the influence of process limitation is avoided, the metal parasitic resistance is reduced, and the product performance is improved.

Description

Technical Field

[0001] The present invention relates to a semiconductor device, and in particular to a gallium nitride power device with an on-resistance optimization device. Background Art

[0002] The description in this section merely provides background information related to the present disclosure and may not constitute prior art.

[0003] The basic structure of GaN HEMT consists of three electrodes, namely source, drain and gate, which has the advantages of high frequency, high efficiency and small system volume. The metal layout of the device is usually as follows Figure 1 The comb-like structure shown is used to transfer current between the source and drain. In this comb-like structure, the current must be transmitted along the interdigitated fingers at one end to the other end, which results in a longer overall current transmission path. According to the parasitic resistance formula (R = ρ·L / S), the longer the path L, the greater the metal parasitic resistance, which is detrimental to product performance. Furthermore, based on the above structure, multiple metals exist in the same layer. Due to process and metal thickness limitations, there is a minimum spacing limit between different metals within the same metal layer, which ultimately results in a small cross-section S, further increasing the metal parasitic resistance.

[0004] It should be noted that the above technical background is merely provided to provide a clear and complete description of the technical solutions of the present invention and to facilitate understanding by those skilled in the art. Simply because these solutions are described in the technical background section of the present invention, it should not be assumed that the above technical solutions are well known to those skilled in the art. Summary of the Invention

[0005] The purpose of the present invention is to provide a GaN power device with an on-resistance optimization device, which can shorten the current path through a mesh-shaped first structural layer, circumvent the influence of process limitations, and thus reduce metal parasitic resistance to improve product performance.

[0006] In order to achieve the above-mentioned object, the present invention discloses the following GaN power device on-resistance optimization device, the GaN power device on-resistance optimization device comprising:

[0007] A bottom structure layer, comprising a source electrode and a drain electrode;

[0008] a first structural layer disposed above the bottom structural layer, the first structural layer comprising a plurality of source metal strips and a plurality of drain metal blocks, the plurality of source metal strips being staggered to form a mesh having a plurality of empty slots, each drain metal block being disposed in one of the empty slots at a predetermined position; at least some of the source metal strips being electrically connected to the source, and each of the drain metal blocks being electrically connected to the drain;

[0009] A second structural layer is arranged on the first structural layer, the second structural layer includes a source metal plate, a drain metal plate and a plurality of drain metal strips, the source metal plate is electrically connected to at least part of the source metal strips, a plurality of drain metal strips are connected to the drain metal plate, and each drain metal strip is electrically connected to the corresponding drain metal block.

[0010] As a further description of the above technical solution, the multiple source metal strips include first source metal strips extending along multiple first directions and spaced apart, and multiple second source metal strips extending along the second direction and spaced apart, so that the multiple empty slots are arranged in a rectangular array in the shape of a grid.

[0011] As a further description of the above technical solution, the first direction is perpendicular to the second direction, so that each of the empty slots is configured as a rectangle.

[0012] As a further description of the above technical solution, the transverse dimension of the empty slot is set to 2um-500um, and the longitudinal dimension of the rectangle is set to 2um-10mm.

[0013] As a further description of the above technical solution, the drain metal block is configured as a strip extending along the longitudinal direction of the rectangle and placed in the center.

[0014] As a further description of the above technical solution, the source electrode is set to be a plurality of electrodes extending along the first direction and arranged at intervals, and the positions and quantities of the plurality of source electrodes are matched with the plurality of first source metal strips, so that each source electrode corresponds to one of the first source metal strips at the corresponding position.

[0015] As a further description of the above technical solution, the drain is provided as a plurality of drain metal blocks extending along the first direction and spaced apart, and each drain is connected to a corresponding plurality of drain metal blocks spaced apart along the first direction.

[0016] By means of the above technical solution, the beneficial effects of the present invention are as follows:

[0017] The present invention provides a gallium nitride power device with on-resistance optimization. In the first structural layer, a grid is formed by staggering a plurality of source metal strips, and drain metal blocks are sequentially arranged in corresponding empty slots of the grid. The source metal strips and drain metal blocks themselves serve as current passage layers, thereby significantly shortening the current path, avoiding process limitations, reducing metal parasitic resistance, and improving product performance. In addition, the grid layout is more conducive to design.

[0018] To further understand the features and technical contents of the present invention, please refer to the following detailed description and drawings of the present invention. However, the drawings provided are only for reference and illustration and are not intended to limit the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the embodiments of this specification or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments recorded in this specification. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0020] Figure 1 It is a schematic diagram of a comb-shaped structure in the prior art;

[0021] Figure 2 This is a schematic diagram of the source / drain layout of a GaN power device with on-resistance optimization provided in an embodiment of this specification;

[0022] Figure 3 This is a schematic diagram of the first structural layer of a gallium nitride power device on-resistance optimization device provided in an embodiment of this specification;

[0023] Figure 4 This is a schematic diagram of the second structure layer of a gallium nitride power device on-resistance optimization device provided in an embodiment of this specification;

[0024] In the picture:

[0025] 1. First structural layer; 11. Source metal strip; 111. First source metal strip; 112. Second source metal strip; 12. Drain metal block; 13. Empty trench;

[0026] 2. Second structural layer; 21. Source metal plate; 22. Drain metal plate; 23. Drain metal strip;

[0027] 3. Source;

[0028] 4. Drain;

[0029] 5. First connecting hole;

[0030] 6. Second connecting hole. DETAILED DESCRIPTION

[0031] To help those skilled in the art better understand the technical solutions in this specification, the following will provide a clear and complete description of the technical solutions in the embodiments of this specification, in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of this specification, not all of them. All other embodiments derived by those skilled in the art based on the embodiments in this specification without creative effort shall fall within the scope of protection of this specification.

[0032] The following is an explanation of the embodiments of the present invention through specific embodiments. Those skilled in the art can understand the advantages and effects of the present invention from the contents disclosed in this specification. The present invention can be implemented or applied through other different specific embodiments, and the details in this specification can also be modified and changed based on different viewpoints and applications without departing from the concept of the present invention. In addition, the drawings of the present invention are only simple schematic illustrations and are not depicted according to actual dimensions. It is stated in advance. The following embodiments will further explain the relevant technical contents of the present invention in detail, but the disclosed contents are not intended to limit the scope of protection of the present invention.

[0033] It should be understood that although terms such as "first," "second," and "third" may be used herein to describe various components or signals, these components or signals should not be limited by these terms. These terms are primarily used to distinguish one component from another, or one signal from another. In addition, the term "or" as used herein may include any one or more combinations of the associated listed items, as appropriate.

[0034] See Figure 2-4 , is a GaN power device on-resistance optimization device of this embodiment, wherein the GaN power device on-resistance optimization device includes:

[0035] A bottom structural layer, comprising a source electrode 3 and a drain electrode 4;

[0036] A first structural layer 1 above the bottom structural layer includes a plurality of source metal strips 11 and a plurality of drain metal blocks 12. The plurality of source metal strips 11 are interlaced to form a grid having a plurality of empty slots 13. Each drain metal block 12 is disposed in one of the empty slots 13 at a predetermined position. At least some of the source metal strips 11 are used to electrically connect to the source 3, and each drain metal block 12 is used to electrically connect to the drain 4.

[0037] The second structural layer 2 is above the first structural layer 1. The second structural layer 2 includes a source metal plate 21, a drain metal plate 22 and a plurality of drain metal strips 23. The source metal plate 21 is electrically connected to at least part of the source metal strips 23. The plurality of drain metal strips 23 are connected to the drain metal plate 22. Each drain metal strip 23 is electrically connected to the corresponding drain metal block 12.

[0038] With the structure of the above device, during operation, the current path to the source 3 is sequentially the source metal plate 21, the source metal strip 11, and then to the source 3. The current path to the drain 4 is sequentially the drain metal plate 22, the drain metal strip 23, the drain metal block 12, and then to the drain 4. Correspondingly, see Figure 1 In the comparative example, whether leading to the source 3 or the drain 4, due to the symmetrically arranged comb-shaped structure, it is necessary to pass through a longer metal strip of the source and the drain for passing current.

[0039] Based on the above structure of the present invention, the mesh structure surrounded by the source metal strips 11 is used as a whole to pass current, and the distance between the corresponding drain metal blocks 12 is shorter. That is to say, the grid-like chessboard layout has a higher current passing efficiency than the existing comb-type structure layout. The drain metal blocks 12 interspersed in a chessboard manner are evenly distributed in the corresponding empty slots 13 of the mesh, thereby achieving a higher layout density. The physical distance between each drain metal block 12 and the source metal strip 11 on the periphery of the empty slot 13 in which it is located is significantly closer. Therefore, the purpose of shortening L in the parasitic resistance formula (R=ρ·L / S) can be achieved through layout optimization, thereby achieving the optimal path and reducing the metal parasitic resistance. Since the mesh layout does not have to be limited by the spacing between the two metals, the metal cross-section S can be made larger, avoiding process limitations, further reducing the metal parasitic resistance, and ultimately improving product performance.

[0040] See Figure 2-3 , the multiple source metal strips 11 in this embodiment include a first source metal strip 111 extending along multiple first directions and spaced apart, and a multiple second source metal strip 112 extending along the second direction and spaced apart, so that the multiple empty slots 13 in a grid shape are arranged in a rectangular array. Through the layout in this embodiment, the first source metal strip 111 and the second source metal strip 112 are arranged in an array, which can naturally form a plurality of rectangular or diamond-shaped empty slots 13 of the same shape, which is convenient for installing the drain metal blocks 12 of the same shape and corresponding size, ensuring the practical stability of the component, and the mold is easy to replace, which can effectively control the cost. Preferably, the first direction in this embodiment is arranged perpendicular to the second direction, so that each empty slot 13 is set to a rectangle. That is to say, the grid shape in this embodiment is actually a checkerboard layout, which is easy to match most of the electronic device installation space. In this embodiment, Figure 3The figure shows a 4x4 checkerboard grid structure, in which 16 rectangular arrays of drain metal blocks 12 are installed. In this embodiment, the dimensions of the empty slots 13 can be set to 2um-500um in the horizontal dimension and 2um-10mm in the vertical dimension, which can ensure better structural stability.

[0041] Furthermore, the drain metal block 12 is provided as a strip extending in the longitudinal direction of the rectangle and placed in the center. The extension direction of the strip is parallel to the first source metal strip 111. The first source metal strip 111 is provided with a plurality of first connection holes 5 for electrically connecting to the source 3 at the bottom. The drain metal block 12 is also provided with a plurality of first connection holes 5 for electrically connecting to the drain 4 at the bottom. Figure 3 As shown, in this embodiment, the number of first connection holes 5 on each longitudinal first source metal strip 111 is consistent with the number of first connection holes 5 on the longitudinally arranged drain metal block 12. Specifically, the plurality of first connection holes 5 are equidistantly spaced along the longitudinal direction to ensure the stability of the current organization layout.

[0042] See Figure 2 、 3 In this embodiment, the source electrodes 3 are arranged to extend along the first direction and are spaced apart. The positions and numbers of the multiple source electrodes 3 match the positions and numbers of the multiple first source metal strips 111, so that each source electrode 3 corresponds to a first source metal strip 111 at a corresponding position. Specifically, Figure 2 Each source 3 in Figure 3 Each vertically extending first source metal strip 111 has a corresponding first connection hole 5. In a specific embodiment, the source 3 is arranged below the first structural layer 1, and the one-to-one corresponding first connection holes 5 allow the current to have the shortest path between the first source metal strip 111 and the source 3.

[0043] Further, see Figure 2 、 3 The drain electrodes 4 are arranged to extend in the first direction and spaced apart. Each drain electrode 4 is connected to a plurality of drain metal blocks 12 spaced apart along the first direction. For example, in this embodiment, a vertically arranged drain electrode 4 is connected to four independent drain metal blocks 12 at the same time. In this embodiment, a total of four vertical rows of drain metal blocks 12 are arranged, corresponding to Figure 2 The four drain 4 structures in FIG. Specifically, see Figure 4The positions and numbers of the multiple drain electrodes 4 and the multiple drain metal strips 23 are matched, so that each drain electrode 4 corresponds to a drain metal strip 23 at a corresponding position. In this embodiment, because a total of four vertically placed drain electrodes 4 are involved, the drain metal strips 23 in the second structural layer 2 are also set to be four matching ones. The positions of the drain metal strips 23 and the drain electrodes 4 along the projection plane correspond to each other. In this case, the drain metal block 12 between the two can have the shortest length, reducing the distance L. Of course, in other embodiments, the structure can be designed differently according to actual space requirements, which still does not deviate from the current flow design concept provided by this embodiment.

[0044] Each independent drain metal block 12 is provided with a second connection hole 6. Figure 4 The drain metal strip 23 in the upper middle portion is electrically connected. Specifically, in this embodiment, consistent with the arrangement of the plurality of drain metal blocks 12, the second connection holes 6 are also arranged in multiple rows at equal intervals in the vertical direction to achieve stable electrical connection.

[0045] Finally, the four vertical drain electrodes 4 are connected in parallel to the corresponding circuits, and the five vertical source electrodes 3 are connected in parallel to the corresponding circuits, forming a complete and unified circuit structure. Of course, in a complete embodiment, the source electrodes 3 and drain electrodes 4 are arranged on the semiconductor layer, and a gate electrode is arranged between the source electrodes and the drain electrodes. The gate electrode is arranged on the semiconductor layer and separated from the semiconductor layer by a gate dielectric. Specifically, the semiconductor layer below the gate dielectric is composed of an AlGaN barrier layer for forming a barrier to prevent electrons from moving downward, thereby enhancing device performance, a GaN channel layer for providing a channel for electron flow, a GaN buffer layer for providing a buffer layer to reduce substrate stress and improve device stability, and a Si substrate at the bottom for providing mechanical support, affecting thermal management and electrical performance, all of which are composed of the same silicon-based gallium nitride HEMT device.

[0046] Furthermore, the source metal plate 21 is electrically connected to a single second source metal strip 112, and the second source metal strip 112 for electrically connecting to the source metal plate 21 is arranged at the edge of the mesh. The same second source metal strip 112 forms an electrical connection between the upper and lower structures at the edge, which is convenient for installation and has high structural stability. Specifically, a second connection hole 6 for electrically connecting to the source metal plate 21 is provided at intervals in one of the second source metal strips 112. Taking this embodiment as an example, Figure 3 In the grid, a plurality of second connection holes 6 arranged at equal intervals are arranged in the top second source metal strip 112, and are connected to the second source metal strip 112. Figure 4 The source metal plate 21 at the top position is connected.

[0047] Please continue to see Figure 3The two ends of the drain metal block 12 are respectively used to connect to the drain electrode 4, and the middle position of the drain metal block 12 is used to connect to a drain metal strip 22 at a corresponding position. Based on the above structure, according to the current path, when the current flows from the drain to the source, the entire cross-sectional dimensions of the drain metal block 12 can be used as a complete conductor, and the current flows through it completely, making full use of the size and space of the drain metal block 12, so that the current path is minimized.

[0048] In general, in the prior art, in the source 3 and drain 4 layers, an interdigitated ohmic contact scheme is used, the same as in this embodiment. However, in the first structural layer 1, this scheme adopts a combination of a mesh and vertical strips interspersed therein, and a single-sided interdigitated scheme is used in the second structural layer 2, which significantly reduces the length of the current path and reduces the parasitic metal resistance. However, the prior art still uses an interdigitated scheme in this part, and the length of the current path is relatively long, which cannot achieve the performance effect of the present invention.

[0049] The contents disclosed above are only preferred feasible embodiments of the present invention and do not limit the scope of the patent application of the present invention. Therefore, all equivalent technical changes made using the contents of the description and drawings of the present invention are included in the scope of the patent application of the present invention.

[0050] The various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on the differences from other embodiments.

[0051] Although the present application has been described through embodiments, those skilled in the art will appreciate that there are many modifications and variations to the present application without departing from the spirit of the present application. It is intended that the appended embodiments include these modifications and variations without departing from the present application.

Claims

1. A gallium nitride power device on-resistance optimization device, characterized in that: The gallium nitride power device on-resistance optimization device includes: A bottom structure layer, comprising a source electrode and a drain electrode; a first structural layer disposed above the bottom structural layer, the first structural layer comprising a plurality of source metal strips and a plurality of drain metal blocks, the plurality of source metal strips being staggered to form a mesh having a plurality of empty slots, each drain metal block being disposed in one of the empty slots at a predetermined position; at least some of the source metal strips being electrically connected to the source, and each of the drain metal blocks being electrically connected to the drain; A second structural layer is arranged on the first structural layer, the second structural layer includes a source metal plate, a drain metal plate and a plurality of drain metal strips, the source metal plate is electrically connected to at least part of the source metal strips, a plurality of drain metal strips are connected to the drain metal plate, and each drain metal strip is electrically connected to the corresponding drain metal block.

2. The GaN power device on-resistance optimization device according to claim 1, characterized in that: The plurality of source metal strips include a plurality of first source metal strips extending along a first direction and spaced apart, and a plurality of second source metal strips extending along a second direction and spaced apart, so that the plurality of empty slots in the grid shape are arranged in a rectangular array.

3. The GaN power device on-resistance optimization device according to claim 2, characterized in that: The first direction is perpendicular to the second direction, so that each of the empty slots is arranged in a rectangular shape.

4. The GaN power device on-resistance optimization device according to claim 3, characterized in that: The transverse dimension of the empty slot is set to 2um-500um, and the longitudinal dimension of the rectangle is set to 2um-10mm.

5. The GaN power device on-resistance optimization device according to claim 3, characterized in that: The drain metal block is configured as a strip extending in the longitudinal direction of the rectangle and placed in the center.

6. The GaN power device on-resistance optimization device according to claim 2, characterized in that: The source electrodes are arranged to extend along the first direction and are spaced apart. The positions and quantities of the source electrodes match those of the first source metal strips, so that each source electrode corresponds to one of the first source metal strips at a corresponding position.

7. The GaN power device on-resistance optimization device according to claim 3, characterized in that: The drain electrodes are arranged in a plurality and extend along a first direction and are spaced apart from each other. Each of the drain electrodes is connected to a plurality of drain metal blocks correspondingly spaced apart from each other along the first direction.

8. The gallium nitride power device on-resistance optimization device according to claim 7, characterized in that: The positions and numbers of the plurality of drain electrodes are matched with the plurality of drain metal strips, so that each drain electrode corresponds to one drain metal strip at a corresponding position.

9. The GaN power device on-resistance optimization device according to claim 2, characterized in that: The source metal plate is electrically connected to the only second source metal strip, and the second source metal strip electrically connected to the source metal plate is arranged at an edge of the mesh.

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