Wafer defect detection method and system

Abstract

The application provides a wafer defect detection method and system. A plurality of compensation areas are selected from a surface area of a wafer to be detected according to a clamping state of the wafer to be detected and light illumination condition parameters of a defect detection light source. An illumination gradient value of each compensation area is extracted from an illumination distribution of the surface of the wafer to be detected. A defect confidence of a surface defect in the wafer to be detected is determined according to all the illumination gradient values. When the defect confidence is lower than a preset standard threshold, performance attenuation analysis is performed on a working state of the defect detection light source to obtain a light source reliability value of each unit light source working state. An illumination loss model is constructed based on each light source reliability value. The illumination gradient of the compensation area is restored to a preset standard through global light source power proportion adjustment. The illumination gradient compensation of the light source unit in wafer defect detection can be realized based on the above scheme.

Description

Technical Field

[0001] This application relates to the field of wafer inspection technology, and more specifically, to a wafer defect detection method and system. Background Technology

[0002] Wafers are prone to defects such as scratches, particles, and pattern distortion during complex processes such as photolithography and etching. These tiny defects can cause short circuits, leakage, or even failure of chips. As chip manufacturing processes break through to the nanometer scale, the defect size becomes smaller, and the requirements for detection accuracy increase dramatically. If defects are not detected in time, they will be amplified in subsequent processes, significantly increasing production costs. For chips used in aerospace, medical and other fields, defects may also cause safety accidents.

[0003] In wafer defect inspection, when a wafer is fixed by a mechanical clamping device, the clamping force creates localized stress concentration in the contact area, causing microscopic deformation of the wafer surface. This physical deformation alters the optical properties of the wafer surface. The light reflection angle in the deformed area shifts, leading to abnormal scattering of incident light. Changes in the refractive index of the material in the stress area cause local differences in transmittance. Simultaneously, optical interference effects are formed at the deformed edges, producing false bright and dark fringes. The combined effect results in non-defect-related anomalies in the illumination distribution, which may be misjudged as scratches, particles, or other real defects during inspection, or may mask actual minute defects. Especially in advanced processes, where wafer thickness is continuously reduced, the optical interference effect caused by clamping deformation becomes more significant, becoming a major bottleneck restricting the improvement of inspection accuracy. Therefore, how to achieve illumination gradient compensation for the light source unit in wafer defect inspection has become a challenging problem for the industry. Summary of the Invention

[0004] This application provides a wafer defect detection method and system, which can realize illuminance gradient compensation of the light source unit in wafer defect detection, thereby improving the illuminance uniformity in wafer defect detection.

[0005] In a first aspect, this application provides a wafer defect detection method, comprising:

[0006] The clamping state of the wafer under test on the wafer clamping structure and the illumination condition parameters of the defect detection light source are obtained, and the illuminance distribution on the surface of the wafer under test is collected.

[0007] Multiple compensation regions of the effective detection area on the surface of the wafer under test are selected from the surface region of the wafer under test by the clamping state and the illumination parameter conditions. The illumination gradient value of each compensation region is extracted from the illumination distribution. Then, the defect confidence of the surface defects in the wafer under test is determined based on all the illumination gradient values ​​and the optical reflection difference of the wafer surface.

[0008] When the confidence level of the defect is lower than the preset standard threshold, the performance degradation analysis of the working state of the light source for defect detection is performed based on the real-time operating current fluctuation rate, thermal accumulation coefficient and spectral shift of each unit light source, so as to obtain the light source reliability value of the working state of each unit light source in defect detection.

[0009] An illuminance loss model is constructed based on the reliability values ​​of each light source. By adjusting the global light source power ratio, the illuminance gradient of the area to be compensated is restored to the preset standard.

[0010] In some embodiments, selecting multiple compensation regions from the surface region of the wafer under test by means of the clamping state and the illumination parameters specifically includes:

[0011] Obtain the effective detection area on the surface of the wafer to be tested;

[0012] The clamping state is used to filter out the deformation areas on the wafer surface caused by clamping from the effective detection area;

[0013] The uneven illumination regions on the wafer surface are screened from the effective detection area using the illumination parameters.

[0014] Based on the deformation region and the uneven illumination region, multiple compensation regions are determined in the effective detection area of ​​the wafer surface under test.

[0015] In some embodiments, extracting the illuminance gradient values ​​of each region to be compensated from the illuminance distribution specifically includes:

[0016] For each area to be compensated, the area to be compensated is divided into multiple grid areas;

[0017] Obtain the illuminance value of the center point of each cell in each grid region from the illuminance distribution;

[0018] The illuminance gradient value of the area to be compensated is determined by all the illuminance values, and then the illuminance gradient value of each area to be compensated is obtained.

[0019] In some embodiments, determining the defect confidence level of surface defects in the wafer under test based on all illuminance gradient values ​​and the optical reflectance difference of the wafer surface specifically includes:

[0020] The difference in reflectance between the wafer under test and the standard wafer is obtained as the optical reflectance difference of the surface of the wafer under test;

[0021] The defect probability of each region to be compensated is determined by each illuminance gradient value and the optical reflection difference.

[0022] The defect confidence level of the surface defects in the wafer under test is determined based on all defect probabilities.

[0023] In some embodiments, the performance degradation analysis of the light source operating state for defect detection is performed based on the real-time operating current fluctuation rate, thermal accumulation coefficient, and spectral shift of each unit light source, and the light source reliability value of each unit light source operating state in defect detection specifically includes:

[0024] For each unit light source, measure the real-time operating current fluctuation rate, thermal accumulation coefficient, and spectral shift of the unit light source;

[0025] Initialize a degradation assessment model based on fuzzy logic;

[0026] The real-time operating current fluctuation rate is used as the current stability factor in the degradation assessment model.

[0027] The heat accumulation coefficient is used as the thermal stress factor in the degradation assessment model;

[0028] The spectral shift is used as a spectral degradation factor in the degradation assessment model;

[0029] The degradation evaluation model after using input factor parameters is used to perform defuzzified membership evaluation on the working state of the unit light source, so as to obtain the light source reliability value of the working state of the unit light source, and then obtain the light source reliability value of the working state of each unit light source in defect detection.

[0030] In some embodiments, the clamping state includes clamping force distribution, contact point location, and wafer surface deformation.

[0031] In some embodiments, a complementary metal-oxide-semiconductor sensor is used to acquire the illuminance distribution on the surface of the wafer under test.

[0032] Secondly, this application provides a wafer defect detection system, comprising:

[0033] The acquisition module is used to acquire the clamping state of the wafer under test on the wafer clamping structure and the illumination condition parameters of the defect detection light source, and to collect the illuminance distribution on the surface of the wafer under test.

[0034] The processing module is used to select multiple compensation regions of the effective detection area on the surface of the wafer under test from the surface region of the wafer under test through the clamping state and the illumination parameter conditions, extract the illumination gradient value of each compensation region from the illumination distribution, and then determine the defect confidence of the surface defects in the wafer under test based on all the illumination gradient values ​​and the optical reflection difference of the wafer surface under test.

[0035] The processing module is also used to perform a performance degradation analysis on the working state of the light source for defect detection based on the real-time operating current fluctuation rate, thermal accumulation coefficient and spectral shift of each unit light source when the defect confidence is lower than a preset standard threshold, so as to obtain the light source reliability value of the working state of each unit light source in defect detection.

[0036] The execution module is used to build an illuminance loss model based on the reliability values ​​of each light source, and restore the illuminance gradient of the area to be compensated to the preset standard by adjusting the global light source power ratio.

[0037] Thirdly, this application provides a computer device, the computer device including a memory and a processor, the memory for storing a computer program, and the processor for calling and running the computer program from the memory, so that the computer device performs the above-described wafer defect detection method.

[0038] Fourthly, this application provides a computer-readable storage medium storing instructions or code that, when executed on a computer, cause the computer to implement the aforementioned wafer defect detection method.

[0039] The technical solutions provided by the embodiments disclosed in this application have the following beneficial effects:

[0040] This application provides a wafer defect detection method and system that acquires the clamping state of the wafer under test on the wafer clamping structure and the illumination condition parameters of the defect detection light source, and collects the illuminance distribution on the surface of the wafer under test; based on the clamping state and the illumination parameter conditions, multiple compensation areas of the effective detection area on the surface of the wafer under test are selected; the illuminance gradient value of each compensation area is extracted from the illuminance distribution; and the defect confidence of the surface defect in the wafer under test is determined based on all the illuminance gradient values ​​and the optical reflection difference of the wafer surface; when the defect confidence is lower than a preset standard threshold, the performance degradation analysis of the light source working state of defect detection is performed based on the real-time operating current fluctuation rate, thermal accumulation coefficient and spectral shift of each unit light source to obtain the light source reliability value of each unit light source working state in defect detection; based on the reliability values ​​of each light source, an illuminance loss model is constructed, and the illuminance gradient of the compensation area is restored to the preset standard by adjusting the global light source power ratio.

[0041] Therefore, this application first determines the defect confidence level to obtain a comprehensive evaluation result of wafer surface defects, thus providing a precise target area for subsequent light source compensation. When the defect confidence level is lower than a preset standard threshold, the defect detection console can automatically determine that the current detection result is unreliable and the light source compensation process needs to be initiated. This ensures that compensation is only triggered when there is indeed an uneven illumination problem, avoiding unnecessary power adjustments. This improves the targeting of compensation and protects the working life of the light source system. At the same time, the defect confidence level can also be used to generate a defect distribution heatmap, intuitively displaying the key areas that need priority compensation, providing a basis for subsequent power optimization. The system provides a scientific basis for this; then, by determining the reliability value of the light source, the real-time health status assessment of each light source unit in the detection system can be obtained, thus providing precise adjustment parameters for illuminance gradient compensation. When constructing the illuminance loss model, the reliability value of different light source units directly determines the weight coefficient of the light source unit in the compensation calculation, ensuring that the power adjustment scheme can specifically compensate for the illuminance loss caused by the degraded light source, and can more accurately restore illuminance uniformity, while avoiding over-adjustment of normal light sources. In summary, based on the above scheme, illuminance gradient compensation of light source units in wafer defect detection can be realized, thereby improving the illuminance uniformity in wafer defect detection. Attached Figure Description

[0042] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0043] Figure 1 This is an exemplary flowchart of a wafer defect detection method according to some embodiments of this application;

[0044] Figure 2 This is a schematic diagram of the wafer clamping structure shown in some embodiments of this application;

[0045] Figure 3 This is a flowchart illustrating the process of determining the confidence level of a defect according to some embodiments of this application;

[0046] Figure 4 This is a schematic diagram of the structure of a wafer defect detection system according to some embodiments of this application;

[0047] Figure 5 This is a schematic diagram of the structure of a computer device for implementing a wafer defect detection method according to some embodiments of this application. Detailed Implementation

[0048] To better understand the technical solution of this application, the technical solution of this application will be described in detail below with reference to the accompanying drawings and specific embodiments.

[0049] refer to Figure 1 The figure is an exemplary flowchart of a wafer defect detection method according to some embodiments of this application. The wafer defect detection method mainly includes the following steps:

[0050] In step 101, the clamping state of the wafer under test on the wafer clamping structure and the illumination condition parameters of the defect detection light source are obtained, and the illuminance distribution on the surface of the wafer under test is collected.

[0051] It should be noted that, in this application, the clamping state refers to the fixed state of the wafer on the clamping structure, including the clamping force distribution, contact point position, and wafer surface deformation. In specific implementation, the pressure of the clamping claws on each contact point position in the wafer clamping is measured by a pressure sensor, and the collection of all pressures is taken as the clamping force distribution. At the same time, the deformation of the wafer edge and surface is detected by a laser displacement sensor, and the collection of all deformations is taken as deformation data. Thus, the collection of clamping force distribution and deformation data is taken as the clamping state.

[0052] Additionally, it should be noted that in this application, the illumination condition parameters include the wavelength of the light source, the incident angle, the light intensity distribution, and the uniformity. In specific implementation, a spectrometer is used to measure the actual output wavelength of the light source to ensure consistency with the nominal value. The incident angle of the light source is recorded by an angle sensor or a grating encoder to avoid uneven illumination due to angle deviation. At the same time, a standard reflector is used to calibrate the light intensity distribution of the light source, thereby using the set of wavelength, incident angle, and light intensity distribution as the illumination condition parameters.

[0053] It should be noted that, in this application, illuminance distribution refers to real-time illumination intensity data of various regions on the wafer surface. The illuminance distribution of the wafer surface under test is collected using a complementary metal-oxide-semiconductor (CMOS) sensor. In specific implementation, a high dynamic range imaging sensor (e.g., a scientific-grade CMOS sensor) is used to perform a global scan of the wafer surface to ensure that details of both bright and dark areas can be captured simultaneously. The imaging sensor records illuminance values ​​at a fixed sampling interval (default is one sampling point per square millimeter), and converts the original grayscale data into physical illuminance values ​​(unit: lux) through a calibration curve. To reduce noise interference, digital filtering technology can be used to improve the signal-to-noise ratio, generate a two-dimensional illuminance distribution map of the wafer surface, and mark abnormally low illuminance or high gradient areas. Thus, the marked two-dimensional illuminance distribution map is used as the illuminance distribution of the wafer surface under test.

[0054] In some embodiments, reference Figure 2The figure is a schematic diagram of a wafer clamping structure shown in some embodiments of this application. The figure shows the main structure and functional components of a wafer clamping structure in wafer defect detection. The figure includes a support column (1) for supporting the entire device; a handle (2) for manual operation; two springs (3) for providing necessary elasticity; a base (4) for placing and fixing the wafer (5); the wafer (5) is the main object of the device; a fixing block (6) on the base for stabilizing the base; an upper guide rod (7) and a lower guide rod (8) for ensuring the precise movement and positioning of the device. The entire device is designed to stably clamp the wafer during the wafer defect detection process to ensure the accuracy and stability of the detection.

[0055] In step 102, multiple compensation regions of the effective detection area on the surface of the wafer under test are selected from the surface region of the wafer under test by means of the clamping state and the illumination parameter conditions. The illumination gradient value of each compensation region is extracted from the illumination distribution. Then, the defect confidence of the surface defect in the wafer under test is determined based on all the illumination gradient values ​​and the optical reflection difference of the wafer surface.

[0056] In some embodiments, the selection of multiple compensation regions from the surface region of the wafer under test by means of the clamping state and the illumination parameters can be achieved by the following steps:

[0057] Obtain the effective detection area on the surface of the wafer to be tested;

[0058] The clamping state is used to filter out the deformation areas on the wafer surface caused by clamping from the effective detection area;

[0059] The uneven illumination regions on the wafer surface are screened from the effective detection area using the illumination parameters.

[0060] Based on the deformation region and the uneven illumination region, multiple compensation regions are determined in the effective detection area of ​​the wafer surface under test.

[0061] It should be noted that in this application, the area to be compensated refers to the area where the detection parameters or light source configuration need to be adjusted to eliminate the effects of deformation and illumination; the effective detection area refers to the physical area on the wafer surface that can be used for optical defect detection; the deformation area refers to the area on the wafer surface that undergoes physical deformation due to clamping force; and the uneven illumination area refers to the area where the illuminance distribution does not meet the detection requirements due to the characteristics of the light source or the incident angle.

[0062] In specific implementation, firstly, obtaining the effective detection area on the surface of the wafer under test can be achieved by acquiring the effective detection area from the wafer defect detection control console; secondly, selecting the deformation area on the wafer surface caused by clamping from the effective detection area through the clamping state can be achieved by acquiring the clamping force distribution and deformation data of the wafer surface from the clamping state, and taking the area with deformation greater than a preset deformation threshold as the deformation area on the wafer surface caused by clamping; then, selecting the non-uniform illumination area on the wafer surface from the effective detection area through the illumination parameter conditions can be achieved by establishing a theoretical illuminance model using the wavelength, incident angle, and light intensity distribution in the illumination condition parameters, predicting the illuminance gradient on the wafer surface, taking the difference between the illuminance gradient and the illuminance gradient in the theoretical model as the illuminance deviation, and marking the area with the illuminance deviation exceeding a preset threshold (default is ±10%) as the non-uniform illumination area, thus obtaining the non-uniform illumination area on the wafer surface; finally... The determination of multiple compensation regions for the effective detection area on the surface of the wafer under test based on the deformation area and the uneven illumination area can be achieved in the following way: the union of the deformation area and the uneven illumination area is taken as the set of compensation regions, thus obtaining multiple compensation regions for the effective detection area on the surface of the wafer under test.

[0063] It should be noted that in this application, the theoretical illuminance model is a physical model that describes the light distribution pattern formed by a light source on a wafer surface using mathematical methods. This theoretical illuminance model is based on the principle of optical propagation and comprehensively considers three core parameters: the wavelength characteristics of the light source, the incident angle, and the light intensity distribution. The wavelength characteristics determine the material reflectivity, the incident angle affects the light path projection range, and the light intensity distribution determines the energy spatial allocation. The theoretical illuminance value at each point on the wafer surface is calculated using ray tracing algorithms or radiometric equations. Specifically, the wavelength affects the material reflectivity and needs to be considered in conjunction with the wafer thin film optical constants; the incident angle is corrected for local light intensity using the cosine law; and the light intensity distribution is modeled based on the radiation characteristics of the light source. After coupling the wavelength characteristics, incident angle, and light intensity distribution, a theoretical illuminance gradient field can be generated on the surface. The deviation between this gradient and the measured gradient directly reflects the illumination uniformity defects. This theoretical illuminance model is essentially a quantitative expression of the interaction between light and matter in engineering testing, providing a physical benchmark for evaluating illumination uniformity.

[0064] In some embodiments, extracting the illuminance gradient values ​​of each region to be compensated from the illuminance distribution can be achieved using the following steps:

[0065] For each area to be compensated, the area to be compensated is divided into multiple grid areas;

[0066] Obtain the illuminance value of the center point of each cell in each grid region from the illuminance distribution;

[0067] The illuminance gradient value of the area to be compensated is determined by all the illuminance values, and then the illuminance gradient value of each area to be compensated is obtained.

[0068] It should be noted that, in this application, the illuminance gradient value represents a scalar quantity of the intensity of illuminance variation between a grid cell and its adjacent regions, and this illuminance gradient value can be used to quantify illumination non-uniformity; the grid region refers to the regular sub-cells after the region to be compensated is divided; the illuminance value represents the quantified value of the illumination intensity at the center of the grid region, and this illuminance value can represent the typical illuminance characteristics of the grid.

[0069] In practical implementation, firstly, for each area to be compensated, dividing the area into multiple grid areas can be achieved in the following way: For each area to be compensated, the grid size is determined according to the shape and area of ​​the area to be compensated, usually using a square grid, with the side length set according to the detection accuracy requirements (default is 1mm×1mm). For irregularly shaped areas to be compensated, an adaptive grid division method is used to ensure that the edge areas are also completely covered. Each grid cell needs to be numbered and its vertex coordinates recorded to form a grid topology. Thus, each square grid in the grid topology is used as a grid area, thereby obtaining multiple grid areas; then, the values ​​of each cell in each grid area are obtained from the illuminance distribution. The illuminance value of the center point can be obtained by aligning the illuminance distribution with the grid topology. For each grid cell in the grid topology, the coordinates of the geometric center point in the grid cell are calculated, and the illuminance value of the coordinate point is extracted from the illuminance distribution using bilinear interpolation as the illuminance value of the cell center point in the grid region. The illuminance value of the cell center point in each grid region can be obtained in this way. Finally, the illuminance gradient value of the region to be compensated is determined by using all the illuminance values. The illuminance gradient value of each region to be compensated can be obtained by calculating the difference in illuminance values ​​between all adjacent grid regions as the gradient value, and then using the average of all gradient values ​​as the illuminance gradient value of the region to be compensated.

[0070] In some embodiments, the defect confidence level of surface defects in the wafer under test is determined based on all illuminance gradient values ​​and the optical reflectance difference of the wafer surface under test, with reference to... Figure 3 The diagram is a flowchart illustrating the process of determining the confidence level of a defect in some embodiments of this application. In this embodiment, the determination of the confidence level of a defect can be achieved through the following steps:

[0071] In step 1021, the difference in reflectivity between the wafer under test and the standard wafer is obtained as the optical reflectance difference of the surface of the wafer under test;

[0072] In step 1022, the defect probability of each region to be compensated is determined by each illuminance gradient value and the optical reflection difference;

[0073] In step 1023, the defect confidence level of the surface defects in the wafer under test is determined based on all the defect probabilities.

[0074] It should be noted that in this application, the defect confidence level represents the degree of certainty that a surface defect exists on the entire wafer, and the higher the defect confidence level, the more reliable the test result; the optical reflection difference is a quantitative indicator that characterizes the degree of difference between the optical properties of the surface of the wafer under test and the standard sample; the defect probability reflects the likelihood of a surface defect existing in a single area to be compensated.

[0075] In specific implementation, firstly, the difference in reflectance between the wafer under test and the standard wafer can be obtained as the optical reflectance difference of the wafer under test surface. This can be achieved by using a spectrophotometer to measure the reflectance curves of the wafer under test and the standard wafer within the detection wavelength range under the same illumination conditions. Then, a characteristic wavelength point is selected, and the absolute value of the reflectance difference between the two curves at that point is calculated as the optical reflectance difference of the wafer under test surface. Next, the defect probability of each compensation region can be determined by using each illuminance gradient value and the optical reflectance difference. This can be achieved by normalizing the optical reflectance difference and the illuminance gradient value of the compensation region to relative values ​​between 0 and 1 for each compensation region. A weighted fusion-based defect probability calculation model is initialized. This model is then used to weight and fuse the normalized illuminance gradient value with the optical reflectance difference. The weight parameters in the defect probability calculation model can be preset based on historical experience, ensuring that the weight of the optical reflectance difference is greater than the weight of the illuminance gradient value. The defect probability calculation model can use a linear combination or a nonlinear mapping function, and the parameters are calibrated using experimental data. When a region simultaneously possesses both a high illuminance gradient value and a high optical reflectance difference, its defect probability will increase significantly. Therefore, the weighted fusion result of the defect probability calculation model is used as the defect probability of the region to be compensated. The defect probability of each region to be compensated can be obtained through the above method. Finally, the defect confidence of the surface defects in the wafer under test can be determined based on all defect probabilities in the following way: the mean of all defect probabilities is used as the defect confidence of the surface defects in the wafer under test.

[0076] In step 103, when the defect confidence level is lower than the preset standard threshold, the performance degradation analysis of the light source working state of defect detection is performed based on the real-time operating current fluctuation rate, thermal accumulation coefficient and spectral shift of each unit light source, so as to obtain the light source reliability value of each unit light source working state in defect detection.

[0077] It should be noted that in this application, when the confidence level of the defect is lower than the preset standard threshold, it indicates that the reliability of the current detection result is insufficient and the defect detection parameters need to be adjusted.

[0078] In some embodiments, the performance degradation analysis of the light source operating state for defect detection based on the real-time operating current fluctuation rate, thermal accumulation coefficient, and spectral shift of each unit light source can be performed using the following steps to obtain the light source reliability value of each unit light source operating state in defect detection:

[0079] For each unit light source, measure the real-time operating current fluctuation rate, thermal accumulation coefficient, and spectral shift of the unit light source;

[0080] Initialize a degradation assessment model based on fuzzy logic;

[0081] The real-time operating current fluctuation rate is used as the current stability factor in the degradation assessment model.

[0082] The heat accumulation coefficient is used as the thermal stress factor in the degradation assessment model;

[0083] The spectral shift is used as a spectral degradation factor in the degradation assessment model;

[0084] The degradation evaluation model after using input factor parameters is used to perform defuzzified membership evaluation on the working state of the unit light source, so as to obtain the light source reliability value of the working state of the unit light source, and then obtain the light source reliability value of the working state of each unit light source in defect detection.

[0085] It should be noted that, in this application, the real-time operating current fluctuation rate refers to the ratio of the instantaneous fluctuation value of the current when a unit light source is working to the rated operating current. The real-time operating current fluctuation rate can intuitively reflect the stability of the current. This real-time operating current fluctuation rate can reflect the stability of the light source power supply system. Excessive fluctuation rate may cause the light source to emit light that is sometimes bright and sometimes dim, or even shorten its service life. The heat accumulation coefficient is the ratio of the heat accumulated by a unit light source per unit time to the total input energy. The heat accumulation coefficient can be used to measure the heat dissipation efficiency of the light source. The higher the heat accumulation coefficient, the faster the heat accumulates and the weaker the heat dissipation capacity. Long-term use may cause the light source performance to degrade due to overheating, such as: decreased luminous efficacy, color temperature shift, etc. Spectral offset refers to the wavelength deviation value between the actual spectral curve of the light source and the standard spectral curve. The offset of the peak wavelength is the main reference. The spectral offset directly affects the optical performance of the light source. Excessive spectral offset will lead to inaccurate color rendering of the light source. For example, in precision lighting scenarios, it may affect the accuracy of detection, imaging and other work.

[0086] In practical implementation, for each unit light source, the real-time operating current fluctuation rate, thermal accumulation coefficient, and spectral shift can be measured as follows: For each unit light source, connect it to a stable power supply circuit, connect a high-precision current sensor in series in the circuit, and connect the sensor output to a data acquisition module. The module collects current data at a high-frequency sampling rate (default 1000 times per second) and transmits it to the terminal. The terminal software processes the data in real time, calculates the difference between the maximum and minimum current values ​​within a set period (e.g., 1 minute) as the fluctuation, and then uses the average of all fluctuations as the real-time operating current fluctuation rate of the unit light source. A temperature sensor is attached to the chip substrate of the light source, and a power meter is used to monitor the real-time input power of the light source. After the light source is started, data acquisition... The system synchronously records temperature changes and input power, continuously monitoring until the light source temperature stabilizes. Based on the principle of energy conservation, it calculates the accumulated heat using the temperature change and the heat capacity of the light source, then divides it by the total input energy (power × time) over the same time period. This calculation result is used as the heat accumulation coefficient per unit light source. The unit light source is placed in a dark box to avoid ambient light interference. A fiber optic probe is aimed at the light emission center of the light source, and the other end is connected to a spectrometer with a wavelength accuracy of ±0.2nm. The spectrometer collects the actual spectral data of the light source, transmits it to the computer, and uses spectral analysis software to retrieve the standard spectrum of this type of light source. The peak wavelengths of the two spectra are compared, and the difference between the two is the spectral shift. If there is a multi-peak spectrum, the average shift value of the main peak is taken to obtain the spectral shift per unit light source.

[0087] It should be noted that the degradation assessment model in this application is a multi-parameter comprehensive assessment system based on empirical rules. This degradation assessment model is specifically designed to quantify the degree of reliability degradation of light source units. By defining membership functions for three key input factors—flow stability, thermal stress, and spectral degradation—the model transforms precise measurements into slight, moderate, and severe fuzzy linguistic variables. The built-in rule base of the degradation assessment model includes, for example, rules indicating low reliability due to large current fluctuations and high heat accumulation. These rules are transformed into output membership degrees through a fuzzy inference engine. Finally, defuzzification methods such as the centroid method are used to convert the fuzzy output into precise reliability values ​​within the 0-1 range as the light source reliability value for the unit's operating state. The lower the light source reliability value, the more severe the light source degradation. The degradation assessment model is suitable for handling equipment degradation problems with uncertainties and nonlinear characteristics.

[0088] In step 104, an illuminance loss model is constructed based on the reliability values ​​of each light source, and the illuminance gradient of the area to be compensated is restored to the preset standard by adjusting the global light source power ratio.

[0089] In this embodiment, the illuminance loss model is a mathematical model that quantifies the impact of light source performance degradation on illuminance distribution. The global light source power ratio is the proportion of power adjustment for each light source, used to restore the illuminance gradient of the area to be compensated to a preset standard. The global light source power ratio adjustment is implemented based on the illuminance loss model. This model quantifies the impact of light source performance degradation on illuminance distribution. Then, based on the reliability value of each light source and its influence weight on illuminance, the power ratio of each light source is iteratively optimized to restore the illuminance gradient of the area to be compensated to a preset standard. Specifically, the illuminance loss model is constructed based on the reliability value of each light source. The restoration of the illuminance gradient of the area to be compensated to a preset standard through global light source power ratio adjustment can be achieved in the following way: First, the mapping relationship between the reliability value of each light source and the output light intensity is obtained from the standard detection parameter library of the wafer. The actual light intensity attenuation curve of the light source under different reliability values ​​is calibrated, and the illuminance gradient of each light source unit on the wafer surface is statistically analyzed. The resulting illuminance contribution distribution transforms the attenuation of each light source unit into its weighted influence on the illuminance of the detection area. This mapping relationship serves as the illuminance loss model, which comprehensively considers the light source position, incident angle, and reliability attenuation of each light source unit. This model outputs the illuminance loss value for each area to be compensated. Then, a compensation mapping table between illuminance and power is obtained from the standard detection parameter library of the wafer. For each area to be compensated, the single power increase ratio of adjacent normal light sources in the compensation mapping table is obtained. The compensation principle is to restore the overall illuminance gradient of the area to be compensated to the standard range. An iterative optimization algorithm is used to gradually adjust the driving current of each light source while ensuring that the overall power consumption does not exceed the standard, until the measured illuminance gradient reaches the preset standard. During the adjustment process, the illuminance distribution on the wafer surface is monitored in real time to ensure that no new non-uniformity problems are caused by local overcompensation. Finally, an optimal power allocation scheme is formed and updated to the light source control system.

[0090] In another aspect, in some embodiments, this application provides a wafer defect detection system, referring to... Figure 4 The figure is a schematic diagram of a wafer defect detection system according to some embodiments of this application. The wafer defect detection system includes: an acquisition module 201, a processing module 202, and an execution module 203, which are described below:

[0091] The acquisition module 201 in this application is mainly used to acquire the clamping state of the wafer under test on the wafer clamping structure and the illumination condition parameters of the defect detection light source, and to collect the illuminance distribution on the surface of the wafer under test.

[0092] Processing module 202, in this application, is used to screen out multiple compensation regions of the effective detection area on the surface of the wafer under test from the surface region of the wafer under test through the clamping state and the illumination parameter conditions, extract the illumination gradient value of each compensation region from the illumination distribution, and then determine the defect confidence of the surface defects in the wafer under test based on all the illumination gradient values ​​and the optical reflection difference of the wafer surface under test.

[0093] It should be noted that the processing module 202 is also used to perform a performance degradation analysis on the working state of the light source for defect detection based on the real-time operating current fluctuation rate, thermal accumulation coefficient and spectral shift of each unit light source when the defect confidence is lower than the preset standard threshold, so as to obtain the light source reliability value of the working state of each unit light source in defect detection.

[0094] The execution module 203 in this application is mainly used to construct an illuminance loss model based on the reliability values ​​of each light source, and to restore the illuminance gradient of the area to be compensated to the preset standard by adjusting the global light source power ratio.

[0095] The foregoing has detailed examples of wafer defect detection methods and systems provided in the embodiments of this application. It is understood that the corresponding apparatus, in order to achieve the above functions, includes hardware structures and / or software modules corresponding to the execution of each function. Those skilled in the art should readily recognize that, based on the units and algorithm steps of the examples described in conjunction with the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0096] In some embodiments, this application also provides a computer device, the computer device including a memory and a processor, the memory for storing a computer program, and the processor for calling and running the computer program from the memory, so that the computer device performs the above-described wafer defect detection method.

[0097] In some embodiments, reference Figure 5 The dashed lines in the figure indicate that the unit or module is optional. This figure is a schematic diagram of the structure of a computer device implementing a wafer defect detection method according to an embodiment of this application. The wafer defect detection method described in the above embodiments can... Figure 5 The computer device shown is used to implement this, and the computer device includes at least one processor 301, a memory 302 and at least one communication unit 305. The computer device may be a terminal device, a server or a chip.

[0098] Processor 301 can be a general-purpose processor or a special-purpose processor. For example, processor 301 can be a central processing unit (CPU), which can be used to control computer devices, execute software programs, and process data from software programs. The computer device may also include a communication unit 305 for inputting (receiving) and outputting (transmitting) signals.

[0099] For example, the computer device may be a chip, and the communication unit 305 may be the input and / or output circuit of the chip, or the communication unit 305 may be the communication interface of the chip, which may be a component of a terminal device, network device or other device.

[0100] For example, the computer device may be a terminal device or a server, and the communication unit 305 may be a transceiver of the terminal device or the server, or the communication unit 305 may be a transceiver circuit of the terminal device or the server.

[0101] The computer device may include one or more memories 302 storing a program 304. The program 304 can be executed by a processor 301 to generate instructions 303, causing the processor 301 to execute the method described in the above method embodiments according to the instructions 303. Optionally, the memory 302 may also store data (such as a target audit model). Optionally, the processor 301 may also read data stored in the memory 302, which may be stored at the same storage address as the program 304, or it may be stored at a different storage address than the program 304.

[0102] The processor 301 and memory 302 can be configured separately or integrated together, for example, integrated on the system on chip (SOC) of the terminal device.

[0103] It should be understood that each step of the above method embodiment can be completed by hardware logic circuits or software instructions in the processor 301. The processor 301 can be a CPU, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, such as discrete gates, transistor logic devices, or discrete hardware components.

[0104] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0105] For example, in some embodiments, this application also provides a computer-readable storage medium storing instructions or code that, when executed on a computer, cause the computer to implement the above-described wafer defect detection method.

[0106] Although preferred embodiments of this application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this application.

[0107] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A method for detecting wafer defects, characterized in that, Includes the following steps: The clamping state of the wafer under test on the wafer clamping structure and the illumination condition parameters of the defect detection light source are obtained, and the illuminance distribution on the surface of the wafer under test is collected. Multiple compensation regions of the effective detection area on the surface of the wafer under test are selected from the surface region of the wafer under test by the clamping state and the illumination condition parameters. The illumination gradient value of each compensation region is extracted from the illumination distribution. Then, the defect confidence of the surface defects in the wafer under test is determined based on all the illumination gradient values ​​and the optical reflection difference of the wafer surface. When the confidence level of the defect is lower than the preset standard threshold, the performance degradation analysis of the working state of the light source for defect detection is performed based on the real-time operating current fluctuation rate, thermal accumulation coefficient and spectral shift of each unit light source, so as to obtain the light source reliability value of the working state of each unit light source in defect detection. An illuminance loss model is constructed based on the reliability values ​​of each light source. By adjusting the global light source power ratio, the illuminance gradient of the area to be compensated is restored to the preset standard. Specifically, the process of selecting multiple compensation regions from the surface region of the wafer under test by using the clamping state and the illumination condition parameters includes: Obtain the effective detection area on the surface of the wafer to be tested; The clamping state is used to filter out the deformation areas on the wafer surface caused by clamping from the effective detection area; The illumination condition parameters are used to screen out areas of uneven illumination on the wafer surface from the effective detection area; Based on the deformation region and the uneven illumination region, multiple compensation regions are determined in the effective detection area of ​​the wafer surface under test.

2. The method as described in claim 1, characterized in that, Extracting the illuminance gradient values ​​of each region to be compensated from the illuminance distribution specifically includes: For each area to be compensated, the area to be compensated is divided into multiple grid areas; Obtain the illuminance value of the center point of each cell in each grid region from the illuminance distribution; The illuminance gradient value of the area to be compensated is determined by all the illuminance values, and then the illuminance gradient value of each area to be compensated is obtained.

3. The method as described in claim 1, characterized in that, The defect confidence level of surface defects in the wafer under test is determined based on all illuminance gradient values ​​and the optical reflectance difference of the wafer surface. Specifically, this includes: The difference in reflectance between the wafer under test and the standard wafer is obtained as the optical reflectance difference of the surface of the wafer under test; The defect probability of each region to be compensated is determined by each illuminance gradient value and the optical reflection difference. The defect confidence level of the surface defects in the wafer under test is determined based on all defect probabilities.

4. The method as described in claim 1, characterized in that, Based on the real-time operating current fluctuation rate, thermal accumulation coefficient, and spectral shift of each unit light source, a performance degradation analysis of the light source operating state in defect detection is performed. The specific reliability values ​​of each unit light source operating state in defect detection include: For each unit light source, measure the real-time operating current fluctuation rate, thermal accumulation coefficient, and spectral shift of the unit light source; Initialize a degradation assessment model based on fuzzy logic; The real-time operating current fluctuation rate is used as the current stability factor in the degradation assessment model. The heat accumulation coefficient is used as the thermal stress factor in the degradation assessment model; The spectral shift is used as a spectral degradation factor in the degradation assessment model; The degradation evaluation model after using input factor parameters is used to perform defuzzified membership evaluation on the working state of the unit light source, so as to obtain the light source reliability value of the working state of the unit light source, and then obtain the light source reliability value of the working state of each unit light source in defect detection.

5. The method as described in claim 1, characterized in that, The clamping state includes the clamping force distribution, contact point position, and wafer surface deformation.

6. The method as described in claim 1, characterized in that, The illumination distribution on the surface of the wafer under test is acquired using a complementary metal-oxide-semiconductor sensor.

7. A wafer defect detection system, wherein the wafer defect is detected using the method described in any one of claims 1 to 6, characterized in that, The system includes: The acquisition module is used to acquire the clamping state of the wafer under test on the wafer clamping structure and the illumination condition parameters of the defect detection light source, and to collect the illuminance distribution on the surface of the wafer under test. The processing module is used to filter out multiple compensation regions of the effective detection area on the surface of the wafer under test from the surface region of the wafer under test through the clamping state and the illumination condition parameters, extract the illumination gradient value of each compensation region from the illumination distribution, and then determine the defect confidence of the surface defects in the wafer under test based on all the illumination gradient values ​​and the optical reflection difference of the wafer surface under test. The processing module is also used to perform a performance degradation analysis on the working state of the light source for defect detection based on the real-time operating current fluctuation rate, thermal accumulation coefficient and spectral shift of each unit light source when the defect confidence is lower than a preset standard threshold, so as to obtain the light source reliability value of the working state of each unit light source in defect detection. The execution module is used to build an illuminance loss model based on the reliability values ​​of each light source, and restore the illuminance gradient of the area to be compensated to the preset standard by adjusting the global light source power ratio.

8. A computer device, characterized in that, The computer device includes a memory and a processor, the memory being used to store a computer program, and the processor being used to call and run the computer program from the memory, causing the computer device to perform the wafer defect detection method according to any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores instructions or code that, when executed on a computer, cause the computer to perform the wafer defect detection method as described in any one of claims 1 to 6.

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