Fault detection circuit and method, inverter and circuit
By designing a fault detection circuit that combines the current and voltage detection modules with the fault analysis module, the fault of the switching unit in the inverter bridge arm circuit can be quickly identified, solving the problem of fault expansion in the three-level inverter and achieving efficient and accurate fault detection.
Patent Information
- Application Number
- CN202411675713.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-03-15
- Filing Date
- 2024-11-21
- Publication Date
- 2025-09-16
AI Technical Summary
In existing three-level inverters, when the power switch tube is short-circuited or cannot be turned on, it is easy to cause the fault to expand, and there is a lack of effective fault detection solutions.
A fault detection circuit is designed, including a current detection module, a voltage detection module and a fault analysis module. By detecting the phase current and phase voltage of the inverter and combining the operating status of the inverter, the fault of the switch unit in the bridge arm circuit can be quickly identified.
The invention realizes fast and accurate fault detection of the switch unit in the inverter bridge arm circuit, avoids the expansion of the fault, has a simple structure, low cost, efficient detection logic and fast detection speed.
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Figure CN120652175A_ABST
Abstract
Description
[0001] This application claims priority to Chinese patent application number 2024103033284, filed on March 15, 2024, entitled “Fault Detection Circuit, Method and Three-Level Inverter,” the entire contents of which are incorporated herein by reference. Technical Field
[0002] The present application relates to the technical field of inverters, and in particular to a fault detection circuit and method, an inverter, and a circuit. Background Art
[0003] An inverter is a device that converts direct current (DC) into alternating current (AC). Taking a three-level inverter as an example, a three-level inverter is based on a pulse-width modulation (PWM) circuit with three fixed voltage levels. A three-level inverter typically includes at least a bridge arm circuit, which typically consists of multiple power switches connected in series. Currently, if a power switch shorts or fails to turn on, it can easily trigger failures in other power switches, causing the fault to escalate. Therefore, to prevent further failures, a fault detection solution for inverters is urgently needed. Summary of the Invention
[0004] Based on this, it is necessary to provide a fault detection circuit and method, an inverter and a circuit that can efficiently and quickly detect inverter faults in order to solve the above technical problems.
[0005] In a first aspect, the present application provides a fault detection circuit applied to an inverter, wherein the inverter includes at least a bridge arm circuit, the bridge arm circuit including a plurality of switch units connected in series, and the fault detection circuit includes:
[0006] a current detection module, connected to the output end of the bridge arm circuit, and used to detect the phase current of the inverter;
[0007] a voltage detection module, connected to the output end of the bridge arm circuit, for detecting the phase voltage of the inverter;
[0008] A fault analysis module is connected to the current detection module and the voltage detection module respectively, and is used to determine the fault detection result of each switch unit in the bridge arm circuit according to the operating state of the inverter, the current direction of the phase current and the phase voltage.
[0009] In one embodiment, the current detection module includes:
[0010] a current acquisition unit, connected to the output end of the bridge arm circuit, and configured to acquire the current signal of the phase current;
[0011] a signal conversion unit, connected to the current acquisition unit, and configured to convert the current signal into a voltage signal;
[0012] A direction detection unit is connected to the signal conversion unit and the fault analysis module, respectively, and is used to compare the voltage signal with a first preset threshold voltage and a second preset threshold voltage, respectively, and output a first comparison result to the fault analysis module; wherein the first preset threshold voltage is greater than the second preset threshold voltage.
[0013] In one embodiment, the fault analysis module is further configured to determine a current direction of the phase current when the first comparison result satisfies a fault analysis condition.
[0014] In one embodiment, the fault analysis module is further configured to determine that the current direction of the phase current is a negative direction when the first comparison result is that the voltage signal is less than the first preset threshold voltage and less than the second preset threshold voltage;
[0015] The fault analysis module is further configured to determine that the current direction of the phase current is a positive direction when the first comparison result is that the voltage signal is greater than the second preset threshold voltage and greater than the first preset threshold voltage.
[0016] In one embodiment, the signal conversion unit includes: a first resistance unit, a second resistance unit, a third resistance unit, a fourth resistance unit and an amplifier;
[0017] The first end of the first resistance unit is connected to the first output end of the current acquisition unit, and the second end of the first resistance unit is connected to the first input end of the amplifier;
[0018] A first end of the second resistance unit is connected to the second output end of the current acquisition unit, and a second end of the second resistance unit is connected to the second input end of the amplifier;
[0019] A first end of the third resistor unit is connected to a preset power signal, and a second end of the third resistor unit is connected to the first input end of the amplifier;
[0020] The fourth resistance unit is connected between the second input terminal and the output terminal of the amplifier, and the output terminal of the amplifier is connected to the input terminal of the direction detection unit.
[0021] In one embodiment, the direction detection unit includes: a fifth resistor unit, a sixth resistor unit, a first comparator and a second comparator;
[0022] A first end of the fifth resistor unit is connected to the output end of the signal conversion unit, and a second end of the fifth resistor unit is connected to the first input end of the first comparator;
[0023] The second input terminal of the first comparator is connected to the first preset threshold voltage, and the output terminal of the first comparator is connected to the fault analysis module;
[0024] A first end of the sixth resistor unit is connected to the output end of the signal conversion unit, and a second end of the sixth resistor unit is connected to the first input end of the second comparator;
[0025] The second input terminal of the second comparator is connected to the second preset threshold voltage, and the output terminal of the second comparator is connected to the fault analysis module.
[0026] In one embodiment, the voltage detection module includes:
[0027] a voltage dividing unit connected to the output end of the bridge arm circuit and used for collecting the voltage dividing signal of the phase voltage;
[0028] a judgment unit connected to the voltage dividing unit, configured to compare the voltage divided signal with a third preset threshold voltage and a fourth preset threshold voltage respectively, and output a second comparison result, wherein the fourth preset threshold voltage is greater than the third preset threshold voltage;
[0029] An isolation unit is connected to the judgment unit and the fault analysis module respectively, and is used to transmit the second comparison result output by the judgment unit to the fault analysis module, so that the fault analysis module determines the voltage state of the output end of the bridge arm circuit according to the second comparison result.
[0030] In one embodiment, the voltage dividing unit includes: a seventh resistance unit and an eighth resistance unit;
[0031] The first end of the seventh resistor unit is used to connect to the output end of the bridge arm circuit, the second end of the seventh resistor unit is connected to the first end of the eighth resistor unit, and the second end of the eighth resistor unit is connected to the negative bus voltage of the inverter; wherein the resistance of the eighth resistor unit is less than the resistance of the seventh resistor unit.
[0032] In one embodiment, the judgment unit includes: a third comparator and a fourth comparator;
[0033] The first input terminal of the third comparator is connected to the output terminal of the voltage dividing unit, the second input terminal of the third comparator is connected to the third preset threshold voltage, and the output terminal of the third comparator is connected to the first input terminal of the isolation unit;
[0034] The first input terminal of the fourth comparator is connected to the output terminal of the voltage divider unit, the second input terminal of the fourth comparator is connected to the fourth preset threshold voltage, and the output terminal of the fourth comparator is connected to the second input terminal of the isolation unit.
[0035] In one embodiment, the isolation unit includes a digital isolator; the first input terminal and the second input terminal of the digital isolator serve as the first input terminal and the second input terminal of the isolation unit respectively, and the output terminal of the digital isolator is connected to the fault analysis module.
[0036] In one embodiment, the plurality of switch units connected in series include a first switch unit, a second switch unit, a third switch unit, and a fourth switch unit connected in series;
[0037] A first end of the first switch unit is connected to a positive bus voltage, a second end of the first switch unit is connected to a first end of the second switch unit, a second end of the second switch unit is connected to a first end of the third switch unit, a second end of the third switch unit is connected to a first end of the fourth switch unit, and a second end of the fourth switch unit is connected to a negative bus voltage;
[0038] Wherein, the fault analysis module is configured to:
[0039] When the operating states are respectively in the positive half-cycle active power, the negative half-cycle active power, the negative half-cycle reactive power, and the positive half-cycle reactive power, within the dead time, determining whether a short circuit fault occurs in the first switch unit, the fourth switch unit, the second switch unit, and the third switch unit according to the current direction of the phase current and the phase voltage;
[0040] When the operating states are respectively in the positive half-cycle active power and the negative half-cycle active power, within the dead time, determining whether the second switch unit and the third switch unit have a circuit breaker fault according to the current direction of the phase current and the phase voltage;
[0041] After the operating state is in the positive half cycle and the driving signal is sent to the first switch unit for a preset time, determining whether the first switch unit has a circuit breaker fault according to the current direction of the phase current and the phase voltage;
[0042] After the operating state is in the negative half-cycle active state and a driving signal is sent to the fourth switch unit for a preset time, determining whether a circuit breaker fault occurs in the fourth switch unit according to the current direction of the phase current and the phase voltage;
[0043] After the operating state is in the negative half-cycle reactive state and a driving signal is sent to the second switch unit for a preset time, determining whether a circuit breaker fault occurs in the second switch unit according to the current direction of the phase current and the phase voltage;
[0044] After the operating state is in a positive half-cycle reactive state and a driving signal is sent to the third switch unit for a preset time, determining whether a circuit breaker fault occurs in the third switch unit according to the current direction of the phase current and the phase voltage;
[0045] After the operating state is in the positive half cycle and the driving signal is sent to the first switch unit for a preset time, determining whether the first switch unit has a circuit breaker fault according to the current direction of the phase current and the phase voltage;
[0046] After the operating state is in the negative half-cycle active state and a driving signal is sent to the fourth switch unit for a preset time, determining whether a circuit breaker fault occurs in the fourth switch unit according to the current direction of the phase current and the phase voltage;
[0047] After the operating state is in the negative half-cycle reactive state and a driving signal is sent to the second switch unit for a preset time, determining whether a circuit breaker fault occurs in the second switch unit according to the current direction of the phase current and the phase voltage;
[0048] After the operating state is in the positive half cycle reactive state and a driving signal is sent to the third switch unit for a preset time, it is determined whether the third switch unit has a circuit breaker fault according to the current direction of the phase current and the phase voltage.
[0049] In one embodiment, the fault analysis module is further configured to:
[0050] When the operating state is in the positive half-cycle active state, if the current direction of the phase current is positive and the phase voltage is a positive bus voltage within the dead time, it is determined that a short circuit fault occurs in the first switch unit;
[0051] When the operating state is in the negative half-cycle active state, if the current direction of the phase current is negative and the phase voltage is a negative bus voltage within the dead time, it is determined that a short circuit fault occurs in the fourth switch unit;
[0052] When the operating state is in the negative half-cycle reactive state, if the current direction of the phase current is positive and the phase voltage is half the positive bus voltage within the dead time, it is determined that a short circuit fault occurs in the second switch unit;
[0053] When the operating state is in the positive half-cycle reactive state, if the current direction of the phase current is negative and the phase voltage is half the positive bus voltage within the dead time, it is determined that a short circuit fault occurs in the third switch unit;
[0054] When the operating state is in the positive half-cycle active state, if the current direction of the phase current is positive and the phase voltage is a negative bus voltage within the dead time, it is determined that the second switch unit has a circuit breaker fault;
[0055] When the operating state is in the negative half-cycle active state, if the current direction of the phase current is negative and the phase voltage is a positive bus voltage within the dead time, it is determined that the third switch unit has a circuit breaker fault;
[0056] When the operating state is in the positive half-cycle with active power, if, after a preset time has passed since the driving signal is sent to the first switch unit, the current direction of the phase current is in the positive direction and the phase voltage is half the positive bus voltage, it is determined that the first switch unit has a circuit breaker fault;
[0057] When the operating state is in the negative half-cycle active state, if, after a preset time has passed since the drive signal is sent to the fourth switch unit, the current direction of the phase current is negative and the phase voltage is half of the positive bus voltage, it is determined that the fourth switch unit has a circuit breaker fault;
[0058] When the operating state is in the negative half-cycle reactive state, if, after a preset time has passed since the driving signal is sent to the second switch unit, the current direction of the phase current is in a positive direction and the phase voltage is a negative bus voltage, it is determined that the second switch unit has a circuit breaker fault;
[0059] When the operating state is in the positive half-cycle reactive state, if after a preset time has passed since the driving signal is sent to the third switch unit, the current direction of the phase current is negative and the phase voltage is a positive bus voltage, it is determined that a circuit breaker fault occurs in the third switch unit.
[0060] In one embodiment, the inverter is a three-level inverter.
[0061] In a second aspect, an embodiment of the present application provides an inverter, which includes at least one inverter circuit and at least one fault detection circuit as described in the first aspect; wherein each of the inverter circuits includes a bridge arm circuit, the bridge arm circuit includes a plurality of switching units connected in series in sequence, and each of the bridge arm circuits is connected to a corresponding fault detection circuit.
[0062] In one embodiment, each of the inverter circuits further includes a first capacitor unit, a second capacitor unit, a first diode unit, and a second diode unit; the plurality of switch units connected in series include a first switch unit, a second switch unit, a third switch unit, and a fourth switch unit connected in series;
[0063] A first end of the first capacitor unit is connected to a positive bus voltage, a second end of the first capacitor unit is connected to a first end of the second capacitor unit, and a second end of the second capacitor unit is connected to a negative bus voltage;
[0064] a first end of the first switch unit connected to the first end of the first capacitor unit, a second end of the first switch unit connected to the first end of the second switch unit, a second end of the second switch unit connected to the first end of the third switch unit, a second end of the third switch unit connected to the first end of the fourth switch unit, and a second end of the fourth switch unit connected to the second end of the second capacitor unit;
[0065] The first end of the first diode unit is connected to the second end of the first switch unit, the second end of the first diode unit is connected to the second end of the first capacitor unit, the first end of the second diode unit is connected to the second end of the first diode unit, and the second end of the second diode unit is connected to the second end of the third switch unit.
[0066] In a third aspect, an embodiment of the present application provides a fault detection method, the fault detection method comprising:
[0067] Obtain the phase current and phase voltage of the inverter;
[0068] A fault detection result of each switch unit in the bridge arm circuit of the inverter is determined according to the operating state of the inverter, the current direction of the phase current, and the phase voltage.
[0069] In one embodiment, determining whether each switch unit in the bridge arm circuit has a fault according to the operating state of the inverter, the current direction of the phase current, and the phase voltage includes:
[0070] When the operating state is in the positive half-cycle active state, if the current direction of the phase current is positive and the phase voltage is a positive bus voltage within the dead time, it is determined that a short circuit fault occurs in the first switch unit;
[0071] When the operating state is in the negative half-cycle active state, if the current direction of the phase current is negative and the phase voltage is a negative bus voltage within the dead time, it is determined that a short circuit fault occurs in the fourth switch unit;
[0072] When the operating state is in the negative half-cycle reactive state, if the current direction of the phase current is positive and the phase voltage is half the positive bus voltage within the dead time, it is determined that a short circuit fault occurs in the second switch unit;
[0073] When the operating state is in the positive half-cycle reactive state, if the current direction of the phase current is negative and the phase voltage is half the positive bus voltage within the dead time, it is determined that a short circuit fault occurs in the third switch unit;
[0074] When the operating state is in the positive half-cycle active state, if the current direction of the phase current is positive and the phase voltage is a negative bus voltage within the dead time, it is determined that a circuit breaker fault occurs in the second switch unit;
[0075] When the operating state is in the negative half-cycle active state, if the current direction of the phase current is negative and the phase voltage is a positive bus voltage within the dead time, it is determined that a circuit breaker fault occurs in the third switch unit;
[0076] When the operating state is in the positive half-cycle with active power, if, after a preset time has passed since the driving signal is sent to the first switch unit, the current direction of the phase current is in the positive direction and the phase voltage is half the positive bus voltage, it is determined that the first switch unit has a circuit breaker fault;
[0077] When the operating state is in the negative half-cycle active state, if, after a preset time has passed since the drive signal is sent to the fourth switch unit, the current direction of the phase current is negative and the phase voltage is half of the positive bus voltage, it is determined that the fourth switch unit has a circuit breaker fault;
[0078] When the operating state is in the negative half-cycle reactive state, if, after a preset time has passed since the driving signal is sent to the second switch unit, the current direction of the phase current is in a positive direction and the phase voltage is a negative bus voltage, it is determined that the second switch unit has a circuit breaker fault;
[0079] When the operating state is in the positive half-cycle reactive state, if after a preset time has passed since the driving signal is sent to the third switch unit, the current direction of the phase current is negative and the phase voltage is a positive bus voltage, it is determined that a circuit breaker fault occurs in the third switch unit.
[0080] In a fourth aspect, an embodiment of the present application provides a programmable logic circuit having a program stored thereon, which implements the fault detection method described in the third aspect when the program is executed.
[0081] The aforementioned fault detection circuit and method, inverter, and circuit, wherein the fault detection circuit is applied to an inverter, the inverter comprising at least a bridge arm circuit, the bridge arm circuit comprising a plurality of switch units connected in series. The fault detection circuit comprises a current detection module, a voltage detection module, and a fault analysis module. The current detection module is used to connect to the output end of the bridge arm circuit to detect the phase current of the inverter; the voltage detection module is used to connect to the output end of the bridge arm circuit to detect the phase voltage of the inverter; the fault analysis module is connected to the current detection module and the voltage detection module respectively, and is used to determine whether a fault occurs in each switch unit in the bridge arm circuit according to the operating state of the inverter, the current direction of the phase current, and the phase voltage; in this way, the fault detection circuit provided in the embodiment of the present application uses the current direction and phase voltage of the phase current of the inverter to realize fault detection of each switch unit in the bridge arm circuit of the inverter under different operating states of the inverter, and the fault detection circuit is a hardware fault detection circuit with a simple structure, easy to implement, low cost, simple and efficient detection logic, and a fault detection speed of the hardware fault detection circuit that is fast enough to detect the fault before the fault expands, thereby helping to avoid fault expansion. Fault expansion is, for example, a through short circuit in the bridge arm circuit, or an overvoltage in the faulty switch unit, or a phase voltage waveform distortion at the output end of the bridge arm circuit. BRIEF DESCRIPTION OF THE DRAWINGS
[0082] Figure 1 Schematic diagram of the structure of a bridge arm circuit in one embodiment;
[0083] Figure 2 1 is a schematic structural diagram of a fault detection circuit in one embodiment;
[0084] Figure 3 Schematic diagram of the structure of a current detection module in one embodiment;
[0085] Figure 4 Schematic diagram of the structure of a voltage detection module in one embodiment;
[0086] FIG5( a ) is a schematic diagram showing one state of the bridge arm circuit when the first switch tube is normally turned on in one embodiment;
[0087] FIG5( b ) is a schematic diagram showing one state of the bridge arm circuit when the first switch tube is normally turned off in one embodiment;
[0088] FIG5( c ) is a schematic diagram of the state of the bridge arm circuit when a short circuit fault occurs in the first switching tube in one embodiment;
[0089] FIG6 (a) is a schematic diagram showing one state of the bridge arm circuit when the fourth switch tube is normally turned on in one embodiment;
[0090] FIG6( b ) is a second schematic diagram of the state of the bridge arm circuit when the fourth switch tube is normally turned off in one embodiment;
[0091] FIG6 (c) is a schematic diagram of the state of the bridge arm circuit when a short circuit fault occurs in the fourth switch tube in one embodiment;
[0092] FIG7 (a) is a schematic diagram showing one state of the bridge arm circuit when the second switch tube is normally turned on in one embodiment;
[0093] FIG7( b ) is a schematic diagram showing one state of the bridge arm circuit when the second switch tube is normally turned off in one embodiment;
[0094] FIG7 (c) is a schematic diagram of the state of the bridge arm circuit when a short circuit fault occurs in the second switch tube in one embodiment;
[0095] FIG8 (a) is a schematic diagram showing one state of the bridge arm circuit when the third switch tube is normally turned on in one embodiment;
[0096] FIG8( b ) is a schematic diagram showing one state of the bridge arm circuit when the third switch tube is normally turned off in one embodiment;
[0097] FIG8 (c) is a schematic diagram of the state of the bridge arm circuit when a short circuit fault occurs in the third switch tube in one embodiment;
[0098] FIG9( a ) is a schematic diagram showing the state of the bridge arm circuit when the first switch tube is normally turned off and the second switch tube is normally turned on in one embodiment;
[0099] FIG9( b ) is a schematic diagram of the state of the bridge arm circuit when the first switch tube and the second switch tube are normally turned on in one embodiment;
[0100] FIG9( c ) is a schematic diagram showing one state of the bridge arm circuit when a second switching tube fails to open the circuit in one embodiment;
[0101] FIG10( a ) is a schematic diagram showing the state of the bridge arm circuit when the fourth switch tube is normally turned off and the third switch tube is normally turned on in one embodiment;
[0102] FIG10( b ) is a schematic diagram showing the state of the bridge arm circuit when the fourth switch tube is normally turned on and the third switch tube is normally turned on in one embodiment;
[0103] FIG10( c ) is a schematic diagram showing one state of the bridge arm circuit when a third switch tube fails to open a circuit in one embodiment;
[0104] FIG11( a ) is a second schematic diagram of the state of the bridge arm circuit when the first switch tube is normally turned off in one embodiment;
[0105] FIG11( b ) is a second schematic diagram of the state of the bridge arm circuit when the first switch tube is normally turned on in one embodiment;
[0106] FIG11( c ) is a schematic diagram showing the state of the bridge arm circuit when a first switching tube fails to open the circuit in one embodiment;
[0107] FIG12( a ) is a second schematic diagram of the state of the bridge arm circuit when the fourth switch tube is normally turned off in one embodiment;
[0108] FIG12( b ) is a second schematic diagram of the state of the bridge arm circuit when the fourth switch tube is normally turned on in one embodiment;
[0109] FIG12( c ) is a schematic diagram showing the state of the bridge arm circuit when the fourth switch tube has a short circuit fault in one embodiment;
[0110] FIG13( a ) is a second schematic diagram of the bridge arm circuit when the second switch tube is normally turned off in one embodiment;
[0111] FIG13( b ) is a second schematic diagram of the bridge arm circuit when the second switch tube is normally turned on in one embodiment;
[0112] FIG13( c ) is a second schematic diagram of the state of the bridge arm circuit when a circuit-breaking fault occurs in the second switching tube in one embodiment;
[0113] FIG14( a ) is a second schematic diagram of the state of the bridge arm circuit when the third switch tube is normally turned off in one embodiment;
[0114] FIG14( b ) is a second schematic diagram of the state of the bridge arm circuit when the third switch tube is normally turned on in one embodiment;
[0115] FIG14( c ) is a second schematic diagram of the state of the bridge arm circuit when the third switch tube has a short circuit fault in one embodiment;
[0116] Figure 15 FIG. 4 is a flow chart of a fault detection method in an embodiment. DETAILED DESCRIPTION
[0117] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.
[0118] The fault detection circuit provided in the embodiment of the present application may be applied to an inverter, wherein the inverter may include at least a bridge arm circuit.
[0119] The bridge arm circuit may include a plurality of switch units connected in series. Figure 1 The figure only exemplifies the situation where the bridge arm circuit includes four switch units connected in series.
[0120] The switch unit may include at least one switch tube, such as, but not limited to, a power switch tube, such as, but not limited to, an insulated gate bipolar transistor (IGBT), a metal-oxide semiconductor field effect transistor (MOSFET), etc. When the switch unit includes one switch tube, the first end, the second end, and the control end of the switch tube serve as the first end, the second end, and the control end of the switch unit, respectively. When the switch unit includes multiple switch tubes, the operating states of the multiple switch tubes remain the same, the multiple switch tubes may be connected in parallel and / or in series, and the first end, the second end, and the control end formed by the multiple switch tubes being connected to each other serve as the first end, the second end, and the control end of the switch unit, respectively. Figure 1 The figure only exemplifies the situation where each switch unit includes one switch tube, that is, the switch tubes T1 to T4 are connected in series in sequence.
[0121] It can be understood that in the multiple switch units connected in series in the bridge arm circuit, the type of switch tubes in each switch unit, the number of switch tubes and / or the connection relationship between the switch tubes can be the same or different, and the embodiments of the present application do not specifically limit them.
[0122] The fault of the inverter may include a short circuit or open circuit fault in any switching unit in the bridge arm circuit.
[0123] For example, the operating states of the switches in a switch unit remain the same. Therefore, a short-circuit or open-circuit fault in a switch unit can be interpreted as a short-circuit or open-circuit fault in all switches in the switch unit. Conversely, a short-circuit or open-circuit fault in all switches in a switch unit can be interpreted as a short-circuit or open-circuit fault in the switch unit. Furthermore, if an open-circuit fault occurs in the drive circuit for a switch unit, the switch unit cannot be turned on, i.e., a short-circuit fault occurs in the switch unit.
[0124] In an exemplary embodiment, Figure 2 As shown, a fault detection circuit is provided, which includes a current detection module 210, a voltage detection module 220 and a fault analysis module 230.
[0125] Combine Figure 1 and Figure 2 The current detection module 210 is connected to the output terminal A of the bridge arm circuit and is used to detect the phase current of the inverter ( Figure 1Iac is used as an example of phase current, although it could also be Iab or Ibc. In the field of power technology, Iac, Iab, and Ibc are typically used to represent the phase current flowing through each phase load in a three-phase power supply. The current detection module 210 has the functions of current sampling and detection. The current detection module 210 can be a hardware circuit composed of multiple interconnected circuit components. The current detection module 210 is connected to the output terminal A of the bridge arm circuit, thereby sampling and detecting the inverter phase current.
[0126] Combine Figure 1 and Figure 2 The voltage detection module 220 is connected to the output terminal A of the bridge arm circuit and is used to detect the phase voltage Vac of the inverter ( Figure 1 Vac is used as an example of phase voltage. Of course, phase voltage can also be Vab or Vbc. In the field of power technology, Vab, Vbc, and Vac are generally used to represent the voltage difference between any two phases of a three-phase power supply. The voltage detection module 220 has the function of voltage sampling and detection. The voltage detection module 220 can be a hardware circuit composed of multiple interconnected circuit components. The voltage detection module 220 is connected to the output terminal A of the bridge arm circuit, thereby sampling and detecting the phase voltage of the inverter.
[0127] Continue to refer Figure 2 , the fault analysis module 230 is connected to the current detection module 210 and the voltage detection module 220 respectively. The fault analysis module 230 is used to determine the fault detection results of each switch unit in the bridge arm circuit according to the different operating states of the inverter, the current direction of the phase current and the phase voltage. Among them, the fault analysis module 230 has the functions of fault detection and analysis. The fault analysis module 230 can obtain the operating state of the inverter. The operating state of the inverter may include a cycle state and a power state. The cycle state may include being in the positive half cycle of the working cycle or in the negative half cycle of the working cycle. The power state may include being in an active power state or in a reactive power state. Exemplarily, the operating state of the inverter includes positive half cycle active power, positive half cycle reactive power, negative half cycle active power and negative half cycle reactive power.
[0128] In the embodiments of the present application, the inventors have discovered that, in any case where the inverter has different operating states and the phase current at the output end of the bridge arm circuit has different current directions, if any switch unit in the bridge arm circuit fails, the phase voltage at the output end of the bridge arm circuit will have a corresponding error, that is, deviate from the correct value. Accordingly, the fault detection circuit provided in the embodiments of the present application uses the current direction and phase voltage of the phase current of the inverter to perform fault detection on each switch unit in the bridge arm circuit of the inverter under different operating states of the inverter. If a corresponding error in the phase voltage is detected under the corresponding situation, it is determined that the corresponding switch unit has failed. In addition, the fault detection circuit is a hardware fault detection circuit with a simple structure, easy to implement, low cost, simple and efficient detection logic, and small delay. In other words, the fault detection speed of the hardware fault detection circuit is fast enough to detect the fault before the fault expands, thereby helping to avoid fault expansion. Fault expansion is, for example, a through short circuit in the bridge arm circuit, or an overvoltage in the faulty switch unit, or a phase voltage waveform distortion at the output end of the bridge arm circuit.
[0129] The inventors of this application have also discovered that conventional fault detection schemes for three-level inverters rely on the desaturation characteristics of power switches during short-circuit faults. However, in practice, some power switches lack this desaturation capability. Consequently, a short-circuit fault can immediately damage the power switch module, leading to fault escalation. The hardware fault detection circuit of the present embodiment offers simple and efficient detection logic, minimal latency, and rapid fault detection, enabling detection before a fault escalates, thus preventing further escalation.
[0130] In the fault detection circuit provided in the embodiment of the present application, the specific structure of the current detection module 210 can be various, which are exemplarily described below but are not intended to be a specific limitation.
[0131] In an exemplary embodiment, Figure 3 As shown, the current detection module 210 includes a current acquisition unit 2101, a signal conversion unit 2102, and a direction detection unit 2103. The current acquisition unit 2101 is connected to the output terminal A of the bridge arm circuit and is used to acquire the current signal of the phase current. The signal conversion unit 2102 is connected to the current acquisition unit 2101 and is used to convert the current signal into a voltage signal. The direction detection unit 2103 is connected to the signal conversion unit 2102 and the fault analysis module 230 respectively, and is used to compare the voltage signal with a first preset threshold voltage and a second preset threshold voltage, and output a first comparison result to the fault analysis module 230.
[0132] The current signal is converted into a voltage signal, so the magnitude of the voltage signal can be used to characterize the magnitude and direction of the phase current. Generally, the phase current may fluctuate around 0A, alternating between positive and negative. This fluctuation can affect the accuracy of the acquired power state. Therefore, fault detection can be disabled within a certain range around 0A. A first preset threshold voltage Vref_pos and a second preset threshold voltage Vref_neg are used, where the first preset threshold voltage Vref_pos is greater than the second preset threshold voltage Vref_neg, the first preset threshold voltage Vref_pos representing the positive half-cycle threshold of the phase current, and the second preset threshold voltage Vref_neg representing the negative half-cycle threshold of the phase current. This defines a certain range around 0A for the phase current. The direction detection unit 2103 compares the voltage signal with the first preset threshold voltage Vref_pos and the second preset threshold voltage Vref_neg, respectively, and outputs a first comparison result to the fault analysis module 230, so that the fault analysis module 230 can determine whether fault detection can be performed based on the first comparison result.
[0133] The current detection module 210 provided in the embodiment of the present application includes a current acquisition unit 2101, a signal conversion unit 2102 and a direction detection unit 2103, so that the current detection module 210 has a simple structure, is easy to implement, has low cost, and has a simple and efficient detection logic and a high speed. In addition, the direction detection unit 2103 is provided to make the acquired power state and the acquired direction of the phase current more accurate and reliable, thereby making fault detection more accurate and reliable.
[0134] In an exemplary embodiment, the fault analysis module 230 is further configured to determine the current direction of the phase current based on the first comparison result if the first comparison result satisfies the fault analysis condition. Specifically, the fault analysis module 230 first determines whether the first comparison result satisfies the fault detection condition. If not, the fault analysis module 230 determines that fault detection cannot be performed and does not further determine the current direction. If the fault analysis module 230 satisfies the fault detection condition, the fault analysis module 230 determines that fault detection can be performed and further determines the current direction based on the first comparison result.
[0135] In an exemplary embodiment, the fault analysis module 230 is further configured to, when the first comparison result shows that the voltage signal is less than the first preset threshold voltage Vref_pos and less than the second preset threshold voltage Vref_neg, deem that the phase current is greater than the negative half-cycle threshold in the negative direction and is not fluctuating around 0 A, determine that the first comparison result satisfies the fault analysis condition, thereby determining that fault detection can be performed, and determine that the current direction of the phase current is negative; when the first comparison result shows that the voltage signal is greater than the second preset threshold voltage Vref_neg and greater than the first preset threshold voltage Vref_pos, deem that the phase current is greater than the positive half-cycle threshold in the positive direction and is not fluctuating around 0 A, determine that the first comparison result satisfies the fault analysis condition, thereby determining that fault detection can be performed, and determine that the current direction of the phase current is positive; when the first comparison result shows that the voltage signal is less than the first preset threshold voltage Vref_pos and greater than the second preset threshold voltage Vref_neg, deem that the phase current fluctuates around 0 A between the negative half-cycle threshold in the negative direction and the positive half-cycle threshold in the positive direction, determine that the first comparison result does not satisfy the fault analysis condition, thereby determining that fault detection cannot be performed, and determine that the first comparison result does not satisfy the fault analysis condition.
[0136] In an exemplary embodiment, the current acquisition unit 2101 includes a current sensor CT1 .
[0137] The first output terminal and the second output terminal of the current sensor CT1 may serve as the first output terminal and the second output terminal of the current acquisition unit 2101 , respectively.
[0138] In this embodiment, the current acquisition unit 2101 includes the current sensor CT1 , so that the current acquisition unit 2101 has a simple structure, is easy to implement, and has low cost.
[0139] In an exemplary embodiment, the signal conversion unit 2102 includes a first resistor unit, a second resistor unit, a third resistor unit, a fourth resistor unit and an amplifier; the first end of the first resistor unit is connected to the first output end of the current acquisition unit 2101, and the second end of the first resistor unit is connected to the first input end of the amplifier; the first end of the second resistor unit is connected to the second output end of the current acquisition unit 2101, and the second end of the second resistor unit is connected to the second input end of the amplifier; the first end of the third resistor unit is connected to the preset power supply signal V_bias, and the second end of the third resistor unit is connected to the first input end of the amplifier; the fourth resistor unit is connected between the second input end and the output end of the amplifier, and the output end of the amplifier is connected to the input end of the direction detection unit 2103.
[0140] The first, second, third, and fourth resistor units, along with the amplifier, form a differential operational amplifier circuit. Exemplarily, a current signal passing through the differential operational amplifier circuit can generate a voltage between 0V and 3.3V. A voltage of 1.65V corresponds to a phase current of 0A, a voltage between 1.65V and 3.3V corresponds to a positive phase current, and a voltage between 0V and 1.65V corresponds to a negative phase current. The first preset threshold voltage Vref_pos can be a voltage between 1.65V and 3.3V, and the second preset threshold voltage Vref_neg can be a voltage between 0V and 1.65V.
[0141] The first resistance unit, the second resistance unit, the third resistance unit and the fourth resistance unit may each include at least one resistor. Figure 3 As shown, the first resistor unit includes a first resistor R1, the second resistor unit includes a second resistor R2, the third resistor unit includes a third resistor R3, and the fourth resistor unit includes a fourth resistor R4. The first end of the first resistor R1 is connected to the first output end of the current acquisition unit 2101, and the second end of the first resistor R1 is connected to the first input end of the amplifier U1. The first end of the second resistor R2 is connected to the second output end of the current acquisition unit 2101, and the second end of the second resistor R2 is connected to the second input end of the amplifier U1. The first end of the third resistor R3 is connected to the preset power supply signal V_bias, and the second end of the third resistor R3 is connected to the first input end of the amplifier U1. The fourth resistor R4 is connected between the second input end and the output end of the amplifier U1, and the output end of the amplifier U1 is connected to the input end of the direction detection unit 2103. For example, the first input end of the amplifier U1 can be the positive input end + of the amplifier U1, and the second input end of the amplifier U1 can be the negative input end - of the amplifier U1.
[0142] In this embodiment, the current detection module 210 includes a differential operational amplifier circuit, which makes the acquisition of phase current efficient, thereby reducing the delay of the fault detection circuit, that is, the detection logic is simple, efficient and fast. The small delay can be understood as a small delay between the occurrence of a fault and the detection of the fault, so that the fault detection can be completed within the dead time of the bridge arm circuit, and the fault can be detected before the fault expands, which helps to avoid the expansion of the fault.
[0143] In an exemplary embodiment, the direction detection unit 2103 includes a fifth resistor unit, a sixth resistor unit, a first comparator and a second comparator; the first end of the fifth resistor unit is connected to the output end of the signal conversion unit, and the second end of the fifth resistor unit is connected to the first input end of the first comparator; the second input end of the first comparator is connected to the first preset threshold voltage, and the output end of the first comparator is connected to the fault analysis module; the first end of the sixth resistor unit is connected to the output end of the signal conversion unit, and the second end of the sixth resistor unit is connected to the first input end of the second comparator; the second input end of the second comparator is connected to the second preset threshold voltage, and the output end of the second comparator is connected to the fault analysis module.
[0144] The fifth resistance unit and the sixth resistance unit may each include at least one resistor.
[0145] For example, Figure 3 As shown, the fifth resistor unit includes a fifth resistor R5, and the sixth resistor unit includes a sixth resistor R6. The first end of the fifth resistor R5 is connected to the output end of the signal conversion unit 2102, and the second end of the fifth resistor R5 is connected to the first input end of the first comparator U2; the second input end of the first comparator U2 is connected to the first preset threshold voltage, and the output end of the first comparator U2 is connected to the fault analysis module 230; the first end of the sixth resistor R6 is connected to the output end of the signal conversion unit 2102, and the second end of the sixth resistor R6 is connected to the first input end of the second comparator U3; the second input end of the second comparator U3 is connected to the second preset threshold voltage, and the output end of the second comparator U3 is connected to the fault analysis module 230.
[0146] Exemplarily, the first input terminal of the first comparator U2 is the positive input terminal + of the first comparator U2, the second input terminal of the first comparator U2 is the negative input terminal - of the first comparator U2, the first input terminal of the second comparator U3 is the positive input terminal + of the second comparator U3, and the second input terminal of the second comparator U3 is the negative input terminal - of the second comparator U3.
[0147] Among them, when the first comparator U2 outputs a low level 0 and the second comparator U3 outputs a low level 0, the fault analysis module 230 determines that fault detection can be performed, and further determines that the current direction is a negative direction; when the first comparator U2 outputs a low level 0 and the second comparator U3 outputs a high level 1, the fault analysis module 230 determines that fault detection cannot be performed; when the first comparator U2 outputs a high level 1 and the second comparator U3 outputs a low level 0, the fault analysis module 230 determines that fault detection cannot be performed; when the first comparator U2 outputs a high level 1 and the second comparator U3 outputs a high level 1, the fault analysis module 230 determines that fault detection can be performed, and further determines that the current direction is a positive direction.
[0148] In this embodiment, the current detection module 210 uses the first comparator U2 and the second comparator U3 to determine the current direction of the phase current, so that the current direction of the phase current is acquired efficiently, thereby reducing the delay of the fault detection circuit, making the detection logic simple, efficient, and fast, and being able to detect the fault before it expands, thereby helping to avoid the expansion of the fault.
[0149] In the fault detection circuit provided in the embodiment of the present application, the specific structure of the voltage detection module 220 can be various, which are exemplified below but are not intended to be a specific limitation.
[0150] In an exemplary embodiment, Figure 4 As shown, the voltage detection module 220 includes a voltage dividing unit 2201, a judgment unit 2202, and an isolation unit 2203. The voltage dividing unit 2201 is connected to the output terminal A of the bridge arm circuit and is used to collect the voltage dividing signal of the phase voltage. The judgment unit 2202 is connected to the voltage dividing unit 2201 and is used to compare the voltage dividing signal with the third preset threshold voltage and the fourth preset threshold voltage respectively, and output a second comparison result. The isolation unit 2203 is connected to the voltage dividing unit 2201 and the fault analysis module 230 respectively, and is used to transmit the second comparison result output by the judgment unit 2202 to the fault analysis module 230, so that the fault analysis module 230 determines the voltage state of the output terminal A of the bridge arm circuit based on the comparison result.
[0151] The output terminal A of the bridge arm circuit is located between the second switching transistor T2 and the third switching transistor T3. To further reduce the delay and increase the speed of the fault detection circuit, a voltage division-then-comparison method is used to determine the voltage state of the output terminal A. When the AC output voltage of the inverter is in the positive half-cycle, the phase voltage at the output terminal A of the bridge arm circuit will vary between 0.5BUS+ and BUS+. When the AC output voltage of the inverter is in the negative half-cycle, the phase voltage at the output terminal A of the bridge arm circuit will vary between BUS- and 0.5BUS+. Accordingly, the voltage state of the output terminal A can be determined using the third preset threshold voltage and the fourth preset threshold voltage, with the fourth preset threshold voltage being greater than the third preset threshold voltage. For example, the third preset threshold voltage can be 0.25BUS+, serving as the negative half-cycle threshold of the phase voltage; and the fourth preset threshold voltage can be 0.75BUS+, serving as the positive half-cycle threshold of the phase voltage.
[0152] The voltage detection module 220 provided in the embodiment of the present application includes a voltage divider unit 2201, a judgment unit 2202 and an isolation unit 2203, so that the voltage detection module 220 has a simple structure, is easy to implement, and has low cost, and the detection logic is simple, efficient, and fast. It can detect faults before the faults expand, thereby helping to avoid the expansion of the faults.
[0153] In an exemplary embodiment, the voltage divider unit 2201 includes a seventh resistor unit and an eighth resistor unit; the first end of the seventh resistor unit is used to connect to the output end of the bridge arm circuit, the second end of the seventh resistor unit is connected to the first end of the eighth resistor unit, and the second end of the eighth resistor unit is connected to the negative bus voltage of the three-level inverter.
[0154] The busbar of the inverter is inside the inverter; for example, the busbar of the photovoltaic inverter in a photovoltaic power generation system may be formed by connecting multiple photovoltaic modules to the photovoltaic inverter and then aggregating them through multiple boost circuits; the negative busbar voltage is represented herein by BUS-, and the value of BUS- is 0 when the negative busbar of the inverter is connected to the actual ground; the resistance value of the eighth resistor unit is less than the resistance value of the seventh resistor unit; the seventh resistor unit and the eighth resistor unit may each include at least one resistor.
[0155] For example, Figure 4 As shown, the seventh resistor unit includes a seventh resistor R7, and the eighth resistor unit includes an eighth resistor R8. The first end of the seventh resistor R7 is used to connect to the output terminal A of the bridge arm circuit, the second end of the seventh resistor R7 is connected to the first end of the eighth resistor R8, and the second end of the eighth resistor R8 is connected to the negative bus voltage BUS- of the inverter. The resistance of the eighth resistor R8 is smaller than that of the seventh resistor R7. The second end of the seventh resistor R7 is connected to the second end of the eighth resistor R8 to serve as the output end of the voltage divider unit 2201.
[0156] Among them, the phase voltage at the output end A of the bridge arm circuit is divided by the seventh resistor R7 and the eighth resistor R8. The resistance of the eighth resistor R8 is much smaller than the resistance of the seventh resistor R7, thereby converting the phase voltage at the output end A of the bridge arm circuit into a smaller voltage value, which is conducive to reliable and accurate detection of faults.
[0157] In an exemplary embodiment, Figure 4 As shown, the judgment unit 2202 includes a third comparator U4 and a fourth comparator U5. A first input terminal of the third comparator U4 is connected to the output terminal of the voltage divider unit 2201, a second input terminal of the third comparator U4 is connected to the third preset threshold voltage, and an output terminal of the third comparator U4 is connected to the first input terminal of the isolation unit 2203; a first input terminal of the fourth comparator U5 is connected to the output terminal of the voltage divider unit 2201, a second input terminal of the fourth comparator U5 is connected to the fourth preset threshold voltage, and an output terminal of the fourth comparator U5 is connected to the second input terminal of the isolation unit 2203.
[0158] Exemplarily, the first input terminal of the third comparator U4 is the negative input terminal - of the third comparator U4, the second input terminal of the third comparator U4 is the positive input terminal + of the third comparator U4, the first input terminal of the fourth comparator U5 is the negative input terminal - of the fourth comparator U5, and the second input terminal of the fourth comparator U5 is the positive input terminal + of the fourth comparator U5.
[0159] Among them, when the third comparator U4 outputs a low level 0 and the fourth comparator U5 outputs a low level 0, the fault analysis module 230 determines that the phase voltage is BUS+; when the third comparator U4 outputs a low level 0 and the fourth comparator U5 outputs a high level 1, the fault analysis module 230 determines that the phase voltage is 0.5BUS+; when the third comparator U4 outputs a high level 1 and the fourth comparator U5 outputs a high level 1, the fault analysis module 230 determines that the phase voltage is 0.
[0160] In an exemplary embodiment, the isolation unit 2203 includes a digital isolator, wherein a first input terminal and a second input terminal of the digital isolator serve as the first input terminal and the second input terminal of the isolation unit 2203 respectively, and an output terminal of the digital isolator is connected to the fault analysis module 230 .
[0161] In this embodiment, the ground of the fault analysis module 230 is electrically isolated from BUS-, so a digital isolator is used for isolation. The comparator output logic level is then transmitted to the fault analysis module 230 through the digital isolator. In addition, the use of a digital isolator can also reduce noise in the circuit, making fault detection more reliable.
[0162] The above is an exemplary description of the structure of the fault detection circuit provided in the embodiment of the present application. Figure 1 Taking the fault detection of each switch unit in the bridge arm circuit as an example, the fault detection circuit provided in the embodiment of the present application is further explained:
[0163] refer to Figure 1 , let the four switch units be the first switch unit, the second switch unit, the third switch unit and the fourth switch unit in sequence, wherein the first end of the first switch unit is connected to the positive bus voltage, the second end of the first switch unit is connected to the first end of the second switch unit, the second end of the second switch unit is connected to the first end of the third switch unit, the second end of the third switch unit is connected to the first end of the fourth switch unit, and the second end of the fourth switch unit is connected to the negative bus voltage.
[0164] It should be noted that during the dead time, each switch unit in a group of switch units in the bridge arm circuit is in the off state, wherein the group of switch units includes three switch units from the first switch unit, the second switch unit, the third switch unit, and the fourth switch unit. The three switch units included in different groups of switch units can be different. For example, one group of switch units includes the first switch unit, the second switch unit, and the third switch unit, while another group of switch units includes the second switch unit, the third switch unit, and the fourth switch unit. When the inverter is in different operating states, the three switch units that are in the off state during the dead time can be different groups of switch units.
[0165] In addition, the first and fourth switch units serve as external switch units in the bridge arm circuit, and are directly electrically connected to the busbar. The second and third switch units serve as internal switch units in the bridge arm circuit, and are indirectly electrically connected to the busbar. Under different operating conditions, short-circuit and open-circuit faults in the external and internal switch units must be reliably detected within the corresponding dead time or outside the dead time interval. To detect open-circuit faults in the external and internal switch units outside the dead time interval, a method can be employed to determine whether an open-circuit fault has occurred in the external and internal switch units by sending drive signals to the external and internal switch units and then acquiring the on / off status of the external and internal switch units. After sending the drive signals, the on / off status acquisition must be performed after a preset time, enabling reliable fault detection. The preset time is no less than the time required to turn on a single switch tube and no greater than the minimum pulse time. For example, the preset time is 1µs, 1.5µs, or 2µs.
[0166] Accordingly, the fault analysis module 230 may be configured to:
[0167] When the operating states are respectively in the positive half-cycle active power, the negative half-cycle active power, the negative half-cycle reactive power, and the positive half-cycle reactive power, within the dead time, according to the current direction of the phase current and the phase voltage, it is determined whether the first switch unit, the fourth switch unit, the second switch unit, and the third switch unit have a short circuit fault;
[0168] When the operating states are respectively in the positive half-cycle active power and the negative half-cycle active power, within the dead time, determining whether the second switch unit and the third switch unit have a circuit breaker fault according to the current direction and phase voltage of the phase current;
[0169] After the operating state is in the positive half cycle and the driving signal is sent to the first switch unit for a preset time, determining whether the first switch unit has a circuit breaker fault according to the current direction of the phase current and the phase voltage;
[0170] When the operating state is in the negative half cycle and the driving signal is sent to the fourth switch unit for a preset time, determining whether the fourth switch unit has a circuit breaker fault according to the current direction of the phase current and the phase voltage;
[0171] When the operating state is in the negative half cycle with reactive power and a driving signal is sent to the second switch unit for a preset time, determining whether a circuit breaker fault occurs in the second switch unit according to the current direction of the phase current and the phase voltage;
[0172] When the operating state is in the positive half cycle reactive state and the driving signal is sent to the third switch unit for a preset time, it is determined whether the third switch unit has a circuit breaker fault according to the current direction and phase voltage of the phase current.
[0173] Below is Figure 1 In the illustrated bridge arm circuit, each switch unit includes a switch tube, and the switch tubes in each switch unit are IGBTs. For example, the fault detection circuit provided in the embodiment of the present application is further explained, wherein the value of the negative bus voltage BUS- is 0:
[0174] refer to Figure 1 The first switch unit includes a first switch tube T1, the second switch unit includes a second switch tube T2, the third switch unit includes a third switch tube T3, and the fourth switch unit includes a fourth switch tube T4.
[0175] Case 1: When the inverter is in the positive half-cycle with active power and the phase current is in the positive direction, as shown in Figure 5(a) and Figure 5(b), the phase current flows through the first switch tube T1, the second switch tube T2 is always on, the fourth switch tube T4 is always off, and the first switch tube T1 and the third switch tube T3 are alternately switched on. Alternating switching can be understood as alternating switching on.
[0176] Under normal circumstances, as shown in Figure 5(a), when the first switch T1 is on, the phase voltage at the output terminal A of the bridge arm circuit is BUS+. As shown in Figure 5(b), when the first switch T1 is off, the phase voltage at the output terminal A of the bridge arm circuit is 0.5 BUS+. If a short circuit occurs in the first switch T1, then turning on the third switch T3 (see Figure 5(c)) will cause the fault to escalate, resulting in a through-short circuit among the first, second, and third switches T1, T2, and T3, thereby damaging the bridge arm circuit.
[0177] To avoid the occurrence of such a direct short circuit, the fault analysis module 230 performs a short circuit fault detection on the first switch tube T1 during the process in which the first switch tube T1 and the third switch tube T3 are alternately switched, after the first switch tube T1 is turned off and before the third switch tube T3 is turned on, that is, within the dead time.
[0178] If a short-circuit fault occurs in the first switch T1, the phase voltage at the output terminal A of the bridge arm circuit will remain at BUS+ during the dead time. Therefore, when the inverter is operating in the positive half-cycle with active power and the phase current is in the positive direction, the fault analysis module 230 determines that a short-circuit fault has occurred in the first switch T1 if the phase voltage is BUS+ during the dead time.
[0179] Case 2: When the inverter is operating in the negative half-cycle with active power and the phase current is in the negative direction, as shown in Figure 6(a) and Figure 6(b), the phase current flows through the third switch tube T3, the third switch tube T3 is always on, the first switch tube T1 is always off, and the second switch tube T2 and the fourth switch tube T4 are alternately switched.
[0180] Under normal circumstances, as shown in Figure 6(a), when the fourth switch T4 is on, the phase voltage at the output terminal A of the bridge arm circuit is 0. As shown in Figure 6(b), when the fourth switch T4 is off, the phase voltage at the output terminal A of the bridge arm circuit is 0.5 BUS+. If a short circuit occurs in the fourth switch T4, then turning on the second switch T2 (see Figure 6(c)) will cause a through-circuit among the second switch T2, the third switch T3, and the fourth switch T4, thereby damaging the bridge arm circuit.
[0181] To avoid the occurrence of such a direct short circuit, the fault analysis module 230 performs a short circuit fault detection on the fourth switch tube T4 during the process of alternating switching of the second switch tube T2 and the fourth switch tube T4, after the fourth switch tube T4 is turned off and before the second switch tube T2 is turned on, that is, within the dead time.
[0182] If a short-circuit fault occurs in the fourth switch T4, the phase voltage at the output terminal A of the bridge arm circuit will remain at 0 during the dead time. Therefore, when the inverter is operating in the negative half-cycle with active power and the phase current is in the negative direction, the fault analysis module 230 determines that a short-circuit fault has occurred in the fourth switch T4 if the phase voltage is 0 during the dead time.
[0183] Case 3: When the inverter is in the negative half-cycle with reactive power and the phase current is in the positive direction, as shown in Figure 7(a) and Figure 7(b), the phase current flows through the diode D1 and the body of the second switch tube T2. The third switch tube T3 is always on, the first switch tube T1 is always off, and the second switch tube T2 and the fourth switch tube T4 are alternately switched.
[0184] Under normal circumstances, referring to Figure 7(a), when the second switch T2 is turned on, the phase voltage at the output terminal A of the bridge arm circuit is 0.5BUS+. Referring to Figure 7(b), when the second switch T2 is turned off, the phase voltage at the output terminal A of the bridge arm circuit is 0. If a short circuit occurs in the second switch T2, then when the fourth switch T4 is turned on, referring to Figure 7(c), a through short circuit will occur among the second switch T2, the third switch T3, and the fourth switch T4, thereby damaging the bridge arm circuit.
[0185] To avoid the occurrence of such a direct short circuit, the fault analysis module 230 performs a short circuit fault detection on the second switch tube T2 during the process in which the second switch tube T2 and the fourth switch tube T4 alternately switch, after the second switch tube T2 is turned off and before the fourth switch tube T4 is turned on, that is, within the dead time.
[0186] If a short-circuit fault occurs in the second switch T2, the phase voltage at the output terminal A of the bridge arm circuit will remain at 0.5BUS+ during the dead time. Therefore, when the inverter is operating in the negative half-cycle with reactive power and the phase current is in the positive direction, the fault analysis module 230 determines that a short-circuit fault has occurred in the second switch T2 if the phase voltage is 0.5BUS+ during the dead time.
[0187] Case 4: When the inverter is in the positive half-cycle with reactive power and the phase current is in the negative direction, as shown in Figure 8(a) and Figure 8(b), the phase current flows through the third switch tube T3 and the diode D2. The second switch tube T2 is always on, the fourth switch tube T4 is always off, and the first switch tube T1 and the third switch tube T3 are alternately switched.
[0188] Under normal circumstances, referring to Figure 8(a), when the third switch T3 is on, the phase voltage at the output terminal A of the bridge arm circuit is 0.5BUS+. Referring to Figure 8(b), when the third switch T3 is off, the phase voltage at the output terminal A of the bridge arm circuit is BUS+. If a short circuit occurs in the third switch T3, then turning on the first switch T1 again (see Figure 8(c)) will cause a through-circuit among the first, second, and third switches T1, thereby damaging the bridge arm circuit.
[0189] To avoid the occurrence of such a direct short circuit, the fault analysis module 230 performs a short circuit fault detection on the third switch tube T3 during the process of alternating switching of the first switch tube T1 and the third switch tube T3, after the third switch tube T3 is turned off and before the first switch tube T1 is turned on, that is, within the dead time.
[0190] If a short-circuit fault occurs in the third switch T3, the phase voltage at the output terminal A of the bridge arm circuit will remain at 0.5BUS+ during the dead time. Therefore, when the inverter is operating in the positive half-cycle with reactive power and the phase current is in the negative direction, the fault analysis module 230 determines that a short-circuit fault has occurred in the third switch T3 if the phase voltage is 0.5BUS+ during the dead time.
[0191] Case 5: When the inverter is in the positive half-cycle with active power and the phase current is in the positive direction, as shown in Figure 9 (a) and Figure 9 (b), the phase current flows through the diode D1 and the body of the second switch tube T2. The second switch tube T2 is always on, the fourth switch tube T4 is always off, and the first switch tube T1 and the third switch tube T3 are alternately switched.
[0192] Under normal circumstances, referring to Figure 9(a), when the first switch T1 is off and the second switch T2 is on, the phase voltage at the output terminal A of the bridge arm circuit is 0.5BUS+. Referring to Figure 9(b), when the first switch T1 is on and the second switch T2 is on, the phase voltage at the output terminal A of the bridge arm circuit is BUS+. If the second switch T2 experiences an open circuit fault, referring to Figure 9(c), current will freewheel through the anti-parallel diodes of the third and fourth switches T3 and T4. If the first switch T1 is turned on again at this time, it will cause an overvoltage on the second switch T2, thereby damaging the bridge arm circuit.
[0193] To avoid the occurrence of this overvoltage fault, the fault analysis module 230 detects the phase voltage at the output terminal A of the bridge arm circuit during the process of alternating switching of the first switch tube T1 and the third switch tube T3, after the third switch tube T3 is turned off and before the first switch tube T1 is turned on, that is, during the dead time.
[0194] If the second switch T2 experiences an open circuit fault, the phase voltage at the output terminal A of the bridge arm circuit will drop to 0 during the dead time. Therefore, when the inverter is operating in the positive half-cycle with active power and the phase current is in the positive direction, the fault analysis module 230 determines that the second switch T2 has an open circuit fault if the phase voltage is 0 during the dead time.
[0195] Case 6: When the inverter is operating in the negative half-cycle with active power and the phase current is in the negative direction, as shown in Figure 10(a) and Figure 10(b), the phase current flows through the third switch tube T3 and the diode D2. The third switch tube T3 is always on, the first switch tube T1 is always off, and the second switch tube T2 and the fourth switch tube T4 are alternately switched.
[0196] Under normal circumstances, referring to Figure 10(a), when the fourth switch T4 is off and the third switch T3 is on, the phase voltage at the output terminal A of the bridge arm circuit is 0.5BUS+. Referring to Figure 10(b), when the fourth switch T4 is on and the third switch T3 is on, the phase voltage at the output terminal A of the bridge arm circuit is 0. If the third switch T3 experiences an open circuit fault, referring to Figure 10(c), current will freewheel through the anti-parallel diodes of the first and second switches T1 and T2. If the fourth switch T4 is turned on at this time, the third switch T3 will overvoltage, thereby damaging the bridge arm circuit.
[0197] To avoid the occurrence of this overvoltage fault, the fault analysis module 230 detects the phase voltage at the output terminal A of the bridge arm circuit during the process of alternating switching of the second switch tube T2 and the fourth switch tube T4, after the second switch tube T2 is turned off and before the fourth switch tube T4 is turned on, that is, within the dead time.
[0198] If the third switch T3 experiences an open circuit fault, the phase voltage at the output terminal A of the bridge arm circuit will drop to BUS+ during the dead time. Therefore, when the inverter is operating in the negative half-cycle with active power and the phase current is in the negative direction, the fault analysis module 230 determines that the third switch T3 has an open circuit fault if it detects that the phase voltage is BUS+ during the dead time.
[0199] Case 7: When the inverter is in the positive half-cycle with active power and the phase current is in the positive direction, as shown in Figure 11 (a) and Figure 11 (b), the phase current flows through the second switch tube T2 and the diode D1, the second switch tube T2 is always on, the fourth switch tube T4 is always off, and the first switch tube T1 and the third switch tube T3 are alternately switched.
[0200] Under normal circumstances, as shown in Figure 11(a), when the first switch T1 is off, the phase voltage at the output terminal A of the bridge arm circuit is 0.5BUS+. As shown in Figure 11(b), when the first switch T1 is on, the phase voltage at the output terminal A of the bridge arm circuit is BUS+. If the first switch T1 experiences an open circuit fault, the phase voltage at the output terminal A of the bridge arm circuit will drop to 0.5BUS+, manifesting as a waveform distortion of the phase voltage at the output terminal A of the bridge arm circuit.
[0201] In order to avoid the waveform distortion, the fault analysis module 230 switches the waveform alternately between the first switch tube T1 and the third switch tube T3. After the third switch tube T3 is turned off, the fault analysis module 230 switches the waveform normally to the first switch tube T1. That is, after a preset time (for example, 2 us) has passed since the drive signal (for example, a PWM signal) was sent to the first switch tube T1, the fault analysis module 230 detects the phase voltage of the output terminal A of the bridge arm circuit. If the phase voltage of the output terminal A of the bridge arm circuit is detected to be 0.5 BUS+, it is determined that an open circuit fault occurs in the first switch tube T1, and the phase current is shown as the solid line in Figure 11 (c). If the phase voltage of the output terminal A of the bridge arm circuit is detected to be BUS+, it is determined that no open circuit fault occurs in the first switch tube T1, and the phase current is shown as the dotted line in Figure 11 (c).
[0202] Case 8: When the inverter is in the negative half-cycle with active power and the phase current is in the negative direction, as shown in Figure 12 (a) and Figure 12 (b), the phase current flows through the third switch tube T3 and the diode D2. The third switch tube T3 is always on, the first switch tube T1 is always off, and the second switch tube T2 and the fourth switch tube T4 are alternately switched.
[0203] Under normal circumstances, referring to Figure 12(a), when the fourth switch T4 is off, the phase voltage at the output terminal A of the bridge arm circuit is 0.5 BUS+. Referring to Figure 12(b), when the fourth switch T4 is on, the phase voltage at the output terminal A of the bridge arm circuit is 0. If the fourth switch T4 fails, the phase voltage at the output terminal A of the bridge arm circuit will change to 0.5 BUS+, which will be manifested as a waveform distortion of the phase voltage at the output terminal A of the bridge arm circuit.
[0204] In order to avoid the waveform distortion, during the process of alternating waveform switching between the second switch tube T2 and the fourth switch tube T4, the fault analysis module 230 normally switches waveforms to the fourth switch tube T4 after the second switch tube T2 is turned off, that is, after sending a driving signal (such as a PWM signal) to the fourth switch tube T4 for a preset time (such as 2us), the fault analysis module 230 detects the phase voltage of the output terminal A of the bridge arm circuit. If the phase voltage of the output terminal A of the bridge arm circuit is detected to be 0.5 BUS+, it is determined that the fourth switch tube T4 has a circuit breaker fault, and the phase current is shown as the solid line in Figure 12 (c). If the phase voltage of the output terminal A of the bridge arm circuit is detected to be 0, it is determined that the fourth switch tube T4 has not a circuit breaker fault, and the phase current is shown as the dotted line in Figure 12 (c).
[0205] Case 9: When the inverter is in the negative half-cycle with reactive power and the phase current is in the positive direction, as shown in Figure 13(a) and Figure 13(b), the phase current flows through the anti-parallel diodes of the fourth switch tube T4 and the third switch tube T3. The third switch tube T3 is always on, the first switch tube T1 is always off, and the second switch tube T2 and the fourth switch tube T4 are alternately switched.
[0206] Under normal circumstances, as shown in Figure 13(a), when the second switch T2 is off, the phase voltage at the output terminal A of the bridge arm circuit is 0. Referring to Figure 13(b), when the second switch T2 is on, the phase voltage at the output terminal A of the bridge arm circuit is 0.5BUS+. If the second switch T2 experiences an open circuit fault, the phase voltage at the output terminal A of the bridge arm circuit drops to 0, manifesting as a waveform distortion of the phase voltage at the output terminal A of the bridge arm circuit.
[0207] In order to avoid the waveform distortion, during the process of alternating waveform switching between the second switch tube T2 and the fourth switch tube T4, after the fourth switch tube T4 is turned off, the fault analysis module 230 normally switches waveforms to the second switch tube T2, that is, after sending a driving signal (such as a PWM signal) to the second switch tube T2 for a preset time (such as 2us), the fault analysis module 230 detects the phase voltage of the output terminal A of the bridge arm circuit. If the phase voltage of the output terminal A of the bridge arm circuit is detected to be 0, it is determined that the second switch tube T2 has a circuit breaker fault, and the phase current is shown as the solid line in Figure 13 (c). If the phase voltage of the output terminal A of the bridge arm circuit is detected to be 0.5BUS+, it is determined that the second switch tube T2 has not a circuit breaker fault, and the phase current is shown as the dotted line in Figure 13 (c).
[0208] Case 10: When the inverter is in the positive half-cycle with reactive power and the phase current is in the negative direction, as shown in Figure 14 (a) and Figure 14 (b), the phase current flows through the anti-parallel diodes of the first switch tube T1 and the second switch tube T2. The second switch tube T2 is always on, the fourth switch tube T4 is always off, and the first switch tube T1 and the third switch tube T3 are alternately switched.
[0209] Under normal circumstances, as shown in Figure 14(a), when the third switch T3 is off, the phase voltage at the output terminal A of the bridge arm circuit is BUS+. As shown in Figure 14(b), when the third switch T3 is on, the phase voltage at the output terminal A of the bridge arm circuit is 0.5BUS+. If the third switch T3 experiences an open circuit fault, the phase voltage at the output terminal A of the bridge arm circuit will change to BUS+, manifesting as a waveform distortion of the phase voltage at the output terminal A of the bridge arm circuit.
[0210] In order to avoid this waveform distortion, during the process of alternating waveform switching between the first switch tube T1 and the third switch tube T3, the fault analysis module 230 normally switches waveforms to the third switch tube T3 after the first switch tube T1 is turned off, that is, after sending a driving signal (such as a PWM signal) to the third switch tube T3 for a preset time (such as 2us), the fault analysis module 230 detects the phase voltage of the output terminal A of the bridge arm circuit. If the phase voltage of the output terminal A of the bridge arm circuit is detected to be BUS+, it is determined that a circuit breaker fault occurs in the third switch tube T3, and the phase current is shown as the solid line in Figure 14 (c). If the phase voltage of the output terminal A of the bridge arm circuit is detected to be 0.5BUS+, it is determined that no circuit breaker fault occurs in the third switch tube T3, and the phase current is shown as the dotted line in Figure 14 (c).
[0211] The fault detection circuit provided in the embodiment of the present application can fully cover the short-circuit fault detection and open-circuit fault detection of any switch unit in the bridge arm circuit under different operating conditions of the inverter. Not only is the hardware circuit structure simple, easy to implement, low-cost, and has a small detection delay, but the detection logic is also simple and efficient, and the detection results are accurate and reliable. The above-mentioned Case 1 to Case 10 faults of the inverter detected can be referred to in Table 1 below.
[0212] Among them, Case 1 to Case 6 are fault detections performed within the dead time, while Case 7 to Case 10 are fault detections performed outside the dead time. In addition, Case 7 to Case 10 are detections of the phase voltage at the output terminal A of the bridge arm circuit after a preset time has passed after a drive signal is sent to the corresponding switch tube.
[0213] The fault detection circuit provided in the embodiments of the present application may be applied to a multi-level inverter, such as but not limited to a three-level inverter, wherein the three-level inverter may include at least an NPC-I type three-level topology.
[0214] Table 1
[0215]
[0216] Based on the same inventive concept, an embodiment of the present application also provides an inverter, which includes at least one inverter circuit and at least one fault detection circuit provided in any of the above embodiments; wherein, each inverter circuit includes a bridge arm circuit, the bridge arm circuit includes a plurality of switching units connected in series in sequence, and each bridge arm circuit is correspondingly connected to a fault detection circuit.
[0217] In one exemplary embodiment, referring to Figure 1Each inverter circuit further includes a first capacitor unit, a second capacitor unit, a first diode unit and a second diode unit; the plurality of switch units connected in series include a first switch unit, a second switch unit, a third switch unit and a fourth switch unit connected in series.
[0218] The first end of the first capacitor unit is connected to the positive bus voltage, the second end of the first capacitor unit is connected to the first end of the second capacitor unit, and the second end of the second capacitor unit is connected to the negative bus voltage; the first end of the first switch unit is connected to the first end of the first capacitor unit, the second end of the first switch unit is connected to the first end of the second switch unit, the second end of the second switch unit is connected to the first end of the third switch unit, the second end of the third switch unit is connected to the first end of the fourth switch unit, and the second end of the fourth switch unit is connected to the second end of the second capacitor unit; the first end of the first diode unit is connected to the second end of the first switch unit, the second end of the first diode unit is connected to the second end of the first capacitor unit, the first end of the second diode unit is connected to the second end of the first diode unit, and the second end of the second diode unit is connected to the second end of the third switch unit.
[0219] For example, continue to refer to Figure 1 , the first capacitor unit includes a first capacitor C1, the second capacitor unit includes a second capacitor C2, the first diode unit includes a first diode D1, and the second diode unit includes a second diode D2;
[0220] The first end of the first capacitor C1 is connected to the positive bus voltage BUS+, the second end of the first capacitor C1 is connected to the first end of the second capacitor C2, and the second end of the second capacitor C2 is connected to the negative bus voltage BUS-; the first end of the first switching transistor T1 is connected to the first end of the first capacitor C1, the second end of the first switching transistor T1 is connected to the first end of the second switching transistor T2, the second end of the second switching transistor T2 is connected to the first end of the third switching transistor T3, the second end of the third switching transistor T3 is connected to the first end of the fourth switching transistor T4, and the second end of the fourth switching transistor T4 is connected to the second end of the second capacitor C2; the first end of the first diode D1 is connected to the second end of the first switching transistor T1, the second end of the first diode D1 is connected to the second end of the first capacitor C1, the first end of the second diode D2 is connected to the second end of the first diode D1, and the second end of the second diode D2 is connected to the second end of the third switching transistor T3; wherein the second end of the second switching transistor T2, after being connected to the first end of the third switching transistor T3, can serve as the output end A of the bridge arm circuit.
[0221] In an exemplary embodiment, the fault analysis module 230 is also connected to the bridge arm circuit. When a short circuit fault or an open circuit fault is detected in any switch unit in the bridge arm circuit, the fault analysis module 230 blocks the first switch unit, the second switch unit, the third switch unit and the fourth switch unit in the bridge arm circuit, that is, stops emitting waves for the four switch units and controls the four switch units to be turned off, so as to protect the bridge arm circuit, avoid the fault from expanding, and thereby protect the inverter.
[0222] Based on the same inventive concept, an embodiment of the present application further provides a three-level inverter.
[0223] In an exemplary embodiment, a three-level inverter includes an inverter circuit and a fault detection circuit as provided in any of the above embodiments. The inverter circuit includes at least the bridge arm circuit provided in any of the above embodiments, and the bridge arm circuit is connected to the fault detection circuit. In this case, the three-level inverter is a single-phase three-level inverter.
[0224] In an exemplary embodiment, a three-level inverter includes at least three inverter circuits and at least three fault detection circuits as provided in any of the above embodiments. The inverter circuit includes at least the bridge arm circuit provided in any of the above embodiments. The bridge arm circuits are connected to the fault detection circuits in a one-to-one correspondence. In this case, the three-level inverter is a three-phase three-level inverter or a multi-phase three-level inverter with more than three phases.
[0225] In an exemplary embodiment, the fault analysis modules 230 in multiple fault detection circuits in a multi-phase three-level inverter are shared into one, that is, multiple fault detection circuits share one fault analysis module 230 , thereby reducing the size of the inverter and lowering the cost of the inverter.
[0226] The three-level inverter provided in the embodiment of the present application has the same inventive concept as the fault detection circuit provided in any of the above embodiments, can solve the same technical problems, and achieve the same technical effects, and the repeated contents will not be repeated here.
[0227] Based on the same inventive concept, the present application also provides a fault detection method, which is applied to an inverter, for example, to detect whether the inverter is faulty. The inverter may be an inverter including a bridge arm circuit. The fault detection method may be executed by the fault analysis module 230 in the fault detection circuit in any of the above embodiments, referring to Figure 15 The fault detection method includes the following steps S1502 to S1504:
[0228] S1502: Obtain phase current and phase voltage of the three-level inverter.
[0229] S1504 , determining whether each switch unit in the bridge arm circuit has a fault according to the operating state of the three-level inverter, the current direction of the phase current, and the phase voltage; wherein the operating state includes a cycle state and a power state.
[0230] The fault detection method provided in the embodiment of the present application has the same inventive concept as the fault detection circuit provided in any of the above embodiments, can solve the same technical problems, and achieve the same technical effects, and the repeated content will not be repeated here.
[0231] In one exemplary embodiment, referring to Figure 1 In the bridge arm circuit, the first end of the first switch unit is connected to the positive bus voltage, the second end of the first switch unit is connected to the first end of the second switch unit, the second end of the second switch unit is connected to the first end of the third switch unit, the second end of the third switch unit is connected to the first end of the fourth switch unit, and the second end of the fourth switch unit is connected to the negative bus voltage, wherein step S1504 includes:
[0232] When the operating state is in the positive half-cycle with active power, if the current direction of the phase current is positive and the phase voltage is the positive bus voltage within the dead time, it is determined that a short circuit fault occurs in the first switch unit.
[0233] Exemplarily, the first switch unit includes a first switch tube T1; by using the fault detection method provided in an embodiment of the present application, a short circuit fault of the first switch tube T1 can be detected before the situation shown in Figure 5 (c) occurs, so that the fault analysis module 230 controls all switch units in the bridge arm circuit to block the wave, thereby avoiding the situation shown in Figure 5 (c) from occurring.
[0234] When the operating state is in the negative half-cycle active state, if the current direction of the phase current is negative and the phase voltage is 0 within the dead time, it is determined that a short circuit fault occurs in the fourth switch unit.
[0235] Exemplarily, the fourth switch unit includes a fourth switch tube T4; by using the fault detection method provided in an embodiment of the present application, a short circuit fault of the fourth switch tube T4 can be detected before the situation shown in Figure 6 (c) occurs, so that the fault analysis module 230 controls all switch units in the bridge arm circuit to block the wave, thereby avoiding the situation shown in Figure 6 (c) from occurring.
[0236] When the operating state is in the negative half-cycle reactive state, if the current direction of the phase current is positive and the phase voltage is half the positive bus voltage within the dead time, it is determined that a short circuit fault occurs in the second switch unit.
[0237] Exemplarily, the second switch unit includes a second switch tube T2; by using the fault detection method provided in an embodiment of the present application, a short circuit fault of the second switch tube T2 can be detected before the situation shown in Figure 7 (c) occurs, so that the fault analysis module 230 controls all switch units in the bridge arm circuit to block the wave, thereby avoiding the situation shown in Figure 7 (c) from occurring.
[0238] When the operating state is in the positive half-cycle reactive state, if the current direction of the phase current is negative and the phase voltage is half of the positive bus voltage within the dead time, it is determined that a short circuit fault occurs in the third switch unit.
[0239] Exemplarily, the third switch unit includes a third switch tube T3; by using the fault detection method provided in the embodiment of the present application, a short circuit fault of the third switch tube T3 can be detected before the situation shown in Figure 8 (c) occurs, so that the fault analysis module 230 controls all switch units in the bridge arm circuit to block the wave, thereby avoiding the situation shown in Figure 8 (c) from occurring.
[0240] When the operating state is in the positive half-cycle with active power, if the current direction of the phase current is positive and the phase voltage is 0 within the dead time, it is determined that a circuit breaker fault occurs in the second switch unit.
[0241] When the operating state is in the negative half-cycle active state, if the current direction of the phase current is negative and the phase voltage is the positive bus voltage within the dead time, it is determined that the third switch unit has a circuit breaker fault.
[0242] When the operating state is in the positive half-cycle active state, if after a preset time when a driving signal is sent to the first switch unit, the current direction of the phase current is positive and the phase voltage is half of the positive bus voltage, it is determined that a circuit breaker fault has occurred in the first switch unit.
[0243] When the operating state is in the negative half-cycle active state, if after a preset time when a driving signal is sent to the fourth switch unit, the current direction of the phase current is negative and the phase voltage is half of the positive bus voltage, it is determined that a circuit breaker fault has occurred in the fourth switch unit.
[0244] When the operating state is in the negative half-cycle reactive state, if the current direction of the phase current is positive and the phase voltage is 0 after a preset time when the driving signal is sent to the second switch unit, it is determined that a circuit breaker fault occurs in the second switch unit.
[0245] When the operating state is in the positive half-cycle reactive state, if the current direction of the phase current is negative and the phase voltage is the positive bus voltage after a preset time when the driving signal is sent to the third switch unit, it is determined that the third switch unit has a circuit breaker fault.
[0246] Based on the same inventive concept, the present application also provides a programmable logic circuit having a program stored thereon, which, when executed, can implement the fault detection method provided in any of the above embodiments.
[0247] The programmable logic circuit provided in the embodiment of the present application has the same inventive concept as the fault detection circuit provided in any of the above embodiments, can solve the same technical problems, and achieve the same technical effects, and the repeated content will not be repeated here.
[0248] Based on the same inventive concept, an embodiment of the present application further provides a chip, which includes a programmable logic circuit as provided in any of the above embodiments.
[0249] Based on the same inventive concept, an embodiment of the present application further provides an energy storage system, which includes an inverter provided in any of the above embodiments.
[0250] Based on the same inventive concept, an embodiment of the present application further provides a photovoltaic system, which includes an inverter provided in any of the above embodiments.
[0251] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0252] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present application. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the spirit of the present application, and these modifications and improvements fall within the scope of protection of the present application. Therefore, the scope of protection of the present application shall be determined by the appended claims.
Claims
1. A fault detection circuit, characterized in that: The fault detection circuit comprises: a current detection module connected to an output end of a bridge arm circuit of the inverter, for detecting a phase current of the inverter, wherein the bridge arm circuit includes a plurality of switch units sequentially connected in series; a voltage detection module, connected to the output end of the bridge arm circuit, for detecting the phase voltage of the inverter; A fault analysis module is connected to the current detection module and the voltage detection module respectively, and is used to determine the fault detection result of each switch unit in the bridge arm circuit according to the operating state of the inverter, the current direction of the phase current and the phase voltage.
2. The fault detection circuit according to claim 1, characterized in that: The current detection module includes: a current acquisition unit, connected to the output end of the bridge arm circuit, and configured to acquire the current signal of the phase current; a signal conversion unit, connected to the current acquisition unit, and configured to convert the current signal into a voltage signal; A direction detection unit is connected to the signal conversion unit and the fault analysis module, respectively, and is used to compare the voltage signal with a first preset threshold voltage and a second preset threshold voltage, respectively, and output a first comparison result to the fault analysis module; wherein the first preset threshold voltage is greater than the second preset threshold voltage.
3. The fault detection circuit according to claim 2, characterized in that: The fault analysis module is further configured to determine the current direction of the phase current when the first comparison result satisfies a fault analysis condition.
4. The fault detection circuit according to claim 3, characterized in that: The fault analysis module is further configured to determine that the current direction of the phase current is a negative direction when the first comparison result is that the voltage signal is less than the first preset threshold voltage and less than the second preset threshold voltage; The fault analysis module is further configured to determine that the current direction of the phase current is a positive direction when the first comparison result is that the voltage signal is greater than the second preset threshold voltage and greater than the first preset threshold voltage.
5. The fault detection circuit according to claim 2, characterized in that: The signal conversion unit includes: a first resistance unit, a second resistance unit, a third resistance unit, a fourth resistance unit and an amplifier; The first end of the first resistance unit is connected to the first output end of the current acquisition unit, and the second end of the first resistance unit is connected to the first input end of the amplifier; A first end of the second resistance unit is connected to the second output end of the current acquisition unit, and a second end of the second resistance unit is connected to the second input end of the amplifier; A first end of the third resistor unit is connected to a preset power signal, and a second end of the third resistor unit is connected to the first input end of the amplifier; The fourth resistance unit is connected between the second input terminal and the output terminal of the amplifier, and the output terminal of the amplifier is connected to the input terminal of the direction detection unit.
6. The fault detection circuit according to claim 2, characterized in that: The direction detection unit includes: a fifth resistance unit, a sixth resistance unit, a first comparator and a second comparator; A first end of the fifth resistor unit is connected to the output end of the signal conversion unit, and a second end of the fifth resistor unit is connected to the first input end of the first comparator; The second input terminal of the first comparator is connected to the first preset threshold voltage, and the output terminal of the first comparator is connected to the fault analysis module; A first end of the sixth resistor unit is connected to the output end of the signal conversion unit, and a second end of the sixth resistor unit is connected to the first input end of the second comparator; The second input terminal of the second comparator is connected to the second preset threshold voltage, and the output terminal of the second comparator is connected to the fault analysis module.
7. The fault detection circuit according to any one of claims 1 to 6, characterized in that: The voltage detection module includes: a voltage dividing unit connected to the output end of the bridge arm circuit and used for collecting the voltage dividing signal of the phase voltage; a judgment unit connected to the voltage dividing unit, configured to compare the voltage divided signal with a third preset threshold voltage and a fourth preset threshold voltage respectively, and output a second comparison result, wherein the fourth preset threshold voltage is greater than the third preset threshold voltage; An isolation unit is connected to the judgment unit and the fault analysis module respectively, and is used to transmit the second comparison result output by the judgment unit to the fault analysis module, so that the fault analysis module determines the voltage state of the output end of the bridge arm circuit according to the second comparison result.
8. The fault detection circuit according to claim 7, characterized in that: The voltage dividing unit includes: a seventh resistance unit and an eighth resistance unit; The first end of the seventh resistor unit is used to connect to the output end of the bridge arm circuit, the second end of the seventh resistor unit is connected to the first end of the eighth resistor unit, and the second end of the eighth resistor unit is connected to the negative bus voltage of the inverter; wherein the resistance of the eighth resistor unit is less than the resistance of the seventh resistor unit.
9. The fault detection circuit according to claim 7, characterized in that: The judgment unit includes: a third comparator and a fourth comparator; The first input terminal of the third comparator is connected to the output terminal of the voltage dividing unit, the second input terminal of the third comparator is connected to the third preset threshold voltage, and the output terminal of the third comparator is connected to the first input terminal of the isolation unit; The first input terminal of the fourth comparator is connected to the output terminal of the voltage divider unit, the second input terminal of the fourth comparator is connected to the fourth preset threshold voltage, and the output terminal of the fourth comparator is connected to the second input terminal of the isolation unit.
10. The fault detection circuit according to claim 9, characterized in that: The isolation unit includes a digital isolator; the first input terminal and the second input terminal of the digital isolator serve as the first input terminal and the second input terminal of the isolation unit respectively, and the output terminal of the digital isolator is connected to the fault analysis module.
11. The fault detection circuit according to any one of claims 1 to 6, characterized in that: The plurality of switch units connected in series include a first switch unit, a second switch unit, a third switch unit and a fourth switch unit connected in series; A first end of the first switch unit is connected to a positive bus voltage, a second end of the first switch unit is connected to a first end of the second switch unit, a second end of the second switch unit is connected to a first end of the third switch unit, a second end of the third switch unit is connected to a first end of the fourth switch unit, and a second end of the fourth switch unit is connected to a negative bus voltage; Wherein, the fault analysis module is configured to: When the operating states are respectively in the positive half-cycle active power, the negative half-cycle active power, the negative half-cycle reactive power, and the positive half-cycle reactive power, within the dead time, determining whether a short circuit fault occurs in the first switch unit, the fourth switch unit, the second switch unit, and the third switch unit according to the current direction of the phase current and the phase voltage; When the operating states are respectively in the positive half-cycle active power and the negative half-cycle active power, within the dead time, determining whether the second switch unit and the third switch unit have a circuit breaker fault according to the current direction of the phase current and the phase voltage; After the operating state is in the positive half cycle and the driving signal is sent to the first switch unit for a preset time, determining whether the first switch unit has a circuit breaker fault according to the current direction of the phase current and the phase voltage; After the operating state is in the negative half-cycle active state and a driving signal is sent to the fourth switch unit for a preset time, determining whether a circuit breaker fault occurs in the fourth switch unit according to the current direction of the phase current and the phase voltage; After the operating state is in the negative half-cycle reactive state and a driving signal is sent to the second switch unit for a preset time, determining whether a circuit breaker fault occurs in the second switch unit according to the current direction of the phase current and the phase voltage; After the operating state is in the positive half cycle reactive state and a driving signal is sent to the third switch unit for a preset time, it is determined whether the third switch unit has a circuit breaker fault according to the current direction of the phase current and the phase voltage.
12. The fault detection circuit according to claim 11, characterized in that: The fault analysis module is further configured to: When the operating state is in the positive half-cycle active state, if the current direction of the phase current is positive and the phase voltage is a positive bus voltage within the dead time, it is determined that a short circuit fault occurs in the first switch unit; When the operating state is in the negative half-cycle active state, if the current direction of the phase current is negative and the phase voltage is a negative bus voltage within the dead time, it is determined that a short circuit fault occurs in the fourth switch unit; When the operating state is in the negative half-cycle reactive state, if the current direction of the phase current is positive and the phase voltage is half the positive bus voltage within the dead time, it is determined that a short circuit fault occurs in the second switch unit; When the operating state is in the positive half-cycle reactive state, if the current direction of the phase current is negative and the phase voltage is half the positive bus voltage within the dead time, it is determined that a short circuit fault occurs in the third switch unit; When the operating state is in the positive half-cycle active state, if the current direction of the phase current is positive and the phase voltage is a negative bus voltage within the dead time, it is determined that the second switch unit has a circuit breaker fault; When the operating state is in the negative half-cycle active state, if the current direction of the phase current is negative and the phase voltage is a positive bus voltage within the dead time, it is determined that the third switch unit has a circuit breaker fault; When the operating state is in the positive half-cycle with active power, if, after a preset time has passed since the driving signal is sent to the first switch unit, the current direction of the phase current is in the positive direction and the phase voltage is half the positive bus voltage, it is determined that the first switch unit has a circuit breaker fault; When the operating state is in the negative half-cycle active state, if, after a preset time has passed since the drive signal is sent to the fourth switch unit, the current direction of the phase current is negative and the phase voltage is half of the positive bus voltage, it is determined that the fourth switch unit has a circuit breaker fault; When the operating state is in the negative half-cycle reactive state, if, after a preset time has passed since the driving signal is sent to the second switch unit, the current direction of the phase current is in a positive direction and the phase voltage is a negative bus voltage, it is determined that the second switch unit has a circuit breaker fault; When the operating state is in the positive half-cycle reactive state, if after a preset time has passed since the driving signal is sent to the third switch unit, the current direction of the phase current is negative and the phase voltage is a positive bus voltage, it is determined that a circuit breaker fault occurs in the third switch unit.
13. The fault detection circuit according to claim 1-6, characterized in that: The inverter is a three-level inverter.
14. An inverter, characterized in that: The inverter includes at least one inverter circuit and at least one fault detection circuit according to any one of claims 1 to 13; wherein, each of the inverter circuits includes a bridge arm circuit, the bridge arm circuit includes a plurality of switch units connected in series in sequence, and each of the bridge arm circuits is connected to a corresponding fault detection circuit.
15. The inverter according to claim 14, characterized in that: Each of the inverter circuits further includes a first capacitor unit, a second capacitor unit, a first diode unit, and a second diode unit; the plurality of switch units connected in series include a first switch unit, a second switch unit, a third switch unit, and a fourth switch unit connected in series; A first end of the first capacitor unit is connected to a positive bus voltage, a second end of the first capacitor unit is connected to a first end of the second capacitor unit, and a second end of the second capacitor unit is connected to a negative bus voltage; a first end of the first switch unit connected to the first end of the first capacitor unit, a second end of the first switch unit connected to the first end of the second switch unit, a second end of the second switch unit connected to the first end of the third switch unit, a second end of the third switch unit connected to the first end of the fourth switch unit, and a second end of the fourth switch unit connected to the second end of the second capacitor unit; The first end of the first diode unit is connected to the second end of the first switch unit, the second end of the first diode unit is connected to the second end of the first capacitor unit, the first end of the second diode unit is connected to the second end of the first diode unit, and the second end of the second diode unit is connected to the second end of the third switch unit.
16. A fault detection method, characterized in that: The fault detection method comprises: Obtain the phase current and phase voltage of the inverter; A fault detection result of each switch unit in the bridge arm circuit of the inverter is determined according to the operating state of the inverter, the current direction of the phase current, and the phase voltage.
17. The fault detection method according to claim 16, characterized in that: The determining whether each switch unit in the bridge arm circuit has a fault according to the operating state of the inverter, the current direction of the phase current, and the phase voltage includes: When the operating state is in the positive half-cycle active state, if the current direction of the phase current is positive and the phase voltage is a positive bus voltage within the dead time, it is determined that a short circuit fault occurs in the first switch unit; When the operating state is in the negative half-cycle active state, if the current direction of the phase current is negative and the phase voltage is a negative bus voltage within the dead time, it is determined that a short circuit fault occurs in the fourth switch unit; When the operating state is in the negative half-cycle reactive state, if the current direction of the phase current is positive and the phase voltage is half the positive bus voltage within the dead time, it is determined that a short circuit fault occurs in the second switch unit; When the operating state is in the positive half-cycle reactive state, if the current direction of the phase current is negative and the phase voltage is half the positive bus voltage within the dead time, it is determined that a short circuit fault occurs in the third switch unit; When the operating state is in the positive half-cycle active state, if the current direction of the phase current is positive and the phase voltage is a negative bus voltage within the dead time, it is determined that a circuit breaker fault occurs in the second switch unit; When the operating state is in the negative half-cycle active state, if the current direction of the phase current is negative and the phase voltage is a positive bus voltage within the dead time, it is determined that a circuit breaker fault occurs in the third switch unit; When the operating state is in the positive half-cycle with active power, if, after a preset time has passed since the driving signal is sent to the first switch unit, the current direction of the phase current is in the positive direction and the phase voltage is half the positive bus voltage, it is determined that the first switch unit has a circuit breaker fault; When the operating state is in the negative half-cycle active state, if, after a preset time has passed since the drive signal is sent to the fourth switch unit, the current direction of the phase current is negative and the phase voltage is half of the positive bus voltage, it is determined that the fourth switch unit has a circuit breaker fault; When the operating state is in the negative half-cycle reactive state, if, after a preset time has passed since the driving signal is sent to the second switch unit, the current direction of the phase current is in a positive direction and the phase voltage is a negative bus voltage, it is determined that the second switch unit has a circuit breaker fault; When the operating state is in the positive half-cycle reactive state, if after a preset time has passed since the driving signal is sent to the third switch unit, the current direction of the phase current is negative and the phase voltage is a positive bus voltage, it is determined that a circuit breaker fault occurs in the third switch unit.
18. A programmable logic circuit having a program stored thereon, characterized in that: When the program is executed, the fault detection method according to any one of claims 16 to 17 is implemented.