Monitoring method and device of sub-module controller, equipment, storage medium and product

Abstract

The invention discloses a monitoring method, device and equipment for a sub-module controller, a storage medium and a product, the method is applied to a field programmable gate array located in the sub-module controller, and the method comprises the following steps: in response to a report event, determining an acquisition time period based on an event moment corresponding to the report event; the acquisition time period comprises a first sub-time period before the event moment and a second sub-time period after the event moment; acquiring a key node signal of the sub-module controller acquired in the acquisition time period; the key node signal at least comprises one or more of the following: basic information of a sub-module controller and an internal key variable of a field programmable gate array program; and generating a monitoring frame corresponding to the key node signal based on the key node signal and the acquisition moment corresponding to the key node signal, and writing the monitoring frame into a memory of the sub-module controller.

Description

Technical Field

[0001] The present application relates to the field of flexible DC energy storage control, and is related to, but not limited to, a monitoring method, device, equipment, storage medium, and product of a submodule controller. Background Art

[0002] The submodule controller serves as the controller for the submodule power portion of a high-voltage direct-mount energy storage system and is the core control and protection unit for the energy storage valve submodule. However, with the development of flexible DC technology, voltage levels have gradually increased, the number of submodules and control boards has gradually increased, the control and protection logic has become more complex, and logical fault troubleshooting has become increasingly difficult, requiring a large amount of manpower for maintenance. Summary of the Invention

[0003] In view of this, embodiments of the present application provide at least one method, apparatus, device, storage medium, and product for monitoring a sub-module controller.

[0004] The technical solution of the embodiment of the present application is implemented as follows:

[0005] On the one hand, an embodiment of the present application provides a monitoring method for a sub-module controller, which is applied to a field programmable gate array located in the sub-module controller, and the method includes: in response to a reported event, determining a collection period based on an event moment corresponding to the reported event; the collection period includes a first sub-period before the event moment and a second sub-period after the event moment; obtaining a key node signal of the sub-module controller collected within the collection period; the key node signal includes at least one or more of the following: basic information of the sub-module controller, internal key variables of the field programmable gate array program; based on the key node signal and the collection moment corresponding to the key node signal, generating a monitoring frame corresponding to the key node signal, and writing the monitoring frame to the memory of the sub-module controller.

[0006] In an embodiment of the present application, first, a collection period is determined based on a first sub-period before the event moment of the reported event and a second sub-period after the event moment, then, the key node signal of the submodule controller collected during the collection period is obtained, and finally, based on the key node signal and the collection moment corresponding to the key node signal, a monitoring frame corresponding to the key node signal is generated, and the monitoring frame is written into a memory. In this way, the key node signals before and after the event moment can be obtained, so that accurate positioning of the analysis and investigation of the reported event can be achieved, reducing the difficulty and cost of submodule controller maintenance. When a submodule controller fails, if the submodule controller is replaced according to the traditional method and then investigated offline, there are problems such as the failure is difficult to reproduce and the investigation is too difficult. By using the method described in the embodiment of the present application, analysis can be performed directly based on the key node signal at the moment of the failure monitored, without the need to invest resources to reproduce the failure again.

[0007] In some embodiments, the method further includes: in the event of determining that a fault event has occurred in the sub-module controller, determining the fault event as a reporting event, and determining the time of occurrence of the fault event as the event time; in the event of receiving an upload request sent by the main control system, determining the upload request as a reporting event, and determining the specified time corresponding to the upload request as the event time.

[0008] In an embodiment of the present application, fault events and upload request events are respectively used as reporting events, and the event moments corresponding to the two different types of reporting events are respectively determined. Therefore, based on these two types of event moments, the duration of subsequent collection of key node signals is determined to prevent the memory from continuously storing monitoring frames corresponding to key node signals collected at subsequent moments, which may cause the loss of key information of the reporting event.

[0009] In some embodiments, the method further includes: acquiring a first monitoring frame of the first sub-period and a second monitoring frame of the second sub-period; and determining a monitoring frame of the acquisition period based on the first monitoring frame and the second monitoring frame.

[0010] In an embodiment of the present application, by obtaining the first monitoring frame before the event moment and the second monitoring frame after the event moment, it is beneficial to subsequently analyze the signal changes of key nodes before and after the reported event, thereby helping to determine the cause of the fault in the reported event or the operating status of the sub-module controller.

[0011] In some embodiments, the method further includes: requesting the main control system to send the monitoring frames of the acquisition period in the memory; when the confirmation message sent by the main control system is received and it is in agreement, sending the basic information of the memory to the main control system; the basic information includes at least one or more of the following: the number of monitoring frames sent, the acquisition period; when the confirmation message sent by the main control system is received and it is received, sending the monitoring frames of the acquisition period in the memory to the main control system.

[0012] In an embodiment of the present application, the field programmable gate array can ensure that the monitoring frames of the collection period in the memory are sent to the main control system in an orderly manner by sending request messages to the main control system and receiving confirmation messages from the main control system. It can also ensure the correctness and integrity of the monitoring frames of the collection period in the memory when sent to the main control system.

[0013] In some embodiments, the method includes: when all monitoring frames in the acquisition period are sent, sending a message of completion to the main control system; and receiving a confirmation message sent by the main control system.

[0014] In the embodiment of the present application, the field programmable gate array sends a confirmation to the main control system whether the sending of the monitoring frames of the collection period is completed, thereby ensuring that the main control system can receive all the monitoring frames of the collection period sent by the field programmable gate array.

[0015] In some embodiments, before responding to a reporting event, the method includes: collecting a key node signal of the sub-module controller; generating a monitoring frame corresponding to the key node signal based on the key node signal and the collection time corresponding to the key node signal, and writing the monitoring frame into the memory.

[0016] In an embodiment of the present application, key node signals of the sub-module controller are collected in real time and stored in a memory, thereby ensuring that when an uploading event occurs, the monitoring frame information before the event time corresponding to the uploading event can be obtained through the monitoring frame stored in the memory.

[0017] In some embodiments, the method further includes: when the number of monitoring frames in the memory is equal to the total number of monitoring frames, determining that the monitoring frame at the current moment overwrites the monitoring frame written first into the memory.

[0018] In an embodiment of the present application, when the number of monitoring frames in the memory is equal to the total number of monitoring frames, the monitoring frame at the current moment is overwritten by the monitoring frame written first into the memory, thereby ensuring that the monitoring frame corresponding to the key node signal collected at the current moment is stored in the memory, thereby ensuring that when an upload event occurs, the monitoring frame of the collection period can be obtained through the monitoring frame stored in the memory.

[0019] On the other hand, an embodiment of the present application provides a monitoring method for a sub-module controller, which is applied to a main control system. The method includes: upon receiving a request from the field programmable gate array to send a monitoring frame for the collection period, sending a confirmation message to the field programmable gate array; upon receiving the basic information sent by the field programmable gate array, sending a confirmation message to the field programmable gate array; and receiving the monitoring frame for the collection period sent by the field programmable gate array.

[0020] In an embodiment of the present application, the main control system can ensure the orderly reception of monitoring frames of the collection period sent by the field programmable gate array by receiving the request message sent by the field programmable gate array and returning the corresponding confirmation message to the field programmable gate array, and can also ensure the correctness and integrity of the received monitoring frames of the collection period.

[0021] In some embodiments, the method includes: upon receiving a completed transmission signal from the field programmable gate array, sending a confirmation message to the field programmable gate array; and determining the cause of the failure or current status of the sub-module controller based on the received monitoring frame of the acquisition period.

[0022] In an embodiment of the present application, the main control system can ensure that the monitoring frames of all acquisition periods are received by sending a confirmation message to the field programmable gate array, and then analyze the monitoring frames received in all acquisition periods to complete the determination of the fault cause or current status of the sub-module controller.

[0023] On the other hand, an embodiment of the present application provides a monitoring device for a sub-module controller, which is applied to a field programmable gate array located in the sub-module controller, and the device includes: a first determination module, which is used to determine a collection period in response to a reported event based on the event moment corresponding to the reported event; the collection period includes a first sub-period before the event moment and a second sub-period after the event moment; a first acquisition module, which is used to acquire key node signals of the sub-module controller collected within the collection period; the key node signals include at least one or more of the following: basic information of the sub-module controller, internal key variables of the field programmable gate array program; a first generation module, which is used to generate a monitoring frame corresponding to the key node signal based on the key node signal and the collection moment corresponding to the key node signal, and write the monitoring frame to the memory of the sub-module controller.

[0024] On the other hand, an embodiment of the present application provides a monitoring device for a sub-module controller, which is applied to a main control system, and the device includes: a first sending module, which is used to send a confirmation message to the field programmable gate array upon receiving a request from the field programmable gate array to send a monitoring frame for the collection period; a second sending module, which is used to send a confirmation message to the field programmable gate array upon receiving the basic information sent by the field programmable gate array; and a receiving module, which is used to receive the monitoring frame for the collection period sent by the field programmable gate array.

[0025] On the other hand, an embodiment of the present application provides a computer device, including a memory and a processor, wherein the memory stores a computer program that can be run on the processor, and when the processor executes the program, it implements some or all of the steps in the above method.

[0026] On the other hand, an embodiment of the present application provides a computer-readable storage medium having a computer program stored thereon, which implements some or all of the steps in the above method when executed by a processor.

[0027] On the other hand, an embodiment of the present application provides a computer program product, including a computer program or instructions, which implements some or all of the above steps when executed by a processor.

[0028] In an embodiment of the present application, first, a collection period is determined based on a first sub-period before the event moment of the reported event and a second sub-period after the event moment, then, the key node signal of the submodule controller collected during the collection period is obtained, and finally, based on the key node signal and the collection moment corresponding to the key node signal, a monitoring frame corresponding to the key node signal is generated, and the monitoring frame is written into a memory. In this way, the key node signals before and after the event moment can be obtained, so that accurate positioning of the analysis and investigation of the reported event can be achieved, reducing the difficulty and cost of submodule controller maintenance. When a submodule controller fails, if the submodule controller is replaced according to the traditional method and then investigated offline, there are problems such as the failure is difficult to reproduce and the investigation is too difficult. By using the method described in the embodiment of the present application, analysis can be performed directly based on the key node signal at the moment of the failure monitored, without the need to invest resources to reproduce the failure again.

[0029] In addition, through the information interaction between the main control system and the field programmable gate array, the monitoring frames of the acquisition period in the memory can be sent to the main control system in an orderly manner, ensuring that the main control system can obtain correct and complete monitoring frames of the acquisition period, which is helpful for the subsequent analysis of the monitoring frames of the acquisition period.

[0030] It should be understood that the above general description and the following detailed description are merely exemplary and explanatory, and are not intended to limit the technical solutions of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present application. Those skilled in the art can also derive other drawings based on these drawings without inventive work, among which:

[0032] Figure 1 A schematic diagram of the structure of an energy storage system provided in an embodiment of the present application;

[0033] Figure 2 A schematic diagram of an implementation flow of a monitoring method for a submodule controller provided in an embodiment of the present application;

[0034] Figure 3 A schematic diagram of an implementation flow of collecting key node signals of a submodule controller provided in an embodiment of the present application;

[0035] Figure 4 A schematic diagram of an implementation flow of sending monitoring frames of a collection period to a main control system according to an embodiment of the present application;

[0036] Figure 5 An overall technical solution for a monitoring method of a submodule controller provided in an embodiment of the present application;

[0037] Figure 6 A schematic diagram of the structure of a monitoring device for a submodule controller provided in an embodiment of the present application Figure 1 ;

[0038] Figure 7 A schematic diagram of the structure of a monitoring device for a submodule controller provided in an embodiment of the present application Figure 2 ;

[0039] Figure 8 A hardware entity diagram of a computer device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0040] In order to make the purpose, technical solutions and advantages of this application clearer, the technical solutions of this application are further elaborated in detail below with reference to the accompanying drawings and embodiments. The described embodiments should not be regarded as limiting this application. All other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0041] In the following description, reference is made to “some embodiments”, which describes a subset of all possible embodiments, but it will be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0042] It should be pointed out that the terms "first\second\third" involved in the embodiments of the present application are merely used to distinguish similar objects and do not represent a specific ordering of the objects. It can be understood that "first\second\third" can be interchanged with a specific order or sequence where permitted, so that the embodiments of the present application described here can be implemented in an order other than that illustrated or described here.

[0043] It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as generally understood by those skilled in the art in the art to which the embodiments of the present application belong. It should also be understood that terms such as those defined in general dictionaries should be understood to have meanings consistent with their meanings in the context of the prior art, and will not be interpreted in an idealized or overly formal sense unless specifically defined as herein.

[0044] The Field Programmable Gate Array (FPGA) is a further development of programmable devices such as programmable array logic and general-purpose array logic. It emerged as a semi-custom circuit within the field of application-specific integrated circuits (ASICs), addressing both the shortcomings of custom circuits and the limited number of gates inherent in existing programmable devices.

[0045] High-speed memory: This is a portion of computer memory. Unlike main memory, it typically operates at a higher speed and has a smaller capacity. Its primary function is to increase computer speed. When a computer executes instructions, it needs to read data and programs from memory. High-speed memory can read and save data more quickly, reducing processing time and improving computer performance. High-speed memory is also often used as cache to speed up data access.

[0046] Energy storage system: is a device or system used to store and release energy. Its purpose is to store energy when needed and release the stored energy to meet demand when demand exceeds supply or energy supply is unstable.

[0047] The submodule controller serves as the controller for the submodule power portion of a high-voltage direct-mount energy storage system. It communicates with the main control system upstream and the battery management system downstream, while also controlling the power module itself. The submodule controller is the core control and protection unit for the energy storage valve submodule in a high-voltage direct-mount energy storage system.

[0048] Due to electromagnetic radiation and other factors, the submodule controller may experience hardware damage or software errors, causing the energy storage valve to stop operating. Traditionally, maintenance personnel have to climb onto the energy storage valve to manually replace the submodule controller and then conduct troubleshooting. While hardware damage can be discovered during subsequent testing, software logic errors are difficult to reproduce and locate outside of the actual operating environment, requiring significant maintenance effort.

[0049] With the development of flexible DC technology, voltage levels have gradually increased, the number of submodules and control boards has gradually increased, the control and protection logic has become more complex, and logical fault troubleshooting has become increasingly difficult. Traditional submodule controllers are limited in their safety, reliability, and testability, and cannot meet this growing demand.

[0050] Therefore, this application proposes a monitoring method suitable for a flexible DC energy storage submodule controller to monitor submodule status changes, quickly and accurately locate fault problems, improve the stability and reliability of the energy storage valve, and reduce the difficulty and cost of subsequent maintenance.

[0051] Next, let’s first introduce the composition and structure of the energy storage system. Figure 1 As shown, the energy storage system includes N submodule controllers 31 to 3N, where N is an integer greater than 1. The upstream of the N submodule controllers includes a host computer 1 and a main control system 2. The submodule controllers 31 to 3N exchange information with the main control system 2, and the main control system 2 exchanges information with the host computer 1. The downstream of the submodule controllers 31 to 3N includes power units, energy storage batteries, and a high-voltage power supply. The high-voltage power supply supplies power to the energy storage batteries and the entire control system.

[0052] Taking the sub-module controller 31 as an example, the downstream of the sub-module controller 31 includes a power unit 41, an energy storage battery 51, and a high-voltage energy source 61. Among them, the sub-module controller 31 includes at least FPGA311 and a memory 312, and the FPGA311 and the memory 312 can exchange information. The power unit 41 includes at least a bus switch 411, an IGBT 412, a bypass switch 413 and a battery management system 414. The battery management system 414 in the power unit 41 and the sub-module controller 31 exchange information.

[0053] The embodiment of the present application provides a monitoring method for a submodule controller, which is applied to a field programmable gate array located in the submodule controller, such as Figure 2 As shown, the method may include steps S201 to S203:

[0054] Step S201: In response to a reported event, determining a collection period based on an event time corresponding to the reported event; the collection period includes a first sub-period before the event time and a second sub-period after the event time;

[0055] Here, the reporting event can be different in different scenarios. For example, the reporting event could be: the FPGA detecting a submodule controller failure; or the reporting event could be: the main control system sending a request to the FPGA to obtain the operating status of the submodule controller. In this embodiment, the collection periods are generally selected to be continuous in time. That is, the first sub-period and the second sub-period are separated by the event time and are continuous in time.

[0056] In some embodiments, the specific implementation of the method for determining the event time may include step S2011 and step S2012:

[0057] Step S2011: when it is determined that a fault event occurs in the submodule controller, the fault event is determined as a reporting event, and the time of occurrence of the fault event is determined as the event time;

[0058] In some embodiments, the failure of the sub-module controller may refer to a failure of the software or hardware of the FPGA itself, or a failure of various devices controlled by the FPGA.

[0059] Step S2012: When receiving the sending request sent by the main control system, the sending request is determined as a reporting event, and the designated time corresponding to the sending request is determined as the event time.

[0060] In some embodiments, the specified time corresponding to the upload request can be the specified time carried in the upload request command sent by the main control system to the FPGA, or the sending time when the main control system sends the upload request to the FPGA, or the receiving time when the FPGA receives the upload request sent by the main control system. The specific time is determined by those skilled in the art according to actual conditions and is not specifically limited here.

[0061] In the above embodiment, fault events and upload request events are respectively used as reporting events, and the event times corresponding to the two different types of reporting events are respectively determined. Based on these two types of event times, the duration of subsequent collection of key node signals is determined to prevent the memory from continuously storing monitoring frames corresponding to key node signals collected at subsequent moments, which may cause the loss of key information of the reporting event.

[0062] Step S202: Acquire key node signals of the submodule controller collected during the collection period; the key node signals include at least one or more of the following: basic information of the submodule controller, and internal key variables of the field programmable gate array program;

[0063] Here, key node signals refer to data from nodes that play an important and influential role in a system or network. In some embodiments, the signals of key nodes of a submodule controller include at least basic information about the submodule controller and key internal variables of the FPGA. The basic information of the submodule controller may include control information, configuration information, drive signals, feedback signals, etc., and the key internal variables of the FPGA may include static and dynamic variables of the FPGA program.

[0064] Step S203: Based on the key node signal and the collection time corresponding to the key node signal, generate a monitoring frame corresponding to the key node signal, and write the monitoring frame into the memory of the sub-module controller.

[0065] Here, the key node signal collected at the current moment is packaged into a monitoring frame, and at least an identifier of the collection moment is added to the monitoring frame to generate a final monitoring frame corresponding to the key node signal.

[0066] Memory is an integrated circuit storage unit based on semiconductor memory elements, also known as memory chip and memory device. Memory is also used to indicate the ability of a unit to store information. The size of the storage capacity is expressed in bytes, and the number of bytes is usually expressed by the number of bits in its storage unit. Based on the storage speed of the memory, the memory can be divided into high-speed memory, medium-speed memory and low-speed memory. In some embodiments, the type of memory can be high-speed memory, which is used to increase the reading and writing speed of data. Among them, the high-speed memory can be selected from static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), flash memory (FLASH Memory), etc. The specific type is determined by those skilled in the art according to actual conditions and is not specifically limited here.

[0067] After selecting the high-speed memory, the FPGA uses a high-speed protocol to write the monitoring frame into the high-speed memory. In some embodiments, the high-speed protocol can be selected from Ethernet protocol, Peripheral Component Interconnect Express (PCIE) protocol, Gigabit Transceiver (GT) protocol, FT3 protocol (a link layer transmission frame format specified in the IEC60044-8 electronic voltage and current transformer standard developed by the International Electrotechnical Commission), Universal Asynchronous Receiver / Transmitter (UART) protocol, Serial Peripheral Interface (SPI) protocol, Inter-Integrated Circuit (IIC) protocol and custom protocol, etc. The specific protocol is determined by those skilled in the art according to actual conditions and is not specifically limited here.

[0068] In some embodiments, the FPGA can synchronously collect key node signals and generate monitoring frames based on the key node signals.

[0069] In some embodiments, after acquiring the key node signals of the submodule controller collected during the collection period, in order to prevent the monitoring frame information of the collection period from being overwritten, the collection of key node signals can be stopped or the monitoring frames generated by the key nodes can be stopped from being stored in the memory.

[0070] In an embodiment of the present application, first, a collection period is determined based on a first sub-period before the event moment of the reported event and a second sub-period after the event moment, then, the key node signal of the submodule controller collected during the collection period is obtained, and finally, based on the key node signal and the collection moment corresponding to the key node signal, a monitoring frame corresponding to the key node signal is generated, and the monitoring frame is written into a memory. In this way, the key node signals before and after the event moment can be obtained, so that accurate positioning of the analysis and investigation of the reported event can be achieved, reducing the difficulty and cost of submodule controller maintenance. When a submodule controller fails, if the submodule controller is replaced according to the traditional method and then investigated offline, there are problems such as the failure is difficult to reproduce and the investigation is too difficult. By using the method described in the embodiment of the present application, analysis can be performed directly based on the key node signal at the moment of the failure monitored, without the need to invest resources to reproduce the failure again.

[0071] In some embodiments, a field programmable gate array located in a submodule controller collects key node signals of the submodule controller before responding to a reporting event, such as Figure 3 As shown, it may include steps S301 to S304:

[0072] Step S301: collecting key node signals of the submodule controller;

[0073] Here, the change period of the key node signal is the clock period (nanosecond level), so the frequency of collecting the key node signal can be selected at the nanosecond level.

[0074] Step S302: generating a monitoring frame corresponding to the key node signal based on the key node signal and the collection time corresponding to the key node signal, and writing the monitoring frame into the memory;

[0075] Step S303: determining whether the number of monitoring frames in the memory is equal to the total number of monitoring frames;

[0076] Here, the total number of monitoring frames is determined based on the storage space of the memory.

[0077] Step S304: when the number of monitoring frames in the memory is equal to the total number of monitoring frames, determining that the monitoring frame at the current moment overwrites the monitoring frame written first into the memory.

[0078] In some embodiments, when the number of monitoring frames in the memory is less than the total number of monitoring frames, it is determined that the monitoring frame at the current moment is written into the memory.

[0079] In an embodiment of the present application, first, the key node signal of the sub-module controller is collected, and then, based on the key node signal and the collection time corresponding to the key node signal, a monitoring frame corresponding to the key node signal is generated, and the monitoring frame is written into the memory. By storing the collected key node signal of the sub-module controller in the memory in real time, when an upload event occurs, the monitoring frame information before the event time corresponding to the upload event can be obtained through the monitoring frame stored in the memory. Finally, when the number of monitoring frames in the memory is equal to the total number of monitoring frames, the monitoring frame written first in the memory is overwritten by the monitoring frame at the current moment, thereby ensuring that the monitoring frame corresponding to the key node signal collected at the current moment is stored in the memory, and further ensuring that when an upload event occurs, the monitoring frame of the collection period can be obtained through the monitoring frame stored in the memory.

[0080] In some embodiments, after generating corresponding monitoring frames from key node signals during the acquisition period and writing the monitoring frames into the memory, the monitoring frames during the acquisition period need to be sent to the main control system for analysis, such as Figure 4 As shown, the method may include steps S401 to S409:

[0081] Step S401: FPGA requests the main control system to send the monitoring frame of the acquisition period in the memory;

[0082] Here, the FPGA's request message can only be successfully sent to the main control system if the communication link between the FPGA and the main control system is functioning properly. If the communication link between the FPGA and the main control system is abnormal, communication must be restored offline before the request message can be sent. In some embodiments, offline restoration can involve removing the control device or board containing the FPGA and restoring communication with the control device or board using test fixtures.

[0083] In some embodiments, the method for determining the monitoring frames in the collection period may include steps S4011 and S4012:

[0084] Step S4011: FPGA obtains a first monitoring frame of the first sub-period and a second monitoring frame of the second sub-period;

[0085] Here, the composition of the monitoring frame may include a frame header, frame data, and a frame tail, wherein the frame header is the starting part of the monitoring frame, which is used to identify the beginning of the monitoring frame; the frame data is the data part actually carried in the monitoring frame, which is based on the key node signal conversion here; and the frame tail is the ending part of the monitoring frame, which is used to identify the end of the monitoring frame.

[0086] In some embodiments, when the first sub-period is equal to the second sub-period, the number of first monitoring frames is equal to the number of second monitoring frames; when the first sub-period is smaller than the second sub-period, the number of first monitoring frames is smaller than the number of second monitoring frames; when the first sub-period is larger than the second sub-period, the number of first monitoring frames is larger than the number of second monitoring frames.

[0087] Step S4012: The FPGA determines a monitoring frame of a collection period based on the first monitoring frame and the second monitoring frame.

[0088] In the above embodiment, by obtaining the first monitoring frame before the event moment and the second monitoring frame after the event moment, it is beneficial to the subsequent analysis of the signal changes of key nodes before and after the reporting event, thereby helping to determine the cause of the fault in the reporting event or the operating status of the sub-module controller.

[0089] Step S402: upon receiving the request from the FPGA to send the monitoring frame of the acquisition period, the main control system sends a confirmation message to the FPGA;

[0090] Step S403: When the FPGA receives the confirmation message sent by the main control system and it is in agreement, the FPGA sends the basic information of the memory to the main control system; the basic information includes at least one or more of the following: the number of monitoring frames sent and the acquisition period;

[0091] Here, the number of monitoring frames sent refers to the number of monitoring frames in the acquisition period. After receiving the number of monitoring frames in the acquisition period, the main control system can determine whether the reception of the monitoring frames in the acquisition period has been completed based on the number of monitoring frames actually received and the number of monitoring frames in the acquisition period. For example, when the number of monitoring frames actually received is less than the number of monitoring frames sent, it is determined that the main control system has not completed the reception of monitoring frames in the acquisition period; when the number of monitoring frames actually received is equal to the number of monitoring frames sent, it is determined that the main control system has completed the reception of monitoring frames in the acquisition period. The acquisition period refers to the time interval for collecting key node signals, which can be at the nanosecond level in some embodiments.

[0092] In some embodiments, if the FPGA receives a confirmation message from the main control system indicating that the confirmation message does not agree, the FPGA needs to continue to request the main control system to send the monitoring frames of the acquisition period in the memory.

[0093] Step S404: upon receiving the basic information sent by the FPGA, the main control system sends a confirmation message to the FPGA;

[0094] Step S405: When the FPGA receives the confirmation message sent by the main control system, it sends the monitoring frame of the acquisition period in the memory to the main control system;

[0095] Here, before the FPGA sends the monitoring frame of the acquisition period to the main control system, in order to ensure the correctness and integrity of data transmission, it is also necessary to add a frame header, sequence number, CRC check code, etc. to the monitoring frame.

[0096] In some embodiments, when the FPGA receives a confirmation message sent by the main control system and the FPGA indicates that the message has not been received, the FPGA needs to continue to send the basic information of the memory to the main control system.

[0097] Step S406: The main control system receives the monitoring frame of the acquisition period sent by the FPGA;

[0098] Step S407: After all monitoring frames in the acquisition period have been sent, the FPGA sends a message to the main control system indicating that the sending has been completed.

[0099] Step S408: upon receiving the completion message from the FPGA, the main control system sends a confirmation message to the FPGA;

[0100] Step S409: the FPGA receives a confirmation message sent by the main control system.

[0101] Here, when the FPGA receives a confirmation message from the main control system indicating that reception is complete, it determines that all monitoring frames of the acquisition period have been sent to the main control system; when the FPGA receives a confirmation message from the main control system indicating that reception is not complete, it continues to send the monitoring frames of the acquisition period in the memory to the main control system.

[0102] In some embodiments, when the main control system has completed receiving the monitoring frames of the acquisition period, the main control system can determine the fault cause or current status of the sub-module controller based on the received monitoring frames of the acquisition period, and can also continue to send the received monitoring frames of the acquisition period to the host computer, and the host computer will analyze the fault cause or current status of the sub-module controller.

[0103] In the embodiment of the present application, through the information interaction between the main control system and the FPGA, it can be ensured that the monitoring frames of the acquisition period in the memory are sent to the main control system in an orderly manner, ensuring that the main control system can obtain correct and complete monitoring frames of the acquisition period, which is helpful for the subsequent analysis of the monitoring frames of the acquisition period.

[0104] The monitoring method of the above-mentioned sub-module controller is described below in conjunction with a specific embodiment. However, it is worth noting that this specific embodiment is only for better illustrating the present application and does not constitute an improper limitation to the present application.

[0105] The embodiment of the present application provides an overall technical solution of a monitoring method for a submodule controller, which at least includes a real-time monitoring and storage module and an FPGA uploading monitoring frame module, such as Figure 5 As shown, it includes steps S501 to S518:

[0106] The implementation of the real-time monitoring and storage module in the overall technical solution of the monitoring method of the submodule controller may include steps S501 to S506:

[0107] Step S501: FPGA configures the total number of monitoring frames, key node signals, acquisition period, etc. stored in the high-speed memory;

[0108] Here, the total number of monitoring frames is determined by the storage space available in the high-speed memory. Key node signals can include basic information such as the submodule controller's configuration, control information, drive signals, and feedback signals, as well as various internal key variables in the FPGA program. Because the key node signals in the submodule controllers contain a large amount of data and vary in clock cycles (nanoseconds), they cannot be uploaded to the main control system in real time. Instead, they are stored in high-speed memory, making them readily available to the main control system.

[0109] Step S502: FPGA collects key node signals in real time;

[0110] Here, the acquisition period is determined based on the change period of the key node signal, which is generally at the nanosecond level.

[0111] Step S503: The FPGA packages the key node signals at the current time point into a monitoring frame and adds information such as a time stamp;

[0112] Here, adding a time marker is helpful for the subsequent analysis of key node signals in the time dimension.

[0113] Step S504: FPGA writes the monitoring frame into the high-speed memory using the high-speed protocol;

[0114] Here, the high-speed protocol may be an Ethernet protocol, a PCIe protocol, a GT protocol, an FT3 protocol, a UART protocol, an SPI protocol, an IIC protocol, or a custom protocol, etc. The high-speed memory may be an SRAM, a DRAM, a SDRAM, a FLASH, or the like.

[0115] Step S505: The FPGA determines whether the number of monitoring frames stored in the high-speed memory is equal to the total number of configured monitoring frames;

[0116] Here, if the answer is (Y), the process goes to step S506, and the FPGA uses a high-speed protocol to overwrite the monitoring frame first written into the memory with the monitoring frame at the current time point; if the answer is (N), the process goes to step S502, and the FPGA continues to collect key node signals and store them into the high-speed memory.

[0117] Here, based on the comparison between the total number of monitoring frames configured in step S501 and the number of monitoring frames actually stored in the high-speed memory, if the number of monitoring frames actually stored is less than the total number of monitoring frames, the FPGA will continue to write the generated monitoring frames into the high-speed memory.

[0118] Step S506: The FPGA uses a high-speed protocol to overwrite the monitoring frame first written into the memory with the monitoring frame at the current time point;

[0119] Here, based on the comparison between the total number of monitoring frames configured in step S501 and the number of monitoring frames actually stored in the high-speed memory, when the number of monitoring frames actually stored is equal to the total number of monitoring frames, the FPGA will overwrite the monitoring frame first written into the high-speed memory with the latest generated monitoring frame.

[0120] Step S507: The FPGA detects whether the submodule controller has a fault or whether it has received a message actively requested by the main control system;

[0121] Here, if the answer is (Y), the process goes to step S508, and the FPGA continues to store the monitoring frame with the current time point as the middle point of the time span, and then stops storing; if the answer is no (N), the process goes to step S502, and the FPGA continues to collect key node signals and store them in the high-speed memory.

[0122] A submodule controller failure can be caused by a fault in the various devices controlled by the FPGA, or by a hardware or software failure within the FPGA itself. Faults can be detected by the FPGA itself, or by the main control system, which then notifies the FPGA. When the FPGA reports a fault, it automatically uploads monitoring frames from its high-speed memory. When the main control system needs to understand the operating status of the submodule controller, it will proactively request the FPGA to upload monitoring frames. Upon receiving the upload request, the FPGA will also upload monitoring frames from its high-speed memory.

[0123] Step S508: The FPGA continues to store the monitoring frame with the current time point as the middle point of the time span, and then stops storing;

[0124] Here, in the case where a submodule controller fails, the current time point refers to the time point when the failure occurs; in the case where the FPGA receives an upload request from the main control system, the current time point refers to the time point when the FPGA receives the upload request.

[0125] In some embodiments, using the current time point as the midpoint of the time span facilitates subsequent analysis of signal changes before and after the fault time point. For example, if the time span is 11 nanoseconds, the current time point is at 6 nanoseconds.

[0126] Step S509: Check whether the communication link from the FPGA to the main control system is normal;

[0127] Here, if the answer is (Y), the process goes to step S511, and the FPGA requests the main control system to upload the information in the high-speed memory; if the answer is no (N), the process goes to step S510, and the communication function is restored offline.

[0128] Step S510: restore communication function offline;

[0129] In some embodiments, the method for restoring the uplink communication link may include first removing the control device or board with the FPGA, then using a test fixture to restore communication with the control device or board with the FPGA. After the uplink communication link is functioning normally, the FPGA resends an uplink request, or the main control system actively requests an uplink again.

[0130] The implementation of the FPGA sending the monitoring frame in the overall technical solution of the monitoring method of the sub-module controller may include steps S511 to S517:

[0131] Step S511: FPGA requests the main control system to upload the information in the high-speed memory;

[0132] Step S512: The main control system responds to the FPGA whether it agrees to upload the information in the high-speed memory;

[0133] Here, if the answer is (Y), the process goes to step S513, and the FPGA uploads information such as the total number of frames and the acquisition period; if the answer is no (N), the process goes to step S511, and the FPGA continues to request the main control system to upload information in the high-speed memory.

[0134] Step S513: FPGA sends information such as total frame number and acquisition period;

[0135] Here, the total number of frames refers to the number of monitoring frames that need to be sent to the main control system.

[0136] Step S514: The main control system replies to the FPGA whether the information in the high-speed memory has been received;

[0137] Here, if the answer is (Y), the process goes to step S515, and the FPGA uploads the monitoring frame in the high-speed memory, adds the frame header, sequence number, CRC check code, etc.; if the answer is no (N), the process goes to step S513, and the FPGA continues to upload information such as the total number of frames and the acquisition period.

[0138] Step S515: FPGA uploads the monitoring frame in the high-speed memory, adds the frame header, sequence number, CRC checksum, etc.

[0139] Here, the frame header, sequence number, CRC check code and other contents are added to ensure the correctness and integrity of the monitoring frame information sent to the main control system.

[0140] Step S516: FPGA sends completion information to the main control system;

[0141] Here, after the FPGA sends out all the monitoring frames that need to be sent, it is also necessary to send a message to the main control system that the sending is completed.

[0142] Step S517: The main control system replies to the FPGA whether all sent monitoring frames have been received;

[0143] Here, if the answer is (Y), the process proceeds to step S518 to parse the monitoring frame information and analyze the cause of the fault and the current status; if the answer is (N), the process proceeds to step S516, and the FPGA continues to send completion information to the main control system.

[0144] The FPGA compares the number of monitoring frames received with the total number of frames sent in step S513. If the number of monitoring frames received is less than the total number of frames sent, it determines that the reception of all monitoring frames sent is not completed. Otherwise, it determines that the reception of all monitoring frames sent is completed.

[0145] Step S518: parse the monitoring frame information, analyze the fault cause and current status.

[0146] Here, after receiving all the monitoring frames sent up, the main control system can directly analyze the received monitoring frames, or send all the received monitoring frames up to the host computer for analysis.

[0147] According to the above implementation process, the overall technical solution of the monitoring method of the submodule controller is proposed in the embodiment of the present application. The FPGA and memory are used to complete the monitoring and storage of key node signals in the submodule controller. When the FPGA detects a fault in the submodule controller or receives an upload request from the main control system, the relevant monitoring frame is uploaded to the main control system based on the fault time and the time corresponding to the upload request, thereby completing the analysis of the uploaded monitoring frame. Based on the embodiment of the present application, the following beneficial effects can be obtained:

[0148] 1. The historical information of the submodule controller can be traced at any time, and the current status can be queried: the FPGA collects key node signals in real time, generates monitoring frames from the collected key node signals, and stores them in high-speed memory for a period of time. When the main control system wants to obtain the operating status of the submodule controller and sends an upload request to the FPGA, the monitoring frames in the high-speed memory are read;

[0149] 2. Automatic triggering at the fault time point: When the FPGA program detects a fault in the submodule controller, it automatically triggers the FPGA to continue storing monitoring frames with the current time point as the midpoint of the time span, and then stop storing after the time span is met. Using the current time point as the midpoint of the time span facilitates subsequent analysis of signal changes before and after the fault time point;

[0150] 3. Real-time acquisition of key node signals: Real-time acquisition helps monitor the current status of the sub-module controller to avoid missing the moment of fault occurrence. Based on the collected key node signals, the status of the sub-module controller and the cause of the fault can be analyzed;

[0151] 4. Capture instantaneous signals at key time points: Signal changes at the moment of a fault are the most valuable. By capturing signal changes at key nodes before and after the fault, the changing trends of key node signals before and after the fault can be clearly seen, facilitating subsequent fault cause analysis.

[0152] 5. Accurately locate faults during troubleshooting and analysis: FPGA programs are designed to meet testability requirements, making important status and information easily accessible to the outside world. Behaviors, events, operations, status, performance, errors, etc. are easily traceable, and the information is complete and easy to understand. By configuring key node signals for monitoring in the FPGA program, professionals can view the monitored key node signals and accurately locate faulty nodes in the software. In addition, since there are often many key node signals and their change cycle is the clock cycle, they cannot be uploaded in real time. However, high-speed memory is available for reading at any time.

[0153] 6. Online troubleshooting without reproducing the fault: Because the actual fault moment is recorded, there is no need to invest resources in reproducing the fault. If the traditional method of replacing the submodule controller and then conducting offline troubleshooting is used, the fault is difficult to reproduce and the troubleshooting is too difficult.

[0154] Based on the foregoing embodiments, an embodiment of the present application provides a schematic diagram of the composition structure of a monitoring device for a sub-module controller, which includes the modules included and the units included in each module, and can be implemented by a processor in a computer device; of course, it can also be implemented by a specific logic circuit; in the implementation process, the processor can be a central processing unit (CPU), a microprocessor (MPU), a digital signal processor (DSP) or a field programmable gate array (FPGA), etc.

[0155] The present invention provides a schematic diagram of the structure of a monitoring device for a submodule controller, which is applied to a field programmable gate array located in a submodule controller, such as Figure 6 As shown, the apparatus 600 includes:

[0156] A first determining module 601 is configured to determine, in response to a reported event, a collection period based on an event moment corresponding to the reported event; the collection period includes a first sub-period before the event moment and a second sub-period after the event moment;

[0157] A first acquisition module 602 is configured to acquire key node signals of the submodule controller acquired during the acquisition period; the key node signals include at least one or more of the following: basic information of the submodule controller, and internal key variables of the field programmable gate array program;

[0158] The first generating module 603 is configured to generate a monitoring frame corresponding to the key node signal based on the key node signal and the acquisition time corresponding to the key node signal, and write the monitoring frame into the memory of the sub-module controller.

[0159] In some embodiments, the apparatus further comprises:

[0160] A second determining module is configured to, when it is determined that a fault event occurs in the submodule controller, determine the fault event as a reporting event and determine the time of occurrence of the fault event as the event time;

[0161] The third determining module is configured to, upon receiving a sending request sent by the main control system, determine the sending request as a reporting event and determine a designated time corresponding to the sending request as the event time.

[0162] In some embodiments, the apparatus further comprises:

[0163] A second acquisition module is configured to acquire a first monitoring frame of the first sub-period and a second monitoring frame of the second sub-period;

[0164] The fourth determining module is configured to determine a monitoring frame in a collection period based on the first monitoring frame and the second monitoring frame.

[0165] In some embodiments, the apparatus further comprises:

[0166] A first sending module, configured to request the main control system to send the monitoring frames of the acquisition period in the memory;

[0167] The second sending module is configured to send basic information of the memory to the main control system when receiving a confirmation message sent by the main control system indicating that the confirmation message is in agreement; the basic information includes at least one or more of the following: the number of monitoring frames sent and the acquisition period;

[0168] The third sending module is configured to send the monitoring frames of the collection period in the memory to the main control system when a confirmation message sent by the main control system is received.

[0169] In some embodiments, the apparatus further comprises:

[0170] A fourth sending module is configured to send a message to the main control system indicating that sending has been completed when all monitoring frames in the collection period are sent;

[0171] The receiving module is used to receive the confirmation message sent by the main control system.

[0172] In some embodiments, the apparatus further comprises:

[0173] An acquisition module, used for acquiring key node signals of the submodule controller;

[0174] The second generating module is configured to generate a monitoring frame corresponding to the key node signal based on the key node signal and the acquisition time corresponding to the key node signal, and write the monitoring frame into the memory.

[0175] In some embodiments, the apparatus further comprises:

[0176] The fifth determining module is configured to determine, when the number of monitoring frames in the memory is equal to the total number of monitoring frames, that the monitoring frame at the current moment overwrites the monitoring frame written first into the memory.

[0177] The present application further provides a schematic diagram of the structure of a monitoring device for a submodule controller, which is applied to a main control system, such as Figure 7 As shown, the apparatus 700 includes:

[0178] A first sending module 701 is configured to send a confirmation message to the field programmable gate array upon receiving a request from the field programmable gate array to send the monitoring frame of the collection period;

[0179] A second sending module 702 is configured to send a confirmation message to the field programmable gate array upon receiving the basic information sent by the field programmable gate array;

[0180] The receiving module 703 is configured to receive the monitoring frame of the collection period sent by the field programmable gate array.

[0181] In some embodiments, the apparatus further comprises:

[0182] a third sending module, configured to send a confirmation message to the field programmable gate array upon receiving a message indicating that the sending is completed from the field programmable gate array;

[0183] A determination module is used to determine the fault cause or current state of the submodule controller based on the monitoring frame received during the acquisition period.

[0184] The description of the above device embodiment is similar to the description of the above method embodiment and has similar beneficial effects as the method embodiment. In some embodiments, the functions or modules included in the device provided by the embodiments of the present disclosure can be used to perform the methods described in the above method embodiments. For technical details not disclosed in the device embodiments of this application, please refer to the description of the method embodiments of this application for understanding.

[0185] It should be noted that, in the embodiment of the present application, if the above method is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiment of the present application is essentially or the part that contributes to the relevant technology can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for making a computer device (which can be a personal computer, a server, or a network device, etc.) execute all or part of the methods described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program codes, such as a U disk, a mobile hard disk, a read-only memory (ROM), a magnetic disk or an optical disk. In this way, the embodiment of the present application is not limited to any specific hardware, software or firmware, or any combination of hardware, software and firmware.

[0186] An embodiment of the present application provides a computer device, including a memory and a processor, wherein the memory stores a computer program that can be run on the processor, and when the processor executes the program, some or all of the steps in the above method are implemented.

[0187] The present invention provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements some or all of the steps in the above method. The computer-readable storage medium may be transient or non-transient.

[0188] An embodiment of the present application provides a computer program, including computer-readable code. When the computer-readable code is run in a computer device, a processor in the computer device executes some or all of the steps for implementing the above method.

[0189] An embodiment of the present application provides a computer program product, including a computer program or instructions, which implement the steps in the above method when executed by a processor.

[0190] The computer program product may be implemented in hardware, software, or a combination thereof. In some embodiments, the computer program product is implemented as a computer storage medium. In other embodiments, the computer program product is implemented as a software product, such as a software development kit (SDK).

[0191] It should be noted that the descriptions of the various embodiments above tend to emphasize the differences between the various embodiments, and their similarities or similarities can be referenced to each other. The descriptions of the above device, storage medium, computer program, and computer program product embodiments are similar to the descriptions of the above method embodiments and have similar beneficial effects as the method embodiments. For technical details not disclosed in the embodiments of the device, storage medium, computer program, and computer program product of this application, please refer to the description of the method embodiments of this application for understanding.

[0192] The present application embodiment provides a computer device, such as Figure 8 As shown, the hardware entity of the computer device 800 includes: a processor 801, a communication interface 802 and a memory 803, wherein: the processor 801 generally controls the overall operation of the computer device 800. The communication interface 802 enables the computer device to communicate with other terminals or servers via a network. The memory 803 is configured to store instructions and applications executable by the processor 801, and can also cache data to be processed or processed by the processor 801 and various modules in the computer device 800 (for example, image data, audio data, voice communication data and video communication data), which can be implemented by flash memory (FLASH) or random access memory (RAM). Data transmission between the processor 801, the communication interface 802 and the memory 803 can be carried out via a bus 804.

[0193] It should be understood that "one embodiment" or "an embodiment" mentioned throughout the specification means that the specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in the various embodiments of the present application, the size of the serial numbers of the above-mentioned steps / processes does not mean the order of execution, and the execution order of each step / process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application. The above-mentioned serial numbers of the embodiments of the present application are for description only and do not represent the advantages and disadvantages of the embodiments.

[0194] It should be noted that, in this document, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or apparatus comprising the element.

[0195] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as: multiple units or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the components shown or discussed can be through some interfaces, and the indirect coupling or communication connection of the devices or units can be electrical, mechanical or other forms.

[0196] The units described above as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units; they may be located in one place or distributed across multiple network units; some or all of the units may be selected according to actual needs to achieve the purpose of the scheme of this embodiment.

[0197] In addition, all functional units in the embodiments of the present application can be integrated into one processing unit, or each unit can be a separate unit, or two or more units can be integrated into one unit; the above-mentioned integrated units can be implemented in the form of hardware or in the form of hardware plus software functional units.

[0198] Those skilled in the art will understand that all or part of the steps of implementing the above-mentioned method embodiment can be completed by hardware related to program instructions, and the aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it executes the steps of the above-mentioned method embodiment; and the aforementioned storage medium includes: mobile storage devices, read-only memories (ROM), magnetic disks or optical disks, and other media that can store program codes.

[0199] Alternatively, if the above-mentioned integrated unit of the present application is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the relevant technology, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes a number of instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as mobile storage devices, ROMs, magnetic disks, or optical disks.

[0200] The above is only an implementation method of the present application, but the scope of protection of the present application is not limited thereto. Any technician familiar with this technical field can easily think of changes or replacements within the technical scope disclosed in this application, which should be covered by the scope of protection of the present application.

Claims

1. A monitoring method for a submodule controller, characterized in that: Applied to a field programmable gate array located in a submodule controller, the method comprises: In response to a reported event, determining a collection period based on an event time corresponding to the reported event; the collection period includes a first sub-period before the event time and a second sub-period after the event time; Acquire key node signals of the submodule controller collected during the collection period; the key node signals include at least one or more of the following: basic information of the submodule controller, and internal key variables of a field programmable gate array program; Based on the key node signal and the collection time corresponding to the key node signal, a monitoring frame corresponding to the key node signal is generated, and the monitoring frame is written into the memory of the sub-module controller.

2. The method according to claim 1, characterized in that The method further comprises: In the case of determining that a fault event occurs in the submodule controller, determining the fault event as a reporting event, and determining the time of occurrence of the fault event as the event time; In the case of receiving the sending request sent by the main control system, the sending request is determined as a reporting event, and the designated time corresponding to the sending request is determined as the event time.

3. The method according to claim 1, characterized in that The method further comprises: Acquire a first monitoring frame of the first sub-period and a second monitoring frame of the second sub-period; A monitoring frame of a collection period is determined based on the first monitoring frame and the second monitoring frame.

4. The method according to any one of claims 1 to 3, characterized in that The method further comprises: Requesting the main control system to send the monitoring frames of the acquisition period in the memory; When the confirmation message sent by the main control system is received and it is in agreement, the basic information of the memory is sent to the main control system; the basic information includes at least one or more of the following: the number of monitoring frames sent and the acquisition period; When the confirmation message sent by the main control system is received, the monitoring frame of the collection period in the memory is sent to the main control system.

5. The method according to claim 4, characterized in that The method comprises: When all monitoring frames of the acquisition period are sent, sending a message to the main control system indicating that sending is completed; Receive a confirmation message sent by the main control system.

6. The method according to any one of claims 1 to 3, characterized in that Before responding to the reporting event, the method includes: Collecting key node signals of the submodule controller; Based on the key node signal and the collection time corresponding to the key node signal, a monitoring frame corresponding to the key node signal is generated, and the monitoring frame is written into the memory.

7. The method according to any one of claims 1 to 3, characterized in that The method further comprises: When the number of monitoring frames in the memory is equal to the total number of monitoring frames, it is determined that the monitoring frame at the current moment overwrites the monitoring frame written first into the memory.

8. A monitoring method for a submodule controller, characterized in that: Applied to a main control system, the method includes: Upon receiving a request from the field programmable gate array to send the monitoring frame of the acquisition period, sending a confirmation message to the field programmable gate array; Upon receiving the basic information sent by the field programmable gate array, sending a confirmation message to the field programmable gate array; Receive the monitoring frame of the collection period sent by the field programmable gate array.

9. The method according to claim 8, characterized in that The method comprises Upon receiving a message indicating that the transmission is completed from the field programmable gate array, sending a confirmation message to the field programmable gate array; Based on the received monitoring frames of the acquisition period, a fault cause or a current state of the submodule controller is determined.

10. A monitoring device for a submodule controller, characterized in that: Applied to a field programmable gate array located in a submodule controller, the device comprises: A first determining module is configured to determine, in response to a reported event, a collection period based on an event moment corresponding to the reported event; the collection period includes a first sub-period before the event moment and a second sub-period after the event moment; A first acquisition module is configured to acquire key node signals of the submodule controller acquired during the acquisition period; the key node signals include at least one or more of the following: basic information of the submodule controller, and internal key variables of a field programmable gate array program; The first generating module is configured to generate a monitoring frame corresponding to the key node signal based on the key node signal and the acquisition time corresponding to the key node signal, and write the monitoring frame into the memory of the submodule controller.

11. A monitoring device for a submodule controller, characterized in that: Applied to a main control system, the device comprises: a first sending module, configured to send a confirmation message to the field programmable gate array upon receiving a request from the field programmable gate array to send the monitoring frame of the collection period; a second sending module, configured to send a confirmation message to the field programmable gate array upon receiving the basic information sent by the field programmable gate array; A receiving module is used to receive the monitoring frame of the collection period sent by the field programmable gate array.

12. A computer device comprising a memory and a processor, wherein the memory stores a computer program that can be run on the processor, wherein: When the processor executes the program, the steps of the method according to any one of claims 1 to 9 are implemented.

13. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 9 are implemented.

14. A computer program product comprising a computer program or instructions, characterized in that When the computer program or instruction is executed by a processor, the steps of the method according to any one of claims 1 to 9 are implemented.

Images