A single-stage ac-dc converter circuit topology design method

By integrating a totem-pole bridgeless Boost power factor correction circuit and an LCC half-bridge resonant converter with current doubling synchronous rectification, the problems of low AC-DC conversion efficiency and numerous components in existing AC-DC converter circuit topologies are solved, achieving a highly efficient and reliable circuit topology design.

CN120658118BActive Publication Date: 2026-03-03BEIJING INFORMATION SCI & TECH UNIV
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Patent Information

Application Number
CN202510716230.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-05-30
Publication Date
2026-03-03
Estimated Expiration
2045-05-30

AI Technical Summary

Technical Problem

Existing AC-DC converter circuit topologies fail to effectively convert between alternating current and direct current in daily life, and suffer from problems such as complex control, large size, numerous components, and low efficiency, resulting in high circuit workload and high failure rate.

Method used

By adopting a single-stage AC-DC converter circuit topology design method, the totem pole bridgeless Boost power factor correction circuit and the LCC half-bridge resonant converter with current doubling synchronous rectification are integrated and share a single controller, which simplifies the control logic, reduces the number of components, and improves efficiency.

Benefits of technology

It realizes a single-stage AC-DC converter circuit topology with simple control logic, few components, low cost and high efficiency, which is suitable for high current output applications and reduces the circuit failure rate.

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Abstract

The application discloses a single-stage AC-DC converter circuit topology design method, relates to the technical field of power supply systems, and integrates a totem pole bridgeless Boost power factor correction circuit and an LCC half-bridge resonant conversion with synchronous rectification into one through a switching tube sharing technology. in , L f , C b , two diodes D1 and D2 and two MOS switching tubes S1 and S2; the front stage of the LCC half-bridge resonant converter with synchronous rectification includes two MOS switching tubes S1 and S2, a series resonant capacitor C r , a parallel resonant capacitor C p and a series resonant inductor L s The single-stage AC-DC converter circuit topology has the advantages of only one set of controllers required for the front stage, simple control logic, less use of electronic components, low cost, high efficiency and high reliability, and the rear stage has the advantages of high efficiency, small loss and applicability to occasions with large current output.
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Description

Technical Field

[0001] This application relates to the field of power supply system technology, specifically to a single-stage AC-DC converter circuit topology design method. Background Technology

[0002] To alleviate the global energy crisis, countries are vigorously promoting the development of new energy sources such as wind power, photovoltaics, and tidal power. High-efficiency, high-power-density, and high-bandwidth AC-DC converters have become a research hotspot in the power electronics industry. However, in people's daily electricity use, the commonly used AC-DC converter circuit topology has disadvantages such as complex control, large size, many components, and low efficiency. Therefore, this application proposes a single-stage AC-DC converter circuit topology design method.

[0003] Existing technologies, such as the invention application patent with publication number CN118862757A, disclose a method for constructing circuit topology association data, an integrated circuit design method, and a system. The method for constructing circuit topology association data includes steps such as analyzing the integrated circuit and extracting circuit units and their attribute information, analyzing the topological similarity between the extracted circuit units, dividing multiple circuit units into topology sets according to topological similarity, and generating topology association information for each topology set and associating it with a specific implementation technology. Therefore, the constructed circuit topology association data can be used by EDA tools to realize specific circuit implementations based on specific topology types. In integrated circuit design methods, EDA tools can use circuit topology association data to reorganize the circuit logic structure based on specific topology types before performing logic optimization, thereby achieving more optimized integrated circuit designs. This is beneficial for solving problems such as timing, congestion, and metal resource challenges in high-performance CPU and GPU designs.

[0004] Existing technology, such as the invention application patent with announcement number CN105808801A, discloses a data center circuit topology design method and apparatus, relating to the data center field. The method includes: establishing a circuit topology structure corresponding to the actual power distribution circuit structure; determining the parameters and / or states of one or more components in the actual power distribution circuit structure corresponding to each element in the circuit topology structure based on collected data from the power distribution cabinet; and configuring the correspondence between the elements and the component parameters and / or states. This allows for convenient and concise design of the circuit topology diagram, and the circuit topology diagram can be dynamically modified as the actual power distribution situation changes, enabling the power distribution topology to be modified and adjusted according to the power distribution situation. The modification method is flexible and lightweight, and the circuit topology can be designed through simple page element combinations.

[0005] The above solution has the following technical problems: 1. In daily life, the electricity supplied to households is 220V AC, while various electrical devices require 5~48V DC. Current technology does not take into account how to convert between AC and DC, nor does it consider how to optimize the existing AC-DC conversion methods.

[0006] 2. Existing technologies do not take into account the problems of complex operation, large size, numerous components, and low efficiency of control systems in existing circuit topologies. This neglect of this aspect leads to a heavy workload on the circuit, which in turn increases the probability of circuit failure. Summary of the Invention

[0007] The purpose of this application is to provide a single-stage AC-DC converter circuit topology design method, which solves the problems existing in the background technology.

[0008] To solve the above technical problems, this application adopts the following technical solution: This application provides a single-stage AC-DC converter circuit topology design method, including: Step 1, common circuit topology analysis: obtain the topology of each AC-DC converter circuit in the target area from the power management center, and perform performance analysis on the topology of each AC-DC converter circuit in the target area.

[0009] Step 2: Circuit Topology Optimization: Based on the existing AC-DC converter circuit topologies in the target area, design a single-stage AC-DC converter circuit topology, optimize the original circuit topologies in the target area, and analyze the workflow of the optimized single-stage AC-DC converter circuit topology.

[0010] Step 3: Circuit optimization effect evaluation: Perform performance analysis on the optimized single-stage AC-DC converter circuit, and compare the performance analysis results of the optimized single-stage AC-DC converter circuit topology with those of the original AC-DC converter circuit topologies.

[0011] The beneficial effects of this application are as follows: 1. This application provides a single-stage AC-DC converter circuit topology design method, which integrates a totem-pole bridgeless Boost power factor correction circuit and an LCC half-bridge resonant converter with current multiplier synchronous rectification into one through the switching transistor sharing technology. The totem-pole bridgeless Boost power factor correction (PFC) circuit includes... v in , L f , C b Two diodes D 1 and D 2 and two MOS switches S1 and S 2 The front-end of the LCC half-bridge resonant converter with current multiplier synchronous rectification includes two MOS switches. S 1 and S 2 Series resonant capacitor C r Parallel resonant capacitor C p and series resonant inductor L s The single-stage AC-DC converter circuit topology proposed in this application has the advantages of requiring only one controller in the front stage, simple control logic, fewer electronic components, low cost, high efficiency and high reliability. The rear stage has a current-doubling synchronous rectifier circuit, which has the advantages of high efficiency, low loss and suitability for high current output applications.

[0012] 2. The LED driver power supply circuit proposed in this application integrates a totem pole bridgeless Boost power factor correction (PFC) circuit and an LCC half-bridge resonant converter with current multiplier synchronous rectification through the switching transistor sharing technology. The proposed single-stage AC-DC converter circuit topology has the advantages of requiring only one controller, simple control logic, fewer electronic components, low cost and high reliability in the front stage. The rear stage with current multiplier synchronous rectification circuit has the advantages of high efficiency, low loss and suitability for high current output applications. Attached Figure Description

[0013] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0014] Figure 1 This is a flowchart illustrating the implementation steps of the method described in this application. Detailed Implementation

[0015] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0016] Reference Figure 1As shown, this application provides a single-stage AC-DC converter circuit topology design method, including the following steps: Step 1, analysis of common circuit topology: obtain the topology of each AC-DC converter circuit in the target area from the power management center, and perform performance analysis on each AC-DC converter circuit topology in the target area.

[0017] It should be noted that the specific scope of the target area is set by the relevant staff and is not specifically limited here.

[0018] In a specific example, the AC-DC converter circuit topologies include two-stage AC-DC converter circuit topologies and single-stage AC-DC converter circuit topologies.

[0019] It should be noted that the single-stage AC-DC converter circuit topology integrates the power factor correction (PFC) circuit and the DC-DC conversion circuit together through the switching transistor sharing technology, requiring only one controller on the primary side of the high-frequency transformer. The PFC circuit in the front stage of the two-stage AC-DC converter circuit generally uses basic circuits such as Boost, Cuk, Buck-Boost, and Sepic, but the two-stage AC-DC converter circuit topology has a larger number of semiconductor devices and greater semiconductor conduction losses.

[0020] It should be noted that an AC-DC converter typically consists of two stages of circuitry: a front-end PFC circuit and a rear-end DC-DC circuit. The front-end mainly performs power factor correction and provides a stable DC bus voltage for the rear-end. The rear-end converts the bus voltage into the required output voltage value to meet different needs.

[0021] In a specific example, the performance analysis of each AC-DC converter circuit topology within the target area is performed as follows: Operating parameters of each AC-DC converter circuit topology are obtained from the power management center. These operating parameters include electrical performance parameters, reliability parameters, and cost parameters. The operating parameters of each AC-DC converter circuit topology are denoted as follows: , and The standard values ​​for electrical performance parameters, reliability parameters, and cost parameters of the circuit are obtained from the power management center and denoted as follows: , and Where j is the number of each AC-DC converter circuit topology, and j is a positive integer, the operating parameters of each AC-DC converter circuit topology are substituted into the circuit topology performance evaluation model, and the expression of the circuit topology performance evaluation model is obtained: Performance evaluation coefficients for the AC-DC converter circuit topology with output number j ,in , and These represent the weighting factors corresponding to the electrical performance parameters, reliability parameters, and cost parameters of the AC-DC converter circuit topology, respectively.

[0022] It should be noted that the weighting factors of each performance parameter are obtained through the Analytic Hierarchy Process (AHP). The weighting factors of each performance parameter are obtained through steps such as constructing a hierarchical structure, constructing a judgment matrix, consistency testing, and weight calculation. The AHP is an existing technology and will not be described in detail here.

[0023] In a specific example, the process of obtaining the operating parameters of each AC-DC converter circuit topology is as follows: obtain the average output power and average input power of each AC-DC converter circuit during actual working hours from the power management center, and record the ratio of the average output power to the average input power as the electrical performance parameter of each AC-DC converter circuit topology.

[0024] The conducted and radiated noise of each AC-DC converter circuit under full load is obtained from the power management center. The conducted and radiated noise are then input into the circuit reliability analysis model, and the reliability parameters of each AC-DC converter circuit topology are output according to the circuit reliability analysis model expression.

[0025] Obtain the number and volume of components for each AC-DC converter circuit from the power management center, input the number and volume of components into the circuit cost analysis model, and output the cost parameters of each AC-DC converter circuit based on the circuit cost analysis model expression.

[0026] The number of communication interfaces for each AC-DC converter circuit is obtained from the power management center. The number of communication interfaces for each AC-DC converter circuit is then substituted into the circuit scalability parameter evaluation model. Based on the expression of the circuit scalability parameter evaluation model, the scalability parameters of each AC-DC converter circuit are output.

[0027] Step 2: Circuit Topology Optimization: Based on the existing AC-DC converter circuit topologies in the target area, design a single-stage AC-DC converter circuit topology, optimize the original circuit topologies in the target area, and analyze the workflow of the optimized single-stage AC-DC converter circuit topology.

[0028] In a specific example, a single-stage AC-DC converter circuit topology is designed based on the existing AC-DC converter circuit topologies within the target area. Specifically, it includes a totem-pole bridgeless Boost power factor correction (PFC) circuit and an LCC half-bridge resonant converter with current multiplier synchronous rectification.

[0029] In a specific example, the totem pole bridgeless boost power factor correction (PFC) circuit includes vin, Lf, Cb, two diodes D1 and D2, and two MOS switches S1 and S2, wherein... v in The AC mains input voltage for the bridgeless Boost power factor correction (PFC) circuit of the totem pole is... L f The energy storage inductor of the bridgeless Boost power factor correction (PFC) circuit for totem poles, the C b This is the output filter and energy storage capacitor for the bridgeless totem pole Boost power factor correction (PFC) circuit.

[0030] The LCC half-bridge resonant converter with synchronous rectification and current multiplier includes two MOS switches S1 and S2, two diodes D3 and D4, a series resonant capacitor Cr, a parallel resonant capacitor Cp, and a series resonant inductor Ls on the primary side, and two synchronous rectification MOS switches S3 and S4, current multiplier inductors L1 and L2, an output capacitor Co, and an equivalent load Ro on the secondary side. S 3 and S 4. Current multiplier inductor L1 and L2 This forms the center-tap full-wave rectifier circuit on the secondary side of T.

[0031] In a specific example, the two MOS switches S1 and S2 are shared switches for the totem-pole bridgeless Boost power factor correction (PFC) circuit and the LCC half-bridge resonant converter with current doubling synchronous rectification; the LCC half-bridge resonant converter with current doubling synchronous rectification has a transformer T, which is a high-frequency integrated transformer with a primary-to-secondary turns ratio of n. The LCC half-bridge resonant converter with current doubling synchronous rectification has a... C o The C o This is the output filter capacitor.

[0032] In a specific example, the workflow of the optimized single-stage AC-DC converter circuit topology is analyzed as follows: The bridgeless totem-pole boost power factor correction (PFC) circuit, composed of vin, Lf, Cb, two diodes D1 and D2, and two MOS switches S1 and S2, operates as follows: During the positive half-cycle, switch S1 is turned on, inductor Lf stores energy, inductor current i(Lf) rises linearly, freewheeling diode D2 is turned off, and capacitor C1's voltage drops, releasing energy. During the negative half-cycle, switch S1 is turned off, inductor Lf releases energy, inductor current i(Lf) decreases linearly, freewheeling diode D2 is turned on, and capacitor Cb's voltage rises, storing energy. The bridgeless totem-pole boost power factor correction (PFC) circuit operates in DCM mode, providing both power factor correction and boost functionality.

[0033] A half-bridge resonant converter with synchronous rectification and current multiplier, consisting of two MOS switches S1 and S2, a series resonant capacitor Cr, a parallel resonant capacitor Cp, and a series resonant inductor Ls, forms a half-bridge resonant circuit. This circuit converts the high-voltage DC VCb output from the totem-pole bridgeless Boost power factor correction (PFC) circuit into a high-frequency square wave AC. A high-frequency transformer T with a primary-to-secondary turns ratio n provides electrical isolation and energy transfer. The rectifier circuit, consisting of two synchronous rectification MOS switches S3 and S4 with a center tap on the secondary side of the high-frequency integrated transformer T, and current multiplier inductors L1 and L2, converts the high-frequency AC square wave into a high-frequency pulsating DC. After passing through the filter capacitor Co, the DC power that meets the requirements is supplied to the load Ro.

[0034] Step 3: Circuit optimization effect evaluation: Perform performance analysis on the optimized single-stage AC-DC converter circuit, and compare the performance analysis results of the optimized single-stage AC-DC converter circuit topology with those of the original AC-DC converter circuit topologies.

[0035] In a specific example, the performance analysis of the optimized single-stage AC-DC converter circuit is performed as follows: the optimized single-stage AC-DC converter circuit topology is put into use in the target area, and after a preset time period, the operating parameters of the optimized single-stage AC-DC converter circuit topology are obtained from the power management center. The operating parameters of the optimized single-stage AC-DC converter circuit topology are then substituted into the operating performance evaluation model of the circuit topology, and the operating performance evaluation coefficients of the optimized single-stage AC-DC converter circuit topology are output through the operating performance evaluation model expression.

[0036] It should be noted that the preset time period is set by the relevant staff, and will not be elaborated here.

[0037] It should be noted that the calculation method for the performance evaluation coefficient of the optimized single-stage AC-DC converter circuit topology is the same as that for the performance evaluation coefficient of each AC-DC converter circuit topology before optimization, so it will not be repeated here.

[0038] In a specific example, the process of comparing the performance analysis results of the optimized single-stage AC-DC converter circuit topology with those of the original AC-DC converter circuit topologies is as follows: The performance evaluation coefficient of the optimized single-stage AC-DC converter circuit topology is compared with that of the original AC-DC converter circuit topologies. The number of original AC-DC converter circuit topologies whose performance evaluation coefficient is less than that of the optimized single-stage AC-DC converter circuit topology is then determined. When the number of original AC-DC converter circuit topologies whose performance evaluation coefficient is less than that of the optimized single-stage AC-DC converter circuit topology is greater than or equal to half the total number of original AC-DC converter circuit topologies, it indicates that the optimized single-stage AC-DC converter circuit topology performs better, and the optimized single-stage AC-DC converter circuit topology is used to replace the original AC-DC converter circuit topology within the target area.

[0039] It should be noted that by replacing the original AC-DC converter circuit topology in the target area with an optimized single-stage AC-DC converter circuit topology, this application greatly reduces the number of electronic components, lowers the construction cost of the circuit topology, and improves the working efficiency of the circuit.

[0040] This application provides a single-stage AC-DC converter circuit topology design method that integrates a totem-pole bridgeless Boost power factor correction circuit and an LCC half-bridge resonant converter with current multiplier synchronous rectification through a shared switching transistor technique. The totem-pole bridgeless Boost power factor correction (PFC) circuit includes... v in , L f , C b Two diodes D 1 and D 2 and two MOS switches S 1 and S 2 The front-end of the LCC half-bridge resonant converter with current multiplier synchronous rectification includes two MOS switches. S 1 and S 2Series resonant capacitor C r Parallel resonant capacitor C p and series resonant inductor L s The single-stage AC-DC converter circuit topology proposed in this application has the advantages of requiring only one controller in the front stage, simple control logic, fewer electronic components, low cost, high efficiency and high reliability. The rear stage has a current-doubling synchronous rectifier circuit, which has the advantages of high efficiency, low loss and suitability for high current output applications.

[0041] The above content is merely an example and illustration of the concept of this application. Those skilled in the art can make various modifications or additions to the specific embodiments described or use similar methods to replace them, as long as they do not deviate from the inventive concept or exceed the scope defined in this application, they should all fall within the protection scope of this application.

Claims

1. A method of single-stage AC-DC converter circuit topology design, characterized by, The method comprises the following steps: Step 1: Common circuit topology analysis: obtaining the AC-DC converter circuit topology structure in the target area from the power management center, and performing performance analysis on the AC-DC converter circuit topology structure in the target area; The performance analysis on the AC-DC converter circuit topology structure in the target area is as follows: obtaining the working parameters of each AC-DC converter circuit topology from the power management center, wherein the working parameters include electrical performance parameters, reliability parameters and cost parameters, and the working parameters of each AC-DC converter circuit topology are respectively denoted as , and , and obtaining the standard values of the electrical performance parameters, the reliability parameters and the cost parameters of the circuit from the power management center, respectively denoted as , and , wherein j is the number of each AC-DC converter circuit topology, and j is a positive integer, substituting the working parameters of each AC-DC converter circuit topology into the working performance evaluation model of the circuit topology, and expressing the working performance evaluation model of the circuit topology by the expression: outputting the working performance evaluation coefficient of the AC-DC converter circuit topology numbered j , wherein , and respectively represent the weight factor corresponding to the electrical performance parameters of the AC-DC converter circuit topology, the weight factor corresponding to the reliability parameters, and the weight factor corresponding to the cost parameters; Step 2: Circuit topology optimization: designing a single-stage AC-DC converter circuit topology based on the AC-DC converter circuit topology structure in the target area, optimizing the original circuit topology in the target area, and analyzing the working process of the optimized single-stage AC-DC converter circuit topology; Step 3: Circuit optimization effect evaluation: performance analysis on the optimized single-stage AC-DC converter circuit, and comparison of the performance analysis results of the optimized single-stage AC-DC converter circuit topology structure and the original AC-DC converter circuit topology structure; The performance analysis on the optimized single-stage AC-DC converter circuit is as follows: the optimized single-stage AC-DC converter circuit topology structure is put into use in the target area, and after a preset time period, the working parameters of the optimized single-stage AC-DC converter circuit topology are obtained from the power management center, and the working parameters of the optimized single-stage AC-DC converter circuit topology are substituted into the working performance evaluation model of the circuit topology structure, and the working performance evaluation coefficient of the optimized single-stage AC-DC converter circuit topology structure is output through the expression of the working performance evaluation model of the circuit topology structure; The comparison of the performance analysis results of the optimized single-stage AC-DC converter circuit topology structure and the original AC-DC converter circuit topology structure is as follows: the working performance evaluation coefficient of the optimized single-stage AC-DC converter circuit topology structure is compared with the working performance evaluation coefficient of the original AC-DC converter circuit topology structure, and then the number of the original AC-DC converter circuit topology structures whose working performance evaluation coefficient is less than the working performance evaluation coefficient of the optimized single-stage AC-DC converter circuit topology structure is obtained, and when the number of the original AC-DC converter circuit topology structures whose working performance evaluation coefficient is less than the working performance evaluation coefficient of the optimized single-stage AC-DC converter circuit topology structure is greater than or equal to half of the total number of the original AC-DC converter circuit topology structures, it indicates that the optimized single-stage AC-DC converter circuit topology structure is better, and the optimized single-stage AC-DC converter circuit topology structure is used to replace the original AC-DC converter circuit topology structure in the target area.

2. The method of claim 1, wherein the single-stage AC-DC converter circuit topology design method is characterized by, The AC-DC converter circuit topology structure in the target area comprises a two-stage AC-DC converter circuit topology and a single-stage AC-DC converter circuit topology.

3. The method of claim 2, wherein the single-stage AC-DC converter circuit topology design method is characterized by, The working parameters of the AC-DC converter circuit topology structure are obtained as follows: The average output power and the average input power of each AC-DC converter circuit are obtained from the power management center, and the ratio of the average output power to the average input power is recorded as an electrical performance parameter corresponding to the topology of each AC-DC converter circuit; The circuit conducted noise and the circuit radiated noise of each AC-DC converter circuit at full load are obtained from the power management center, and the circuit conducted noise and the circuit radiated noise are input into a circuit reliability analysis model, and then the reliability parameter of the topology of each AC-DC converter circuit is output according to the expression of the circuit reliability analysis model; The number and volume of elements of each AC-DC converter circuit are obtained from the power management center, and the number and volume of elements are input into a circuit cost analysis model, and the cost parameter of each AC-DC converter circuit is output according to the expression of the circuit cost analysis model; The number of communication interfaces of each AC-DC converter circuit is obtained from the power management center, and the number of communication interfaces of each AC-DC converter circuit is substituted into a circuit scalability parameter evaluation model, and the scalability parameter of each AC-DC converter circuit is output according to the expression of the circuit scalability parameter evaluation model.

4. The method of claim 3, wherein the single-stage AC-DC converter circuit topology design method is characterized by, A single-stage AC-DC converter circuit topology is designed based on the topology of each AC-DC converter circuit in the target area, specifically including a totem-pole bridgeless Boost power factor correction (PFC) circuit and a LCC half-bridge resonant converter with synchronous rectification.

5. The method of claim 4, wherein the single-stage AC-DC converter circuit topology design method is characterized by: The totem column bridgeless Boost power factor correction PFC circuit includes vin, Lf, Cb, two diodes D1 and D2 and two MOS switch tubes S1 and S2, wherein v in For the AC mains input voltage of the totem column bridgeless Boost power factor correction PFC circuit, the L f For the energy storage inductance of the totem column bridgeless Boost power factor correction PFC circuit, the C b For the output filter energy storage capacitor of the bridgeless totem column Boost power factor correction PFC circuit; The LCC half-bridge resonant converter integrated transformer primary side includes two MOS switch tubes S1, S2, two diodes D3 and D4, a series resonant capacitor Cr, a parallel resonant capacitor Cp and a series resonant inductor Ls, the secondary side includes two synchronous rectification MOS switch tubes S3 and S4, current doubling inductors L1 and L2, an output capacitor Co and an equivalent load Ro, wherein the two synchronous rectification MOS switch tubes S 3 and S 4, the current doubling inductor L1 and L2 constitute the intermediate tap full-wave rectification circuit of the secondary side of T.

6. The method of claim 5, wherein the single-stage AC-DC converter circuit topology design method is characterized by, The two MOS switch tubes S1 and S2 are common switch tubes of a totem pole bridgeless Boost power factor correction (PFC) circuit and an LCC half-bridge resonant converter with current doubling synchronous rectification; the LCC half-bridge resonant converter with current doubling synchronous rectification is provided with a T, the T is a high-frequency integrated transformer with a primary and secondary winding ratio n of the LCC half-bridge resonant converter with current doubling synchronous rectification, wherein the LCC half-bridge resonant converter with current doubling synchronous rectification is provided with C o , the C o is an output filter capacitor.

7. The method of claim 6, wherein the single-stage AC-DC converter circuit topology design method is characterized by, The working process of the optimized single-stage AC-DC converter circuit topology is analyzed, and the specific analysis process is as follows: The totem-pole bridgeless Boost PFC circuit composed of vin, Lf, Cb, two diodes D1 and D2, and two MOS switch tubes S1 and S2 works as follows: in the positive half cycle, the switch tube S1 is turned on, the inductor Lf stores energy, the inductor current i(Lf) linearly rises, the freewheeling diode D2 is turned off, and the capacitor C1 voltage drops to release energy; in the negative half cycle, the switch tube S1 is turned off, the inductor Lf releases energy, the inductor current i(Lf) linearly drops, the freewheeling diode D2 is turned on, and the capacitor Cb voltage rises to store energy. The totem-pole bridgeless Boost PFC circuit works in the DCM state and has the functions of power factor correction and voltage boosting. The LCC half-bridge resonant converter with synchronous rectification composed of two MOS switch tubes S1 and S2, series resonant capacitor Cr, parallel resonant capacitor Cp, and series resonant inductor Ls forms a half-bridge resonant circuit, converts the high-voltage DC VCb output by the totem-pole bridgeless Boost PFC circuit into a high-frequency square-wave AC, and the high-frequency transformer T with a primary-to-secondary turns ratio n has the functions of electrical isolation and energy transmission. The rectifier circuit composed of the two synchronous rectification MOS switch tubes S3 and S4, the current doubling inductors L1 and L2 in the middle tap of the secondary side of the high-frequency integrated transformer T converts the high-frequency AC square wave into a high-frequency pulsating DC, and the required DC is supplied to the load Ro after being filtered by the capacitor Co.

Citation Information

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