Terahertz power synthesis frequency multiplier based on double-sided process and preparation method thereof

Abstract

The invention discloses a terahertz power synthesis frequency multiplier based on a double-sided process and a preparation method of the terahertz power synthesis frequency multiplier, and can obtain an appropriate terahertz power synthesis frequency multiplier based on the double-sided process. The first frequency multiplication circuit and the second frequency multiplication circuit on the two sides of the double-sided frequency multiplication circuit can be used for carrying out frequency multiplication processing on terahertz fundamental frequency signals respectively, the two groups of frequency multiplication signals are coupled to the same output waveguide through respective output probes, so that power synthesis is realized, the power limitation of a single frequency multiplication circuit can be broken through, and the frequency multiplication efficiency is improved. Therefore, higher terahertz signal frequency multiplication power is realized; moreover, the circuit structures of the first frequency multiplication circuit and the second frequency multiplication circuit are symmetrical, so that the phases of the frequency multiplication signals of the first frequency multiplication circuit and the second frequency multiplication circuit are consistent, the phases of the frequency multiplication signals and the phases of the fundamental frequency signals have the same reference, and the integrity of the signals is guaranteed. The terahertz circuit is widely applied to the technical field of terahertz circuits.

Description

Technical Field

[0001] The present invention relates to the technical field of terahertz circuits, and in particular to a terahertz power synthesis frequency multiplier based on a double-sided process and a preparation method thereof. Background Art

[0002] Terahertz (THz) generally refers to electromagnetic waves with frequencies between 0.1THz and 10THz and wavelengths between 0.03mm and 3mm. Its spectrum lies in the unique region where macroscopic classical theory transitions to microscopic quantum theory. THz possesses many unique properties that distinguish it from other electromagnetic waves, such as high frequency, wide bandwidth, small beam divergence, strong transmittance, and good biocompatibility. Due to its unique optical and electrical properties, THz technology holds broad application prospects in astrophysics, biomedicine, nondestructive testing, secure communications, explosives detection, body security screening, fire monitoring, and national defense security.

[0003] Terahertz communications often require frequency multiplication of terahertz signals, so terahertz frequency multipliers play a crucial role in the development of terahertz technology. However, current terahertz frequency multipliers are often limited by device limitations, resulting in low-power terahertz signals. Summary of the Invention

[0004] In view of the technical problems that current terahertz frequency multipliers are difficult to perform high-power terahertz signal frequency multiplication, the purpose of the present invention is to provide a terahertz power synthesis frequency multiplier based on a double-sided process and a preparation method thereof.

[0005] In one aspect, an embodiment of the present invention includes a terahertz power combining frequency multiplier based on a double-sided process, the terahertz power combining frequency multiplier based on a double-sided process including:

[0006] frequency multiplier cavity;

[0007] A double-sided frequency doubling circuit; the double-sided frequency doubling circuit includes a substrate, a first frequency doubling circuit, and a second frequency doubling circuit, the first frequency doubling circuit being located on the epitaxial gallium nitride surface of the substrate, the second frequency doubling circuit being located on the substrate surface of the substrate, the circuit structure of the first frequency doubling circuit and the circuit structure of the second frequency doubling circuit being symmetrical about the plane where the substrate is located; the double-sided frequency doubling circuit is integrally mounted inside the frequency doubling cavity.

[0008] Furthermore, the frequency multiplier cavity includes an input waveguide, a frequency multiplying circuit cavity and an output waveguide; the input waveguide, the frequency multiplying circuit cavity and the output waveguide are all hollow structures and are connected in sequence with the cavities connected;

[0009] The input waveguide includes a first standard rectangular waveguide and a two-stage input reduced width and height waveguide;

[0010] The output waveguide includes a second standard rectangular waveguide and a two-stage output reduced-width and reduced-height waveguide.

[0011] Furthermore, the first frequency multiplication circuit and the second frequency multiplication circuit respectively include a Schottky diode chain, a microstrip line matching and an output probe;

[0012] For either the first frequency doubling circuit or the second frequency doubling circuit, one end of the microstrip line matching is connected to the anode of the Schottky diode chain, and the other end of the microstrip line matching is connected to one end of the output probe.

[0013] Furthermore, the Schottky diode chain includes a first Schottky diode series group and a second Schottky diode series group, wherein the first Schottky diode series group and the second Schottky diode series group each include a plurality of Schottky diodes connected in series in a forward direction, and the first Schottky diode series group and the second Schottky diode series group are connected in series in a reverse direction;

[0014] The cathode of the Schottky diode chain is electrically connected to the frequency multiplier cavity.

[0015] Furthermore, the Schottky diode chain is configured to operate in a reverse bias state;

[0016] The first frequency multiplication circuit and the second frequency multiplication circuit further include a DC bias filter respectively;

[0017] For any one of the first frequency multiplication circuit and the second frequency multiplication circuit, the DC bias filter is connected to the other end of the output probe.

[0018] Furthermore, the input waveguide and the double-sided frequency doubling circuit are both located on a first straight line;

[0019] The output waveguide is located on a second straight line;

[0020] The output probe is located at the intersection of the first straight line and the second straight line;

[0021] One end of the Schottky diode chain in the double-sided frequency doubling circuit faces the input waveguide;

[0022] The first straight line is perpendicular to the second straight line.

[0023] Furthermore, the preparation method of the terahertz power synthesis frequency multiplier based on the double-sided process includes the following steps:

[0024] Using copper material to make the frequency multiplier cavity;

[0025] Fabricating the first frequency doubling circuit on the epitaxial gallium nitride surface of the substrate through monolithic integration;

[0026] Fabricating the second frequency doubling circuit on the substrate surface of the substrate through hybrid integration;

[0027] cutting the first frequency multiplying circuit, the second frequency multiplying circuit and the corresponding substrate to obtain the double-sided frequency multiplying circuit;

[0028] The double-sided frequency doubling circuit is installed inside the frequency doubling cavity.

[0029] Furthermore, the manufacturing of the first frequency doubling circuit on the epitaxial gallium nitride surface of the substrate through monolithic integration includes the following steps:

[0030] Using silicon carbide material as the substrate;

[0031] Growing an epitaxial layer on the epitaxial gallium nitride surface of the substrate; from the substrate outward, the epitaxial layer includes a high-resistance buffer layer, a heavily doped gallium nitride epitaxial layer and a lightly doped gallium nitride epitaxial layer in sequence;

[0032] After cleaning the epitaxial layer, coating the epitaxial layer with photoresist, etching the epitaxial layer to form a mesa by ICP, and forming a first microstrip line circuit area on the substrate;

[0033] performing ICP etching and evaporating ohmic metal on the heavily doped gallium nitride epitaxial layer, partially stripping the evaporated ohmic metal through a lift-off process, and performing rapid thermal annealing on the evaporated ohmic metal to form a cathode of a Schottky diode;

[0034] Photoresist is coated on the mesa and the first microstrip line circuit area, metal is evaporated in the developed area after the photoresist is developed, the coated photoresist is retained and photoresist is coated again and developed, a metal layer is formed in the developed area by electrochemical plating, and excess metal is removed by a lift-off process to obtain a THz Schottky diode and a microstrip line with an air bridge structure; the microstrip line forms the microstrip line matching, output probe and DC bias filter in the first frequency doubling circuit.

[0035] Furthermore, the second frequency doubling circuit is fabricated on the substrate surface of the substrate by hybrid integration, comprising the following steps:

[0036] performing a thinning process on a substrate surface of the substrate;

[0037] Performing metal evaporation and electroplating thickening on the substrate surface of the substrate to form microstrip line matching, output probe and DC bias filter in the second frequency doubling circuit;

[0038] Get the Schottky diode chain chip;

[0039] The anode of the Schottky diode chain chip is bonded to the microstrip line matching in the second frequency doubling circuit by conductive glue to obtain the second frequency doubling circuit.

[0040] The beneficial effects of the present invention are as follows: the terahertz power synthesis frequency multiplier based on the double-sided process and the preparation method thereof in the embodiment can obtain a suitable terahertz power synthesis frequency multiplier based on the double-sided process, wherein by setting a double-sided frequency multiplication circuit, the first frequency multiplication circuit and the second frequency multiplication circuit on both sides of the double-sided frequency multiplication circuit can be used to perform frequency multiplication processing on the terahertz fundamental frequency signal respectively, and the two groups of frequency multiplication signals are coupled to the same output waveguide through their respective output probes, thereby realizing power synthesis, and breaking through the power limit of a single frequency multiplication circuit, thereby realizing a larger terahertz signal frequency multiplication power; moreover, the circuit structures of the first frequency multiplication circuit and the second frequency multiplication circuit are symmetrical, so that the phases of the frequency multiplication signals of the first frequency multiplication circuit and the second frequency multiplication circuit can be consistent, so that the phases of the frequency multiplication signals and the phases of the fundamental frequency signal have the same reference, thereby ensuring the integrity of the signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 Schematic diagram of the overall structure of a terahertz power synthesis frequency multiplier based on a double-sided process in an embodiment;

[0042] Figure 2 Schematic diagram of the structure of the frequency multiplier cavity in the embodiment;

[0043] Figure 3 Schematic diagram of the structure of the double-sided frequency doubling circuit in the embodiment;

[0044] Figure 4 Schematic diagram of the structure of the first frequency doubling circuit in the double-sided frequency doubling circuit in the embodiment;

[0045] Figure 5 Schematic diagram of the structure of a GaN-based terahertz Schottky diode during the monolithic integration process in the embodiment. DETAILED DESCRIPTION

[0046] Explanation of terms:

[0047] Terahertz: Terahertz, THz, usually refers to electromagnetic waves with frequencies between 0.1THz and 10THz. The wavelength corresponding to this frequency range is approximately between 30 microns and 3 mm. Its frequency band is at the intersection of electricity and optics.

[0048] Monolithic integration: In monolithic integration, different electronic components or functional blocks are typically fabricated by sharing the same semiconductor wafer. Multiple components or functional blocks are integrated onto the same semiconductor wafer, eliminating the need for separate fabrication and assembly. This technology offers the advantage of reducing connections and wire lengths between components, lowering power consumption, minimizing manual assembly errors, improving performance, and reducing overall size.

[0049] Hybrid integration: Different electronic components or functional blocks are prepared separately and then assembled.

[0050] In this embodiment, a terahertz power synthesis frequency multiplier based on a double-sided process is provided. Figure 1 The terahertz power synthesis frequency multiplier based on the double-sided process includes a frequency multiplier cavity and a double-sided frequency multiplication circuit.

[0051] Reference Figure 1 The frequency multiplier cavity includes an input waveguide, a frequency multiplication circuit cavity 7, and an output waveguide. The input waveguide, the frequency multiplication circuit cavity 7, and the output waveguide are all hollow structures, connected together in sequence, and their cavities are connected.

[0052] In this embodiment, the specific structure of the frequency multiplier cavity is as follows: Figure 2 shown. Figure 2 It can be regarded as a cross-sectional view of the frequency multiplier cavity. Figure 2 The input waveguide includes a first standard rectangular waveguide 1 and a two-stage input reduced width and height waveguide 2. Figure 2 The output waveguide includes a second standard rectangular waveguide 5 and a two-stage output reduced width and height waveguide 4.

[0053] Reference Figure 2 The first standard rectangular waveguide 1 is connected to the two-stage input reduced width and height waveguide 2, and the second standard rectangular waveguide 5 is connected to the two-stage output reduced width and height waveguide 4.

[0054] Reference Figure 2 The two-stage input reduced-width and reduced-height waveguide 2 connects to the frequency-doubling circuit cavity 7, which in turn connects to the two-stage output reduced-width and reduced-height waveguide 4. The two-stage input reduced-width and reduced-height waveguide 2 terminates at a location called a waveguide short-circuit 2-1. The distance between waveguide short-circuit 2-1 and the center of the Schottky diode chain on the double-sided frequency-doubling circuit is a quarter wavelength. This short-circuit 2-1 also connects the second waveguide 2-2 to the frequency-doubling circuit cavity 7. The frequency-doubling circuit cavity 7 serves as a space for the double-sided frequency-doubling circuit.

[0055] Reference Figure 1 and Figure 2The cavity between the frequency-doubling circuit cavity 7 and the two-stage output reduced-width and height waveguide 4 is where the output probe 3-1-3 of the double-sided frequency-doubling circuit is located. The distance between the waveguide short-circuit 2-1 of the two-stage output reduced-width and height waveguide 4 and the output probe 3-1-3 of the double-sided frequency-doubling circuit is a quarter of a wavelength.

[0056] Reference Figure 2 The extension direction of the frequency doubling circuit cavity 7 is the same as that of the two-stage input width-reduced and height-reduced waveguide 2, which is also the first straight line, that is, the extension direction of the frequency doubling circuit cavity 7 is perpendicular to the extension direction of the two-stage output width-reduced and height-reduced waveguide 4 body.

[0057] In this embodiment, the structure of the double-sided frequency doubling circuit is as follows: Figure 3 As shown. Figure 3 The double-sided frequency doubling circuit includes a substrate 3-3, a first frequency doubling circuit 3-1, and a second frequency doubling circuit 3-2. The first frequency doubling circuit 3-1 is located on the epitaxial gallium nitride surface of the substrate 3-3, and the second frequency doubling circuit 3-2 is located on the substrate surface of the substrate 3-3. Figure 1 , Figure 3 The double-sided frequency multiplying circuit shown is integrally mounted inside the frequency multiplier cavity.

[0058] In this embodiment, the circuit structures of the first frequency multiplying circuit 3 - 1 and the second frequency multiplying circuit 3 - 2 are the same, and the first frequency multiplying circuit 3 - 1 is taken as an example for description.

[0059] In this embodiment, the specific circuit structure of the first frequency multiplication circuit 3-1 is as follows: Figure 4 As shown. Figure 4 The first frequency multiplication circuit 3-1 includes a Schottky diode chain 3-1-1, a microstrip line matching 3-1-2 and an output probe 3-1-3. Figure 4 ,, the Schottky diode chain 3-1-1 is composed of a first Schottky diode series group and a second Schottky diode series group connected in series, wherein the first Schottky diode series group includes 3 Schottky diodes, which are connected in series in the forward direction (that is, the anode of one Schottky diode is connected to the cathode of another Schottky diode). Similarly, the second Schottky diode series group also includes 3 Schottky diodes, which are also connected in series in the forward direction, while the first Schottky diode series group and the second Schottky diode series group are connected in reverse series (that is, the anode of the first Schottky diode series group is connected to the anode of the second Schottky diode series group). Figure 4 In the Schottky diode chain 3-1-1, the connection point between the first Schottky diode series group and the second Schottky diode series group (i.e., their anodes) is the anode of the Schottky diode chain 3-1-1, and the cathode of the first Schottky diode series group and the second Schottky diode series group is the cathode of the Schottky diode chain 3-1-1.

[0060] In this embodiment, refer to Figure 4 In the first frequency doubling circuit 3-1, the anode of the Schottky diode chain 3-1-1 is connected to one end of the microstrip line matching 3-1-2. Figure 3 The double-sided frequency multiplying circuit shown is entirely placed inside the frequency multiplier cavity, the cathode of the Schottky diode chain 3-1-1 is electrically connected to the frequency multiplier cavity, and the frequency multiplier cavity can be grounded.

[0061] In this embodiment, the circuit structure of the first frequency doubling circuit 3-1 and the circuit structure of the second frequency doubling circuit 3-2 are symmetrical about the plane where the substrate 3-3 is located. Figure 4 The circuit structure of the first frequency multiplication circuit 3-1 is shown in FIG. Figure 4 That is, when viewed perpendicular to the substrate 3-3, the microstrip line matching 3-1-2 in the first frequency doubling circuit 3-1 and the microstrip line matching in the second frequency doubling circuit 3-2 are overlapped, and the output probe 3-1-3 in the first frequency doubling circuit 3-1 and the output probe in the second frequency doubling circuit 3-2 are also overlapped. Figure 4 In the case where the first frequency multiplication circuit 3-1 is further provided with a DC bias filter 3-1-4, the DC bias filter 3-1-4 in the first frequency multiplication circuit 3-1 and the DC bias filter in the second frequency multiplication circuit 3-2 also overlap in position.

[0062] In this embodiment, when the terahertz power synthesis frequency multiplier based on the double-sided process is working, it is best to set the Schottky diode chain in a reverse bias state. At this time, the Schottky diode chain needs to be connected to an external DC bias circuit. Such a DC bias transmission path is likely to cause leakage of the frequency multiplier signal, thereby causing loss. Therefore, it can be Figure 4 As shown, a DC bias filter 3-1-4 is provided in the first frequency multiplication circuit 3-1, and similarly, a DC bias filter is also provided at a corresponding position in the second frequency multiplication circuit 3-2. Figure 4 , one end of the DC bias filter 3-1-4 is connected to the other end of the output probe 3-1-3.

[0063] In this embodiment, the straight line along which the input waveguide extends is referred to as the first straight line. Similarly, the straight line along which the output waveguide extends is referred to as the second straight line. Furthermore, the overall shape of the double-sided frequency doubling circuit in this embodiment is a rectangle, with its longitudinal direction being its extension direction.

[0064] Reference Figure 1The double-sided frequency doubling circuit is located on the first straight line, that is, the extension direction of the double-sided frequency doubling circuit 3 is on the first straight line, which makes most of the double-sided frequency doubling circuit inside the second waveguide 2-2, and another part (specifically, the part where the DC bias filter is located) is located inside the frequency doubling circuit cavity 7.

[0065] Reference Figure 1 The first and second lines are perpendicular, so the second waveguide 2-2 and the third waveguide 4-1 extend perpendicularly. The output probe 3-1-3 in the first frequency-doubling circuit 3-1 and the output probe in the second frequency-doubling circuit 3-2 are both located at the intersection of the first and second lines, where the frequency-doubling circuit cavity 7 overlaps with the cavity of the third waveguide 4-1. Furthermore, the end of the Schottky diode chain in the double-sided frequency-doubling circuit 3 faces the input waveguide.

[0066] The working principle of the terahertz power synthesis frequency multiplier based on the double-sided process in this embodiment is as follows: when the terahertz fundamental frequency signal is input from the input waveguide (specifically, it can be TE 10 Mode input), the terahertz fundamental frequency signal passes through the two-stage input width-reduction and height-reduction waveguide 2, and is coupled to the front and back sides of the double-sided frequency doubling circuit 3, acting on the Schottky diode chain in the first frequency doubling circuit 3-1 and the Schottky diode chain in the second frequency doubling circuit 3-2 respectively; taking the first frequency doubling circuit 3-1 as an example, due to the nonlinear effect of the Schottky diode chain, the Schottky diode chain 3-1-1 on the first frequency doubling circuit 3-1 will generate a harmonic signal, and the harmonic signal is transmitted to the microstrip line matching 3-1-2 in a quasi-TEM mode, and the microstrip line matching 3-1-2 extracts the second harmonic from the harmonic signal, filters out signals of other frequencies, and transmits the second harmonic signal in the form of TE through the output probe microstrip line matching 3-1-3. 10 The mode is transmitted to the output two-stage output width-reduction and height-reduction waveguide 4, and finally enters the output waveguide, thereby realizing the frequency doubling processing of the terahertz fundamental frequency signal; and the second frequency doubling circuit 3-2 also performs the same processing process as the first frequency doubling circuit 3-1, that is, the output probe in the second frequency doubling circuit 3-2 also outputs the frequency doubling signal power, and the frequency doubling signal powers output by the output probes of the first frequency doubling circuit 3-1 and the second frequency doubling circuit 3-2 are combined, so as to achieve output power equal to input power within the loss error range.

[0067] The terahertz power synthesis frequency multiplier based on the double-sided process in this embodiment, by setting up a double-sided frequency multiplication circuit, can use the first frequency multiplication circuit and the second frequency multiplication circuit on both sides of the double-sided frequency multiplication circuit to perform frequency multiplication processing on the terahertz fundamental frequency signal respectively. The two sets of frequency multiplication signals are coupled to the same output waveguide through their respective output probes, thereby realizing power synthesis, which can break through the power limitation of a single frequency multiplication circuit and thus achieve a higher terahertz signal frequency multiplication power; moreover, the circuit structures of the first frequency multiplication circuit and the second frequency multiplication circuit are symmetrical, so that the phases of the frequency multiplication signals of the first frequency multiplication circuit and the second frequency multiplication circuit can be consistent, so that the phases of the frequency multiplication signals and the phases of the fundamental frequency signal have the same reference, thereby ensuring the integrity of the signal.

[0068] The terahertz power synthesis frequency multiplier based on the double-sided process in this embodiment can be manufactured by the following steps:

[0069] S1. Use copper material to make the frequency multiplier cavity;

[0070] S2. Fabricate a first frequency doubling circuit on the epitaxial GaN surface of the substrate through monolithic integration;

[0071] S3. Through hybrid integration, a second frequency doubling circuit is produced on the substrate surface of the substrate;

[0072] S4. Cutting out the first frequency multiplier circuit, the second frequency multiplier circuit and the corresponding substrate to obtain a double-sided frequency multiplier circuit;

[0073] S5. Install the double-sided frequency multiplication circuit inside the frequency multiplier cavity.

[0074] In step S1, a frequency multiplier cavity of a corresponding shape can be cast using copper material, and the surface of the copper material can also be gold-plated.

[0075] In executing step S2, that is, the step of fabricating a first frequency doubling circuit on the epitaxial gallium nitride surface of the substrate through monolithic integration, the following steps are specifically included:

[0076] Furthermore, a first frequency doubling circuit is fabricated on the epitaxial gallium nitride surface of the substrate through monolithic integration, comprising the following steps:

[0077] S201. Growing an epitaxial layer on the epitaxial gallium nitride surface of the substrate; from the substrate outward, the epitaxial layer includes a high-resistance buffer layer, a heavily doped gallium nitride epitaxial layer, and a lightly doped gallium nitride epitaxial layer;

[0078] S202. After cleaning the epitaxial layer, a photoresist is applied, the epitaxial layer is etched by ICP to form a mesa, and a first microstrip circuit region is formed on the substrate;

[0079] S203. The heavily doped gallium nitride epitaxial layer is subjected to ICP etching and evaporation of ohmic metal, the evaporated ohmic metal is partially stripped by a lift-off process, and the evaporated ohmic metal is subjected to rapid thermal annealing to form a cathode of a Schottky diode;

[0080] S204. Coat the mesa and the first microstrip line circuit area with photoresist, evaporate metal in the developed area after the photoresist is developed, retain the coated photoresist and coat the photoresist again and develop it, form a metal layer in the developed area by electrochemical plating, remove excess metal by a lift-off process, and obtain a THz Schottky diode and microstrip line with an air bridge structure.

[0081] The principles of steps S201-S204 are as follows: Figure 5 shown.

[0082] In step S201, an epitaxial layer is grown on the epitaxial gallium nitride surface (e.g., the front surface) of the SiC substrate. Figure 5 In part (a), from the surface of the substrate 6-1 outward, the epitaxial layer includes a high-resistance buffer layer 6-2, a heavily doped gallium nitride epitaxial layer 6-3 and a lightly doped gallium nitride epitaxial layer 6-4.

[0083] In step S202, refer to Figure 5 In part (b), the epitaxial layer is cleaned and then coated with photoresist. A mesa is etched on the epitaxial layer using ICP (inductively coupled plasma etching). This step also forms the first microstrip circuit area on the epitaxial gallium nitride surface of the substrate.

[0084] In step S203, the heavily doped gallium nitride epitaxial layer 6-3 is subjected to ICP etching and evaporation of ohmic metal, the evaporated ohmic metal is partially stripped by a lift-off process, and the evaporated ohmic metal is subjected to rapid thermal annealing to form Figure 5 The cathode 6-5 of the Schottky diode is shown in part (c).

[0085] In step S204, photoresist is applied to the mesa and the first microstrip line circuit area obtained in step S202, and metal is evaporated in the developed area after the photoresist is developed. The applied photoresist is retained and photoresist is applied again and developed. A metal layer is formed by electrochemical plating in the developed area that has been developed again. The excess metal is removed by a lift-off process to obtain the THz Schottky diode 6-7 and the microstrip line of the air bridge structure. That is, in step S204, the THz Schottky diode and the microstrip line of the air bridge structure are formed at the same time, and the shape of the microstrip line is Figure 4 The microstrip line in the figure matches the shapes of 3-1-2, the output probe 3-1-3 and the DC bias filter 3-1-4, so the microstrip line formed becomes Figure 4Microstrip line matching 3-1-2, output probe 3-1-3 and DC bias filter 3-1-4.

[0086] In step S204, multiple THz Schottky diodes with air bridge structures are connected in series to form a Schottky diode chain 3-1-1 in the first frequency doubling circuit 3-1, and the microstrip line forms the microstrip line matching 3-1-2, output probe 3-1-3 and DC bias filter 3-1-4 in the first frequency doubling circuit 3-1.

[0087] By executing steps S201-S204, the first frequency doubling circuit 3-1 (including both the Schottky diode chain 3-1-1 and the microstrip line parts such as the microstrip line matching 3-1-2, the output probe 3-1-3 and the DC bias filter 3-1-4) can be directly manufactured on the epitaxial gallium nitride surface of the substrate in the form of monolithic integration. This process does not require manual assembly and can effectively avoid positional errors caused by manual assembly.

[0088] In this embodiment, when executing step S3, that is, the step of fabricating the second frequency doubling circuit on the substrate surface through hybrid integration, the following steps may be specifically performed:

[0089] S301. Thinning the substrate surface of the substrate;

[0090] S302. The substrate surface of the substrate is evaporated and thickened by electroplating to form a microstrip line matching, output probe and DC bias filter in the second frequency doubling circuit;

[0091] S303. Obtain a Schottky diode chain chip;

[0092] S304. Bond the anode of the Schottky diode chain chip to the microstrip line matching in the second frequency doubling circuit using conductive glue to obtain the second frequency doubling circuit.

[0093] When executing step S301 , after executing step S2 , the substrate may be thinned to a thickness of 50 μm, and then step S302 may be executed.

[0094] The principle of step S302 is the same as that of step S204. The difference is that in addition to evaporating and thickening the microstrip line to serve as the microstrip line matching 3-1-2, output probe 3-1-3 and DC bias filter 3-1-4, step S204 also produces the Schottky diode chain 3-1-1 of the THz Schottky diode with an air bridge structure, while step S302 only uses the process of making the microstrip line in step S204 to produce the microstrip line parts such as the microstrip line matching, output probe and DC bias filter in the second frequency doubling circuit 3-2, without the need to make the THz Schottky diode with an air bridge structure.

[0095] In this embodiment, when executing step S204, in addition to manufacturing the Schottky diode chain in the first frequency doubling circuit in the area where the first frequency doubling circuit is located on the substrate, an independent Schottky diode chain (that is, no microstrip line connected to it) is also manufactured in the area outside the first frequency doubling circuit on the substrate. Since such a Schottky diode chain is independent, it can be cut out to obtain the Schottky diode chain chip required for step S303. The structure of the Schottky diode chain chip is as follows: Figure 5 As shown in part (d) of the figure, it includes components such as the substrate, epitaxial layer, anode and cathode.

[0096] After executing steps S301-S302 to produce components such as the microstrip line matching, output probe, and DC bias filter in the second frequency doubling circuit, the Schottky diode chain chip cut out in step S303 is placed on the substrate surface (back side) of the substrate at a position corresponding to the Schottky diode chain in the first frequency doubling circuit (align the positions so that the Schottky diode chain chip and the Schottky diode chain in the first frequency doubling circuit are symmetrical about the plane of the substrate), and conductive glue and other materials are used to connect the anode in the Schottky diode chain chip to the microstrip line matching in the second frequency doubling circuit. In this way, a complete second frequency doubling circuit is obtained, and the circuit components of the second frequency doubling circuit are symmetrical with the circuit components of the first frequency doubling circuit about the plane of the substrate.

[0097] In this embodiment, after executing steps S1-S3, executing S4, a laser cutting machine can be used to cut Figure 3 The first frequency doubling circuit 3-1, the second frequency doubling circuit 3-2 and the substrate 3-3 on which they are located are cut out to obtain the double-sided frequency doubling circuit 3 as a whole, and then step S5 is performed according to Figure 1 According to the positional relationship shown, the double-sided frequency multiplying circuit 3 is integrally installed inside the cavity of the frequency multiplier, thereby obtaining the terahertz power synthesis frequency multiplier based on the double-sided process in this embodiment.

[0098] In this embodiment, the SiC substrate has a very high thermal conductivity (~4.9W / cm·K), which effectively reduces the temperature rise during high-power operation and improves device reliability. The GaN material has a wide bandgap (3.4eV) and can withstand higher electric field strengths, thereby increasing output power. In addition, the GaN / SiC combination gives the frequency multiplier high power density, low loss, and high temperature resistance, ensuring that the entire terahertz power synthesis doubler circuit can operate under high-frequency, high-power, continuous-wave conditions, expanding the application range of the frequency multiplier.

[0099] In this embodiment, in addition to using SiC as the substrate, dielectric materials with higher thermal conductivity and lower electromagnetic loss, such as diamond, can also be used as the substrate. Diamond substrates, due to their extremely high thermal conductivity (~20 W / cm·K), can significantly enhance heat dissipation and reduce heat accumulation during high-power operation. Their low dielectric loss properties also help reduce signal attenuation in the frequency multiplication circuit, improving overall frequency multiplication efficiency.

[0100] The method for preparing a terahertz power synthesis frequency multiplier based on a double-sided process in this embodiment has the following advantages:

[0101] 1. By simultaneously preparing the Schottky diode chain and microstrip line circuit on the front, making the microstrip line circuit on the back, and accurately installing the Schottky diode chain chip in the corresponding position of the microwave circuit, the error caused by manual assembly in the traditional process is greatly reduced; the terahertz monolithic integration technology is used on the front to significantly improve the assembly accuracy, while the microwave circuit on the back uses semiconductor micro-nano processing technology to further reduce the error caused by manual stacking, thereby reducing the frequency doubling loss and improving the frequency doubling efficiency.

[0102] 2. The structural design of the frequency multiplier has been optimized. Since both the front and back circuits are fabricated on the same chip, the overall thickness of the frequency multiplier circuit is not significantly increased. This avoids problems such as assembly difficulties and heat dissipation limitations caused by increased thickness, ensuring the stability and reliability of the frequency multiplier.

[0103] 3. In terms of power handling capability and working stability, the use of GaN Schottky diode frequency multipliers based on SiC substrates has the advantages of high power, high frequency and high stability. The high thermal conductivity of the SiC substrate (~4.9W / cm·K) effectively reduces the temperature rise during high-power operation, improves the heat dissipation performance, and thus improves the reliability and life of the device. The wide bandgap (3.4eV) characteristics of the GaN material enable it to withstand higher electric field strengths, increase the output power of the frequency multiplier, and reduce power saturation problems. In addition, the combination of GaN / SiC gives the frequency multiplier high power density, low loss and high temperature resistance, enabling it to work stably in more harsh environments;

[0104] 4. The circuit structure has been optimized, power combining efficiency has been improved, and heat dissipation has been enhanced, enabling the entire terahertz power combining and frequency doubling circuit to operate stably under high-frequency, high-power, and continuous-wave conditions. This not only improves the overall performance of the frequency multiplier but also broadens its application scenarios, providing a better solution for the application of terahertz technology in astrophysics, biomedicine, nondestructive testing, national defense, and other fields.

[0105] It should be noted that, unless otherwise specified, when a feature is referred to as being "fixed" or "connected" to another feature, it may be directly fixed or connected to the other feature, or it may be indirectly fixed or connected to the other feature. In addition, the descriptions of up, down, left, right, etc. used in this disclosure are only relative to the relative positional relationships of the components of the present disclosure in the accompanying drawings. The singular forms of "a", "" and "the" used in this disclosure are also intended to include the plural forms, unless the context clearly indicates otherwise. In addition, unless otherwise defined, all technical and scientific terms used in this embodiment have the same meaning as those generally understood by those skilled in the art. The terms used in the specification of this embodiment are only for describing specific embodiments and are not intended to limit the invention. The term "and / or" used in this embodiment includes any combination of one or more related listed items.

[0106] It should be understood that, although the present disclosure may adopt the term first, second, third etc. to describe various elements, these elements should not be limited to these terms.These terms are only used to distinguish the elements of the same type from each other.For example, without departing from the scope of the present disclosure, the first element may also be referred to as the second element, and similarly, the second element may also be referred to as the first element.The use of any and all examples or exemplary language ("for example", "such as" etc.) provided by the present embodiment is only intended to better illustrate embodiments of the present invention, and unless otherwise required, the scope of the present invention will not be limited.

[0107] It should be appreciated that embodiments of the present invention can be implemented or practiced by computer hardware, a combination of hardware and software, or by computer instructions stored in a non-transitory computer-readable memory. The methods can be implemented in a computer program using standard programming techniques - including a non-transitory computer-readable storage medium configured with a computer program, wherein the storage medium so configured causes the computer to operate in a specific and predefined manner - according to the methods and figures described in the specific embodiments. Each program can be implemented in a high-level procedural or object-oriented programming language to communicate with the computer system. However, if desired, the program can be implemented in assembly or machine language. In any case, the language can be a compiled or interpreted language. In addition, the program can be run on a programmed application-specific integrated circuit for this purpose.

[0108] In addition, the operations of the processes described in this embodiment may be performed in any suitable order, unless otherwise indicated in this embodiment or otherwise clearly contradicted by the context. The processes described in this embodiment (or variations and / or combinations thereof) may be performed under the control of one or more computer systems configured with executable instructions, and may be implemented as code (e.g., executable instructions, one or more computer programs, or one or more applications) that is executed collectively on one or more processors, by hardware, or a combination thereof. A computer program includes multiple instructions that can be executed by one or more processors.

[0109] Furthermore, the method can be implemented in any type of computing platform that is operably connected to a suitable computer, including but not limited to a personal computer, a minicomputer, a mainframe, a workstation, a network or distributed computing environment, a separate or integrated computer platform, or in communication with a charged particle tool or other imaging device, etc. Various aspects of the present invention can be implemented as machine-readable code stored on a non-transitory storage medium or device, whether removable or integrated into a computing platform, such as a hard disk, an optical read and / or write storage medium, RAM, ROM, etc., so that it can be read by a programmable computer, and when the storage medium or device is read by the computer, it can be used to configure and operate the computer to perform the process described herein. In addition, the machine-readable code, or portions thereof, can be transmitted over a wired or wireless network. When such media includes instructions or programs that implement the above steps in conjunction with a microprocessor or other data processor, the invention of this embodiment includes these and other different types of non-transitory computer-readable storage media. When programmed according to the methods and techniques of the present invention, the present invention also includes the computer itself.

[0110] The computer program can be applied to input data to perform the functions of the present embodiment, thereby converting the input data to generate output data that is stored in a non-volatile memory. The output information can also be applied to one or more output devices such as a display. In a preferred embodiment of the present invention, the converted data represents a physical and tangible object, including a specific visual depiction of the physical and tangible object produced on the display.

[0111] The above are merely preferred embodiments of the present invention. The present invention is not limited to the aforementioned embodiments. As long as the technical effects of the present invention are achieved by the same means, any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention shall be included within the scope of protection of the present invention. Within the scope of protection of the present invention, various modifications and variations of the technical solutions and / or implementation methods may be made.

Claims

1. A terahertz power synthesis frequency multiplier based on double-sided technology, characterized in that: The terahertz power synthesis frequency multiplier based on the double-sided process includes: frequency multiplier cavity; A double-sided frequency doubling circuit; the double-sided frequency doubling circuit includes a substrate, a first frequency doubling circuit, and a second frequency doubling circuit, the first frequency doubling circuit being located on the epitaxial gallium nitride surface of the substrate, the second frequency doubling circuit being located on the substrate surface of the substrate, the circuit structure of the first frequency doubling circuit and the circuit structure of the second frequency doubling circuit being symmetrical about the plane where the substrate is located; the double-sided frequency doubling circuit is integrally mounted inside the frequency doubling cavity.

2. The terahertz power synthesis frequency multiplier based on double-sided technology according to claim 1, characterized in that: The frequency multiplier cavity includes an input waveguide, a frequency multiplying circuit cavity and an output waveguide; the input waveguide, the frequency multiplying circuit cavity and the output waveguide are all hollow structures and are connected in sequence with the cavities connected; The input waveguide includes a first standard rectangular waveguide and a two-stage input reduced width and height waveguide; The output waveguide includes a second standard rectangular waveguide and a two-stage output reduced-width and reduced-height waveguide.

3. The terahertz power synthesis frequency multiplier based on double-sided process according to claim 1 or 2, characterized in that: The first frequency multiplication circuit and the second frequency multiplication circuit respectively include a Schottky diode chain, a microstrip line matching and an output probe; For either the first frequency doubling circuit or the second frequency doubling circuit, one end of the microstrip line matching is connected to the anode of the Schottky diode chain, and the other end of the microstrip line matching is connected to one end of the output probe.

4. The terahertz power synthesis frequency multiplier based on double-sided technology according to claim 3, characterized in that: The Schottky diode chain includes a first Schottky diode series group and a second Schottky diode series group, wherein the first Schottky diode series group and the second Schottky diode series group each include a plurality of Schottky diodes connected in series in a forward direction, and the first Schottky diode series group and the second Schottky diode series group are connected in series in a reverse direction; The cathode of the Schottky diode chain is electrically connected to the frequency multiplier cavity.

5. The terahertz power synthesis frequency multiplier based on double-sided technology according to claim 4, characterized in that: The Schottky diode chain is used to operate in a reverse bias state; The first frequency multiplication circuit and the second frequency multiplication circuit further include a DC bias filter respectively; For any one of the first frequency multiplication circuit and the second frequency multiplication circuit, the DC bias filter is connected to the other end of the output probe.

6. The terahertz power synthesis frequency multiplier based on double-sided technology according to claim 5, characterized in that: The input waveguide and the double-sided frequency doubling circuit are both located on a first straight line; The output waveguide is located on a second straight line; The output probe is located at the intersection of the first straight line and the second straight line; One end of the Schottky diode chain in the double-sided frequency doubling circuit faces the input waveguide; The first straight line is perpendicular to the second straight line.

7. The method for preparing a terahertz power synthesis frequency multiplier based on a double-sided process according to any one of claims 1 to 6, characterized in that: The method for preparing the terahertz power synthesis frequency multiplier based on the double-sided process comprises the following steps: Using copper material to make the frequency multiplier cavity; Fabricating the first frequency doubling circuit on the epitaxial gallium nitride surface of the substrate through monolithic integration; Fabricating the second frequency doubling circuit on the substrate surface of the substrate through hybrid integration; cutting the first frequency doubling circuit, the second frequency doubling circuit and the corresponding substrate to obtain the double-sided frequency doubling circuit; The double-sided frequency doubling circuit is installed inside the frequency doubling cavity.

8. The method for preparing a terahertz power synthesis frequency multiplier based on a double-sided process according to claim 7, characterized in that: The method of fabricating the first frequency doubling circuit on the epitaxial gallium nitride surface of the substrate through monolithic integration includes the following steps: Using silicon carbide material as the substrate; Growing an epitaxial layer on the epitaxial gallium nitride surface of the substrate; from the substrate outward, the epitaxial layer includes a high-resistance buffer layer, a heavily doped gallium nitride epitaxial layer and a lightly doped gallium nitride epitaxial layer in sequence; After cleaning the epitaxial layer, coating the epitaxial layer with photoresist, etching a mesa on the epitaxial layer by ICP, and forming a first microstrip line circuit region on the substrate; performing ICP etching and evaporating ohmic metal on the heavily doped gallium nitride epitaxial layer, partially stripping the evaporated ohmic metal through a lift-off process, and performing rapid thermal annealing on the evaporated ohmic metal to form a cathode of a Schottky diode; Photoresist is coated on the mesa and the first microstrip line circuit area, metal is evaporated in the developed area after the photoresist is developed, the coated photoresist is retained and photoresist is coated again and developed, a metal layer is formed in the developed area by electrochemical plating, and excess metal is removed by a lift-off process to obtain a THz Schottky diode and a microstrip line with an air bridge structure; the microstrip line forms the microstrip line matching, output probe and DC bias filter in the first frequency doubling circuit.

9. The method for preparing a terahertz power synthesis frequency multiplier based on a double-sided process according to claim 8, characterized in that: The method of fabricating the second frequency doubling circuit on the substrate surface of the substrate through hybrid integration includes the following steps: performing a thinning process on a substrate surface of the substrate; Performing metal evaporation and electroplating thickening on the substrate surface of the substrate to form microstrip line matching, output probe and DC bias filter in the second frequency doubling circuit; Get the Schottky diode chain chip; The anode of the Schottky diode chain chip is bonded to the microstrip line matching in the second frequency doubling circuit by conductive glue to obtain the second frequency doubling circuit.

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