Driving circuit

Abstract

The invention relates to the technical field of electronics, and provides a driving circuit. The driving circuit comprises an amplification module, a first filter, a ramp signal generator and an output module, the first filter, the ramp signal generator and the output module are connected with the amplification module, the first filter and the output module are both connected with an LIN bus, and the output module and the amplification module are both connected with a power supply; the first filter is used for filtering an interference signal in an initial signal of the LIN bus and outputting a first filtering signal to the amplification module; the ramp signal generator is used for generating a ramp signal with a preset ramp width according to the received logic signal and transmitting the ramp signal to the amplification module; the amplification module is used for amplifying the first filtering signal and the ramp signal and outputting a driving signal to the output module; and the output module is used for outputting the processed signal of the LIN bus according to the driving signal. Interference signals on the LIN bus are filtered through the first filter, so that communication signal distortion is avoided, and communication quality is guaranteed.

Description

Technical Field

[0001] The present invention relates to the field of electronic technology, and in particular to a driving circuit. Background Art

[0002] LIN (Local Interconnect Network) is a high-voltage, single-ended communication protocol used in automotive systems. Its transceivers typically must account for varying load conditions and electromagnetic interference, placing strict demands on the slope and duty cycle of the communication signal. Currently, LIN transceiver driver circuits typically use negative feedback control to adjust the signal's rise and fall speeds to control the duty cycle. However, this approach can affect the signal at the amplifier input when high-power EMC (electromagnetic compatibility) interference (EMC) is present on the LIN bus, leading to signal distortion and poor communication quality. Summary of the Invention

[0003] In view of this, an object of the present invention is to provide a driving circuit to avoid communication signal distortion and ensure communication quality.

[0004] In order to achieve the above objectives, the technical solutions adopted in the embodiments of the present invention are as follows:

[0005] In a first aspect, the present invention provides a driving circuit for a LIN transceiver, the driving circuit comprising a first filter, a ramp signal generator, an amplifying module, and an output module, the amplifying module being connected to the first filter, the ramp signal generator, and the output module, respectively; the first filter and the output module being connected to a LIN bus; and the output module and the amplifying module being connected to a power supply.

[0006] The first filter is used to filter out interference signals in the initial signal of the LIN bus and output a first filtered signal to the amplification module;

[0007] The ramp signal generator is used to generate a ramp signal with a preset ramp width according to the received logic signal and transmit the ramp signal to the amplification module;

[0008] The amplification module is used to amplify the first filtered signal and the ramp signal, and output a driving signal to the output module;

[0009] The output module is used to output a processed signal of the LIN bus according to the driving signal.

[0010] In an optional embodiment, the driving circuit further includes a second filter, wherein the second filter is connected to the amplification module and the LIN bus;

[0011] The second filter is used to filter out interference signals in the initial signal of the LIN bus and output a second filtered signal to the amplification module;

[0012] The amplification module is further used to amplify the first filtered signal, the second filtered signal and the ramp signal, and output a driving signal to the output module;

[0013] The filtering bandwidth of the first filter is smaller than the filtering bandwidth of the second filter; and the filtering bandwidth of the second filter is larger than the bandwidth of the ramp signal.

[0014] In an optional embodiment, the amplification module includes a first transistor and a second transistor;

[0015] A first terminal of the first transistor is connected to the first filter, a second terminal is connected to the power supply, and a third terminal is grounded;

[0016] A first end of the second transistor is connected to the ramp signal generator, a second end is connected to the power supply, and a third end is connected to the output module.

[0017] In an optional embodiment, the amplification module includes a first transistor, a second transistor and a third transistor;

[0018] A first terminal of the first transistor is connected to the first filter, a second terminal is connected to the power supply, and a third terminal is grounded;

[0019] A first end of the second transistor is connected to the ramp signal generator, a second end is connected to the power supply, and a third end is connected to the output module;

[0020] A first end of the third transistor is connected to the second filter, a second end is connected to the power supply, and a third end is grounded.

[0021] In an optional embodiment, the driving circuit further includes a regulating module, wherein a first end of the regulating module is connected to the amplifying module, and a second end of the regulating module is connected to a power supply;

[0022] The regulating module is used to regulate the bias current of the amplifying module so as to regulate the gain of the amplifying module.

[0023] In an optional embodiment, the regulating module includes a fourth transistor, a fifth transistor, a sixth transistor and a seventh transistor;

[0024] The first terminal and the third terminal of the fourth transistor are both connected to the third terminal of the second transistor, and the second terminal is grounded;

[0025] a first terminal of the fifth transistor connected to the third terminal of the second transistor, a second terminal of the fifth transistor connected to ground, a third terminal of the fifth transistor connected to the third terminal of the sixth transistor, a third terminal of the sixth transistor connected to its first terminal, and a second terminal of the sixth transistor connected to a power supply;

[0026] The first end of the seventh transistor is connected to the first end of the sixth transistor, the second end of the seventh transistor is connected to the power supply, and the third end of the seventh transistor is connected to the second end of the second transistor.

[0027] In an optional embodiment, the driving circuit further includes an eighth transistor, a first end of the eighth transistor is connected to the driving power supply, a second end is connected to the power supply, and a third end is connected to the amplification module.

[0028] In an optional embodiment, the driving circuit further includes a loop filter, one end of which is connected to the amplification module and the other end is grounded, the loop filter includes a resistor and a capacitor, and the loop filter is used to dynamically adjust the loop response to maintain the stability of the output driving stage under different external conditions.

[0029] In an optional embodiment, the driving circuit further includes a first clamping module and a second clamping module;

[0030] The first clamping module is connected between the first filter and the amplifying module to clamp the first filtered signal output by the first filter within the safe operating range of the amplifying module;

[0031] The second clamping module is connected between the ramp signal generator and the amplifying module to clamp the ramp signal output by the ramp signal generator within a safe operating range of the amplifying module.

[0032] In an optional embodiment, the output module includes a ninth transistor, a first diode, a second diode, and a resistor;

[0033] One end of the resistor is connected to the power supply and the other end is connected to the anode of the first diode, the cathode of the first diode is connected to the anode of the second diode, the cathode of the second diode is connected to the third end of the ninth transistor, the first end of the ninth transistor is connected to the third end of the second transistor, and the second end of the ninth transistor is grounded.

[0034] A drive circuit provided by an embodiment of the present invention includes a first filter, a ramp signal generator, an amplification module, and an output module. The amplification module is respectively connected to the first filter, the ramp signal generator, and the output module. The first filter and the output module are both connected to a LIN bus, and the output module and the amplification module are both connected to a power supply. The first filter is used to filter out interference signals from the initial signal of the LIN bus and output the first filtered signal to the amplification module. The ramp signal generator is used to generate a ramp signal with a preset ramp width based on a received logic signal and transmit it to the amplification module. The amplification module is used to amplify the first filtered signal and the ramp signal and output a drive signal to the output module. The output module is used to output a processed signal of the LIN bus based on the drive signal. The first filter filters out interference signals on the LIN bus, thereby avoiding communication signal distortion and ensuring communication quality.

[0035] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.

[0037] Figure 1 shows a schematic structural diagram of a conventional drive circuit;

[0038] Figure 2 shows one of the structural schematic diagrams of the driving circuit provided by an embodiment of the present invention;

[0039] Figure 3 FIG2 shows a second structural diagram of a driving circuit provided by an embodiment of the present invention;

[0040] Figure 4 FIG3 shows a third structural diagram of a driving circuit provided by an embodiment of the present invention;

[0041] Figure 5 A schematic diagram showing the filtering bandwidths of the first filter and the second filter provided in an embodiment of the present invention is shown;

[0042] Figure 6 FIG4 shows a fourth structural diagram of a driving circuit provided by an embodiment of the present invention;

[0043] Figure 7 FIG5 shows a fifth structural diagram of a driving circuit provided by an embodiment of the present invention;

[0044] Figure 8 FIG6 shows a sixth structural diagram of a driving circuit provided by an embodiment of the present invention;

[0045] Figure 9 FIG7 shows a seventh structural diagram of a driving circuit provided by an embodiment of the present invention;

[0046] Figure 10 An example diagram showing the application effect of a conventional driving circuit is shown;

[0047] Figure 11 The figure shows an example of the application effect of the driving circuit provided by the embodiment of the present invention.

[0048] Icon: PM1-first transistor; PM2-second transistor; PM3-third transistor; NM1-fourth transistor; NM2-fifth transistor; PM4-sixth transistor; PM5-seventh transistor; PM6-eighth transistor; NM3-ninth transistor; R-resistor; D1-first diode; D2-second diode. DETAILED DESCRIPTION

[0049] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.

[0050] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention as claimed, but is merely intended to represent selected embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative work are within the scope of protection of the present invention.

[0051] It should be noted that relational terms such as "first" and "second" are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus comprising the element.

[0052] Currently, the driving circuit of the LIN transceiver generally uses negative feedback control to adjust the rise / fall speed of the signal to control the duty cycle. And due to the high-voltage characteristics of the LIN bus, the amplifier module needs to adopt a near rail-to-rail architecture, and the circuit will also use a clamping module for protection. Figure 1 The figure is a schematic diagram of the structure of a conventional drive circuit. However, when high-power EMC is present on the LIN bus, this circuit triggers the clamping module to operate due to the feedback signal, causing the input of the amplifier module to lose the common-mode potential of the signal. This causes the common-mode voltage of the communication signal to shift, resulting in signal distortion and, in turn, affecting communication quality. Therefore, an embodiment of the present invention provides a drive circuit that can avoid signal distortion and ensure communication quality when high-power EMC is present on the LIN bus.

[0053] See also Figure 2 is a schematic diagram of the structure of a drive circuit provided by an embodiment of the present invention. The drive circuit includes a first filter, a ramp signal generator, an amplifier module, and an output module. The amplifier module is connected to the first filter, the ramp signal generator, and the output module, respectively. The first filter and the output module are both connected to a LIN bus, and the output module and the amplifier module are both connected to a power supply.

[0054] The first filter is used to filter out interference signals from the initial signal of the LIN bus and output the first filtered signal to the amplifier module. The ramp signal generator is used to generate a ramp signal with a preset ramp width based on the received logic signal and transmit it to the amplifier module. The amplifier module is used to amplify the first filtered signal and the ramp signal and output a drive signal to the output module. The output module is used to output the processed signal of the LIN bus based on the drive signal.

[0055] It can be understood that the embodiment of the present invention uses the first filter to filter out the interference signal on the LIN bus, and transmits the filtered signal to the amplification module to reduce the electromagnetic interference to the input signal of the amplification module, thereby ensuring the stability of the common-mode potential of the input signal, avoiding the common-mode voltage offset of the signal on the LIN bus, thereby avoiding signal distortion and ensuring communication quality.

[0056] based on Figure 2 In the driving circuit shown in FIG. 1 , the first filter and the ramp signal generator are both connected to the amplifying module. The embodiment of the present invention also provides another structural diagram of the driving circuit, see FIG. Figure 3 The amplifying module includes a first transistor and a second transistor. Furthermore, both the first transistor and the second transistor may be PMOS transistors, that is, the first transistor is PM1 and the second transistor is PM2.

[0057] The first end of the first transistor PM1 is connected to the first filter, the second end is connected to the power supply VBAT, and the third end is grounded. The first end of the second transistor PM2 is connected to the ramp signal generator, the second end is connected to the power supply VBAT, and the third end is connected to the output module.

[0058] It can be understood that, when the amplification module is connected to the first filter and the ramp signal generator, the embodiment of the present invention uses two PMOS tubes to form the amplification module to amplify the first filtered signal output by the first filter and the ramp signal output by the ramp signal generator.

[0059] See also Figure 4 , is another structural diagram of the drive circuit provided by an embodiment of the present invention. The drive circuit further includes a second filter, which is connected to the amplification module and the LIN bus. In addition, the second filter is used to filter out interference signals in the initial signal of the LIN bus and output the second filtered signal to the amplification module. The amplification module is also used to amplify the first filtered signal, the second filtered signal and the ramp signal, and output the drive signal to the output module; wherein the filtering bandwidth of the first filter is smaller than the filtering bandwidth of the second filter; and the filtering bandwidth of the second filter is larger than the bandwidth of the ramp signal.

[0060] It is understandable that the bandwidth of a LIN signal using the LIN protocol is generally smaller than the bandwidth of a ramp signal, and the bandwidth of a ramp signal is generally smaller than the bandwidth of an interference signal. Based on this feature, the driving circuit of an embodiment of the present invention adapts to different signal interference scenarios by using two filters with different filtering bandwidths. The bandwidth of a signal refers to the frequency range over which the energy or power of the signal is distributed. The filtering bandwidth of a filter refers to the effective operating frequency range of the filter.

[0061] For ease of understanding, the present invention provides a schematic diagram of the filtering bandwidth of a first filter and a second filter. Figure 5 The filtering bandwidth of the first filter is greater than the bandwidth of the LIN signal; the filtering bandwidth of the second filter is greater than the bandwidth of the ramp signal; and the filtering bandwidths of the first filter and the second filter are both less than the bandwidth of the interference signal.

[0062] Furthermore, the amplitude of the system frequency response of the first and second filters to the LIN signal is 0 dB, that is, the first and second filters do not change the amplitude of the LIN signal. The second filter also does not change the amplitude of the ramp signal, and the amplitude of the system frequency response of the first filter to the ramp signal is negative, that is, the first filter will attenuate the amplitude of the ramp signal. The amplitude of the system frequency response of the first and second filters to the interference signal is negative, that is, the first and second filters will attenuate the amplitude of the interference signal, and the degree of attenuation of the interference signal by the first filter is greater than that of the second filter.

[0063] It can be understood that when there is an interference signal on the LIN bus, the interference signal can be quickly filtered out by the second filter. Moreover, when the interference signal is too strong and exceeds the filtering capacity of the second filter, the interference signal can be filtered out by the first filter to reduce its impact on the signal at the input end of the amplifier module.

[0064] based on Figure 4 In the driving circuit shown in FIG. 1 , the first filter, the second filter and the ramp signal generator are all connected to the amplifying module. The embodiment of the present invention also provides another structural diagram of the driving circuit, see FIG. Figure 6 The amplification module includes a first transistor, a second transistor, and a third transistor. Furthermore, the first transistor, the second transistor, and the third transistor may all be PMOS transistors, that is, the first transistor is PM1, the second transistor is PM2, and the third transistor is PM3.

[0065] The first end of the first transistor PM1 is connected to the first filter, the second end is connected to the power supply VBAT, and the third end is grounded. The first end of the second transistor PM2 is connected to the ramp signal generator, the second end is connected to the power supply VBAT, and the third end is connected to the output module. The first end of the third transistor PM3 is connected to the second filter, the second end is connected to the power supply VBAT, and the third end is grounded.

[0066] It can be understood that, when the amplification module is connected to the first filter, the second filter, and the ramp signal generator, the embodiment of the present invention uses three PMOS tubes to form the amplification module to amplify the first filtered signal output by the first filter, the second filtered signal output by the second filter, and the ramp signal output by the ramp signal generator.

[0067] Furthermore, because the filtering bandwidth of the second filter is greater than that of the first filter, and the second filter is connected to the first terminal, i.e., the gate, of the third transistor PM3, while the first filter is connected to the first terminal, i.e., the gate, of the first transistor PM1, when an interference signal is present on the LIN bus, the second filtered signal output by the second filter causes the gate voltage of the third transistor PM3 to change rapidly, thereby enabling the third transistor PM3 to quickly respond to signal changes on the LIN bus and thereby suppressing fluctuations in the drive signal within a short period of time.

[0068] Compared with the third transistor PM3, the gate voltage of the first transistor PM1 changes more slowly, that is, the first transistor PM1 will respond with a lag. However, interference signals that exceed the filtering capacity of the second filter can be filtered out by the first filter, that is, the potential offset of the input signal is adjusted by the first transistor PM1 to ensure the stability of the common-mode voltage of the signal on the LIN bus, thereby avoiding signal distortion.

[0069] It can be understood that the embodiment of the present invention realizes frequency band control through bandwidth difference and adopts a fast and slow combined control strategy, so that the driving circuit can not only quickly respond to transient changes of the LIN bus, but also ensure the stability of the signal, thereby enabling the driving circuit to take into account both speed and stability.

[0070] See also Figure 7 and Figure 8 , is another schematic diagram of the structure of a drive circuit provided by an embodiment of the present invention. The drive circuit further includes a regulation module, a first end of which is connected to the amplification module and a second end of which is connected to a power supply. Furthermore, the regulation module is configured to adjust the bias current of the amplification module to adjust the gain of the amplification module.

[0071] In this embodiment, the adjustment module dynamically adjusts the bias current of the amplifier module based on changes in the amplifier module's load, thereby dynamically adjusting the amplifier module's gain and thus dynamically adjusting the amplifier module's power consumption. For example, when the amplifier module is heavily loaded, the adjustment module increases the bias current to increase the amplifier module's gain to ensure performance. When the amplifier module is lightly loaded, the adjustment module decreases the bias current to reduce the amplifier module's gain and thus lower the amplifier module's power consumption. This allows for dynamic adjustment of the amplifier module's power consumption, enabling it to adapt to varying load conditions.

[0072] Please continue reading Figure 7 and Figure 8The regulation module includes a fourth transistor, a fifth transistor, a sixth transistor, and a seventh transistor. Furthermore, the fourth and fifth transistors can both be NMOS transistors, i.e., the fourth transistor is NM1 and the fifth transistor is NM2. The sixth and seventh transistors can both be PMOS transistors, i.e., the sixth transistor is PM4 and the seventh transistor is PM5.

[0073] The first terminal and the third terminal of the fourth transistor NM1 are both connected to the third terminal of the second transistor PM2 , and the second terminal is grounded.

[0074] A first end of the fifth transistor NM2 is connected to the third end of the second transistor PM2, a second end of the fifth transistor NM2 is grounded, a third end of the fifth transistor NM2 is connected to the third end of the sixth transistor PM4, a third end of the sixth transistor PM4 is connected to its first end, and a second end of the sixth transistor PM4 is connected to the power supply VBAT.

[0075] A first end of the seventh transistor PM5 is connected to the first end of the sixth transistor PM4 , a second end of the seventh transistor PM5 is connected to the power supply VBAT, and a third end of the seventh transistor PM5 is connected to the second end of the second transistor PM2 .

[0076] In this embodiment, the current mirror formed by the fourth transistor NM1 and the fifth transistor NM2 can replicate the current of the drive signal output by the amplifier module and transmit it to the current mirror formed by the sixth transistor PM4 and the seventh transistor PM5. This can feed back the output stage current of the amplifier module to the tail current of the amplifier module, thereby dynamically adjusting the gain of the amplifier module and, in turn, the power consumption of the amplifier module according to the load condition of the amplifier module. The tail current refers to the bias current at the common terminal of the multiple transistors that constitute the amplifier module.

[0077] See also Figure 9 , is another structural diagram of a driving circuit provided by an embodiment of the present invention, wherein the driving circuit further includes an eighth transistor, a loop filter, a first clamping module, a second clamping module, and a third clamping module.

[0078] The eighth transistor can be a PMOS transistor, i.e., the eighth transistor is PM6. A first terminal of the eighth transistor PM6 is connected to the driving power supply Vg, a second terminal is connected to the power supply VBAT, and a third terminal is connected to the amplification module. In this embodiment, the eighth transistor PM6 provides a static bias current for the amplification module, thereby preventing the circuit from entering a degenerate state where no current is drawn, thereby improving the stability and reliability of the driving circuit.

[0079] Furthermore, one end of the loop filter is connected to the amplification module and the other end is grounded. In this embodiment, the loop filter includes a resistor and a capacitor, and is used to dynamically adjust the loop response to maintain the stability of the output driver stage under different external conditions, thereby ensuring the stability of the drive signal and providing stable drive for the output module.

[0080] Furthermore, a first clamping module is connected between the first filter and the amplifying module to clamp the first filtered signal output by the first filter within the safe operating range of the amplifying module. A second clamping module is connected between the ramp signal generator and the amplifying module to clamp the ramp signal output by the ramp signal generator within the safe operating range of the amplifying module. A third clamping module is connected between the second filter and the amplifying module to clamp the second filtered signal output by the second filter within the safe operating range of the amplifying module. In this embodiment, the first clamping module, the second clamping module, and the third clamping module are usually in a non-operating state. They are used to clamp the input signal of the amplifying module within a safe voltage range to avoid damage due to excessive interference signals or short circuits.

[0081] Please continue reading Figure 7 、 Figure 8 and Figure 9 The output module in the driving circuit includes a ninth transistor, a first diode, a second diode, and a resistor. Furthermore, the ninth transistor may be an NMOS transistor, that is, the ninth transistor is NM3. The first diode is D1, and the second diode is D2.

[0082] One end of a resistor R is connected to the power supply VBAT, and the other end is connected to the anode of a first diode D1. The cathode of the first diode D1 is connected to the anode of a second diode D2. The cathode of the second diode D2 is connected to the third end of a ninth transistor NM3. The first end of the ninth transistor NM3 is electrically connected to the third end of the second transistor PM2. The second end of the ninth transistor NM3 is grounded. The LIN bus is connected to the node between the first diode D1 and the second diode D2. In this embodiment, the resistor R acts as a pull-up resistor, and the first diode D1 and the second diode D2 are used to prevent current backflow, thereby preventing damage to the device caused by current backflow due to circuit anomalies.

[0083] The following will be based on Figure 9The driving circuit shown in the figure describes its operating principle. When there are no interference signals on the LIN bus, the first filter feeds the LIN bus signal back to the first transistor PM1; the second filter feeds the LIN bus signal back to the third transistor PM3; and a ramp signal generator generates a ramp signal with a preset ramp width based on a received logic signal and transmits it to the second transistor PM2. The first transistor PM1, the third transistor PM3, and the second transistor PM2 respectively amplify the feedback signal output by the first filter, the feedback signal output by the second filter, and the ramp signal output by the ramp signal generator, and output a drive signal to the first terminal (gate) of the ninth transistor NM3, thereby driving the ninth transistor NM3 on or off.

[0084] When the ninth transistor NM3 is turned on, the voltage at the node between the two diodes is pulled low, causing the signal on the LIN bus to be at a low level. When the ninth transistor NM3 is turned off, the voltage at the node between the two diodes rises to the voltage provided by the power supply, causing the signal on the LIN bus to be at a high level. In other words, the ramp signal and the feedback signal can be used to control the rise and fall speed of the communication signal transmitted on the LIN bus, thereby controlling the duty cycle.

[0085] When an interference signal is present on the LIN bus, the second filter removes the interference signal from the initial LIN bus signal and outputs the second filtered signal to the third transistor PM3, causing the gate voltage of the third transistor PM3 to change rapidly, allowing the third transistor PM3 to quickly adjust the drive signal. Furthermore, the first filter removes interference signals from the initial LIN bus signal that exceed the filtering capacity of the second filter and outputs the first filtered signal to the first transistor PM1, causing the first transistor PM1 to adjust the potential offset of the feedback signal, thereby ensuring the stability of the drive signal and preventing the common-mode voltage of the processed LIN bus signal from offsetting. This ensures that the signal's duty cycle meets communication standards, avoids signal distortion, and ensures communication quality.

[0086] Furthermore, the eighth transistor PM6 provides a static bias current for the first transistor PM1, the second transistor PM2, and the third transistor PM3 to ensure that the first transistor PM1, the second transistor PM2, and the third transistor PM3 are in an operating state. Simultaneously, the current mirror formed by the fourth transistor NM1 and the fifth transistor NM2 copies the current of the drive signal and transmits it to the current mirror formed by the sixth transistor PM4 and the seventh transistor PM5, which feeds this current back to the tail current of the amplifier module formed by the first transistor PM1, the second transistor PM2, and the third transistor PM3. This achieves dynamic adjustment of the amplifier module's gain, and thus the power consumption, based on changes in the amplifier module's load.

[0087] For ease of understanding, the embodiment of the present invention also provides a comparison diagram of a conventional driving circuit and a driving circuit provided by the embodiment of the present invention. Figure 10 and Figure 11 ,in Figure 10 This is an example diagram of the application effect of the traditional drive circuit. Figure 11 This figure illustrates the application effects of the driver circuit provided by the present invention. It can be seen that when there is no interference on the LIN bus, the edges and duty cycles of the processed signals transmitted to the LIN bus by the conventional driver circuit and the driver circuit according to the present invention are consistent. Furthermore, the quality of the received signal at the receiving end is good, i.e., the duty cycle is consistent with that of the logic signal.

[0088] However, when there is a high-power interference signal on the LIN bus, the dominant potential, i.e., the low voltage, of the processed signal transmitted to the LIN bus by the traditional driving circuit is significantly lower, causing the DC potential of the signal to enter a negative voltage, thereby causing the signal edge rate to change, thereby reducing the quality of the received signal at the receiving end, resulting in a duty cycle of the received signal of less than 45%, which does not meet the communication standard, thereby reducing the communication quality.

[0089] However, the driver circuit of the embodiment of the present invention, through the first filter, can stabilize the bus signal envelope after the signal's falling edge arrives, bringing its common-mode voltage close to 0V. This ensures the quality of the received signal and leaves the duty cycle and delay of the received signal virtually unaffected, maintaining the same transmission delay and duty cycle as when the LIN bus is free of interference, thereby ensuring communication quality. Furthermore, the driver circuit provided by the embodiment of the present invention can ensure that the duty cycle of the communication signal is within 45% to 55%, achieving the class 3 anti-interference capability required by the IEC 62228-3 protocol, and complying with international and industry standards for LIN bus communication, such as ISO 17987-4 and SAE J2602.

[0090] An embodiment of the present invention further provides a LIN transceiver, which includes the driving circuit provided by the embodiment of the present invention.

[0091] The foregoing description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Those skilled in the art will readily appreciate that various modifications and variations of the present invention are possible. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention are intended to be within the scope of protection of the present invention.

[0092] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above and that the invention can be embodied in other specific forms without departing from the spirit or essential characteristics of the invention. Therefore, the embodiments should be considered in all respects as illustrative and non-restrictive, and the scope of the invention is defined by the appended claims, not the foregoing description, and all variations within the meaning and range of equivalents of the claims are intended to be included therein. Any reference sign in a claim should not be construed as limiting the claim to which it relates.

Claims

1. A driving circuit, characterized in that: Applied to a LIN transceiver, the driving circuit includes a first filter, a ramp signal generator, an amplification module, and an output module. The amplification module is connected to the first filter, the ramp signal generator, and the output module, respectively. The first filter and the output module are both connected to a LIN bus. The output module and the amplification module are both connected to a power supply. The first filter is used to filter out interference signals in the initial signal of the LIN bus and output a first filtered signal to the amplification module; The ramp signal generator is used to generate a ramp signal with a preset ramp width according to the received logic signal and transmit the ramp signal to the amplification module; The amplification module is used to amplify the first filtered signal and the ramp signal, and output a driving signal to the output module; The output module is used to output a processed signal of the LIN bus according to the driving signal.

2. The driving circuit according to claim 1, wherein: The driving circuit further includes a second filter, which is connected to the amplification module and the LIN bus; The second filter is used to filter out interference signals in the initial signal of the LIN bus and output a second filtered signal to the amplification module; The amplification module is further used to amplify the first filtered signal, the second filtered signal and the ramp signal, and output a driving signal to the output module; The filtering bandwidth of the first filter is smaller than the filtering bandwidth of the second filter; and the filtering bandwidth of the second filter is larger than the bandwidth of the ramp signal.

3. The driving circuit according to claim 1, wherein: The amplification module includes a first transistor and a second transistor; A first terminal of the first transistor is connected to the first filter, a second terminal is connected to the power supply, and a third terminal is grounded; A first end of the second transistor is connected to the ramp signal generator, a second end is connected to the power supply, and a third end is connected to the output module.

4. The driving circuit according to claim 2, wherein: The amplification module includes a first transistor, a second transistor and a third transistor; A first terminal of the first transistor is connected to the first filter, a second terminal is connected to the power supply, and a third terminal is grounded; A first end of the second transistor is connected to the ramp signal generator, a second end is connected to the power supply, and a third end is connected to the output module; A first end of the third transistor is connected to the second filter, a second end is connected to the power supply, and a third end is grounded.

5. The driving circuit according to claim 3 or 4, characterized in that: The driving circuit further includes a regulating module, a first end of the regulating module is connected to the amplifying module, and a second end of the regulating module is connected to a power supply; The regulating module is used to regulate the bias current of the amplifying module so as to regulate the gain of the amplifying module.

6. The driving circuit according to claim 5, wherein: The regulating module includes a fourth transistor, a fifth transistor, a sixth transistor and a seventh transistor; The first terminal and the third terminal of the fourth transistor are both connected to the third terminal of the second transistor, and the second terminal is grounded; a first terminal of the fifth transistor connected to the third terminal of the second transistor, a second terminal of the fifth transistor connected to ground, a third terminal of the fifth transistor connected to the third terminal of the sixth transistor, a third terminal of the sixth transistor connected to its first terminal, and a second terminal of the sixth transistor connected to a power supply; The first end of the seventh transistor is connected to the first end of the sixth transistor, the second end of the seventh transistor is connected to the power supply, and the third end of the seventh transistor is connected to the second end of the second transistor.

7. The driving circuit according to claim 1, wherein: The driving circuit further includes an eighth transistor, a first end of the eighth transistor being connected to the driving power supply, a second end being connected to the power supply, and a third end being connected to the amplification module.

8. The driving circuit according to claim 1, wherein: The driving circuit also includes a loop filter, one end of which is connected to the amplification module and the other end is grounded. The loop filter includes a resistor and a capacitor. The loop filter is used to dynamically adjust the loop response to maintain the stability of the output driving stage under different external conditions.

9. The driving circuit according to claim 1, wherein: The driving circuit further includes a first clamping module and a second clamping module; The first clamping module is connected between the first filter and the amplifying module to clamp the first filtered signal output by the first filter within the safe operating range of the amplifying module; The second clamping module is connected between the ramp signal generator and the amplifying module to clamp the ramp signal output by the ramp signal generator within a safe operating range of the amplifying module.

10. The driving circuit according to claim 3 or 4, characterized in that: The output module includes a ninth transistor, a first diode, a second diode and a resistor; One end of the resistor is connected to the power supply and the other end is connected to the anode of the first diode, the cathode of the first diode is connected to the anode of the second diode, the cathode of the second diode is connected to the third end of the ninth transistor, the first end of the ninth transistor is connected to the third end of the second transistor, and the second end of the ninth transistor is grounded.

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