Deadlock-free core grain routing architecture construction method and device and processor

Abstract

The invention relates to a deadlock-free core grain routing architecture construction method and device and a processor, and the method comprises the following steps: constructing a multi-data flow network structure in a core grain: constructing an internal subnet which is used for transmitting data in the core grain, does not interact with the outside of the core grain, and comprises at least one routing node and a function module capable of receiving and transmitting data; an outbound subnet is constructed, is used for data transmission in the direction away from the core particles, and comprises at least one routing node, a data transceiving function module and a boundary router; constructing an inbound subnet which is used for data transmission in a core particle direction and comprises at least one routing node, a data transceiving function module and a boundary router; a transmission subnet is constructed, is used for data transmission of which the starting point and the terminal point are other core particles, and comprises at least one routing node, a transmission module and a boundary router; and preventing data transmission from deadlock in the core particles and / or among the core particles according to the multi-data flow network structure through a core particle interaction protocol.

Description

Technical Field

[0001] The present invention relates to the field of processors, and in particular to the field of routing of core particles in processors. Background Art

[0002] With the continuous upgrading of manufacturing processes, the scale of system-on-chip (SOC) designs has become larger and larger, bringing additional design, verification, and manufacturing costs to designers. Chiplet design has become an improvement trend in system-on-chip design. The basic concept of chiplets is not complicated. Large-scale system-on-chip designs can be divided into multiple smaller chiplets, which are then re-interconnected and integrated into a chiplet system. Advanced packaging integration technologies such as interposers, vertical silicon vias, microbumps, and silicon bridges play an important role in chiplet interconnection. Chiplet system design helps chip designers produce increasingly larger chip systems at an acceptable cost to meet the growing computing and storage performance requirements.

[0003] Extensive research and mature design patterns have been developed for deadlock-free routing architectures within system-on-chips (SoCs). For example, in a two-dimensional mesh routing network, dimension-ordered routing algorithms can easily achieve deadlock-free routing. However, even if the topology and routing within each chiplet are deadlock-free, when a chiplet system is assembled using 2.5- and 3-dimensional advanced packaging integration technologies, data packets may still experience circular dependencies and wait for each other to release reserved buffers, leading to deadlock. Furthermore, in the context of chiplet integration, each chiplet should adhere to a modular design philosophy, requiring the design of a deadlock-free routing system for the chiplet without relying on global system information.

[0004] In order to solve the deadlock problem in chiplet design and achieve the goal of modular small chiplet design, many studies have proposed solutions based on turn restriction, deadlock recovery, virtual network, flow control and other methods.

[0005] However, defects in the existing technology include: the routing design within the chip imposes overly strict restrictions, which affects the flexibility of network structure design; it does not take into account the situation where the source and destination of the data are both other chiplets, which reduces the versatility of the chip design; the additional handshake signal exchange time causes increased latency and decreased throughput. After research, the inventors found that the defects in the existing technology are due to the failure to classify data flows from the perspective of functional modules within the chip, because the traditional on-chip system routing design method excludes the functional modules in the chip from consideration and only considers deadlocks in the routing structure. Summary of the Invention

[0006] In order to solve the problem that the prior art only considers deadlock in routing structure when designing deadlock-free core particles but does not classify data flows from the perspective of functional modules within the core particles, the present invention discloses a method for constructing a deadlock-free core particle routing architecture, comprising the following steps:

[0007] Construct a multi-data flow network structure within the core particle, including:

[0008] Construct an internal subnet for data transmission within the chiplet, without interacting with the outside of the chiplet, including at least one routing node and a data sending and receiving function module;

[0009] Construct an outbound subnet for data transmission in the direction of leaving the chip, including at least one routing node, a data transceiver function module and a border router;

[0010] Construct an inbound subnet for data transmission in the direction of entering the chip, including at least one routing node, a data transceiver function module and a border router;

[0011] Construct a transfer subnet for data transmission whose starting point and end point are other core particles, including at least one routing node, a transfer module and a border router;

[0012] Deadlock in data transmission is prevented within a core particle and / or between core particles through a core particle interaction protocol according to the multi-data stream network structure.

[0013] In one embodiment of the above method of the present invention, the internal subnet, outbound subnet, inbound subnet and transmission subnet are constructed in the form of a two-dimensional grid routing structure network.

[0014] In one embodiment of the above method of the present invention, the step of constructing the internal subnet in the form of a two-dimensional grid routing structure network further includes:

[0015] No border router is set up to ensure that data is transmitted only within the core particle;

[0016] An on-chip routing mode from the first direction to the second direction is set for data transmission between the routing nodes of the internal subnet and the functional modules capable of transmitting and receiving data.

[0017] In one embodiment of the above method of the present invention, the step of constructing the outbound subnet in the form of a two-dimensional grid routing structure network further includes:

[0018] An on-chip routing mode from the second direction to the first direction is set, so that data starting from the data transceiver function module of the outbound subnet can pass through the routing node in the chiplet and leave the current chiplet through the boundary router of the outbound subnet.

[0019] In one embodiment of the above method of the present invention, the step of constructing the inbound subnet in the form of a two-dimensional grid routing structure network further includes:

[0020] An on-chip routing mode from the first direction to the second direction is set, so that data enters the chip through the border router of the inbound subnet, passes through the routing node of the inbound subnet, and reaches the data transceiver function module of the inbound subnet.

[0021] In one embodiment of the above method of the present invention, the step of constructing the transmission subnet in the form of a two-dimensional grid routing structure network further includes:

[0022] An on-chip routing method from a first direction to a second direction is set, for transferring data of a data transceiver functional module of a chip from a border router of the transmission subnet into the current chip, passing the data through the transmission module and then to the data transceiver functional module of another chip via another border router of the transmission subnet, wherein the data may pass through a routing node of the transmission subnet during the process of transmitting the data through the transmission subnet.

[0023] In one embodiment of the above method of the present invention, an intermediary layer is further included between the core particles, and the intermediary layer includes routing nodes and edge routers, wherein data enters and leaves the intermediary layer through vertical silicon vias from a third direction, and the third direction is perpendicular to the plane where the first direction and the second direction are located.

[0024] In one embodiment of the above method of the present invention, the core particle interaction protocol data format includes:

[0025] Traffic type, which includes:

[0026] Normal type, transfer type and message type;

[0027] Source address;

[0028] Destination address;

[0029] Packet attributes are used to supplement traffic types;

[0030] Load data.

[0031] In one embodiment of the above method of the present invention, when the traffic type is a normal type, the data packet attributes include a data ID, a data length, and other attributes / payload data;

[0032] When the traffic type is a delivery type, the data packet attributes include data ID, data length and egress border router / load data;

[0033] When the traffic type is a message type, the data packet attributes include a message name and message content.

[0034] In one embodiment of the above method of the present invention, the step of preventing data transmission deadlock within a core particle and / or between core particles through a core particle interaction protocol according to the multi-data stream network structure further comprises:

[0035] Determine the subnet involved in transmission in the multi-data stream network structure according to the traffic type, source address and destination address of the data;

[0036] The format content used when transmitting the data is updated between the subnets participating in the transmission according to the transmission situation.

[0037] In one embodiment of the above method of the present invention, the step of updating the format content used in transmitting data between the subnets participating in the transmission according to the transmission situation further includes:

[0038] When the traffic type of the data is normal and the transmission path only involves the outbound subnet, the intermediate layer and the inbound subnet, the data sent by the outbound subnet reaches the intermediate layer and then reaches the inbound subnet from the intermediate layer. During the data transmission process, the traffic type remains normal.

[0039] When the traffic type of the data is normal and the transmission path includes the delivery subnet, the traffic type of the data is updated to the delivery mode before the data is transmitted on the delivery subnet, and the traffic type of the data is updated to the normal mode after the data is transmitted on the delivery subnet;

[0040] When an abnormality occurs, an early warning is required, or retransmission is required, the data traffic type is updated to a message type, and a corresponding message is sent.

[0041] In one embodiment of the above method of the present invention, before the data is transmitted on the transmission subnet, the traffic type of the data is updated to the transmission mode, and after the data is transmitted on the transmission subnet, the traffic type of the data is updated to the normal mode, further comprising:

[0042] After the data reaches an intermediary layer from the border router of the outbound subnet, the routing node of the intermediary layer calculates the data's destination address and needs to pass through the intermediate core particle for transmission;

[0043] Modifying the traffic type of the data to a transfer mode;

[0044] updating the egress border router of the data;

[0045] After the data is routed by the routing node of the intermediate layer and reaches the intermediate core particle, the edge router of the intermediate core particle transfers the data to the transmission subnet and transmits it through the transmission module of the transmission subnet and sends it to the egress edge router;

[0046] The data reaches another intermediary layer through the egress border router, and the traffic type of the data is modified to a normal mode;

[0047] The routing node of another intermediate layer routes the data to the border router of the inbound subnet through the target address; or

[0048] After the data reaches an intermediary layer from the border router of the outbound subnet, the routing node of the intermediary layer calculates the data's destination address and needs to pass through the intermediate core particle for transmission;

[0049] Modifying the traffic type of the data to a transfer mode;

[0050] After the data is routed by the routing node of the intermediate layer and reaches the intermediate core particle, the edge router of the intermediate core particle transfers the data to the transmission subnet and transmits it through the transmission module of the transmission subnet to reach another intermediate layer. At this time, the traffic type of the modified data is changed to the normal mode;

[0051] The routing node of another intermediate layer routes the data to a border router of an inbound subnet through the target address.

[0052] In one embodiment of the above method of the present invention, when an abnormal situation occurs, the traffic type of the data is updated to a message type, and the step of sending a corresponding message further includes:

[0053] The anomaly detection module in the core particle detects an anomaly in the data transmission process;

[0054] Update the data traffic type to message type and set the message name to exception message;

[0055] The current data transmission path is reused to send the data of message type to the data source chip.

[0056] In one embodiment of the above method of the present invention, when a warning situation occurs, the traffic type of the data is updated to a message type, and the step of sending a corresponding message further includes:

[0057] When the receiving side buffer resources of the transmission module are reduced to below a set warning value, the traffic type of the data is updated to the message type, the message name is set to the warning message, and the warning duration is set in the message content;

[0058] Reusing the current data transmission path to send the data of message type to the data source chip;

[0059] The data source chip reduces the data sending rate of the data transceiver function module according to the cache resource situation and the priority of the data transceiver function module;

[0060] After the warning time period, the data source chip restores the data sending and receiving function module to a normal data sending rate.

[0061] In one embodiment of the above method of the present invention, when a retransmission situation occurs, the traffic type of the data is updated to a message type, and the step of sending a corresponding message further includes:

[0062] When the transmission module detects within a monitoring time that the sending buffer is full and cannot send data outward, and the receiving buffer is full and cannot receive new data, the transmission module discards a portion of the receiving buffer data and subsequently received data with the same data ID as the discarded data;

[0063] The transmission module updates the traffic type of the data to the message type, sets the message name to the retransmission message, and fills in the data ID of the discarded data in the message content;

[0064] Reusing the current data transmission path to send the data of message type to the data source chip;

[0065] The data transceiver function module of the data source chip retransmits the data corresponding to the data ID of the discarded data;

[0066] The transmission module receives the retransmitted data corresponding to the data ID of the discarded data.

[0067] The present invention also discloses a deadlock-free core routing architecture construction device, which is used to execute any of the above methods, including:

[0068] Multi-data flow network structure building module, used to build a multi-data flow network structure within the core particle, including:

[0069] Internal subnet construction module, used for data transmission within the chiplet, does not interact with the outside of the chiplet, and includes at least one routing node and a data sending and receiving function module;

[0070] An outbound subnet construction module, used for data transmission in the direction of leaving the chiplet, including at least one routing node, a data transceiver function module and a border router;

[0071] An inbound subnet construction module, used for data transmission in the direction of entering the chiplet, including at least one routing node, a data transceiver function module and a border router;

[0072] A transfer subnet building module is used for data transmission whose starting point and end point are other core particles, including at least one routing node, a transfer module and a border router;

[0073] The core particle interaction protocol module is used to prevent data transmission deadlock within a core particle and / or between core particles through a core particle interaction protocol according to the multi-data stream network structure.

[0074] The present invention also discloses a processor, comprising a memory, an input-output unit and a plurality of processing cores, wherein the plurality of processing cores are connected to the memory and the input-output unit, and further comprising the above-mentioned deadlock-free core routing architecture construction device.

[0075] The present invention also discloses a storage medium for storing a computer control program, wherein the computer control program is used to execute the steps of any of the above methods.

[0076] The present invention discloses a deadlock-free core routing architecture construction device, device and processor, which solves the problem that the prior art only considers deadlock in the routing structure when designing core anti-deadlock, but does not classify data flows from the perspective of functional modules within the core.

[0077] The present invention constructs a multi-data stream network structure including an internal subnet, an outbound subnet, an inbound subnet and a transmission subnet, so that the network structure design is flexible; taking into account the data situation where the source and destination are both other core particles, the versatility of the core particle design is enhanced; within the core particle and / or between core particles, according to the multi-data stream network structure, through the core particle interaction protocol, through the early warning of the cache status and the retransmission method of actively recovering from the deadlock state based on the hardware level, deadlock-free data transmission is achieved, and the core particle interaction protocol does not require additional signal exchanges such as handshakes, and will not cause additional delay increases and throughput reductions. BRIEF DESCRIPTION OF THE DRAWINGS

[0078] Figure 1 Flowchart of a method for constructing a deadlock-free core routing architecture according to an embodiment of the present invention.

[0079] Figure 2a Schematic diagram of the construction of an internal subnet in one embodiment of the present invention.

[0080] Figure 2b Schematic diagram of constructing an outbound subnet in one embodiment of the present invention.

[0081] Figure 2c Schematic diagram of constructing an inbound subnet in one embodiment of the present invention.

[0082] Figure 2d Schematic diagram of constructing a transmission subnet in one embodiment of the present invention.

[0083] Figure 3 FIG. 1 is a schematic diagram of a multi-data flow network connection and data flow when multiple chiplets are integrated according to an embodiment of the present invention.

[0084] Figure 4Schematic diagram of an implementation scheme for an inter-chiplet interaction protocol in one embodiment of the present invention.

[0085] Figure 5 Schematic diagram of the use of interactive protocols in general data stream transmission in one embodiment of the present invention.

[0086] Figure 6 FIG. 1 is a schematic diagram illustrating the use of an interactive protocol in cross-chiplet data flow transmission according to an embodiment of the present invention.

[0087] Figure 7 1 is a block diagram of a device for constructing a deadlock-free core routing architecture according to an embodiment of the present invention.

[0088] Figure 8 The figure is a block diagram of a processor according to an embodiment of the present invention.

[0089] Wherein, the reference numerals:

[0090] 1: Core particle

[0091] 3: Routing Node

[0092] 4: Border router

[0093] 5: Functional module capable of sending and receiving data

[0094] 6: Transfer module

[0095] 10: Deadlock-free core routing architecture construction device

[0096] 11: Multi-data stream network structure building block

[0097] 12: Internal Subnet Building Blocks

[0098] 13: Outbound Subnet Building Blocks

[0099] 14: Inbound Subnet Building Blocks

[0100] 15: Transfer subnet building blocks

[0101] 16: Coregrain interaction protocol module

[0102] 20: Coregrain interaction protocol data format

[0103] 100: Processor

[0104] 110: Processing core

[0105] 120: Memory

[0106] 130: Input and output unit

[0107] La: internal subnet

[0108] Lb: Outbound subnet

[0109] Lc: Inbound subnet

[0110] Ld: Transmit subnet

[0111] Le: Intermediary layer

[0112] D1: First direction

[0113] D2: Second direction DETAILED DESCRIPTION

[0114] The technical solution of the present invention is described in detail below with reference to the accompanying drawings and specific embodiments to further understand the purpose, solution and beneficial technical effects of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0115] It should be noted that, in this specification, relational terms such as first and second, etc. are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises", "comprising" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, article or device. In the absence of further restrictions, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element.

[0116] Certain terms are used in this specification and the appended claims to refer to specific components or parts. Persons skilled in the art will understand that technology users or manufacturers may use different nouns or terms to refer to the same component or part. This specification and the appended claims do not distinguish components or parts based on differences in name, but rather on differences in their functions.

[0117] In the present invention, terms such as "upper," "lower," "left," "right," "front," "back," "top," "bottom," "inner," "outer," "center," "vertical," "horizontal," "transverse," and "longitudinal" indicate positions or locations based on the positions or locations shown in the accompanying drawings. These terms are primarily intended to better describe the present invention and its embodiments and are not intended to limit the devices, elements, or components indicated to having a specific orientation, or to being constructed or operated in a specific orientation.

[0118] Furthermore, some of the above terms may be used to express other meanings besides indicating a position or location. For example, the term "on" may also be used to indicate a dependency or connection in certain circumstances. Those skilled in the art will understand the specific meanings of these terms in the present invention based on the specific circumstances.

[0119] Furthermore, the terms "installed," "disposed," "provided with," "connected," and "connected" should be interpreted broadly. For example, they can refer to fixed connections, removable connections, or integral structures; mechanical connections or electrical connections; direct connections or indirect connections through an intermediary; or internal communication between two devices, elements, or components. Those skilled in the art will understand the specific meanings of these terms in the present invention based on specific circumstances.

[0120] like Figure 1 As shown, the present invention discloses a method for constructing a deadlock-free core routing architecture, comprising the following steps:

[0121] Step S1: Construct a multi-data flow network structure within the core particle, including:

[0122] Construct an internal subnet La for data transmission within the chiplet, which does not interact with the outside of the chiplet, including at least one routing node 3 and a data transceiver function module 5;

[0123] Construct an outbound subnet Lb for data transmission in the direction of leaving the chip, including at least one routing node 3, a data transceiver function module 5 and a border router 4;

[0124] Construct an inbound subnet Lc for data transmission in the direction of entering the chip, including at least one routing node 3, a data transceiver function module 5 and a border router 4;

[0125] Constructing a transfer subnet Ld for data transmission whose starting and ending points are other core particles, including at least one routing node 3, a transfer module 6 and a border router 4;

[0126] Step S2: preventing data transmission deadlock within a core particle and / or between core particles through a core particle interaction protocol according to the multi-data stream network structure.

[0127] like Figures 2a to 2d As shown, in one embodiment of the above method of the present invention, the internal subnet La, the outbound subnet Lb, the inbound subnet Lc and the transmission subnet Ld are constructed in the form of a two-dimensional grid routing structure network.

[0128] In one embodiment of the above method of the present invention, the step of constructing the internal subnet La in the form of a two-dimensional grid routing structure network further includes:

[0129] No border router 4 is provided, so that data is transmitted only within the core particle;

[0130] An on-chip routing mode from the first direction D1 to the second direction D2 is set for data transmission between the routing node 3 of the internal subnet La and the data transceiver function module 5.

[0131] In one embodiment of the above method of the present invention, the step of constructing the outbound subnet Lb in the form of a two-dimensional grid routing structure network further includes:

[0132] An on-chip routing mode from the second direction D2 to the first direction D1 is set so that data can depart from the data transceiver function module 5 of the outbound subnet Lb, pass through the routing node 3 in the chiplet, and leave the current chiplet through the border router 4 of the outbound subnet Lb.

[0133] In one embodiment of the above method of the present invention, the step of constructing the inbound subnet Lc in the form of a two-dimensional grid routing structure network further includes:

[0134] An on-chip routing mode from the first direction D1 to the second direction D2 is set up to allow data to enter the chip through the border router 4 of the inbound subnet Lc, and to pass through the routing node 3 of the inbound subnet Lc to reach the data transceiver function module 5 of the inbound subnet Lc.

[0135] In one embodiment of the above method of the present invention, the step of constructing the transmission subnet Ld in the form of a two-dimensional grid routing structure network further includes:

[0136] An on-chip routing method from the first direction D1 to the second direction D2 is set, so as to transmit data of a data transceiver function module 5 of a chip from a border router 4 of the transmission subnet Ld into the current chip, pass through the transmission module 6, and transmit to the data transceiver function module 5 of another chip via another border router 4 of the transmission subnet Ld, wherein the data may pass through the routing node 3 of the transmission subnet Ld during the transmission of the data in the transmission subnet Ld.

[0137] In one embodiment of the above method of the present invention, an interposer Le is further included between the core particles, and the interposer Le includes a routing node 3 and a boundary router 4, wherein data enters and leaves the interposer Le through a vertical silicon via from a third direction, and the third direction is perpendicular to the plane where the first direction D1 and the second direction D2 are located.

[0138] Specifically, in one embodiment of the present invention, the above-mentioned internal subnet La uses a two-dimensional mesh network as its routing structure, only allowing data transmission within the chip and not directly interacting with the outside of the chip. The routers on this subnet do not include a border router 4, and there are no vertical silicon via links leaving the chip. The routing algorithm uses a mature and reliable deadlock-free on-chip routing design method. This embodiment uses the D1-D2 dimensional order routing method in a two-dimensional mesh network (i.e., an on-chip routing method in which the data flow direction is first transmitted in a first direction D1 and then transmitted in a second direction D2) to achieve deadlock-free at the subnet level.

[0139] In one embodiment of the present invention, the outbound subnet Lb and inbound subnet Lc structures are simplified structures on a two-dimensional mesh network, and some routing nodes 3 and connections are deleted. The reason is that after the data traffic types are subdivided, not all data transceiver function modules 5 in the core particle have the need to interact with other core particles, such as Figure 2b and Figure 2c As shown. The core grain outbound subnet Lb and the core grain inbound subnet Lc respectively share the interaction function with the outside of the core grain in two different directions. When data is outbound, the root node is the data transceiver function module 5 within the core grain, and the leaf node is the edge router 4. When data is inbound, the opposite is true. The outbound subnet Lb adopts D2-D1 dimension-ordered routing (i.e., the data flow direction is first transmitted in the second direction D2, and then in the first direction D1) and the inbound subnet Lc adopts D1-D2 dimension-ordered routing. Therefore, there is no loop inside the core grain, and data will not be deadlocked within the core grain.

[0140] In one embodiment of the present invention, the transmission subnet Ld structure comprises a simplified structure on a two-dimensional grid network, connecting only all the edge routing and transmission modules 6, and deleting other routing nodes 3 and connections, such as Figure 2d As shown, the subnet uses D1-D2 dimensional order routing to ensure deadlock-free operation. Data transmitted on the transit subnet Ld originates and ends at functional modules in other cores. In a modular core design, this core needs to dynamically implement deadlock avoidance during system operation through flow control and deadlock recovery methods.

[0141] The transmission subnet Ld structure sets up a transmission module 6 for chiplet data transmission, which is connected to the chiplet transmission subnet Ld. The transmission module 6 first receives data requests from outside the chiplet, and then forwards them to other chiplets through the border router 4. Therefore, it can be represented as a structure with two cache units on the receiving side and the sending side, as shown in Figure 2. Figure 2d and Figure 3 As shown, it has a logic design specified by the interactive protocol (described in detail later) to ensure that the cache unit will not deadlock.

[0142] Based on the above implementation, we can see that the multi-data flow network structure further modularizes chiplet design, simplifies analysis for designers, reduces design and verification costs, and makes modular chiplets stable and reliable. Unlike previous research, this approach not only takes chiplet traffic into account, but also limits the scope of the dynamic deadlock avoidance method, requiring only the chiplet traffic flow to be designed, reducing the required cache resources.

[0143] See also Figure 3 In this deadlock-free routing system, different types of data flows are transmitted separately on different subnets. Routing node 3, shown here, is part of this multi-data flow network. As can be seen from the figure, the data flow routing in this deadlock-free routing system is free of routing loops. Thanks to the separation of traffic into different subnets within the core, the deadlock-free design of the entire system is guaranteed.

[0144] Specifically, the data traffic of the internal subnet La only propagates in the routing structure within this core particle and is completely isolated from other core particles. No matter how the core particle system is integrated, no additional deadlock will be introduced.

[0145] The outbound subnet Lb is connected to the inbound subnet Lc of another chiplet to form a new link. The data flow first flows from the outbound subnet Lb to the intermediary layer Le, and then is routed by the intermediary layer Le to the inbound subnet Lc of another chiplet. This data flow does not form a loop, thus eliminating routing deadlocks. Moreover, even if the data flow is blocked when entering the chiplet, the blockage is immediately resolved when the destination functional module regains its receiving capacity.

[0146] After the transmission subnet Ld structure is assembled into a core-grain system, the data flow enters the transmission module 6 on the transmission subnet Ld and is then transmitted outside the core-grain. Circular dependencies are not completely eliminated. When the internal cache units of the module are full, the receiving side's cache resources will depend on the release of the sending side's cache resources. The transmission module 6 implements the flow control and retransmission logic specified by the interaction protocol (described in detail later) to ensure that the core-grain's internal cache resources are not exhausted.

[0147] Furthermore, the interactive protocol includes traffic type and address, which are used by the routing node 3 to calculate which subnet the transmission needs to be carried out on, and also implements traffic control and retransmission mechanisms, thereby achieving the purpose of dynamically eliminating deadlocks and releasing circular dependencies.

[0148] In one embodiment of the above method of the present invention, the core particle interaction protocol data format 20 includes:

[0149] Traffic type, which includes:

[0150] Normal type, transfer type and message type;

[0151] Source address;

[0152] Destination address;

[0153] Packet attributes are used to supplement traffic types;

[0154] Load data.

[0155] In one embodiment of the above method of the present invention, when the traffic type is a normal type, the data packet attributes include a data ID, a data length, and other attributes / payload data;

[0156] When the traffic type is a delivery type, the data packet attributes include data ID, data length and egress border router / load data;

[0157] When the traffic type is a message type, the data packet attributes include a message name and message content.

[0158] Specifically, if Figure 4 As shown, in one embodiment of the present invention, the interactive protocol format includes traffic type, source address, destination address, packet attributes, and payload data. Considering the physical size constraints of the inter-chip interconnect link, the protocol limits the size of each packet to 32 bits. A single transmission consists of multiple packets. The first packet includes the traffic type, source address, destination address, and packet attributes, while subsequent packets contain the data. The packet length is specified by the data length in the packet attributes of the first packet.

[0159] The traffic type consists of 2 bits, allowing the chip to distinguish different types of traffic and process them correctly. Traffic types include normal, pass-through, and message. When the traffic type code is 00, it corresponds to the normal type, representing the transmission of instructions in normal functions. When the traffic type code is 01, it corresponds to the pass-through type, indicating the use of the pass-through subnet Ld. When the traffic type code is 10, it corresponds to the message type, indicating the transmission of warning, retransmission, and exception messages. When the traffic type code is 11, it represents a custom type reserved for the chip.

[0160] The source address and destination address are usually virtual addresses or specific ID tags of the message sender and receiver, which help the routing node 3 correctly plan the path to the destination functional module. Its bit width matches the number of functional modules. In this embodiment, the 8-bit address length can meet the requirements.

[0161] Data packet attributes are a supplement to the traffic type and have different meanings depending on the traffic type. When the traffic type is normal type, they include data ID and data length. When the traffic type is transfer type, they include data ID, data length and export boundary routing identifier. When the traffic type is message type, they include message type and message content. The reserved data bits are used to add priority, redundancy check code and other information.

[0162] When core particles interact normally with each other, they use the normal mode and transfer mode in the type for transmission. Common operation function types are included in this range, such as read request, write request, read response data, etc. When the transfer module 6 detects an exception such as blocking or deadlock, it will initiate a transmission request of the message type.

[0163] In one embodiment of the above method of the present invention, the step of preventing data transmission deadlock within a core particle and / or between core particles through a core particle interaction protocol according to the multi-data stream network structure further comprises:

[0164] Determine the subnet involved in transmission in the multi-data stream network structure according to the traffic type, source address and destination address of the data;

[0165] The format content used when transmitting the data is updated between the subnets participating in the transmission according to the transmission situation.

[0166] In one embodiment of the above method of the present invention, the step of updating the format content used in transmitting data between the subnets participating in the transmission according to the transmission situation further includes:

[0167] When the traffic type of the data is normal, and the transmission path only involves the outbound subnet Lb, the intermediate layer Le, and the inbound subnet Lc, the data sent by the outbound subnet Lb reaches the intermediate layer Le, and then reaches the inbound subnet Lc from the intermediate layer Le. During the data transmission process, the traffic type remains normal.

[0168] When the traffic type of the data is normal and the transmission path includes the transmission subnet Ld, the traffic type of the data is updated to the transmission mode before the data is transmitted through the transmission subnet Ld, and the traffic type of the data is updated to the normal mode after the data is transmitted through the transmission subnet Ld;

[0169] When an abnormality occurs, an early warning is required, or retransmission is required, the data traffic type is updated to a message type, and a corresponding message is sent.

[0170] Specifically, such as Figure 5As shown, in one embodiment of the present invention, if the traffic type is normal mode and the transmission path consists only of the core outbound subnet Lb, the intermediary layer Le, and the core inbound subnet Lc, the traffic type can remain unchanged in normal mode. Specifically, the data transmission process can be divided into the following three steps.

[0171] Step 1: Routing node A on the chip initiates a normal mode transmission. According to the protocol format, the traffic type is set to 00, the source address is A, the destination address is C, and the data ID and data length are attached as attributes. It reaches the intermediary layer Le network through the outbound subnet Lb.

[0172] In step 2, after the data reaches the routing node B of the intermediate layer Le, the routing node B directs it to the vertical link of another core particle according to the target address, and the target address C is located on the core particle, so the traffic type remains at 00 and does not need to be changed.

[0173] Step 3: After the data packet arrives at another core, based on the information that the traffic type is normal mode, the border router directs the data to the core inbound subnet Lc, and routes it to the routing node C through the target address, completing a data transmission.

[0174] Specifically, such as Figure 6 As shown, in one embodiment of the present invention, if the traffic type is normal mode and the transmission path includes the core particle transmission subnet Ld, the traffic type will be converted to the transmission mode during the transmission. Specifically, the transmission process is divided into the following five steps.

[0175] Step 1: Routing node A on the chip initiates a normal mode transmission. According to the protocol format, the traffic type is set to 00, the source address is A, the destination address is E, and the data ID and data length are attached as attributes. It reaches the intermediary layer Le network through the outbound subnet Lb.

[0176] Step 2: After the data reaches routing node B of the intermediary layer Le, routing node B calculates the target address and finds that it needs to be delivered through the intermediate core particle to reach the target node E. First, it changes the traffic type to the delivery mode and adds the exit boundary routing information D to the data packet attribute, directing it to the vertical link of another core particle.

[0177] Step 3: After the data packet reaches the border router C of the intermediate core particle, since the traffic type is the transfer mode and the egress border routing information attached to the data packet attribute is D, the routing structure will reach the transfer module 6 through the transfer subnet Ld and then be sent to the border router D.

[0178] Step 4: The data packet reaches the intermediary layer Le through the border router D, and the traffic type is changed to normal mode.

[0179] Step 5: After the quantity packet reaches the right core particle, the border router directs the data to the inbound subnet Lc based on the information that the traffic type is normal mode, and routes it to node E through the target address, completing the data transmission.

[0180] It should be noted that for small chiplets that are capable of completing the mapping of target addresses to boundary routes, no additional information is required, that is, the above step 2 is not required. The chiplet does not need to parse the target address in the transmitted traffic, but instead directs the data to the correct exit boundary route through additional exit boundary route information, so that the data reaches the next small chiplet.

[0181] In one embodiment of the above method of the present invention, before the data is transmitted on the transmission subnet Ld, the traffic type of the data is updated to the transmission mode, and after the data is transmitted on the transmission subnet Ld, the traffic type of the data is updated to the normal mode. The step further includes:

[0182] After the data reaches an intermediate layer Le from the border router 4 of the outbound subnet Lb, the routing node 3 of the intermediate layer Le calculates the intermediate core particles required for transmission based on the target address of the data;

[0183] Modifying the traffic type of the data to a transfer mode;

[0184] updating the egress border router of the data;

[0185] After the data is routed by the routing node 3 of the intermediate layer Le and reaches the intermediate core particle, the boundary router 4 of the intermediate core particle transfers the data to the transmission subnet Ld and transmits it through the transmission module 6 of the transmission subnet Ld and sends it to the egress boundary router;

[0186] The data reaches another intermediary layer Le through the egress border router, and the traffic type of the data is modified to normal mode;

[0187] The routing node 3 of the other intermediate layer Le routes the data to the border router 4 of the inbound subnet Lc through the target address; or

[0188] After the data reaches an intermediate layer Le from the border router 4 of the outbound subnet Lb, the routing node 3 of the intermediate layer Le calculates the intermediate core particles required for transmission based on the target address of the data;

[0189] Modifying the traffic type of the data to a transfer mode;

[0190] After the data is routed by the routing node 3 of the intermediate layer Le and reaches the intermediate core particle, the boundary router 4 of the intermediate core particle transfers the data to the transmission subnet Ld and transmits it through the transmission module 6 of the transmission subnet Ld to another intermediate layer Le. At this time, the traffic type of the modified data is normal mode.

[0191] The routing node 3 of the other intermediate layer Le routes the data to the border router 4 of the inbound subnet Lc through the target address.

[0192] In one embodiment of the above method of the present invention, when an abnormal situation occurs, the traffic type of the data is updated to a message type, and the step of sending a corresponding message further includes:

[0193] The anomaly detection module in the core particle detects an anomaly in the data transmission process;

[0194] Update the data traffic type to message type and set the message name to exception message;

[0195] The current data transmission path is reused to send the data of message type to the data source chip.

[0196] In one embodiment of the above method of the present invention, when a warning situation occurs, the traffic type of the data is updated to a message type, and the step of sending a corresponding message further includes:

[0197] When the receiving side buffer resources of the transmission module 6 are reduced to below a set warning value, the data traffic type is updated to the message type, the message name is set to the warning message, and the warning duration is set in the message content;

[0198] Reusing the current data transmission path to send the data of message type to the data source chip;

[0199] The data source chip reduces the data sending rate of the data transceiver module 5 according to the cache resource situation and the priority of the data transceiver module 5;

[0200] After the warning time period, the data source chip restores the data sending and receiving function module 5 to a normal data sending rate.

[0201] Specifically, the warning message corresponds to the flow control function for the transmission subnet Ld, and the message content carried includes the buffer resource status of the receiving side, the duration of reducing the sending rate, and priority information. Specifically, the embodiment of the warning message includes the following three steps.

[0202] Step 1: When the receiving side buffer resource of the transmission module 6 is reduced to the set warning value, a message type transmission is initiated to the data source module, and the message type in the data packet type is a warning message.

[0203] In step 2, the data source module receives the warning message and proactively reduces the data transmission rate based on the cache resource status and priority. The cache resource status is a 4-bit encoding of the utilization ratio, and the data source module determines the specific reduction in the data rate injected into the network based on the cache resource status. The priority information is a 2-bit encoding used to apply the priority classification rules. Specifically, each functional module has a priority configuration. After receiving the warning message, the higher-priority module still maintains a certain transmission rate to meet its performance and functional requirements.

[0204] Step 3: The data source module resumes the normal data transmission rate after the duration specified by the data packet attributes. The duration is a 6-bit code representing the count value of seconds or clock cycles.

[0205] Warning messages are used to prevent excessive traffic from overwhelming the receiver and improve network performance. Compared to conventional handshake mechanisms, warning messages provide gentler flow control and eliminate the need for multi-step send state synchronization, resulting in lower communication latency. They also eliminate the need for additional links and are more adaptable to the complex traffic paths found in multi-chip system integration.

[0206] In one embodiment of the above method of the present invention, when a retransmission situation occurs, the traffic type of the data is updated to a message type, and the step of sending a corresponding message further includes:

[0207] When the transmission module 6 detects within a monitoring time that the sending buffer is full and cannot send data outward, and the receiving buffer is full and cannot receive new data, the transmission module 6 discards a portion of the receiving buffer data and the subsequently received data with the same data ID as the discarded data;

[0208] The transmission module 6 updates the traffic type of the data to the message type, sets the message name to the retransmission message, and fills in the data ID of the discarded data in the message content;

[0209] Reusing the current data transmission path to send the data of message type to the data source chip;

[0210] The data transceiver function module 5 of the data source chip retransmits the data corresponding to the data ID of the discarded data;

[0211] The transmission module 6 receives the retransmitted data corresponding to the data ID of the discarded data.

[0212] Specifically, the retransmission message corresponds to the retransmission function for the transmission subnet Ld. The message content carried by the retransmission message includes the retransmission data ID. Specifically, the embodiment of the retransmission message includes the following five steps.

[0213] Step 1: The transmission module 6 detects a possible deadlock. Specifically, the deadlock is manifested in that the internal buffer of the transmission module 6 is always full within a certain period of time, and the transmission module 6 fails to send out transmission data and cannot receive new data.

[0214] Step 2: The transmission module 6 actively discards a portion of the data in the receiving buffer and the subsequently received data with the same data flag, creating a certain number of bubbles in the link to allow the blocked data to flow again.

[0215] Step 3: After discarding the data, the transfer module 6 initiates a message transmission to the data source module, and the message type in the data packet type is a retransmission message. The retransmission message carries the data ID in the data packet attribute of the discarded data.

[0216] Step 4: The data source module receives the retransmission message and resends the data transmission corresponding to the data ID.

[0217] Step 5: The transmission module 6 receives the data transmission initiated again by the data source module, and the retransmission message processing process ends.

[0218] The retransmission of messages is a hardware-level design solution for proactively recovering from deadlock. Because the flow control mechanism based on early warning messages doesn't strictly guarantee that the sender injects data only when the receiver has the processing power, and thus has a certain lag, retransmission of messages can provide a further guarantee of deadlock-free operation.

[0219] like Figure 7 As shown, the present invention further discloses a deadlock-free core routing architecture construction device 10, which is used to execute any of the above methods, including:

[0220] The multi-data stream network structure construction module 11 is used to construct a multi-data stream network structure within the core particle, including:

[0221] The internal subnet construction module 12 is used for data transmission within the chiplet and does not interact with the outside of the chiplet. It includes at least one routing node 3 and a data transceiver function module 5;

[0222] An outbound subnet construction module 13, used for data transmission in the direction of leaving the chip, includes at least one routing node 3, a data transceiver function module 5 and a border router 4;

[0223] An inbound subnet construction module 14 is used for data transmission in the direction of entering the chiplet, and includes at least one routing node 3, a data transceiver function module 5, and a border router 4;

[0224] The transfer subnet construction module 15 is used for data transmission whose starting point and end point are other core particles, including at least one routing node 3, a transfer module 6 and a border router 4;

[0225] The chiplet interaction protocol module 16 is configured to prevent data transmission deadlock within a chiplet and / or between chiplets through a chiplet interaction protocol according to the multi-data stream network structure.

[0226] like Figure 7 As shown, the present invention also discloses a processor 100, including a memory 120, an input-output unit 130 and multiple processing cores 110, wherein the multiple processing cores 110 are connected to the memory 120 and the input-output unit 130, and also includes the above-mentioned deadlock-free core routing architecture construction device 10.

[0227] The processor 100 may include a CPU (Central Processing Unit), a general-purpose processor, a DSP (Digital Signal Processor), an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. It may implement or execute the various exemplary logic blocks, modules, and circuits described in conjunction with the disclosure of this application. The processor 100 may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, and the like.

[0228] The present invention discloses a storage medium for storing a computer control program, wherein the computer control program is used to execute the steps of any one of the above methods.

[0229] The computer program that can be executed by the processor can be placed in random access memory (RAM), internal memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the technical field.

[0230] The present invention discloses a deadlock-free core routing architecture construction device 10, device and processor, which solves the problem that the prior art only considers deadlock in routing structure when designing core anti-deadlock, but does not classify data flow from the perspective of functional modules within the core.

[0231] The present invention constructs a multi-data stream network structure including an internal subnet La, an outbound subnet Lb, an inbound subnet Lc and a transmission subnet Ld, so that the network structure design is flexible; taking into account the data situation where the source and destination are both other core particles, the versatility of the core particle design is enhanced; within the core particle and / or between core particles, according to the multi-data stream network structure, a core particle interaction protocol is used, and data transmission is achieved without deadlock through early warning of the cache status and a retransmission method based on the hardware level to actively recover from the deadlock state. In addition, the core particle interaction protocol does not require additional signal exchanges such as handshakes, and will not cause additional delay increases and throughput reductions.

[0232] In summary, the present invention may have many other embodiments. Without departing from the spirit and essence of the present invention, those skilled in the art may evolve various corresponding changes and deformations based on the present invention, but these corresponding changes and deformations should all fall within the scope of protection of the patent applied for the present invention.

Claims

1. A method for constructing a deadlock-free core routing architecture, characterized in that: The following steps are involved: Construct a multi-data flow network structure within the core particle, including: Construct an internal subnet for data transmission within the chiplet, without interacting with the outside of the chiplet, including at least one routing node and a data sending and receiving function module; Construct an outbound subnet for data transmission in the direction of leaving the chip, including at least one routing node, a data transceiver function module and a border router; Construct an inbound subnet for data transmission in the direction of entering the chip, including at least one routing node, a data transceiver function module and a border router; Construct a transfer subnet for data transmission whose starting point and end point are other core particles, including at least one routing node, a transfer module and a border router; Deadlock in data transmission is prevented within a core particle and / or between core particles through a core particle interaction protocol according to the multi-data stream network structure.

2. The method according to claim 1, wherein The internal subnet, outbound subnet, inbound subnet and transmission subnet are constructed in the form of a two-dimensional grid routing structure network.

3. The method according to claim 2, wherein The step of constructing the internal subnet in the form of a two-dimensional grid routing structure network further includes: No border router is set up to ensure that data is transmitted only within the core particle; An on-chip routing mode from the first direction to the second direction is set for data transmission between the routing nodes of the internal subnet and the functional modules capable of transmitting and receiving data.

4. The method according to claim 2, wherein The step of constructing the outbound subnet in the form of a two-dimensional grid routing structure network further includes: An on-chip routing mode from the second direction to the first direction is set, so that data starting from the data transceiver function module of the outbound subnet can pass through the routing node in the chiplet and leave the current chiplet through the boundary router of the outbound subnet.

5. The method according to claim 2, wherein The step of constructing the inbound subnet in the form of a two-dimensional mesh routing structure network further includes: An on-chip routing mode from the first direction to the second direction is set, so that data enters the chip through the border router of the inbound subnet, passes through the routing node of the inbound subnet, and reaches the data transceiver function module of the inbound subnet.

6. The method according to claim 2, wherein The step of constructing the transmission subnet in the form of a two-dimensional grid routing structure network further includes: An on-chip routing method from a first direction to a second direction is set, for transferring data of a data transceiver functional module of a chip from a border router of the transmission subnet into the current chip, passing the data through the transmission module and then to the data transceiver functional module of another chip via another border router of the transmission subnet, wherein the data may pass through a routing node of the transmission subnet during the process of transmitting the data through the transmission subnet.

7. The method according to claim 1, wherein An interposer is also included between the core particles, and the interposer includes routing nodes and edge routers, wherein data enters and leaves the interposer through vertical silicon vias from a third direction, and the third direction is perpendicular to the plane where the first direction and the second direction are located.

8. The method according to claim 7, wherein The core particle interaction protocol data format includes: Traffic type, which includes: Normal type, transfer type and message type; Source address; Destination address; Packet attributes are used to supplement traffic types; Load data.

9. The method according to claim 8, wherein When the traffic type is a normal type, the data packet attributes include data ID, data length and other attributes / payload data; When the traffic type is a delivery type, the data packet attributes include data ID, data length and egress border router / load data; When the traffic type is a message type, the data packet attributes include a message name and message content.

10. The method according to claim 9, wherein The step of preventing data transmission deadlock within a core particle and / or between core particles through a core particle interaction protocol according to the multi-data stream network structure further comprises: Determine the subnet involved in transmission in the multi-data stream network structure according to the traffic type, source address and destination address of the data; The format content used when transmitting the data is updated between the subnets participating in the transmission according to the transmission situation.

11. The method according to claim 10, wherein The step of updating the format content used in transmitting the data between the subnets participating in the transmission according to the transmission situation further includes: When the traffic type of the data is normal and the transmission path only involves the outbound subnet, the intermediate layer and the inbound subnet, the data sent by the outbound subnet reaches the intermediate layer and then reaches the inbound subnet from the intermediate layer. During the data transmission process, the traffic type remains normal. When the traffic type of the data is normal and the transmission path includes the delivery subnet, the traffic type of the data is updated to the delivery mode before the data is transmitted on the delivery subnet, and the traffic type of the data is updated to the normal mode after the data is transmitted on the delivery subnet; When an abnormality occurs, an early warning is required, or retransmission is required, the data traffic type is updated to a message type, and a corresponding message is sent.

12. The method according to claim 11, wherein Before the data is transmitted on the transmission subnet, the traffic type of the data is updated to the transmission mode, and after the data is transmitted on the transmission subnet, the traffic type of the data is updated to the normal mode. The step further includes: After the data reaches an intermediary layer from the border router of the outbound subnet, the routing node of the intermediary layer calculates the data's destination address and needs to pass through the intermediate core particle for transmission; Modifying the traffic type of the data to a transfer mode; updating the egress border router of the data; After the data is routed by the routing node of the intermediate layer and reaches the intermediate core particle, the edge router of the intermediate core particle transfers the data to the transmission subnet and transmits it through the transmission module of the transmission subnet and sends it to the egress edge router; The data reaches another intermediary layer through the egress border router, and the traffic type of the data is modified to a normal mode; The routing node of another intermediate layer routes the data to the border router of the inbound subnet through the target address; or After the data reaches an intermediary layer from the border router of the outbound subnet, the routing node of the intermediary layer calculates the data's destination address and needs to pass through the intermediate core particle for transmission; Modifying the traffic type of the data to a transfer mode; After the data is routed by the routing node of the intermediate layer and reaches the intermediate core particle, the edge router of the intermediate core particle transfers the data to the transmission subnet and transmits it through the transmission module of the transmission subnet to reach another intermediate layer. At this time, the traffic type of the modified data is changed to the normal mode; The routing node of another intermediate layer routes the data to a border router of an inbound subnet through the target address.

13. The method according to claim 11, wherein When an abnormal situation occurs, the traffic type of the data is updated to a message type, and the step of sending a corresponding message further includes: The anomaly detection module in the core particle detects an anomaly in the data transmission process; Update the data traffic type to message type and set the message name to exception message; The current data transmission path is reused to send the data of message type to the data source chip.

14. The method according to claim 11, wherein When a warning situation occurs, the traffic type of the data is updated to a message type, and the step of sending a corresponding message further includes: When the receiving side buffer resources of the transmission module are reduced to below a set warning value, the traffic type of the data is updated to the message type, the message name is set to the warning message, and the warning duration is set in the message content; Reusing the current data transmission path to send the data of message type to the data source chip; The data source chip reduces the data sending rate of the data transceiver function module according to the cache resource situation and the priority of the data transceiver function module; After the warning time period, the data source chip restores the data sending and receiving function module to a normal data sending rate.

15. The method according to claim 11, wherein When a retransmission situation occurs, the traffic type of the data is updated to a message type, and the step of sending a corresponding message further includes: When the transmission module detects within a monitoring time that the sending buffer is full and cannot send data outward, and the receiving buffer is full and cannot receive new data, the transmission module discards a portion of the receiving buffer data and subsequently received data with the same data ID as the discarded data; The transmission module updates the traffic type of the data to the message type, sets the message name to the retransmission message, and fills in the data ID of the discarded data in the message content; Reusing the current data transmission path to send the data of message type to the data source chip; The data transceiver function module of the data source chip retransmits the data corresponding to the data ID of the discarded data; The transmission module receives the retransmitted data corresponding to the data ID of the discarded data.

16. A deadlock-free core routing architecture construction device, used to execute the method according to any one of claims 1 to 15, characterized in that: include: Multi-data flow network structure building module, used to build a multi-data flow network structure within the core particle, including: Internal subnet construction module, used for data transmission within the chiplet, does not interact with the outside of the chiplet, and includes at least one routing node and a data sending and receiving function module; An outbound subnet construction module, used for data transmission in the direction of leaving the chiplet, including at least one routing node, a data transceiver function module and a border router; An inbound subnet construction module, used for data transmission in the direction of entering the chiplet, including at least one routing node, a data transceiver function module and a border router; A transfer subnet building module is used for data transmission whose starting point and end point are other core particles, including at least one routing node, a transfer module and a border router; The core particle interaction protocol module is used to prevent data transmission deadlock within a core particle and / or between core particles through a core particle interaction protocol according to the multi-data stream network structure.

17. A processor comprising a memory, an input / output unit, and a plurality of processing cores, wherein the plurality of processing cores are connected to the memory and the input / output unit, wherein: It also includes the deadlock-free core routing architecture construction device as described in claim 16.

18. A storage medium for storing a computer control program, characterized in that: The computer control program is used to execute the steps of the method according to any one of claims 1 to 15.

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