Solar cell preparation method and device based on sheet resistance gradient, and cell

Abstract

The invention provides a solar cell preparation method and device based on sheet resistance gradient, and a cell. The method comprises the following steps: dividing the surface of a battery piece into a high sheet resistance region and a low sheet resistance region before carrying out laser sintering on printed silver paste; and carrying out laser sintering on the high-sheet-resistance region and the low-sheet-resistance region by adopting different grid line layouts. According to the method provided by the invention, the grid line layout is optimized for different sheet resistance regions, and unnecessary silver paste consumption is effectively reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of photovoltaic cell manufacturing, and in particular to a method and device for preparing a solar cell based on a square resistance gradient, and a cell. Background Art

[0002] When manufacturing solar cells using the Laser Enhanced Contact Optimization (LECO) process, the sheet resistance typically exhibits a gradient distribution, with higher resistance at the center and lower resistance at the edges, due to differences in doping concentration and edge effects on the surface of the solar cell. However, the existing LECO process uses uniform power parameters to laser sinter the silver paste printed onto the cell surface. This leads to excessive contact resistance in high-sheet resistance areas, damage to the silicon substrate in low-sheet resistance areas, and loss of fill factor. To address this issue, conventional processes have resorted to increasing gate line density or line width.

[0003] However, increasing the grid line density will lead to the defect of increasing the cost of battery preparation. Taking a single-chip battery as an example, the silver paste consumption is 80-120 mg / piece (TOPCon battery), accounting for more than 40% of the non-silicon cost. Summary of the Invention

[0004] The present invention provides a method and device for preparing a solar cell based on a sheet resistance gradient, and a battery, so as to solve the defect of high silver paste consumption in preparing solar cells in the prior art.

[0005] A method for preparing a solar cell based on a sheet resistance gradient, comprising:

[0006] Before laser sintering the printed silver paste, it also includes:

[0007] The surface of the cell is divided into a high square resistance area and a low square resistance area; the square resistance of the high square resistance area is: 375Ω / □≤R≤400Ω / □; the square resistance of the low square resistance area is: greater than or equal to 350Ω / □≤R<375Ω / □;

[0008] Different grid line layouts are used for laser sintering of high square resistance area and low square resistance area respectively.

[0009] Furthermore, in the above-mentioned method for preparing a solar cell based on a sheet resistance gradient, the laser sintering of the high sheet resistance region and the low sheet resistance region using different grid line layouts respectively includes:

[0010] The width and spacing of the gate lines in the high-square-resistance region are respectively smaller than the width and spacing of the gate lines in the low-square-resistance region.

[0011] Furthermore, in the above-mentioned method for preparing a solar cell based on a sheet resistance gradient, the power of the laser sintering of the high sheet resistance region is greater than the power of the laser sintering of the low sheet resistance region.

[0012] Furthermore, in the above-mentioned method for preparing a solar cell based on a sheet resistance gradient, the grid lines of the high sheet resistance region layout are:

[0013] Line width ≤ 15μm, spacing ≤ 0.8mm;

[0014] The gate lines of the low square resistance area layout are:

[0015] 8≤line width≤22μm, 1.0≤spacing≤1.2mm.

[0016] Furthermore, in the above-mentioned method for preparing a solar cell based on a sheet resistance gradient, the grid lines arranged in the high sheet resistance region are sintered using a laser with a power of 20-25W.

[0017] Furthermore, in the above-mentioned method for preparing a solar cell based on a sheet resistance gradient, the grid lines arranged in the low sheet resistance region are sintered using a laser with a power of 15-18W.

[0018] A solar cell prepared by any of the above methods.

[0019] A solar cell manufacturing device based on sheet resistance gradient, comprising:

[0020] Square resistance monitoring module, used to measure the square resistance of the battery surface;

[0021] The silver paste printing module is used to print grid lines of different thicknesses and spacings in different sheet resistance areas according to the sheet resistance measured by the sheet resistance monitoring module;

[0022] A dynamic power controller, used to determine different laser powers according to the thickness and spacing of the grid lines;

[0023] The laser sintering module is used to perform laser sintering on the grid lines in different square resistance areas respectively according to the different laser powers.

[0024] The method provided by the present invention optimizes the grid line layout for different square resistance areas and effectively reduces unnecessary silver paste consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 This is a schematic flow chart of a method for preparing a solar cell based on sheet resistance gradient provided by the present invention;

[0026] Figure 2 It is a schematic structural diagram of a solar cell preparation device based on sheet resistance gradient provided by the present invention. DETAILED DESCRIPTION

[0027] To make the objectives, technical solutions, and advantages of the present invention more clear, the technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the embodiments described are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.

[0028] The current preparation method of LECO process includes the following steps:

[0029] Texturing: Texturing is performed on the surface of the silicon wafer to increase the surface roughness to reduce light reflection and improve light absorption efficiency.

[0030] Boron diffusion: Boron doping forms a p-type region on the surface of the silicon wafer, preparing for the p-type semiconductor layer of the battery.

[0031] BSG removal + alkali polishing: Removes the borosilicate glass generated during the boron diffusion process, and further treats the silicon wafer surface through alkali polishing to remove the damaged layer and optimize the surface quality.

[0032] Depositing a tunnel oxide layer and an intrinsic polysilicon layer: Depositing a tunnel oxide layer and an intrinsic polysilicon layer in sequence to construct a passivation contact structure.

[0033] Phosphorus diffusion: Phosphorus doping forms an n-type region, which forms a pn junction with the p-type region, laying the foundation for the semiconductor structure of the battery.

[0034] PSG removal+RCA: Removes phosphosilicate glass generated by phosphorus diffusion and uses RCA cleaning process to remove surface impurities to ensure a clean process environment.

[0035] Deposition of ALOx: Deposition of an aluminum oxide layer as a surface passivation layer to improve the carrier recombination suppression capability of the silicon wafer surface and enhance battery performance.

[0036] Depositing a front anti-reflection layer: Depositing an anti-reflection layer on the front of the cell further reduces light reflection and increases the utilization rate of incident light.

[0037] Depositing a back anti-reflection layer: An anti-reflection layer is also deposited on the back of the cell to optimize the light absorption properties of the entire surface.

[0038] Printing + sintering front and back Ag paste: Silver paste (gate line) is coated on the front and back sides through screen printing technology, and electrodes are formed through sintering process to realize the electrical connection function of the battery.

[0039] Light-assisted micro-conductive treatment of front silver paste: Use light-assisted technology to perform micro-conductive treatment on the front silver paste to optimize the conductivity, contact performance or microstructure of the electrode, and further improve the electrical performance of the battery.

[0040] The main and secondary grids on the front and back sides of the cell are key structures for current extraction. The main grid primarily collects the secondary grid current and connects the cells in series, while the secondary grid collects photogenerated carriers. Due to the dopant concentration gradient on the silicon wafer surface and the edge field effect, the cell sheet resistance exhibits a typical gradient distribution, with high resistance at the center and low resistance at the edges (for example, the sheet resistance in the center is approximately 390Ω / □, decreasing to 360Ω / □ at the edges). However, the conventional LECO laser sintering process uses uniform power parameters, resulting in excessive contact resistance in high-sheet resistance areas due to insufficient laser energy, while excess energy in low-sheet resistance areas damages the silicon substrate or passivation layer, ultimately resulting in a loss of approximately 0.5%-1.2% in the cell fill factor (FF). To compensate for the contact resistance in the high-sheet resistance area, conventional processes increase the grid line density or line width, resulting in a silver paste consumption of 80-120mg per cell for TOPCon cells, accounting for over 40% of the non-silicon cost.

[0041] Specifically, the high-square-resistance region ([375-400Ω / □]) has a relatively high resistance. If the laser power is insufficient during laser sintering, the contact resistance between the metal electrode and the silicon substrate will increase significantly. This increase in contact resistance will directly affect the current collection efficiency, resulting in weak current collection capabilities in the high-square-resistance region, thereby reducing the battery's fill factor (FF) and conversion efficiency. In the low-square-resistance region ([350-375Ω / □]), due to its lower resistance, sintering with the same laser power as the high-square-resistance region may cause the silicon substrate or passivation layer to overburn, damaging the battery structure, thereby reducing the battery's open-circuit voltage and short-circuit current, also affecting battery performance. For the high-square-resistance region, to compensate for the high contact resistance, traditional processes require increasing the gate line density or line width, but this will lead to increased silver paste usage and increased costs. For the low-square-resistance region, overly dense gate lines will result in silver paste waste, increase the shading area, and reduce the short-circuit current. To this end, this application can design different densities of grid lines for different areas by measuring the square resistance gradient. High square resistance areas use denser grid lines, and low square resistance areas use sparser grid lines, thereby optimizing the amount of silver paste used and current collection efficiency.

[0042] like Figure 1 As shown, the embodiment of the present invention adopts the following technical solutions:

[0043] S1, before laser sintering the printed silver paste, also includes: dividing the surface of the cell into a high square resistance area and a low square resistance area;

[0044] S2: Laser sintering is performed on the high square resistance region and the low square resistance region using different grid line layouts.

[0045] Specifically, this application first uses a measurement method such as the four-probe method to measure the square resistance of each area on the cell surface to divide the cell surface into high-square-resistance and low-square-resistance areas. Then, different grid line layouts are used for laser sintering in the divided high-square-resistance and low-square-resistance areas. Due to the higher resistance of the high-square-resistance area, a denser and finer grid line layout is required; while due to the lower resistance of the low-square-resistance area, a sparser and wider grid line layout can be used to avoid wasting silver paste.

[0046] The method provided by the present invention optimizes the grid line layout for different square resistance areas and effectively reduces unnecessary silver paste consumption.

[0047] Furthermore, the width and spacing of the gate lines arranged in the high square resistance region of the present invention are respectively smaller than the width and spacing of the gate lines in the low square resistance region.

[0048] Specifically, the high-square-resistance region utilizes a finer, denser gridline layout, which increases the contact area between the electrode and the silicon substrate, reducing contact resistance and improving fill factor and carrier collection efficiency. The low-square-resistance region utilizes a wider, sparser gridline layout, reducing silver paste usage and lowering production costs. Furthermore, the more rational gridline layout reduces the increase in light-shielding area caused by overcrowding, thereby improving short-circuit current.

[0049] Furthermore, in an embodiment of the present invention, the power of laser sintering in the high-sheet-resistance region is greater than the power of laser sintering in the low-sheet-resistance region.

[0050] Specifically, during the laser sintering process, the size of the laser power directly affects the thermal effect between the silver paste and the silicon substrate. High-power lasers can generate more heat, which helps to melt and bond the silver paste to the silicon substrate; but too high a power may also cause problems such as silver paste splashing and silicon substrate damage. Low-power lasers can reduce these negative effects, but may also cause excessive contact resistance. Therefore, the present application uses a higher laser power in the high-square-resistance area to ensure that a good ohmic contact is formed between the silver paste and the silicon substrate, effectively reducing the contact resistance, improving the carrier collection efficiency, and improving the photoelectric conversion efficiency of the battery; and using a lower laser power in the low-square-resistance area can avoid damage to the silicon substrate caused by excessive laser power.

[0051] The method provided by the present invention first accurately measures the square resistance values ​​of different areas on the cell surface through partitioned measurements. It then uses dynamic control technology to dynamically adjust the thickness and spacing of the grid lines based on the real-time measured square resistance values. The laser sintering power is also dynamically adjusted based on the thickness and spacing of the grid lines. This maximizes electrode contact efficiency, reduces silver paste waste, and improves the overall photoelectric conversion efficiency of the cell. This effectively reduces silver paste usage and laser energy consumption, significantly lowering production costs and improving the product's market competitiveness.

[0052] Preferably, in this embodiment of the present invention, the gate lines in the high-square-resistance region have a line width of ≤15μm and a spacing of ≤0.8mm; the gate lines in the low-square-resistance region have a line width of 8 ≤ ≤22μm and a spacing of 1.0 ≤ ≤1.2mm. The gate lines in the high-square-resistance region are sintered using a laser with a power of 20-25W. The gate lines in the low-square-resistance region are sintered using a laser with a power of 15-18W.

[0053] The method provided by this invention divides the cell surface into a central block region (high square resistance) and a peripheral ring region (low square resistance). The laser power (k = 0.05 to 0.15) is dynamically adjusted using the formula Pi = Pbase − k(Ri − Rmin) to adapt the square resistance gradient. The high square resistance region uses narrow-pitch, fine grid lines (≤ 15μm / 0.8mm), while the low square resistance region is widened to 18-25μm / 1.2mm, reducing silver paste usage by 10%-15%.

[0054] Compared with the traditional LECO process, the method provided by the present invention has the following advantages, as shown in Table 1:

[0055] Table 1

[0056] Technical Dimension Traditional crafts This patented technology Advantages Square resistance adaptability Normalize parameters, ignoring gradient differences Dynamic partition adjustment, precise matching of power and square resistance gradient Fill factor increased by 0.8%-1.5% Silver paste consumption 80-110 mg / tablet (TOPCon) 60-100 mg / tablet (10%-15% reduction) Non-silicon costs reduced by more than 10% Process stability Contact resistance fluctuation ±15% Fluctuation is reduced to within ±5% (closed-loop control) Yield rate increased by 3%-5%

[0057] The method provided by the present invention, combined with reverse bias technology, optimizes the local electric field distribution and reduces the contact resistance by 18%. Moreover, by inducing local current heating through laser zoning, the metal-silicon contact area can be reduced to less than 5%, improving the passivation effect and open-circuit voltage. In addition, the thickness and spacing of the gate lines can be adjusted in advance in combination with the square resistance, and the power of laser sintering can be dynamically adjusted according to the thickness and spacing of the gate lines, thereby maximizing the electrode contact efficiency, reducing silver paste waste, and improving the overall photoelectric conversion efficiency of the battery. It effectively reduces the amount of silver paste and laser energy consumption, significantly reduces production costs, and improves the market competitiveness of the product.

[0058] Example 1:

[0059] An embodiment of the present invention provides a method for preparing a solar cell:

[0060] Step 1: Texturing the surface of the silicon wafer.

[0061] Step 2: Boron diffusion.

[0062] Step 3: Remove the borosilicate glass generated during the boron diffusion process and remove the damaged layer by alkali polishing.

[0063] Step 4: Deposit a tunnel oxide layer and an intrinsic polysilicon layer in sequence to construct a passivation contact structure.

[0064] Step 5: Form an n-type region by phosphorus doping, which forms a pn junction with the p-type region.

[0065] Step 6: Remove the phosphosilicate glass generated by phosphorus diffusion and use the RCA cleaning process to remove surface impurities.

[0066] Step 7: Deposit an aluminum oxide layer.

[0067] Step 8: Deposit an anti-reflection layer on the front side of the cell.

[0068] Step 9: Deposit an anti-reflection layer on the back of the cell as well.

[0069] Step 10: Use the four-probe method to measure the square resistance of the battery cell surface and divide the battery performance into area A (high square resistance area) and area B (low square resistance area);

[0070] Step 11: Apply silver paste (grid lines) on the front and back surfaces by screen printing technology. The specifications of the grid lines coated in area A are: line width 10 μm, spacing 0.6 mm; the specifications of the grid lines coated in area B are: 20 μm, and the spacing is increased to 1.2 mm;

[0071] Step 12: Use 20W laser power to perform dense sintering on area A, and use low-power laser 15W to perform sparse sintering on area B;

[0072] Step 13: Use light-assisted technology to micro-conduct the front silver paste.

[0073] Example 2:

[0074] An embodiment of the present invention provides a method for preparing a solar cell:

[0075] Step 1: Texturing the surface of the silicon wafer.

[0076] Step 2: Boron diffusion.

[0077] Step 3: Remove the borosilicate glass generated during the boron diffusion process and remove the damaged layer by alkali polishing.

[0078] Step 4: Deposit a tunnel oxide layer and an intrinsic polysilicon layer in sequence to construct a passivation contact structure.

[0079] Step 5: Form an n-type region by phosphorus doping, which forms a pn junction with the p-type region.

[0080] Step 6: Remove the phosphosilicate glass generated by phosphorus diffusion and use the RCA cleaning process to remove surface impurities.

[0081] Step 7: Deposit an aluminum oxide layer.

[0082] Step 8: Deposit an anti-reflection layer on the front side of the cell.

[0083] Step 9: Deposit an anti-reflection layer on the back of the cell as well.

[0084] Step 10: Use the four-probe method to measure the square resistance of the battery cell surface and divide the battery performance into area A (high square resistance area) and area B (low square resistance area);

[0085] Step 11: Silver paste (grid lines) are coated on the front and back surfaces by screen printing technology. The specifications of the grid lines coated in area A are: line width 15 μm, spacing 0.8 mm; the specifications of the grid lines coated in area B are: 22 μm, and the spacing is increased to 1.1 mm;

[0086] Step 12: dense sintering is performed on area A using a laser power of 22W, and sparse sintering is performed on area B using a low-power laser of 17W;

[0087] Step 13: Use light-assisted technology to micro-conduct the front silver paste.

[0088] Example 3:

[0089] An embodiment of the present invention provides a method for preparing a solar cell:

[0090] Step 1: Texturing the surface of the silicon wafer.

[0091] Step 2: Boron diffusion.

[0092] Step 3: Remove the borosilicate glass generated during the boron diffusion process and remove the damaged layer by alkali polishing.

[0093] Step 4: Deposit a tunnel oxide layer and an intrinsic polysilicon layer in sequence to construct a passivation contact structure.

[0094] Step 5: Form an n-type region by phosphorus doping, which forms a pn junction with the p-type region.

[0095] Step 6: Remove the phosphosilicate glass generated by phosphorus diffusion and use the RCA cleaning process to remove surface impurities.

[0096] Step 7: Deposit an aluminum oxide layer.

[0097] Step 8: Deposit an anti-reflection layer on the front side of the cell.

[0098] Step 9: Deposit an anti-reflection layer on the back of the cell as well.

[0099] Step 10: Use the four-probe method to measure the square resistance of the battery cell surface and divide the battery performance into area A (high square resistance area) and area B (low square resistance area);

[0100] Step 11: Silver paste (grid lines) are coated on the front and back surfaces by screen printing technology. The specifications of the grid lines coated in area A are: line width 13 μm, spacing 0.8 mm; the specifications of the grid lines coated in area B are: 19 μm, spacing 1.0 mm;

[0101] Step 12: Use 25W laser power to perform dense sintering on area A, and use low-power laser 18W to perform sparse sintering on area B;

[0102] Step 13: Use light-assisted technology to micro-conduct the front silver paste.

[0103] Example 4:

[0104] An embodiment of the present invention provides a method for preparing a solar cell:

[0105] Step 1: Texturing the surface of the silicon wafer.

[0106] Step 2: Boron diffusion.

[0107] Step 3: Remove the borosilicate glass generated during the boron diffusion process and remove the damaged layer by alkali polishing.

[0108] Step 4: Deposit a tunnel oxide layer and an intrinsic polysilicon layer in sequence to construct a passivation contact structure.

[0109] Step 5: Form an n-type region by phosphorus doping, which forms a pn junction with the p-type region.

[0110] Step 6: Remove the phosphosilicate glass generated by phosphorus diffusion and use the RCA cleaning process to remove surface impurities.

[0111] Step 7: Deposit an aluminum oxide layer.

[0112] Step 8: Deposit an anti-reflection layer on the front side of the cell.

[0113] Step 9: Deposit an anti-reflection layer on the back of the cell as well.

[0114] Step 10: Use the four-probe method to measure the square resistance of the battery cell surface and divide the battery performance into area A (high square resistance area) and area B (low square resistance area);

[0115] Step 11: Apply silver paste (grid lines) on the front and back surfaces by screen printing technology, wherein the specifications of the grid lines coated in area A are: line width 12 μm, spacing 0.7 mm; the specifications of the grid lines coated in area B are: 18 μm, spacing 1.0 mm;

[0116] Step 12: Use 23W laser power to perform dense sintering on area A, and use low power laser 18W to perform sparse sintering on area B;

[0117] Step 13: Use light-assisted technology to micro-conduct the front silver paste.

[0118] The present invention also provides a solar cell prepared by the above method.

[0119] The present invention also provides a solar cell manufacturing device based on square resistance gradient, such as Figure 2 As shown, it includes: a square resistance monitoring module for measuring the square resistance of the battery surface;

[0120] The silver paste printing module is used to print grid lines of different thicknesses and spacings in different sheet resistance areas according to the sheet resistance measured by the sheet resistance monitoring module;

[0121] A dynamic power controller, used to determine different laser powers according to the thickness and spacing of the grid lines;

[0122] The laser sintering module is used to perform laser sintering on the grid lines in different square resistance areas respectively according to the different laser powers.

[0123] In the device provided by the present invention, the square resistance monitoring module can adopt the four-probe method or μ-PCD, the response time of the dynamic power controller is ≤10ms, and the laser head in the laser sintering module is a variable spot laser head with a diameter of 10-50μm.

[0124] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A method for preparing a solar cell based on a sheet resistance gradient, characterized in that: include: Before laser sintering the printed silver paste, it also includes: Divide the cell surface into a high square resistance area and a low square resistance area; The square resistance of the high square resistance area is: 375Ω / □≤R≤400Ω / □; the square resistance of the low square resistance area is: greater than or equal to 350Ω / □≤R<375Ω / □; Different grid line layouts are used for laser sintering of high square resistance area and low square resistance area respectively.

2. The method for preparing a solar cell based on sheet resistance gradient according to claim 1, characterized in that: The laser sintering of the high square resistance region and the low square resistance region using different grid line layouts respectively includes: The width and spacing of the gate lines in the high-square-resistance region are respectively smaller than the width and spacing of the gate lines in the low-square-resistance region.

3. The method for preparing a solar cell based on sheet resistance gradient according to claim 2, characterized in that: The power of the laser sintering of the high-square-resistance region is greater than the power of the laser sintering of the low-square-resistance region.

4. The method for preparing a solar cell based on sheet resistance gradient according to claim 2, characterized in that: The gate lines of the high square resistance area layout are: Line width ≤ 15μm, spacing ≤ 0.8mm; The gate lines of the low square resistance area layout are: 8≤line width≤22μm, 1.0≤spacing≤1.2mm.

5. The method for preparing a solar cell based on a sheet resistance gradient according to claim 3, characterized in that: The gate lines in the high square resistance region are sintered using a laser with a power of 20-25W.

6. The method for preparing a solar cell based on sheet resistance gradient according to claim 3, characterized in that: The gate lines in the low square resistance region are sintered using a laser with a power of 15-18W.

7. A solar cell prepared by the method according to any one of claims 1 to 6.

8. A solar cell manufacturing device based on sheet resistance gradient, characterized in that: include: Square resistance monitoring module, used to measure the square resistance of the battery surface; The silver paste printing module is used to print grid lines of different thicknesses and spacings in different sheet resistance areas according to the sheet resistance measured by the sheet resistance monitoring module; A dynamic power controller, used to determine different laser powers according to the thickness and spacing of the grid lines; The laser sintering module is used to perform laser sintering on the grid lines in different square resistance areas respectively according to the different laser powers.

Images