Capacitance-based detection device, electronic equipment and detection method
By using the method of alternating charging in the capacitance detection device, the influence of environmental interference on capacitance detection is offset, the detection accuracy is improved, the uneven interference problem existing in dual-electrode detection is solved, and higher detection accuracy is achieved.
Patent Information
- Application Number
- CN202410310844.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-18
- Publication Date
- 2025-09-19
AI Technical Summary
In a capacitance detection device based on dual-electrode detection, the interference capacitance generated by environmental interference has an uneven impact, resulting in reduced detection accuracy, and the offset voltage and offset current of the differential amplifier produce zero drift, which reduces the detection accuracy.
By alternately charging the first and second capacitors to the third and fourth capacitors and calculating the capacitance values based on the voltages on the third and fourth capacitors, the uneven effects of the interference capacitors on the first and second capacitors are offset, thereby improving detection accuracy.
By means of alternating charging, the uneven influence of the interference capacitance is effectively offset, the precision of the detection device is improved, and the accuracy of the detection results is ensured.
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Figure CN120668005A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of electronic circuits, and in particular to a capacitance-based detection device, electronic equipment, and detection method. Background Art
[0002] In existing capacitance detection technology, the capacitor under test is typically charged first. After charging, the charge on the capacitor under test is transferred to a post-processing circuit, which converts the charge into a voltage. Since the magnitude of the charge is proportional to the capacitance, and the charge is proportional to the voltage, the capacitance (i.e., the capacitance value) can be detected based on the magnitude of the voltage.
[0003] In some capacitance-based detection devices, the size of the capacitance corresponds to certain physical quantities to be detected, so the detection result of the physical quantity can be obtained by detecting the voltage on the capacitance. The capacitance-based detection device can be a non-contact sensor. For example, the capacitance-based detection device can be a distance detection device. The distance detection device can form a capacitance with the detection object (i.e., the object to be measured). The capacitance value of the capacitance changes with the distance between the detection device and the object to be measured. Therefore, by detecting the voltage on the capacitance, physical quantities such as the distance between the detection device and the object to be measured can be obtained.
[0004] Figure 1 This is a schematic diagram of the principle of the distance detection device 100. A capacitance Cs0 is generated between the detection electrode 2 of the distance detection device 100 and the detection object 1. The detection circuit 3 of the distance detection device 100 detects the voltage on the capacitance Cs0, thereby obtaining physical quantities such as the distance between the detection electrode 2 and the detection object 1.
[0005] Figure 2 This is a circuit diagram of a capacitance-based detection device in the prior art.
[0006] like Figure 2 As shown, in the capacitance-based detection device 200:
[0007] The capacitor Cs0, the single-pole double-throw switch SW1 and the resistor R are connected in sequence between the ground terminal Gnd and the power supply voltage VDD terminal. s One end of the amplifier A2 is connected to the single-pole double-throw switch SW1, and the other end is connected to the A / D (analog / digital) converter, and the input and output ends of the charge amplifier A2 are connected in parallel with the capacitor C1 and the resistor R F ; The single-pole double-throw switch SW1 is controlled by a high-frequency generator, which generates a square wave with an oscillation frequency of f1.
[0008] exist Figure 2 In the example, when the square wave is at a high level, the single-pole double-throw switch SW1 is thrown to the charging terminal, that is, the power supply voltage VDD passes through the resistor R s, the single-pole double-throw switch SW1 charges the capacitor Cs0; when the square wave is at a low level, the single-pole double-throw switch SW1 throws it to the discharge end, that is, the charge on the capacitor Cs0 is converted into a voltage V0 that is positively correlated with the charge, V0 = Q c / C1, where Qc is the charge on capacitor Cs0, and voltage V0 is output from the output terminal of amplifier A2. When measuring using the above method, measurement data (e.g., V0) is obtained each time capacitor Cs0 is charged / discharged.
[0009] exist Figure 1 and Figure 2 In the technical solution shown, detection is performed based on a single electrode (for example, detection electrode 2). In other technical solutions, detection can be performed based on two electrodes. For example, a detection electrode 2, a predetermined electrode, and a ground electrode are provided on a substrate for detection, whereby the predetermined electrode and the ground electrode form a reference capacitor; charging and discharging the reference capacitor can also form a corresponding reference voltage, and the reference voltage and the voltage V0 corresponding to the capacitor Cs0 are differentially amplified to obtain an integral voltage corresponding to the difference between Cs0 and the reference capacitor. The capacitance value of the capacitor Cs0 can be obtained by using the integral voltage and the reference capacitor (whose capacitance value is known).
[0010] Compared to single-electrode detection, dual-electrode detection significantly improves measurement accuracy and immunity to external interference. This is because environmental interference (including electric fields, temperature, stray capacitance, etc.) can be superimposed on the reference capacitor and capacitor Cs0. This can be at least partially eliminated through differential amplification.
[0011] It should be noted that the above introduction to the technical background is merely intended to provide a clear and complete description of the technical solutions of this application and facilitate understanding by those skilled in the art. Simply because these solutions are described in the background technology section of this application, it should not be assumed that the above technical solutions are well known to those skilled in the art. Summary of the Invention
[0012] The inventors discovered that in the technical solution based on dual-electrode detection, the interference capacitance generated by environmental interference does not affect the reference capacitance and capacitance Cs0 equally. In addition, the zero drift caused by the offset voltage and offset current of the circuit performing differential amplification (for example, an operational amplifier) will reduce the detection accuracy.
[0013] To address at least one of the above-mentioned problems or other similar problems, embodiments of the present application provide a capacitance-based detection device, an electronic device, and a detection method. In the capacitance-based detection device, a first capacitor and a second capacitor are alternately charged to a third capacitor and a fourth capacitor, and a detection result corresponding to the capacitance value of the first capacitor is calculated based on the voltage on the third capacitor and the voltage on the fourth capacitor. Thus, by alternately charging, the uneven effects of the interfering capacitor on the first capacitor and the second capacitor can be offset, thereby improving the accuracy of detection.
[0014] According to a first aspect of an embodiment of the present application, a capacitance-based detection device is provided, the detection device comprising:
[0015] a first charging circuit connected to a first capacitor and a second capacitor for charging the first capacitor and the second capacitor, wherein the capacitance value of the first capacitor is variable and the second capacitor has a predetermined capacitance value;
[0016] The third capacitor;
[0017] a fourth capacitor;
[0018] a second charging circuit connected to the first capacitor, the second capacitor, the third capacitor, and the fourth capacitor, wherein the first capacitor and the second capacitor alternately charge the third capacitor and the fourth capacitor through the second charging circuit; and
[0019] A calculation circuit calculates a detection result corresponding to the capacitance value of the first capacitor based on the voltage on the third capacitor and the voltage on the fourth capacitor.
[0020] In at least one embodiment, the first charging circuit includes a first control circuit, a first switch and a second switch.
[0021] The first control circuit controls the conduction state of the first switch and the conduction state of the second switch to be switched at a first frequency,
[0022] When the first switch is in a first on state, the first capacitor is connected to a first power supply.
[0023] When the first switch is in the second on state, the first capacitor is connected to the second charging circuit.
[0024] When the second switch is in the first on state, the second capacitor is connected to the first power supply.
[0025] When the second switch is in the second on state, the second capacitor is connected to the second charging circuit.
[0026] In at least one embodiment, the second charging circuit includes a second control circuit, a third switch, and a fourth switch.
[0027] The second control circuit controls the conduction state of the third switch and the conduction state of the fourth switch to be switched at a second frequency,
[0028] When the third switch is in the first on-state and the fourth switch is in the first on-state, the first capacitor charges the third capacitor, and the second capacitor charges the fourth capacitor;
[0029] When the third switch is in the second on-state and the fourth switch is in the second on-state, the first capacitor charges the fourth capacitor, and the second capacitor charges the third capacitor.
[0030] In at least one embodiment, the first conductive state terminal of the third switch is connected to the second conductive state terminal of the fourth switch.
[0031] The second conductive state terminal of the third switch is connected to the first conductive state terminal of the fourth switch.
[0032] In at least one embodiment, during the switching period corresponding to the second frequency,
[0033] During a first half cycle of the switching cycle, the third switch is in a first on-state and the fourth switch is in a first on-state, and the calculation circuit calculates a first differential voltage between a voltage on the third capacitor and a voltage on the fourth capacitor.
[0034] During a second half cycle of the switching cycle, the third switch is in a second on-state and the fourth switch is in a second on-state, and the calculation circuit calculates a second differential voltage between the voltage on the third capacitor and the voltage on the fourth capacitor.
[0035] The calculation circuit calculates a difference between the first differential voltage and the second differential voltage as the detection result.
[0036] In at least one embodiment, when the conduction states of the third switch and the fourth switch are switched,
[0037] The first switch is in a first conducting state, and the second switch is in a first conducting state.
[0038] In at least one embodiment, the detection device further includes a first circuit board and a second circuit board, wherein the second circuit board is connected to the first circuit board.
[0039] The first circuit board is provided with a first electrode plate, a second electrode plate and a ground electrode plate.
[0040] The second circuit board is provided with a third electrode plate,
[0041] The second capacitor includes a capacitor formed by the second electrode plate, the third electrode plate, and the ground electrode plate.
[0042] The first electrode plate and the ground electrode plate form a basic capacitance of the first capacitor.
[0043] The first electrode plate and the detected object form a variable capacitor of the first capacitor.
[0044] In at least one embodiment, the detection device further includes a shielding plate,
[0045] The shielding plate is at least arranged on the outer periphery of the first circuit board.
[0046] According to a second aspect of the embodiments of the present application, an electronic device is provided, which includes the detection device described in any one of the above embodiments.
[0047] According to a third aspect of an embodiment of the present application, a capacitance-based detection method is provided, the detection method comprising:
[0048] charging a first capacitor and a second capacitor by a first charging circuit, wherein the capacitance value of the first capacitor is variable and the second capacitor has a predetermined capacitance value;
[0049] The first capacitor and the second capacitor alternately charge the third capacitor and the fourth capacitor through a second charging circuit; and
[0050] A calculation circuit is used to calculate a detection result corresponding to the capacitance value of the first capacitor based on the voltage on the third capacitor and the voltage on the fourth capacitor.
[0051] One of the beneficial effects of the embodiments of the present application is that the first capacitor and the second capacitor are alternately charged to the third capacitor and the fourth capacitor, and a detection result corresponding to the capacitance value of the first capacitor is calculated based on the voltage on the third capacitor and the voltage on the fourth capacitor. Thus, by alternating charging, the uneven influence of the interfering capacitor on the first capacitor and the second capacitor can be offset, thereby improving the detection accuracy.
[0052] With reference to the following description and accompanying drawings, specific embodiments of the present application are disclosed in detail, indicating the manner in which the principles of the present application can be employed. It should be understood that the embodiments of the present application are not limited in scope. Within the spirit and scope of the appended claims, the embodiments of the present application include many variations, modifications and equivalents.
[0053] Features described and / or illustrated with respect to one embodiment may be used in the same or similar manner in one or more other embodiments, combined with features in other embodiments, or substituted for features in other embodiments.
[0054] It should be emphasized that the term "include / comprising" when used herein refers to the presence of features, integers, steps or components, but does not exclude the presence or addition of one or more other features, integers, steps or components. BRIEF DESCRIPTION OF THE DRAWINGS
[0055] The elements and features described in one figure or one embodiment of the present application can be combined with the elements and features shown in one or more other figures or embodiments. In addition, in the accompanying drawings, similar reference numerals represent corresponding parts in several figures and can be used to indicate corresponding parts used in more than one embodiment.
[0056] The included drawings are used to provide a further understanding of the embodiments of the present application, which constitute a part of the specification, are used to illustrate the implementation methods of the present application, and together with the text description, explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without inventive work. In the drawings:
[0057] Figure 1 is a schematic diagram of the principle of the distance detection device 100;
[0058] Figure 2 is a circuit diagram of a capacitance-based detection device 200 in the prior art;
[0059] Figure 3 is a schematic diagram of a capacitance-based detection device according to an embodiment of the present application;
[0060] Figure 4 is a schematic diagram of a circuit board in a capacitance-based detection device 300;
[0061] Figure 5 is a timing diagram of the control signals SEL1, SEL2, SEL3, SEL4, the voltage VRC1 on the third capacitor RC1, the voltage VRC2 on the fourth capacitor RC2, and the detection result VC;
[0062] Figure 6 It is a schematic diagram of a capacitance-based detection method according to an embodiment of the present application. DETAILED DESCRIPTION
[0063] The foregoing and other features of the present application will become apparent from the following description with reference to the accompanying drawings. In the description and drawings, specific embodiments of the present application are disclosed, which illustrate some embodiments in which the principles of the present application can be employed. It should be understood that the present application is not limited to the described embodiments. On the contrary, the present application includes all modifications, variations, and equivalents falling within the scope of the appended claims. Various embodiments of the present application are described below with reference to the accompanying drawings. These embodiments are merely illustrative and are not intended to limit the present application.
[0064] In the embodiments of the present application, the terms "first", "second", etc. are used to distinguish different elements from the name, but do not indicate the spatial arrangement or temporal order of these elements, and these elements should not be limited by these terms. The term "and / or" includes any one and all combinations of one or more of the associated listed terms. The terms "comprising", "including", "having", etc. refer to the presence of the stated features, elements, components or components, but do not exclude the presence or addition of one or more other features, elements, components or components.
[0065] In the embodiments of this application, the singular forms "a," "the," etc. include plural forms and should be broadly understood to mean "a" or "a type" rather than being limited to "one." Furthermore, the term "said" should be understood to include both singular and plural forms, unless the context clearly indicates otherwise. Furthermore, the term "according to" should be understood to mean "at least in part based on...", and the term "based on" should be understood to mean "at least in part based on...", unless the context clearly indicates otherwise.
[0066] The embodiments of the present application are described below with reference to the accompanying drawings.
[0067] Example 1
[0068] An embodiment of the present application provides a capacitance-based detection device, which may be, for example, a distance detection device.
[0069] Figure 3 FIG is a schematic diagram of a capacitance-based detection device according to an embodiment of the present application. Figure 3 As shown, the capacitance-based detection device 300 includes:
[0070] A first charging circuit 31 is connected to a first capacitor C1 and a second capacitor Cref to charge the first capacitor C1 and the second capacitor Cref, wherein the capacitance value of the first capacitor C1 is variable and the second capacitor Cref has a predetermined capacitance value;
[0071] A third capacitor RC1;
[0072] a fourth capacitor RC2;
[0073] a second charging circuit 32 connected to the first capacitor C1, the second capacitor Cref, the third capacitor RC1, and the fourth capacitor RC2, wherein the first capacitor C1 and the second capacitor Cref alternately charge the third capacitor RC1 and the fourth capacitor RC2 through the second charging circuit 32; and
[0074] The calculation circuit 33 calculates a detection result corresponding to the capacitance value of the first capacitor C1 based on the voltage VC1 across the third capacitor RC1 and the voltage VC2 across the fourth capacitor RC2.
[0075] According to Example 1 of the present application, the first capacitor and the second capacitor are alternately charged to the third capacitor and the fourth capacitor, and a detection result corresponding to the capacitance value of the first capacitor is calculated based on the voltage on the third capacitor and the voltage on the fourth capacitor. Thus, by alternating charging, the uneven influence of the interfering capacitor on the first capacitor and the second capacitor can be offset, thereby improving the detection accuracy of the detection device 300.
[0076] Figure 4 is a schematic diagram of a circuit board in a capacitance-based detection device 300. Figure 4 As shown, the capacitance-based detection device 300 can have a first circuit board 301 and a second circuit board 302, and the second circuit board 302 is connected to the first circuit board 301. The connection can be an electrical connection or an electrical connection and a mechanical connection. The second circuit board 302 can cross (for example, perpendicular to) the first circuit board 301. The first circuit board 301 and the second circuit board 302 can be printed wiring boards (PWBs) or the like.
[0077] like Figure 4 As shown, a first electrode plate P1, a second electrode plate P2, and a ground electrode plate P0 may be provided on the first circuit board 301. An insulating layer may be formed between the first electrode plate P1 and the ground electrode plate P0, and an insulating layer may be formed between the second electrode plate P2 and the ground electrode plate P0. A third electrode plate P3 may be provided on the second circuit board 302, and the third electrode plate P3 may be electrically connected to the second electrode plate P2.
[0078] The second circuit board 302 may also be provided with at least one of the first charging circuit 31, the third capacitor RC1, the fourth capacitor RC2, the second charging circuit 32 and the calculation circuit 33, or the second circuit board 302 may also be provided with circuit connections connecting the first capacitor C1 and / or the second capacitor Cref to the first charging circuit 31.
[0079] Figure 3 The first capacitor C1 shown may include a basic capacitor Cs and a variable capacitor Cs1. The first electrode plate P1 and the ground electrode plate P0 form the basic capacitor Cs of the first capacitor C1, and the first electrode plate P1 and the detected object (for example, Figure 1 The variable capacitor Cs1 of the first capacitor C1 is formed between the detector).
[0080] Figure 3 The second capacitor Cref shown includes a capacitor formed by the second electrode plate P2, the third electrode plate P3 and the ground electrode plate P0. For example, the ground electrode plate P0 becomes one plate of the capacitor, and the second electrode plate P2 and the third electrode plate P3 become the other plate of the capacitor.
[0081] Since the connection between the second circuit board 302 and the first circuit board 301 will occupy part of the area of the second circuit board 302, resulting in a reduction in the area of the second electrode plate P2, a third electrode plate P3 is provided at the edge of the second circuit board 302 (for example, the edge of the second circuit board 302 close to the edge of the first circuit board 301) to compensate for the second electrode plate P2, so that the capacitance Cref is close to the capacitance Cs, thereby improving the accuracy of detection.
[0082] like Figure 4 As shown, the detection device 300 may further include a shielding plate P4, which is disposed at least on the periphery of the first circuit board 301. For example, the shielding plate P4 may be cylindrical, with the height of the cylinder perpendicular to the first circuit board 301. The first circuit board 301 is located within the cylinder, and at least a portion of the second circuit board 302 is located within the cylinder. The shielding plate P4 can shield the electric field, thereby preventing external electric fields from interfering with Cs1.
[0083] The shielding plate P4 can be made of metal (e.g., copper) and have a certain thickness. For example, the shielding plate P4 can be grounded to shield the electric field, wherein the thickness of the shielding plate P4 can be less than 0.2 mm. For another example, an excitation voltage can be applied to the shielding plate P4 to form active shielding, wherein the thickness of the shielding plate P4 can be greater than 0.5 mm.
[0084] Regarding the method of applying the excitation electric field, in some embodiments, the first control circuit 311 described later can be connected to the drive circuit 34, and a control signal that is synchronized and in phase with the control signals SEL1 and SEL2 can be used to control the drive circuit 34, causing the drive circuit 34 to apply pulses to the shielding plate P4. This prevents the pulses charging and discharging the first capacitor C1 and the second capacitor Cref from interfering with the pulses applied to the shielding plate P4. For example, when the control signal is at a high level, the drive circuit 34 applies a high level to the shielding plate P4, causing the shielding plate P4 to generate an electric field for active shielding.
[0085] Next, the second capacitor Cref will be described.
[0086] In this application, the reference electrodes (i.e., the second electrode plate P2 and the third electrode plate P3) are provided to obtain the same environmental factors as the detection electrode (i.e., the first electrode plate P1). Environmental factors include factors such as interference capacitance and / or temperature changes.
[0087] In the electrical environment, stray capacitors, distributed capacitors, and parasitic capacitors are ubiquitous. These capacitors can be collectively referred to as noise capacitors. As the environment changes, these noise capacitors also change.
[0088] If Cref and Cs are close to or equal to each other, then the external interference amounts to which they are subjected are relatively close, which is conducive to the subsequent detection device 300 to eliminate these interference amounts.
[0089] Therefore, under the condition that there is no detector (ie, Cs1=0), it is expected that C1≒Cref is obtained, and C1 is slightly larger than Cref.
[0090] in:
[0091] C1=Cs+△CT+△CH+Cnosie1+Cd
[0092] Cref=Cref0+△CT+△CH+Cnoise2+Cc
[0093] Cd is the physical capacitance formed between the detection electrode and the detection surface after being installed in the housing;
[0094] Cc is the compensation capacitance of the reference electrode;
[0095] △CT is the physical capacitance drift caused by temperature change;
[0096] △CH is the physical capacitance change caused by humidity change.
[0097] Due to the actual physical structure, Cref cannot be close to Cs, so the compensation capacitor Cc is necessary. The compensation capacitor Cc can be a physical structure, for example, a third electrode plate P3 is provided on the second circuit board 302. In this way, the temperature characteristics of the compensation capacitor Cc are similar to those of Cs, and the drift caused by temperature of the two can change synchronously.
[0098] Considering the difference in position between the detection electrode and the reference electrode, there is also a difference between the interference capacitance Cnoise1 and the interference capacitance Cnoise2. This difference can be eliminated or absorbed by the compensation capacitor Cc.
[0099] Next, the structure and working principle of the capacitance-based detection device 300 will be further described.
[0100] like Figure 3 As shown, the first charging circuit 31 includes a first control circuit 311 , a first switch S1 and a second switch S2 .
[0101] The first control circuit 311 controls the conduction state of the first switch S1 and the conduction state of the second switch S2 to switch at a first frequency f0.
[0102] For example, when the first switch S1 is in the first on-state, the first capacitor C1 is connected to the first power supply Vcc; when the first switch S1 is in the second on-state, the first capacitor C1 is connected to the second charging circuit 32; when the second switch S2 is in the first on-state, the second capacitor Cref is connected to the first power supply Vcc; when the second switch S2 is in the second on-state, the second capacitor Cref is connected to the second charging circuit 32.
[0103] like Figure 4 As shown, in some examples, the first switch S1 and the second switch S2 can be single-pole double-throw (SPDT) switches.
[0104] The first switch S1 has a common terminal COM1, a normally open contact NO1, and a normally closed contact NC1. The first switch S1 receives a control signal SEL1 from the first control circuit 311. The control signal SEL1 (e.g., when at a high level) electrically connects the common terminal COM1 and the normally open contact NO1, placing the first switch S1 in a first conductive state, allowing the first power supply Vcc to charge the first capacitor C1. Alternatively, the control signal SEL1 (e.g., when at a low level) electrically connects the common terminal COM1 and the normally closed contact NC1, placing the first switch S1 in a second conductive state, transferring the charge on the first capacitor C1 to the third capacitor RC1 or the fourth capacitor RC2 via the second charging circuit 32.
[0105] The second switch S2 has a common terminal COM2, a normally open contact NO2, and a normally closed contact NC2. The second switch S2 receives a control signal SEL2 from the first control circuit 311. The control signal SEL2 (e.g., when at a high level) electrically connects the common terminal COM2 and the normally open contact NO2, placing the second switch S2 in a first conductive state, allowing the first power supply Vcc to charge the second capacitor Cref. Alternatively, the control signal SEL2 (e.g., when at a low level) electrically connects the common terminal COM2 and the normally closed contact NC21, placing the second switch S2 in a second conductive state, transferring the charge on the second capacitor Cref to the third capacitor RC1 or the fourth capacitor RC2 via the second charging circuit 32.
[0106] The control signals SEL1 and SEL2 may have a first frequency f0. The control signals SEL1 and SEL2 may have a pulse width modulation (PWM) waveform or a pulse frequency modulation (PFM) waveform. For example, the control signals SEL1 and SEL2 may be 1 MHz to 2 MHz variable frequency pulses or 1 MHz fixed frequency pulses with an adjustable duty cycle.
[0107] The control signals SEL1 and SEL2 may be at a high level or at a low level at the same time. For example, the control signals SEL1 and SEL2 may be the same signal.
[0108] like Figure 3 As shown, the second charging circuit 32 includes a second control circuit 321 , a third switch S3 and a fourth switch S4 .
[0109] The second control circuit 321 controls the conduction state of the third switch S3 and the conduction state of the fourth switch S4 to be switched at a second frequency f1 , and the second frequency f1 may be lower than the first frequency f0 .
[0110] When the third switch S3 is in the first on-state and the fourth switch S4 is in the first on-state, the first capacitor C1 charges the third capacitor RC1, and the second capacitor Cref charges the fourth capacitor RC2.
[0111] When the third switch S3 is in the second on-state and the fourth switch S4 is in the second on-state, the first capacitor C1 charges the fourth capacitor RC2, and the second capacitor Cref charges the third capacitor RC1.
[0112] The third switch S3 has a common terminal COM3, a normally open contact NO3, and a normally closed contact NC3. The third switch S3 receives a control signal SEL3 from the second control circuit 321.
[0113] The fourth switch S4 has a common terminal COM4, a normally open contact NO4, and a normally closed contact NC4. The fourth switch S4 receives a control signal SEL4 from the second control circuit 321.
[0114] The first conduction state terminal (e.g., normally open contact NO3) of the third switch S3 is connected to the second conduction state terminal (e.g., normally closed contact NC4) of the fourth switch S4, and the second conduction state terminal (e.g., normally closed contact NC3) of the third switch S3 is connected to the first conduction state terminal (e.g., normally open contact NO4) of the fourth switch S4.
[0115] In some cases, the control signal SEL3 (for example, when it is at a high level) connects the common terminal COM3 and the normally open contact NO3, so that the third switch S3 enters the first conduction state, and the charge of the first capacitor C1 is transferred to the third capacitor RC1; and the control signal SEL4 (for example, when it is at a high level) connects the common terminal COM4 and the normally open contact NO4, so that the fourth switch S4 enters the first conduction state, and the charge of the second capacitor Cref is transferred to the fourth capacitor RC2.
[0116] In other cases, the control signal SEL3 (for example, when it is at a low level) connects the common terminal COM3 and the normally closed contact NC3, so that the third switch S3 enters the second conduction state, and the charge of the first capacitor C1 is transferred to the fourth capacitor RC2; and the control signal SEL4 (for example, when it is at a low level) connects the common terminal COM4 and the normally closed contact NC4, so that the fourth switch S4 enters the second conduction state, and the charge of the second capacitor Cref is transferred to the third capacitor RC1.
[0117] The control signals SEL3 and SEL4 may have a second frequency f1. The control signals SEL3 and SEL4 may have a pulse width modulation (PWM) waveform or a pulse frequency modulation (PFM) waveform. For example, the frequency of the control signals SEL3 and SEL4 may be 0.5-2 kHz, or other values.
[0118] The control signals SEL3 and SEL4 may be at a high level or at a low level at the same time. For example, the control signals SEL3 and SEL4 may be the same signal.
[0119] In some examples, during a certain half of a cycle of the control signals SEL3 and SEL4, the control signals SEL3 and SEL4 are both high (i.e., the third switch S3 is in the first conduction state and the fourth switch S4 is in the first conduction state), the charge of the first capacitor C1 is transferred to the third capacitor RC1, and the charge of the second capacitor Cref is transferred to the fourth capacitor RC2; during the other half of a cycle of the control signals SEL3 and SEL4, the control signals SEL3 and SEL4 are both low (i.e., the third switch S3 is in the second conduction state and the fourth switch S4 is in the second conduction state), the charge of the first capacitor C1 is transferred to the fourth capacitor RC2, and the charge of the second capacitor Cref is transferred to the third capacitor RC1. Thus, the first capacitor C1 and the second capacitor Cref alternately charge the third capacitor RC1, and the first capacitor C1 and the second capacitor Cref alternately charge the fourth capacitor RC2.
[0120] When the conduction states of the third switch S3 and the fourth switch S4 switch (i.e., switch from the first conduction state to the second conduction state, or switch from the second conduction state to the first conduction state), the first switch S1 is in the first conduction state, and the second switch S2 is in the first conduction state. For example, when the control signals SEL3 and SEL4 switch from a high level to a low level, or switch from a low level to a high level, the control signals SEL1 and SEL2 are both at a high level. Therefore, the switching of the conduction states of the third switch S3 and the fourth switch S4 does not cause the third capacitor or the fourth capacitor to exchange charge with the first capacitor or the second capacitor. Therefore, the signal output by the calculation circuit 33 does not change suddenly, thus avoiding jitter in the signal output by the calculation circuit 33.
[0121] In the present application, the period of control signals SEL3 and SEL4 may also be referred to as a switching period corresponding to the second frequency f1. During the first half of the switching period, the third switch S3 is in the first conduction state and the fourth switch S4 is in the first conduction state, and the calculation circuit 33 calculates a first differential voltage VC1 between the voltage VC1 on the third capacitor RC1 and the voltage VRC2 on the fourth capacitor RC2. During the second half of the switching period, the third switch S3 is in the second conduction state and the fourth switch S4 is in the second conduction state, and the calculation circuit 33 calculates a second differential voltage VC2 between the voltage VRC1 on the third capacitor RC1 and the voltage VRC2 on the fourth capacitor RC2. Subsequently, the calculation circuit 33 calculates the difference VC between the first differential voltage VC1 and the second differential voltage VC2 as a detection result. This difference VC can be input into an analog-to-digital conversion circuit (A / DC) or other circuit for subsequent processing.
[0122] For example, the calculation circuit 33 may include a differential amplifier. In addition, the calculation circuit 33 may also include other components for control or signal processing. The functions of the calculation circuit 33 may be implemented by software or hardware.
[0123] The principle of the detection device 300 is described below with reference to a timing diagram.
[0124] Figure 5 It is a timing diagram of the control signals SEL1 , SEL2 , SEL3 , SEL4 , the voltage VRC1 on the third capacitor RC1 , the voltage VRC2 on the fourth capacitor RC2 , and the detection result VC.
[0125] The control signals SEL1 and SEL2 have a first frequency f0, which is, for example, 1 MHz; the control signals SEL3 and SEL4 have a second frequency f1, which is, for example, 1 kHz.
[0126] exist Figure 5In the figure, the dotted box 52 shows a timing diagram when the third capacitor RC1 and the fourth capacitor RC2 are alternately charged in the embodiment of the present application; the dotted box 51 shows a timing diagram when the third capacitor RC1 and the fourth capacitor RC2 are not alternately charged, as a comparison example of the embodiment of the present application.
[0127] like Figure 5 As shown, the following description focuses on half a cycle of the control signal SEL3 / SEL4 .
[0128] As shown in the dotted box 51 , it is assumed that the charge on the first capacitor C1 charges the third capacitor RC1 , and the charge on the second capacitor Cref charges the fourth capacitor RC2 .
[0129] The dotted boxes represent the voltage fluctuations of VRC1 and VRC2 caused by the environmental influence on the first capacitor C1 and the second capacitor Cref. The fluctuations are, for example, ΔVC1 and ΔVC2. For comparison purposes, it is assumed that ΔVC1 = 2ΔVC2.
[0130] In the case shown in the dotted box 51, the level fluctuations on VRC1 and VRC2 cannot be completely eliminated, that is,
[0131] △VC1-△VC2=△VC2, △VC2 enters differential amplification to form a noise signal, which is superimposed on VC.
[0132] In contrast, in the case shown by the dashed box 52, the noise sensed by the first capacitor C1 and the second capacitor Cref is neutralized in phase or canceled out in phase by the third capacitor RC1 and the fourth capacitor RC2. For example, if the noise is in phase, then under the condition of ΔVC1 = 2ΔVC2, a voltage fluctuation of 1.5ΔVC2 will accumulate on both VRC1 and VRC2. This in-phase voltage fluctuation will appear at the input port of the differential amplifier as a common-mode signal, which is suppressed by the differential amplifier. As a result, the differential amplifier has no output noise. For another example, if the noise is in phase, then through alternating charging, the inverted noise will cancel each other out. Therefore, VC is more accurate.
[0133] like Figure 5 As shown, the following description is made for a complete cycle of the control signal SEL3 / SEL4 .
[0134] First, the situation shown by the dotted-line frame 51 will be described.
[0135] When the control signal SEL3 / SEL4 is at a high level, the first capacitor charges the third capacitor, and the second capacitor charges the fourth capacitor:
[0136] VRC1=VCs+V△Cs+V△C (1)
[0137] VRC2=VCref+V△Cref+V△C (2)
[0138] In formula (1), VCs represents the voltage on the first capacitor C1, V△Cs represents the voltage on the interference capacitor in the path from the first capacitor C1 to the third capacitor RC1, and V△C is the voltage fluctuation value caused by capacitance fluctuation caused by factors such as environmental temperature fluctuation or humidity fluctuation;
[0139] In formula (2), VCref represents the voltage on the second capacitor Cref, V△Cref represents the voltage on the interference capacitor in the path from the second capacitor Cref to the fourth capacitor RC2, and V△C is the voltage fluctuation value caused by capacitance fluctuation caused by factors such as environmental temperature fluctuation or humidity fluctuation. For the sake of convenience, it is assumed that V△C in formula (1) and formula (2) is the same.
[0140] Differentiating VRC1 and VRC2, we get:
[0141] VC1=VRC1–VRC2=VCs–VCref+V△Cs–V△Cref (3)
[0142] When the control signal SEL3 / SEL4 is at a low level, the first capacitor charges the third capacitor, and the second capacitor charges the fourth capacitor:
[0143] The expression of VRC1 is still (1), and the expression of VRC2 is still (2). The result of differentiating VRC1 and VRC2 is:
[0144] VC2=VRC1–VRC2=VCs–VCref+V△Cs–V△Cref (4)
[0145] Add VC1 and VC2 to obtain VC, as shown in the following formula (5):
[0146] VC=VC1+VC2=VCs–VCref+V△Cs–V△Cref+(VCs–VCref+V△
[0147] Cs–V△Cref)=2*(VCs–VCref)+2*(V△Cs–V△Cref) (5)
[0148] According to (5), VC is twice the signal (i.e., VCs – VCref) plus twice the difference in voltage between the two interfering capacitors. When V△Cs – V△Cref is not zero, VC will be subject to interference of 2*(V△Cs – V△Cref).
[0149] Next, the situation shown by the dotted-line frame 52 will be described.
[0150] When the control signal SEL3 / SEL4 is at a high level, the first capacitor charges the third capacitor, and the second capacitor charges the fourth capacitor:
[0151] VRC1 is shown in the above formula (1), VRC2 is shown in the above formula (2), and VC1 obtained by differentiating VRC1 and VRC2 is shown in the above formula (3).
[0152] When the control signal SEL3 / SEL4 is at a low level, the first capacitor charges the fourth capacitor, and the second capacitor charges the third capacitor:
[0153] VRC1=VCref+V△Cs+V△C (6)
[0154] VRC2=VCs+V△Cref+V△C (7)
[0155] The result of differencing VRC1 and VRC2 is:
[0156] VC2=VRC1–VRC2=VCref–VCs+V△Cs–V△Cref (8)
[0157] Subtract VC1 from VC2 to obtain VC, as shown in the following formula (9):
[0158] VC=VC1-VC2=VCs–VCref+V△Cs–V△Cref-(VCref–VCs+V△Cs–V△Cref)=2*(VCs–VCref) (9)
[0159] According to (9), VC is twice the signal quantity (i.e., VCs–VCref), and VC is not affected by the voltage on the interference capacitor.
[0160] It can be seen that in the case shown by the dotted box 52, since the third capacitor and the fourth capacitor are charged alternately, and the calculation circuit 33 performs a subtraction calculation on VC1 and VC2, a detection signal that is not affected by the interference capacitance can be obtained.
[0161] exist Figure 5 In the dotted-line frame 51, a waveform 511 represents the VC when the subject is not present, and a waveform 512 represents the VC when the subject is present.
[0162] exist Figure 5 In the dotted-line frame 52, a waveform 521 represents the VC when the subject is not present, and a waveform 522 represents the VC when the subject is present.
[0163] In the presence of a test object, the difference between waveform 522 and waveform 521 is more obvious than the difference between waveform 512 and waveform 511. That is, in the case shown by the dotted box 52, VC is not affected by the voltage on the interference capacitor, so the detection result is more accurate.
[0164] Example 2
[0165] Embodiment 2 provides an electronic device, which includes the capacitance-based detection device 300 in embodiment 1. Through the electronic device provided by embodiment 2, the first capacitor and the second capacitor are alternately charged to the third capacitor and the fourth capacitor, and the detection result corresponding to the capacitance value of the first capacitor is calculated based on the voltage on the third capacitor and the voltage on the fourth capacitor. Thus, by alternating charging, the uneven influence of the interfering capacitor on the first capacitor and the second capacitor (for example, the influence of the interfering capacitor on different paths) can be offset, thereby improving the detection accuracy.
[0166] In some examples, the electronic device may have, for example, Figure 1 The function of the distance detection device 100 is shown.
[0167] Example 3
[0168] Example 3 provides a capacitance-based detection method, corresponding to Example 1.
[0169] Figure 6 This is a schematic diagram of the capacitance-based detection method, as shown in Figure 6 As shown, the method includes the following operations:
[0170] 601. Charge a first capacitor and a second capacitor using a first charging circuit, where the capacitance of the first capacitor is variable and the second capacitor has a predetermined capacitance.
[0171] 602. The first capacitor and the second capacitor alternately charge the third capacitor and the fourth capacitor through a second charging circuit; and
[0172] 603 . Use a calculation circuit to calculate a detection result corresponding to the capacitance value of the first capacitor based on the voltage on the third capacitor and the voltage on the fourth capacitor.
[0173] For detailed descriptions of each operation, please refer to the relevant descriptions in Example 1.
[0174] Through the above method, the first capacitor and the second capacitor are alternately charged to the third capacitor and the fourth capacitor, and the detection result corresponding to the capacitance value of the first capacitor is calculated based on the voltage on the third capacitor and the voltage on the fourth capacitor. Thus, through alternating charging, the uneven influence of the interfering capacitor on the first capacitor and the second capacitor (for example, the influence of the interfering capacitor on different paths) can be offset, thereby improving the detection accuracy.
[0175] The preferred embodiments of the present application have been described above with reference to the accompanying drawings. Many features and advantages of these embodiments are apparent from this detailed description, and it is intended that the appended claims cover all such features and advantages of these embodiments that fall within their true spirit and scope. Furthermore, since numerous modifications and changes will readily occur to those skilled in the art, the embodiments of the present application are not intended to be limited to the precise construction and operation illustrated and described, but are intended to cover all suitable modifications and equivalents that fall within the scope thereof.
Claims
1. A capacitance-based detection device, characterized in that: The detection device comprises: a first charging circuit connected to a first capacitor and a second capacitor for charging the first capacitor and the second capacitor, wherein the capacitance value of the first capacitor is variable and the second capacitor has a predetermined capacitance value; The third capacitor; a fourth capacitor; a second charging circuit connected to the first capacitor, the second capacitor, the third capacitor, and the fourth capacitor, wherein the first capacitor and the second capacitor alternately charge the third capacitor and the fourth capacitor through the second charging circuit; and A calculation circuit calculates a detection result corresponding to the capacitance value of the first capacitor based on the voltage on the third capacitor and the voltage on the fourth capacitor.
2. The detection device according to claim 1, wherein The first charging circuit includes a first control circuit, a first switch and a second switch, The first control circuit controls the conduction state of the first switch and the conduction state of the second switch to be switched at a first frequency, When the first switch is in a first on state, the first capacitor is connected to a first power supply. When the first switch is in the second on state, the first capacitor is connected to the second charging circuit. When the second switch is in the first on state, the second capacitor is connected to the first power supply. When the second switch is in the second on state, the second capacitor is connected to the second charging circuit.
3. The detection device according to claim 2, wherein: The second charging circuit includes a second control circuit, a third switch and a fourth switch, The second control circuit controls the conduction state of the third switch and the conduction state of the fourth switch to be switched at a second frequency, When the third switch is in the first on-state and the fourth switch is in the first on-state, the first capacitor charges the third capacitor, and the second capacitor charges the fourth capacitor; When the third switch is in the second on-state and the fourth switch is in the second on-state, the first capacitor charges the fourth capacitor, and the second capacitor charges the third capacitor.
4. The detection device according to claim 3, wherein The first conductive state terminal of the third switch is connected to the second conductive state terminal of the fourth switch, The second conductive state terminal of the third switch is connected to the first conductive state terminal of the fourth switch.
5. The detection device according to claim 3, wherein: In the switching period corresponding to the second frequency, During a first half cycle of the switching cycle, the third switch is in a first on-state and the fourth switch is in a first on-state, and the calculation circuit calculates a first differential voltage between a voltage on the third capacitor and a voltage on the fourth capacitor. During a second half cycle of the switching cycle, the third switch is in a second on-state and the fourth switch is in a second on-state, and the calculation circuit calculates a second differential voltage between the voltage on the third capacitor and the voltage on the fourth capacitor. The calculation circuit calculates a difference between the first differential voltage and the second differential voltage as the detection result.
6. The detection device according to claim 3, wherein: When the conduction states of the third switch and the fourth switch are switched, The first switch is in a first conducting state, and the second switch is in a first conducting state.
7. The detection device according to claim 1, wherein: The detection device further includes a first circuit board and a second circuit board, wherein the second circuit board is connected to the first circuit board. The first circuit board is provided with a first electrode plate, a second electrode plate and a ground electrode plate. The second circuit board is provided with a third electrode plate, The second capacitor includes a capacitor formed by the second electrode plate, the third electrode plate, and the ground electrode plate. The first electrode plate and the ground electrode plate form a basic capacitance of the first capacitor. The first electrode plate and the detected object form a variable capacitor of the first capacitor.
8. The detection device according to claim 7, characterized in that The detection device also includes a shielding plate, The shielding plate is at least arranged on the outer periphery of the first circuit board.
9. An electronic device comprising the detection device according to any one of claims 1 to 8.
10. A capacitance-based detection method, characterized in that: The detection method comprises: charging a first capacitor and a second capacitor by a first charging circuit, wherein the capacitance value of the first capacitor is variable and the second capacitor has a predetermined capacitance value; The first capacitor and the second capacitor alternately charge the third capacitor and the fourth capacitor through the second charging circuit; and A calculation circuit is used to calculate a detection result corresponding to the capacitance value of the first capacitor based on the voltage on the third capacitor and the voltage on the fourth capacitor.