Reconfigurable lens-free imaging reconstruction acceleration circuit design method and circuit structure

Abstract

The invention discloses a reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method, which comprises the following steps of: selecting and compiling an automatic tool architecture reconstruction configuration file and a special computing unit in a design file library according to design index requirements, so as to obtain an architecture reconstruction configuration file and a special computing unit reconstruction configuration file; and according to the architecture reconstruction configuration file and the special computing unit reconstruction configuration file, obtaining the specific design of each module of the design file library through an automatic tool, namely obtaining the specific circuit design. According to the invention, the problem of use limitation of a special acceleration circuit to different scenes is solved. The invention further discloses a reconfigurable and configurable lens-free imaging reconstruction acceleration circuit structure which is obtained by reconstruction through the design method of the reconfigurable and configurable lens-free imaging reconstruction acceleration circuit, and the reconfigurable and configurable lens-free imaging reconstruction acceleration circuit structure can be used under lens-free platforms with different parameters.

Description

Technical Field

[0001] The present invention belongs to the technical field of image processing acceleration circuits, relates to a design method of a reconfigurable and configurable lensless imaging reconstruction acceleration circuit, and also relates to a reconfigurable and configurable lensless imaging reconstruction acceleration circuit structure. Background Art

[0002] With the continuous advancement of medical technology, the demand for low-cost, portable health monitoring devices is increasing. Health monitoring devices that can collect cell information, monitor growth processes, extract and process feature information can significantly expand the scope and accuracy of health monitoring. The combination of microfluidics and image processing technologies has made cell monitoring systems miniaturized, low-cost, operational, and accessible. Whether counting cells or extracting feature information, operations such as these rely on restored, clear cell images. The core of this system lies in the reconstruction of images captured by the lensless system.

[0003] However, current methods for restoring images captured by lensless imaging systems are mostly based on convolutional neural networks or general-purpose computing units. These methods are slower and require larger footprints than dedicated acceleration circuits under the same conditions, making it difficult to achieve faster speeds and lower costs.

[0004] Traditional dedicated acceleration circuits have the problem of needing to redesign different circuits to meet different usage requirements in different scenarios. If designs are made to be compatible with different scenarios, it will be impossible to achieve a balance between performance and cost in most scenarios. Summary of the Invention

[0005] The purpose of the present invention is to provide a reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method, which solves the problem of the limitation of dedicated acceleration circuits in different scenarios.

[0006] Another object of the present invention is to provide a reconfigurable and configurable lensless imaging reconstruction acceleration circuit structure that can be used on lensless platforms with different parameters.

[0007] The first technical solution adopted by the present invention is a reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method, which is specifically implemented according to the following steps: Step 1: Select and compile an automated tool architecture reconstruction configuration file and a dedicated computing unit in the design file library according to the design indicator requirements, thereby obtaining an architecture reconstruction configuration file and a dedicated computing unit reconstruction configuration file; Step 2: Based on the architecture reconstruction configuration file and the dedicated computing unit reconstruction configuration file, the specific design of each module in the design file library is obtained through an automated tool, that is, a specific circuit design is obtained.

[0008] The present invention is also characterized in that: The design files in the design file library include dedicated computing units, multiple CPUs, buses, DMA, storage modules, and data interaction module designs. Dedicated computing units include PE, PEA, PEB, PEA task stack, and PEB task stack designs.

[0009] Step 1 is completed manually or by writing an automated tool to select and write an automated tool architecture to reconstruct the configuration file and design a dedicated computing unit in the file library.

[0010] The architecture reconstruction configuration file contains information about the overall circuit structure type, the type and number of interfaces used, and the design type and number of CPUs, DMAs, buses, and memory modules; The reconstruction configuration file of the dedicated computing unit includes the structure of the dedicated computing unit and information about the number of PEs, PEAs, and PEBs in the structure.

[0011] There are three different structures of dedicated computing units. The first structure is a single PE design, the second structure is a PEA and PEB pipeline design, and the third structure is a parallel pipeline design in which the PEA task stack controls multiple PEAs and the PEB task stack controls multiple PEBs.

[0012] Storage module design includes RAM, FIFO, and storage network design.

[0013] The design of the data interaction module includes interface, bus, and DMA design.

[0014] Specifically, step 2 generates the port design and connection relationship of each module based on the architecture reconstruction configuration file and the description algorithm of various architectures, calls the design file library to obtain the specific design within each module, and completes the serial and parallel connection design, specific control design, and port design of the dedicated computing unit based on the reconstruction configuration file and design file library of the dedicated computing unit.

[0015] The second technical solution adopted by the present invention is a reconfigurable and configurable lensless imaging reconstruction acceleration circuit structure, which is designed by applying the reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method of the present invention.

[0016] There are six types of circuit structures. Specifically, the first structure includes a CPU and a data interaction module. The CPU is responsible for image processing calculations, and the data interaction module is responsible for the interaction between the CPU and external data; The second structure includes a dedicated computing unit and a data interaction module. The dedicated computing unit is responsible for image processing calculations, and the data interaction module is responsible for the interaction between the dedicated computing unit and external data. The third structure includes a CPU, a dedicated computing unit, and a data interaction module. The CPU is mainly responsible for controlling and configuring the dedicated computing unit and can also perform some image processing calculations. The dedicated computing unit is responsible for image processing calculations, and the data interaction module is responsible for data interaction between the CPU and the dedicated computing unit and with the outside world. The fourth structure includes a CPU, a data interaction module, and a storage module. The CPU is responsible for image processing and calculation, the storage module is responsible for storing image data and intermediate calculation data, and the data interaction module is responsible for the interaction between the CPU and the storage module as well as external data. The fifth structure includes a dedicated computing unit, a data interaction module, and a storage module. The dedicated computing unit is responsible for image processing calculations, the storage module is responsible for storing image data and intermediate calculation data, and the data interaction module is responsible for the interaction between the dedicated computing unit and the storage module as well as external data. The sixth structure includes a CPU, a dedicated computing unit, a data interaction module and a storage module. The CPU is mainly responsible for controlling and configuring the dedicated computing unit and can also perform some image processing calculations. The dedicated computing unit is responsible for image processing calculations. The storage module is responsible for storing image data and intermediate computing data. The data interaction module is responsible for the interaction between the CPU and the dedicated computing unit and the storage module, as well as with external data.

[0017] The beneficial effects of the present invention are: The reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method of the present invention reconstructs the circuit design file most suitable for the current scene according to the different scene positioning of the product. For a small amount of image processing, a circuit design of a single computing unit serial calculation with the smallest area can be reconstructed. For a large amount of image processing or even video stream processing, a faster pipeline computing unit or multiple groups of parallel pipeline computing units can be reconstructed to meet the real-time large-scale data processing, that is, special computing units with different structures are selected according to the data processing volume; and the appropriate number of storage modules and bus and interface protocol design can also be reconstructed according to the difference in data volume. The lensless imaging reconstruction acceleration circuit design method of the present invention can be applied to a wider range of usage scenarios, has the characteristics of high performance and low cost, and under the requirements of different specific scenarios, can reconstruct the optimal design for the current scene in terms of the balance between performance and cost.

[0018] The reconfigurable and configurable lensless imaging reconstruction acceleration circuit structure of the present invention includes six structures, which can be adapted to the needs of different usage scenarios. It can meet the single-task, low-performance, and low-cost requirements of scenarios such as personal use, and can also meet the multi-task, high-performance requirements of use in clinics and other places. It can achieve a good balance between performance and cost, which is impossible to achieve with traditional dedicated acceleration circuit designs; the specific circuit design of the lensless imaging reconstruction acceleration circuit structure of the present invention does not depend on the parameters of the external lensless imaging platform, and can be used under lensless platforms with different parameters. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is a flow chart of a method for designing a reconfigurable and configurable lensless imaging reconstruction acceleration circuit according to the present invention; Figure 2 This is a schematic diagram of a design file library of a reconfigurable and configurable lensless imaging reconstruction acceleration circuit according to the present invention; Figure 3 Schematic diagram of the internal structure of PE in the reconfigurable and configurable lensless imaging reconstruction acceleration circuit of the present invention; Figure 4 Schematic diagram of the internal structure of the PEA in the reconfigurable and configurable lensless imaging reconstruction acceleration circuit of the present invention; Figure 5 Schematic diagram of the internal structure of the PEB in the reconfigurable and configurable lensless imaging reconstruction acceleration circuit of the present invention; Figure 6 This is a schematic diagram of the first structure of a dedicated computing unit in the reconfigurable and configurable lensless imaging reconstruction acceleration circuit of the present invention; Figure 7 This is a second structural diagram of a dedicated computing unit in the reconfigurable and configurable lensless imaging reconstruction acceleration circuit of the present invention; Figure 8 This is a third structural schematic diagram of a dedicated computing unit in the reconfigurable and configurable lensless imaging reconstruction acceleration circuit of the present invention; Figure 9 Schematic diagram of the overall architecture of the reconfigurable and configurable lensless imaging reconstruction acceleration circuit of the present invention; Figure 10 This is a schematic diagram of the first structure of the reconfigurable and configurable lensless imaging reconstruction acceleration circuit structure of the present invention; Figure 11 This is a schematic diagram of the second structural structure of the reconfigurable and configurable lensless imaging reconstruction acceleration circuit structure of the present invention; Figure 12 This is a schematic diagram of the third structural embodiment of the reconfigurable and configurable lensless imaging reconstruction acceleration circuit structure of the present invention; Figure 13 This is a schematic diagram of the fourth structural structure of the reconfigurable and configurable lensless imaging reconstruction acceleration circuit structure of the present invention; Figure 14 This is a schematic diagram of the fifth structural embodiment of the reconfigurable and configurable lensless imaging reconstruction acceleration circuit structure of the present invention; Figure 15 This is a sixth structural schematic diagram of the reconfigurable and configurable lensless imaging reconstruction acceleration circuit structure of the present invention.

[0020] In the figure, 1. CPU, 2. Data interaction module, 3. Dedicated computing unit, 4. Storage module, 5. DMA, 6. Bus, 7. External interface, 8. PE, 9. PEA, 10. PEB, 11. PEA task stack, 12. PEB task stack, 13. Holographic reconstruction module, 14. Autofocus module, 15. FFT module, 16. Phase recovery module. DETAILED DESCRIPTION

[0021] The present invention is described in detail below with reference to the accompanying drawings and specific embodiments. The embodiments described are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0022] Example 1 This embodiment provides a reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method, such as Figure 1 As shown, please follow the steps below: Step 1: For different application requirements, according to the design index requirements, manually complete or write an automated tool to select and write an automated tool architecture reconstruction configuration file and a dedicated computing unit in the design file library, that is, obtain the architecture reconstruction configuration file and the dedicated computing unit reconstruction configuration file; Step 2: Based on the architecture reconstruction configuration file and the dedicated computing unit reconstruction configuration file, the specific design of each module in the design file library is obtained through an automated tool, that is, a specific circuit design is obtained.

[0023] Subsequently, parameter configuration can be performed according to the specific circuit design, that is, calculation mode configuration, automatic focusing parameter configuration, phase iteration parameter configuration, internal storage configuration and other parameter configurations can be performed according to external conditions such as different image sizes and image reconstruction tasks.

[0024] The parametric design enables the reconstructed specific instances of the architecture to adapt to certain changes in external conditions, such as changes in image parameters, without having to reconstruct the design and produce new circuits. In other words, the reconstructed specific design is not bound to or dependent on the external lensless imaging system parameters, and the same product can be used on different lensless imaging system platforms.

[0025] This embodiment only represents a preferred implementation method of the reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method of the present invention. Any lensless imaging acceleration circuit reconstruction method designed using technical features similar to those of the present invention will fall within the protection scope of the reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method of the present invention.

[0026] Example 2 This embodiment provides a reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method. Based on embodiment 1, Figure 2 As shown, the design files in the design file library include the designs of a dedicated computing unit 3, multiple CPUs 1, buses 6, DMA 5, storage modules 4, and data interaction modules 2. The dedicated computing unit 3 includes the designs of PE 8, PEA 9, PEB 10, PEA task stack 11, and PEB task stack 12.

[0027] The design files in the design file library only have functional designs but no port designs and connection relationships, and there is no specific control logic design in the designs of the PEA task stack 11 and the PEB task stack 12.

[0028] This embodiment only represents a preferred implementation method of the reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method of the present invention. Any lensless imaging acceleration circuit reconstruction method designed using technical features similar to those of the present invention will fall within the protection scope of the reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method of the present invention.

[0029] Example 3 This embodiment provides a reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method. Based on Example 2, the design files in the design file library include the design of a dedicated computing unit 3, multiple CPUs 1, a bus 6, a DMA 5, a storage module 4, and a data interaction module 2. The dedicated computing unit 3 includes the design of PE8, PEA9, PEB10, PEA task stack 11, and PEB task stack 12.

[0030] The design files in the design file library only have functional designs but no port designs and connection relationships, and there is no specific control logic design in the designs of the PEA task stack 11 and the PEB task stack 12.

[0031] The design of storage module 4 includes RAM, FIFO, and storage network design.

[0032] The design of the data interaction module 2 includes the design of the interface, bus 6, and DMA 5.

[0033] like Figure 3As shown, PE8 includes a holographic reconstruction module 13, an automatic focusing module 14, an FFT module 15 and a phase recovery module 16, which can realize the functions of holographic reconstruction, automatic focusing and phase iteration; like Figure 4 As shown, PEA9 includes a holographic reconstruction module 13, an automatic focusing module 14, and an FFT module 15, which can realize holographic reconstruction and automatic focusing functions; like Figure 5 As shown, the PEB 10 includes a phase recovery module 16 and an FFT module 15, which can implement the phase iteration function. The specific algorithm used can be flexibly selected through reconstruction design or parameter configuration.

[0034] This embodiment only represents a preferred implementation method of the reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method of the present invention. Any lensless imaging acceleration circuit reconstruction method designed using technical features similar to those of the present invention will fall within the protection scope of the reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method of the present invention.

[0035] Example 4 This embodiment provides a reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method, which is specifically implemented according to the following steps: Step 1: For different application requirements, according to the design index requirements, manually complete or write an automated tool to select and write an automated tool architecture reconstruction configuration file and a dedicated computing unit in the design file library, that is, obtain the architecture reconstruction configuration file and the dedicated computing unit reconstruction configuration file; The written automation tool enables it to call the design file library to complete the port and connection relationship according to the architecture reconstruction configuration file, and call the design file library to complete some specific control logic and other designs of the dedicated computing unit 3 according to the reconstruction configuration file of the dedicated computing unit 3; Step 2: Obtain the specific design of each module in the design file library through an automated tool according to the architecture reconstruction configuration file and the dedicated computing unit reconstruction configuration file, that is, obtain the specific circuit design.

[0036] The architecture reconstruction configuration file includes information on the overall circuit structure type, the type and number of interfaces used, and the design type and number of CPU 1, DMA 5, bus 6, and storage module 4; Subsequently, parameter configuration can be performed according to the specific circuit design, that is, calculation mode configuration, automatic focusing parameter configuration, phase iteration parameter configuration, internal storage configuration and other parameter configurations can be performed according to external conditions such as different image sizes and image reconstruction tasks.

[0037] This embodiment only represents a preferred implementation method of the reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method of the present invention. Any lensless imaging acceleration circuit reconstruction method designed using technical features similar to those of the present invention will fall within the protection scope of the reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method of the present invention.

[0038] Example 5 This embodiment provides a reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method, which is specifically implemented according to the following steps: Step 1: For different application requirements, according to the design index requirements, manually complete or write an automated tool to select and write an automated tool architecture reconstruction configuration file and a dedicated computing unit in the design file library, that is, obtain the architecture reconstruction configuration file and the dedicated computing unit reconstruction configuration file; The reconstruction configuration file of the dedicated computing unit 3 includes the structure of the dedicated computing unit 3 and the number of PE8, PEA9, and PEB10 in the structure; The dedicated computing unit 3 has three different structures. The first structure is a single PE8 design, the second structure is a PEA9 and PEB10 pipeline design, and the third structure is a parallel pipeline design in which the PEA task stack 11 controls multiple PEA9s and the PEB task stack 12 controls multiple PEB10s. In the first configuration of the dedicated computing unit 3, a single PE8 is responsible for all image computations from input to output, including autofocus, holographic reconstruction, and phase recovery. Therefore, the dedicated computing unit 3 can only process multiple images serially when reconstructing them.

[0039] In the second architecture of the dedicated computing unit 3, PEA9 is responsible for autofocus and holographic reconstruction calculations, while PEB10 is responsible for phase recovery calculations. When reconstructing multiple images, PEA9 first performs autofocus and holographic reconstruction calculations, and the results are input to PEB10 for phase recovery calculations. While PEB10 is calculating, PEA9 can also perform calculations for the next image task, forming a pipeline between PEA9 and PEB10.

[0040] In the third architecture of the dedicated computing unit 3, image processing tasks requiring autofocus calculations and holographic reconstruction are placed in the PEA task stack 11. This stack controls and dispatches these tasks to a specific PEA 9 for computation. The computation results are then output to the PEB task stack 12, which in turn controls and dispatches these tasks to a specific PEB 10 for further computation. The design of the PEA task stack 11 and PEB task stack 12, combined with multiple PEAs 9 and 10, allows for efficient utilization of each PEA 9 and 10 to increase parallelism. Similarly, a pipeline is established between the PEAs 9 and 10.

[0041] CPU1 and dedicated computing unit 3 can be flexibly reconfigured to properly distribute computing tasks based on computing needs. CPU1 can be reconfigured as a high-performance processor to handle certain calculations, or as a low-cost CPU1 solely responsible for control functions. Circuit designs that do not include a CPU1 are also possible. If both CPU1 and dedicated computing unit 3 are present, CPU1 typically handles the control and configuration of dedicated computing unit 3. However, the higher-performance CPU1 can also be used to handle some computing tasks that the dedicated computing unit 3 cannot complete, greatly improving circuit design efficiency.

[0042] Step 2: Based on the architecture reconstruction configuration file and the dedicated computing unit reconstruction configuration file, the specific design of each module in the design file library is obtained through an automated tool, that is, a specific circuit design is obtained.

[0043] Subsequently, parameter configuration can be performed according to the specific circuit design, that is, calculation mode configuration, automatic focusing parameter configuration, phase iteration parameter configuration, internal storage configuration and other parameter configurations can be performed according to external conditions such as different image sizes and image reconstruction tasks.

[0044] This embodiment only represents a preferred implementation method of the reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method of the present invention. Any lensless imaging acceleration circuit reconstruction method designed using technical features similar to those of the present invention will fall within the protection scope of the reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method of the present invention.

[0045] Example 6 This embodiment provides a reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method, which is specifically implemented according to the following steps: Step 1: For different application requirements, according to the design index requirements, manually complete or write an automated tool to select and write an automated tool architecture reconstruction configuration file and a dedicated computing unit in the design file library, that is, obtain the architecture reconstruction configuration file and the dedicated computing unit reconstruction configuration file; The written automation tool enables it to call the design file library to complete the port and connection relationship according to the architecture reconstruction configuration file, and call the design file library to complete some specific control logic and other designs of the dedicated computing unit 3 according to the reconstruction configuration file of the dedicated computing unit 3; The reconstruction configuration file of the dedicated computing unit 3 contains the structure of the dedicated computing unit 3 and the number of PE8, PEA9, and PEB10 in the structure; the dedicated computing unit 3 has three different structures, such as Figure 6 As shown, the first structure is a single PE8 design, such as Figure 7 As shown, the second structure is a PEA9 and PEB10 pipeline design, such as Figure 8As shown, the third structure is a parallel pipeline design in which the PEA task stack 11 controls multiple PEA9s and the PEB task stack 12 controls multiple PEB10s; the first structure is a single PE8 design that processes multiple image processing tasks one by one in sequence when executing multiple image processing tasks; the second structure is a pipeline design in which PEA9 and PEB10 are processed and transferred to PEB10 for subsequent processing when executing multiple image processing tasks, and PEA9 can process the next image processing task at the same time, forming a pipeline; the third structure is a parallel pipeline design in which the PEA task stack 11 controls multiple PEA9s and the PEB task stack 12 controls multiple PEB10s. When executing multiple image processing tasks, multiple image processing tasks are simultaneously assigned by the PEA task stack 11 to multiple PEA9s for parallel processing. After PEA9 completes processing, they are transferred to the PEB task stack 12, and the PEB task stack 12 is assigned to multiple PEB10s for parallel processing. At the same time, PEA9 can perform the next set of image processing tasks, forming multiple parallel pipelines.

[0046] Step 2: Based on the architecture reconstruction configuration file and the dedicated computing unit reconstruction configuration file, the specific design of each module in the design file library is obtained through an automated tool, that is, a specific circuit design is obtained.

[0047] The architecture reconstruction configuration file contains information about the overall circuit structure type, the type and number of interfaces used, and the design type and number of CPU1, DMA5, bus 6, and storage module 4. The reconstruction configuration file of the dedicated computing unit 3 contains information about the structure of the dedicated computing unit 3 and the number of PE8, PEA9, and PEB10 in the structure. Step 2 specifically generates the port design and connection relationship of each module according to the architecture reconstruction configuration file and the description algorithm of various architectures, calls the design file library to obtain the specific design within each module, and completes the serial and parallel connection design of PE8, PEA9, and PEB10 of the selected special computing unit 3 structure according to the reconstruction configuration file and design file library of the special computing unit 3, generates the specific control design of the PEA task stack 11 and the PEB task stack 12, the port design and other specific details to obtain the specific special computing unit 3 module design.

[0048] During application, the configuration file is completed manually or automatically, and the automated tool generates a specific, reconfigurable, and lensless imaging reconstruction acceleration circuit design based on the configuration file. Under the requirements of high performance, multi-tasking, and high parallelism, a dedicated computing unit 3 of the third structure and a storage module 4 based on a storage network can be generated. To meet high-speed data transmission requirements, the data interaction module 2 containing the bus 6 and DMA 5 can be reconstructed, and the CPU 1 is responsible for configuring and controlling the remaining modules. Under the requirements of low cost, low performance, and a small number of tasks, a structure containing only the CPU 1 or the dedicated computing unit 3 and the data interaction module 2 can be generated. The CPU 1 or the dedicated computing unit 3 of the first structure performs operations on the input data, and the results are directly output by the data interaction module 2 containing only the external interface 7. For a variety of actual situations, the most suitable structure can be reconstructed to achieve the best circuit performance, cost, etc. for this situation.

[0049] Subsequently, parameter configuration can be performed according to the specific circuit design, that is, calculation mode configuration, automatic focusing parameter configuration, phase iteration parameter configuration, internal storage configuration and other parameter configurations can be performed according to external conditions such as different image sizes and image reconstruction tasks.

[0050] This embodiment only represents a preferred implementation method of the reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method of the present invention. Any lensless imaging acceleration circuit reconstruction method designed using technical features similar to those of the present invention will fall within the protection scope of the reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method of the present invention.

[0051] Example 7 This embodiment provides a reconfigurable and configurable lensless imaging reconstruction acceleration circuit structure, such as Figure 9 As shown, there are six circuit structures designed by applying the reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method of Example 6.

[0052] like Figure 10 As shown, the first structure includes CPU1 and data interaction module 2, CPU1 is responsible for image processing calculation, and data interaction module 2 is responsible for CPU1 to interact with external data; like Figure 11 As shown, the second structure includes a dedicated computing unit 3 and a data interaction module 2. The dedicated computing unit 3 is responsible for image processing calculations, and the data interaction module 2 is responsible for the interaction between the dedicated computing unit 3 and external data. like Figure 12As shown, the third structure includes CPU1, dedicated computing unit 3 and data interaction module 2. CPU1 is mainly responsible for controlling and configuring dedicated computing unit 3 and can also perform some image processing calculations. Dedicated computing unit 3 is responsible for image processing calculations. Data interaction module 2 is responsible for data interaction between CPU1 and dedicated computing unit 3 as well as with external data. like Figure 13 As shown, the fourth structure includes CPU1, data interaction module 2 and storage module 4. CPU1 is responsible for image processing calculations, storage module 4 is responsible for storing image data, calculation intermediate data and other data, and data interaction module 2 is responsible for the interaction between CPU1 and storage module 4 and external data.

[0053] like Figure 14 As shown, the fifth structure includes a dedicated computing unit 3, a data interaction module 2 and a storage module 4. The dedicated computing unit 3 is responsible for image processing calculations, the storage module 4 is responsible for the storage of image data, calculation intermediate data and other data, and the data interaction module 2 is responsible for the interaction between the dedicated computing unit 3 and the storage module 4 as well as external data.

[0054] like Figure 15 As shown, the sixth structure includes CPU1, a dedicated computing unit 3, a data interaction module 2 and a storage module 4. CPU1 is mainly responsible for controlling and configuring the dedicated computing unit 3 and can also perform some image processing calculations. The dedicated computing unit 3 is responsible for image processing calculations. The storage module 4 is responsible for storing image data, intermediate calculation data and other data. The data interaction module 2 is responsible for data interaction between CPU1 and the dedicated computing unit 3 and the storage module 4 as well as with external data.

[0055] This embodiment only represents a preferred implementation of the reconfigurable and configurable lensless imaging reconstruction acceleration circuit structure of the present invention. Any lensless imaging reconstruction acceleration circuit structure designed with similar technical features to the present invention will fall within the protection scope of the reconfigurable and configurable lensless imaging reconstruction acceleration circuit structure of the present invention.

Claims

1. A reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method, characterized in that: Please follow the steps below to implement it: Step 1: Select and compile an automated tool architecture reconstruction configuration file and a dedicated computing unit in the design file library according to the design indicator requirements, thereby obtaining an architecture reconstruction configuration file and a dedicated computing unit reconstruction configuration file; Step 2: Based on the architecture reconstruction configuration file and the dedicated computing unit reconstruction configuration file, the specific design of each module in the design file library is obtained through an automated tool, that is, a specific circuit design is obtained.

2. The reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method according to claim 1, characterized in that: The design files in the design file library include designs of a dedicated computing unit (3), multiple CPUs (1), a bus (6), a DMA (5), a storage module (4), and a data interaction module (2). The dedicated computing unit (3) includes designs of a PE (8), a PEA (9), a PEB (10), a PEA task stack (11), and a PEB task stack (12).

3. The reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method according to claim 2, characterized in that: The step 1 is completed manually or by writing an automated tool to select and write an automated tool architecture to reconstruct a configuration file and design a dedicated computing unit in the file library.

4. The reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method according to claim 2, characterized in that: The architecture reconstruction configuration file includes information on the overall circuit structure type, the type and number of interfaces used, and the design type and number of CPU (1), DMA (5), bus (6), and storage module (4); The reconstruction configuration file of the dedicated computing unit (3) includes the structure of the dedicated computing unit (3) and information on the number of PEs (8), PEAs (9), and PEBs (10) in the structure.

5. The reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method according to claim 4, characterized in that: The dedicated computing unit (3) has three different structures. The first structure is a single PE (8) design, the second structure is a PEA (9) and PEB (10) pipeline design, and the third structure is a parallel pipeline design in which a PEA task stack (11) controls multiple PEAs (9) and a PEB task stack (12) controls multiple PEBs (10).

6. The reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method according to claim 2, characterized in that: The storage module (4) design includes RAM, FIFO, and storage network design.

7. The reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method according to claim 2, characterized in that: The design of the data interaction module (2) includes the design of an interface, a bus (6), and a DMA (5).

8. The reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method according to claim 4, characterized in that: Specifically, the step 2 is to generate the port design and connection relationship of each module according to the architecture reconstruction configuration file and the description algorithm of various architectures, call the design file library to obtain the specific design within each module, and complete the serial and parallel connection design, specific control design, and port design of the dedicated computing unit according to the reconstruction configuration file and design file library of the dedicated computing unit (3).

9. A reconfigurable and configurable lensless imaging reconstruction acceleration circuit structure, characterized in that: The circuit is designed by applying the reconfigurable and configurable lensless imaging reconstruction acceleration circuit design method as claimed in claim 2.

10. The reconfigurable and configurable lensless imaging reconstruction acceleration circuit structure according to claim 9, characterized in that: There are six types of circuit structures. Specifically, the first type of structure includes a CPU (1) and a data interaction module (2), wherein the CPU (1) is responsible for image processing calculations, and the data interaction module (2) is responsible for the interaction between the CPU (1) and external data; The second structure includes a dedicated computing unit (3) and a data interaction module (2), wherein the dedicated computing unit (3) is responsible for image processing calculations, and the data interaction module (2) is responsible for the interaction between the dedicated computing unit (3) and external data; The third structure includes a CPU (1), a dedicated computing unit (3) and a data interaction module (2). The CPU (1) is mainly responsible for controlling and configuring the dedicated computing unit (3) and can also perform some image processing calculations. The dedicated computing unit (3) is responsible for image processing calculations. The data interaction module (2) is responsible for data interaction between the CPU (1) and the dedicated computing unit (3) and with external data. The fourth structure includes a CPU (1), a data interaction module (2) and a storage module (4). The CPU (1) is responsible for image processing calculations, the storage module (4) is responsible for storing image data and intermediate calculation data, and the data interaction module (2) is responsible for the interaction between the CPU (1) and the storage module (4) as well as external data. The fifth structure includes a dedicated computing unit (3), a data interaction module (2) and a storage module (4). The dedicated computing unit (3) is responsible for image processing calculations, the storage module (4) is responsible for storing image data and intermediate computing data, and the data interaction module (2) is responsible for interaction between the dedicated computing unit (3) and the storage module (4) as well as external data. The sixth structure includes a CPU (1), a dedicated computing unit (3), a data interaction module (2) and a storage module (4). The CPU (1) is mainly responsible for controlling and configuring the dedicated computing unit (3) and can also perform some image processing calculations. The dedicated computing unit (3) is responsible for image processing calculations. The storage module (4) is responsible for storing image data and intermediate computing data. The data interaction module (2) is responsible for data interaction between the CPU (1), the dedicated computing unit (3) and the storage module (4) as well as with external data.

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