Master-slave device synchronization control method, device, and storage medium
By acquiring timestamp and power ripple data, calculating phase compensation values, and dynamically adjusting the timing of control signals, the combined effects of power supply and communication errors in medical equipment systems are resolved. This achieves precise synchronous control and reliability, improving the diagnostic and treatment outcomes and safety in critical medical scenarios.
Patent Information
- Application Number
- CN202511163634.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-20
- Publication Date
- 2025-11-11
- Estimated Expiration
- 2045-08-20
AI Technical Summary
The combined effects of power supply and communication errors in medical equipment systems lead to a decrease in the accuracy and reliability of synchronous control. This is especially true in critical medical scenarios such as image-guided surgery and multimodal therapy, where the interaction between power supply noise and communication delays severely impacts diagnostic and treatment outcomes and safety.
By acquiring the timestamps of the master and slave devices, the communication transmission delay and power ripple data are calculated, converted into time domain compensation values, and combined with a preset mathematical model to calculate phase compensation values. The timing of control signal generation is then dynamically adjusted to synchronously control the master and slave devices.
It achieves precise synchronous control and reliability of medical equipment systems, improves the ability to handle system-level synchronization errors, and ensures diagnostic and treatment effectiveness and safety.
Smart Images

Figure CN120675658B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of frequency converter technology, and particularly relates to a master-slave device synchronization control method, device and storage medium. Background Technology
[0002] In the field of precision collaborative control of multi-module medical device systems, the core challenge of existing technologies lies in the collaborative handling of errors in both the power supply and communication domains. Specifically, this manifests as a combined error effect generated by medical-grade power systems (such as kHz-MHz high-frequency ripple interference in DSA equipment) and medical IoT communication (typical ±200μs delay jitter). This multi-physics coupled interference severely restricts the synchronization control accuracy and reliability of medical device clusters. Particularly in critical medical scenarios such as image-guided surgery and multimodal therapy, the interaction between power supply noise and communication delay can amplify system-level synchronization errors, directly impacting diagnostic and treatment outcomes and medical safety. Summary of the Invention
[0003] In view of this, embodiments of the present invention provide a master-slave device synchronization control method, device and storage medium, which achieves precise synchronization control and reliability of medical device systems by establishing coupling compensation between power ripple and communication delay.
[0004] A first aspect of the present invention provides a master-slave device synchronization control method, comprising:
[0005] Obtain the first timestamp carried in the signal broadcast by the master device to the slave device and the second timestamp of the signal received by the slave device;
[0006] Calculate the communication transmission delay based on the first timestamp and the second timestamp;
[0007] Measure the power ripple data of the slave device and convert the power ripple data into a time-domain compensation value;
[0008] Calculate the phase compensation value based on the time domain compensation amount and the communication transmission delay amount;
[0009] Based on the phase compensation value, the generation time of the control signal is dynamically adjusted to synchronously control the master and slave devices.
[0010] In one embodiment, converting the power supply ripple data into a time-domain compensation amount includes:
[0011] The output voltage of the synchronous sampling isolation power supply module is used to extract the ripple signal amplitude through digital filtering. The compensation time is obtained by multiplying the ripple amplitude by the power supply compensation coefficient, wherein the power supply compensation coefficient is inversely proportional to the ripple frequency.
[0012] In one embodiment, the output voltage of the synchronous sampling isolation power supply module is used to extract the ripple signal amplitude through digital filtering, including:
[0013] On the isolated power supply module side, the high voltage output is converted to the range of the isolated analog-to-digital converter through a resistor voltage divider network;
[0014] The signal is oversampled by a modulator at a preset clock on the primary side of the isolated analog-to-digital converter, and the digital bit stream is transmitted through magnetic isolation on the secondary side of the isolated analog-to-digital converter. The digital bit stream is then reconstructed into a preset bit digital code value through a filter.
[0015] After the preset bit code value is input into the digital filter for filtering, the amplitude of the ripple signal is extracted through a sliding window.
[0016] In one embodiment, while obtaining the compensation time amount based on the ripple amplitude multiplied by the dynamic coefficient, the method further includes:
[0017] The ripple frequency is monitored in real time, and the power supply compensation coefficient is adjusted in real time based on the ripple frequency.
[0018] In one embodiment, calculating the phase compensation value based on the time-domain compensation amount and the communication transmission delay amount includes:
[0019] The time-domain compensation amount and the communication transmission delay amount are fused into the phase compensation value through a preset mathematical model.
[0020] In one embodiment, the preset mathematical model is represented as:
[0021] ;in, For time-domain compensation, Ripple amplitude, Let be the power supply compensation coefficient for the i-th frequency band included in the ripple. For communication compensation coefficient, This refers to the communication transmission delay. The frequency of the signal to be compensated. To convert the time offset into a phase radian value, This is the phase compensation value.
[0022] In one embodiment, the communication compensation coefficient is inversely correlated with the sliding window variance of the communication transmission delay.
[0023] A second aspect of this application provides a master-slave device synchronization control apparatus, comprising:
[0024] The acquisition module is used to acquire the first timestamp carried in the signal broadcast by the master device to the slave device and the second timestamp of the signal received by the slave device.
[0025] The first calculation module is used to calculate the communication transmission delay based on the first timestamp and the second timestamp;
[0026] A conversion module is used to measure the power ripple data of the slave device and convert the power ripple data into a time domain compensation amount.
[0027] The second calculation module is used to calculate the phase compensation value based on the time domain compensation amount and the communication transmission delay amount;
[0028] The adjustment module is used to dynamically adjust the generation time of the control signal according to the phase compensation value in order to synchronously control the master and slave devices.
[0029] In one embodiment, the conversion module is specifically used for:
[0030] The output voltage of the synchronous sampling isolation power supply module is used to extract the ripple signal amplitude through digital filtering. The compensation time is obtained by multiplying the ripple amplitude by the power supply compensation coefficient, wherein the power supply compensation coefficient is inversely proportional to the ripple frequency.
[0031] In one embodiment, the conversion module includes:
[0032] A conversion unit is used to convert the high voltage output to the range of an isolated analog-to-digital converter via a resistor divider network on the isolated power supply module side.
[0033] The reconstruction unit is used to oversample the signal at a preset clock through a modulator on the primary side of the isolated analog-to-digital converter, transmit the digital bit stream through magnetic isolation on the secondary side of the isolated analog-to-digital converter, and reconstruct the digital bit stream into a preset bit digital code value through a filter.
[0034] The extraction unit is used to input the preset bit digital code value into a digital filter for filtering, and then extract the ripple signal amplitude through a sliding window.
[0035] In one embodiment, the device further includes:
[0036] An adjustment module is used to monitor the ripple frequency in real time and adjust the power compensation coefficient in real time according to the ripple frequency.
[0037] In one embodiment, the second computing module is specifically used for:
[0038] The time-domain compensation amount and the communication transmission delay amount are fused into the phase compensation value through a preset mathematical model.
[0039] In one embodiment, the preset mathematical model is represented as:
[0040] ;in, For time-domain compensation, Ripple amplitude, Let be the power supply compensation coefficient for the i-th frequency band included in the ripple. For communication compensation coefficient, This refers to the communication transmission delay. The frequency of the signal to be compensated. To convert the time offset into a phase radian value, This is the phase compensation value.
[0041] In one embodiment, the communication compensation coefficient is inversely correlated with the sliding window variance of the communication transmission delay.
[0042] A third aspect of this application provides a master-slave device synchronization control device, comprising: a processor, a memory, and a computer program stored in the memory and executable on the processor; the processor executes the computer program to implement the method described in the first aspect above.
[0043] A fourth aspect of this application provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the method described in the first aspect above.
[0044] The beneficial effects of this application's embodiments are as follows: First, the first timestamp carried in the broadcast signal from the master device to the slave device and the second timestamp of the signal received by the slave device are obtained; the communication transmission delay is calculated based on the first and second timestamps; the power ripple data of the slave device is measured and converted into a time-domain compensation value; a phase compensation value is calculated based on the time-domain compensation value and the communication transmission delay; the generation time of the control signal is dynamically adjusted based on the phase compensation value to synchronously control the master and slave devices. By establishing coupling compensation between power ripple and communication delay, precise synchronous control and reliability of the medical device system are achieved. Attached Figure Description
[0045] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0046] Figure 1 A schematic flowchart of a master-slave device synchronization control method provided in an embodiment of this application;
[0047] Figure 2 A schematic diagram of a master-slave device synchronization control device provided in an embodiment of this application;
[0048] Figure 3 This is a schematic diagram of a master-slave device synchronization control device provided in an embodiment of this application. Detailed Implementation
[0049] The embodiments of the technical solution of this application will now be described in detail with reference to the accompanying drawings. These embodiments are only used to more clearly illustrate the technical solution of this application and are therefore merely examples, and should not be used to limit the scope of protection of this application.
[0050] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms “comprising” and “having”, and any variations thereof, in the specification, claims, and foregoing description of the drawings are intended to cover non-exclusive inclusion.
[0051] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined.
[0052] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.
[0053] In the description of the embodiments in this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.
[0054] In the description of the embodiments of this application, the term "multiple frames" refers to two or more (including two).
[0055] In the description of the embodiments of this application, the technical terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the embodiments of this application and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application.
[0056] Please see Figure 1 , Figure 1 This is a schematic flowchart illustrating a master-slave device synchronization control method according to an embodiment of this application. The master-slave device synchronization control method is implemented by a master-slave device synchronization control device. This master-slave device synchronization control device includes, but is not limited to, a terminal or a server.
[0057] Depend on Figure 1 As can be seen, the master-slave device synchronization control method provided in this application includes the following steps S110 to S150. Details are as follows:
[0058] S110: Obtain the first timestamp carried in the signal broadcast by the master device to the slave device and the second timestamp of the signal received by the slave device.
[0059] When medical equipment clusters such as surgical robots, imaging equipment, and vital signs monitors power on or switch modes, the master device, such as the surgical navigation host, broadcasts a synchronization signal carrying a high-precision first timestamp to slave devices such as robotic arms and ultrasonic scalpels. Specifically, the master device adopts an improved precision time synchronization protocol, such as the IEEE 1588 protocol frame structure, extending an 8-byte high-precision timestamp field to the end of the standard synchronization message type frame, ensuring that the time synchronization accuracy is improved from the traditional microsecond (µs) level to the nanosecond (ns) level. A GPS-disciplined rubidium atomic clock is used as the time reference, ensuring that long-term time drift is less than 1 ns, meeting the high stability requirements of medical equipment. The first timestamp is directly injected into the physical layer chip, bypassing the operating system protocol stack and avoiding the μs-level latency caused by software scheduling, ensuring the real-time and deterministic nature of the timestamp recording.
[0060] When a slave device, such as a robotic arm, receives a broadcast signal from the master device, it immediately triggers a hardware interrupt line to ensure that the timestamp record and the data frame are strictly synchronized with jitter of <1ns.
[0061] The master and slave devices synchronize and control the device to obtain the first and second timestamps to determine the existing communication delays and power noise.
[0062] S120: Calculate the communication transmission delay based on the first timestamp and the second timestamp.
[0063] In the embodiments of this application, the initial communication transmission delay is first determined using a basic delay calculation model. Specifically, it is expressed as follows: ;in, Indicates the first timestamp. Indicates the second timestamp. This indicates the inherent processing latency of the pre-calibrated slave device. This indicates the initial communication transmission delay.
[0064] To address the unique operating environment of medical devices, after obtaining the initial communication transmission delay, temperature compensation and anti-interference filtering are applied to the initial delay to obtain a high-precision communication transmission delay. For example, the communication transmission delay after temperature compensation and anti-interference filtering is expressed as follows: ; ;
[0065] in, This refers to the communication transmission delay. For Kalman gain, Let be the compensation delay value at the i-th sampling time, where i is the index of the discrete time series, used to represent the sampling time of the delayed data within the window. The window range is i∈[k-9, k], where k is the current time and k-1 is the previous time. , For calibration parameters, , For temperature coefficient, Used to compensate for time delay errors caused by PCB thermal expansion and first-order temperature drift of crystal oscillators. Used to correct time delay errors caused by the nonlinear characteristics of crystal oscillators. As a measure of communication transmission delay, it can ensure both the stability and accuracy of the final result.
[0066] S130: Measure the power ripple data from the device and convert the power ripple data into a time-domain compensation value.
[0067] Power supply ripple data refers to the high-frequency AC noise superimposed on the DC power supply output. This high-frequency AC noise is usually caused by switching noise of the switching power supply, sudden changes in load current, and PCB layout defects. Power supply ripple data can cause clock jitter and logic gate delay variations, which in turn affect the accuracy of obtaining the second timestamp, ultimately manifesting as periodic errors in communication transmission delay.
[0068] In this embodiment, the power ripple data is converted into a time-domain compensation amount, which is then used together with the communication transmission delay amount to dynamically correct the delay calculation.
[0069] For example, converting power supply ripple data into a time-domain compensation amount includes: synchronously sampling the output voltage of the isolated power supply module, extracting the ripple signal amplitude through digital filtering, and obtaining the compensation time amount based on the ripple amplitude multiplied by the power supply compensation coefficient, wherein the power supply compensation coefficient is inversely proportional to the ripple frequency.
[0070] In one embodiment, synchronously sampling the output voltage of the isolated power supply module and extracting the ripple signal amplitude through digital filtering includes: on the isolated power supply module side, converting the high-voltage output to the range of the isolated analog-to-digital converter (ADC) through a resistor divider network; oversampling the signal on the primary side of the ADC using a modulator at a preset clock; transmitting a digital bitstream through magnetic isolation on the secondary side of the ADC, and reconstructing the digital bitstream into a preset-bit digital code value through a filter; after filtering the preset-bit digital code value using a digital filter, extracting the ripple signal amplitude through a sliding window. The extracted ripple signal amplitude is multiplied by a power supply compensation coefficient to obtain the compensation time. Specifically, the power supply compensation coefficient is expressed as:
[0071]
[0072] Where A represents the amplitude-frequency coupling coefficient and B represents the frequency attenuation constant, A and B are automatically calibrated when the power load change rate exceeds a threshold, and redundant channels are enabled during the calibration period to avoid affecting real-time communication. For ripple frequency, C represents the boundary between the low-frequency and high-frequency bands of the ripple frequency, and is the basic compensation offset.
[0073] As can be seen from the formula for the power supply compensation coefficient, the effect of ripple on delay exhibits first-order attenuation in the low-frequency range, while in the high-frequency range, the effect of ripple on delay exhibits second-order rapid attenuation. Furthermore, the boundary between the low-frequency and high-frequency ripple bands is... The ripple spectrum can be dynamically adjusted through Fourier analysis to ensure complete coverage of broadband ripple and avoid the problem of not being able to cover broadband ripple.
[0074] In one embodiment, while obtaining the compensation time based on the ripple amplitude multiplied by the dynamic coefficient, the method also includes: real-time monitoring of the ripple frequency and real-time adjustment of the power compensation coefficient according to the ripple frequency.
[0075] S140: Calculate the phase compensation value based on the time domain compensation amount and the communication transmission delay amount.
[0076] By merging the time-domain compensation amount with the communication transmission delay amount into a phase compensation value, the impact of power supply ripple and communication link jitter on synchronization accuracy is eliminated.
[0077] In one embodiment, calculating the phase compensation value based on the time domain compensation amount and the communication transmission delay amount includes: fusing the time domain compensation amount and the communication transmission delay amount into a phase compensation value through a preset mathematical model.
[0078] For example, the pre-defined mathematical model is represented as:
[0079] ;in, For time-domain compensation, Ripple amplitude, Let be the power supply compensation coefficient for the i-th frequency band included in the ripple. For communication compensation coefficient, This refers to the communication transmission delay. The frequency of the signal to be compensated. To convert the time offset into a phase radian value, This is the phase compensation value.
[0080] The communication compensation coefficient is inversely correlated with the sliding window variance of the communication transmission delay, expressed as: ;in, The sliding window variance represents the communication transmission delay, where C and D are calibration constants used to prevent the denominator from being zero. When the communication delay fluctuates greatly ( High), Low To suppress unreliable compensation, when communication delay is stable ( (low), increase To enhance the compensation effect.
[0081] Since the time-domain compensation amount, representing the absolute time offset caused by power supply ripple, is related to the hardware circuit, and the communication transmission delay amount, representing the end-to-end delay of signal transmission, is related to the network link, their physical sources and influencing mechanisms differ, and direct superposition would lead to weight imbalance. This application fuses them into a phase compensation value, which not only maps the time offset to its relative position within the signal period, making it suitable for periodic control signals, but also supports a unified compensation interface across frequency systems. In the phase domain, adaptive weighting of communication delay is achieved through a communication compensation coefficient, avoiding hard truncation in the time domain and resolving the weight allocation problem caused by the different physical sources of the two.
[0082] S150: Based on the phase compensation value, dynamically adjust the generation time of the control signal to synchronously control the master and slave devices.
[0083] Specifically, based on the phase compensation value, the generation time of the control signal is dynamically adjusted, including: converting the phase compensation value into a time offset, dynamically adjusting the triggering time of the control signal based on the time offset, and generating the control signal based on the triggering time. This is to synchronously control the master and slave devices.
[0084] In practical applications, the actual hardware triggers actions through a time register. Therefore, it is necessary to convert the phase compensation value into a time offset, and then dynamically adjust the triggering time of the time register according to the time offset to accurately control the master and slave devices.
[0085] As can be seen from the above analysis, the master-slave device synchronization control method provided in this application obtains a first timestamp carried in the broadcast signal from the master device to the slave device and a second timestamp of the signal received by the slave device; calculates the communication transmission delay based on the first and second timestamps; measures the power ripple data of the slave device and converts the power ripple data into a time-domain compensation value; calculates a phase compensation value based on the time-domain compensation value and the communication transmission delay; and dynamically adjusts the generation time of the control signal based on the phase compensation value to synchronize the master and slave devices. By establishing coupling compensation between power ripple and communication delay, precise synchronization control and reliability of the medical device system are achieved.
[0086] Please see Figure 2 , Figure 2 This is a schematic diagram of a master-slave device synchronization control device according to an embodiment of this application. The master-slave device synchronization control device includes modules or units used for executing... Figure 1 The steps in the corresponding embodiments. Please refer to the details. Figure 1 The relevant descriptions in the corresponding embodiments are shown below. For ease of explanation, only the parts relevant to this embodiment are shown. See also... Figure 2 The master-slave device synchronization control device 200 includes:
[0087] The acquisition module 210 is used to acquire the first timestamp carried in the signal broadcast by the master device to the slave device and the second timestamp of the signal received by the slave device.
[0088] The first calculation module 220 is used to calculate the communication transmission delay based on the first timestamp and the second timestamp;
[0089] Conversion module 230 is used to measure the power ripple data of the slave device and convert the power ripple data into a time domain compensation amount;
[0090] The second calculation module 240 is used to calculate the phase compensation value based on the time domain compensation amount and the communication transmission delay amount;
[0091] The adjustment module 250 is used to dynamically adjust the generation time of the control signal according to the phase compensation value in order to synchronously control the master and slave devices.
[0092] In one embodiment, the conversion module 230 is specifically used for:
[0093] The output voltage of the synchronous sampling isolation power supply module is used to extract the ripple signal amplitude through digital filtering. The compensation time is obtained by multiplying the ripple amplitude by the power supply compensation coefficient, wherein the power supply compensation coefficient is inversely proportional to the ripple frequency.
[0094] In one embodiment, the conversion module 230 includes:
[0095] A conversion unit is used to convert the high voltage output to the range of an isolated analog-to-digital converter via a resistor divider network on the isolated power supply module side.
[0096] The reconstruction unit is used to oversample the signal at a preset clock through a modulator on the primary side of the isolated analog-to-digital converter, transmit the digital bit stream through magnetic isolation on the secondary side of the isolated analog-to-digital converter, and reconstruct the digital bit stream into a preset bit digital code value through a filter.
[0097] The extraction unit is used to input the preset bit digital code value into a digital filter for filtering, and then extract the ripple signal amplitude through a sliding window.
[0098] In one embodiment, the device 200 further includes:
[0099] An adjustment module is used to monitor the ripple frequency in real time and adjust the power compensation coefficient in real time according to the ripple frequency.
[0100] In one embodiment, the second calculation module 240 is specifically used for:
[0101] The time-domain compensation amount and the communication transmission delay amount are fused into the phase compensation value through a preset mathematical model.
[0102] In one embodiment, the preset mathematical model is represented as:
[0103] ;in, For time-domain compensation, Ripple amplitude, Let be the power supply compensation coefficient for the i-th frequency band included in the ripple. For communication compensation coefficient, This refers to the communication transmission delay. The frequency of the signal to be compensated. To convert the time offset into a phase radian value, This is the phase compensation value.
[0104] In one embodiment, the communication compensation coefficient is inversely correlated with the sliding window variance of the communication transmission delay.
[0105] Please see Figure 3 , Figure 3This is a schematic diagram of a master-slave device synchronization control device provided in an embodiment of this application. Figure 3 It is understood that the master-slave device synchronization control device 300 includes: a processor 310, a memory 320, and a computer program 330 stored in the memory 320 and executable on the processor 310; when the processor 310 executes the computer program 330, it implements the steps in the above-described master-slave device synchronization control method embodiments, for example... Figure 1 The steps S110 to S150 are shown. Alternatively, when the processor 310 executes the computer program 330, it implements the functions of each module / unit in the above-described device embodiments, for example... Figure 2 The functions of modules 210 to 250 are shown.
[0106] For example, computer program 330 may be divided into one or more modules / units, one or more of which are stored in memory 320 and executed by processor 310 to complete this application. The one or more modules / units may be a series of computer program instruction segments capable of performing specific functions, which describe the execution process of computer program 330 in a master-slave device synchronization control device. For example, computer program 330 may be divided into an acquisition module, a first calculation module, a conversion module, a second calculation module, and an adjustment module.
[0107] The master-slave device synchronization control device provided in this embodiment may include, but is not limited to, processors and memory. Those skilled in the art will understand that... Figure 3 This is merely an example of a master-slave device synchronization control device and does not constitute a limitation on master-slave device synchronization control devices. It may include more or fewer components than shown in the figure, or combine certain components, or different components. For example, a master-slave device synchronization control device may also include input / output devices, network access devices, buses, etc.
[0108] The processor 310 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor.
[0109] The memory 320 can be an internal storage unit of the master-slave device synchronization control device, such as the hard drive or memory of the master-slave device synchronization control device. The memory 320 can also be an external storage device of the master-slave device synchronization control device, such as a plug-in hard drive, Smart Media Card (SMC), Secure Digital (SD) card, or Flash Card equipped on the master-slave device synchronization control device. Furthermore, the master-slave device synchronization control device can include both internal storage units and external storage devices. The memory 320 is used to store computer programs and other programs and data required by the master-slave device synchronization control device. The memory 320 can also be used to temporarily store data that has been output or will be output.
[0110] It should be noted that the information interaction and execution process between the above-mentioned devices / units are based on the same concept as the method embodiments of this application. For details on their specific functions and technical effects, please refer to the method embodiments section, and they will not be repeated here.
[0111] This application also provides a network device, which includes: at least one processor, a memory, and a computer program stored in the memory and executable on the at least one processor, wherein the processor executes the computer program to implement the steps in any of the above method embodiments.
[0112] This application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps described in the various method embodiments above.
[0113] This application provides a computer program product that, when run on a mobile terminal, enables the mobile terminal to implement the steps described in the above-described method embodiments.
[0114] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments of this application can be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include at least: any entity or device capable of carrying computer program code to a photographing device / terminal device, a recording medium, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium. Examples include USB flash drives, portable hard drives, magnetic disks, or optical disks. In some jurisdictions, according to legislation and patent practice, computer-readable media cannot be electrical carrier signals or telecommunication signals.
[0115] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.
[0116] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0117] In the embodiments provided in this application, it should be understood that the disclosed apparatus / network devices and methods can be implemented in other ways. For example, the apparatus / network device embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.
[0118] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0119] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.
Claims
1. A master-slave device synchronization control method, characterized in that, The method includes: Obtain the first timestamp carried in the signal broadcast by the master device to the slave device and the second timestamp of the signal received by the slave device; Calculate the communication transmission delay based on the first timestamp and the second timestamp; Measure the power ripple data of the slave device and convert the power ripple data into a time-domain compensation value; Calculate the phase compensation value based on the time domain compensation amount and the communication transmission delay amount; Based on the phase compensation value, the generation time of the control signal is dynamically adjusted to synchronously control the master and slave devices.
2. The master-slave device synchronization control method as described in claim 1, characterized in that, The step of converting the power supply ripple data into a time-domain compensation value includes: The output voltage of the synchronous sampling isolation power supply module is used to extract the ripple signal amplitude through digital filtering. The compensation time is obtained by multiplying the ripple amplitude by the power supply compensation coefficient, wherein the power supply compensation coefficient is inversely proportional to the ripple frequency.
3. The master-slave device synchronization control method as described in claim 2, characterized in that, The output voltage of the synchronous sampling isolation power supply module is used to extract the ripple signal amplitude through digital filtering, including: On the isolated power supply module side, the high voltage output is converted to the range of the isolated analog-to-digital converter through a resistor voltage divider network; The signal is oversampled by a modulator at a preset clock on the primary side of the isolated analog-to-digital converter, and the digital bit stream is transmitted through magnetic isolation on the secondary side of the isolated analog-to-digital converter. The digital bit stream is then reconstructed into a preset bit digital code value through a filter. After the preset bit code value is input into the digital filter for filtering, the amplitude of the ripple signal is extracted through a sliding window.
4. The master-slave device synchronization control method as described in claim 3, characterized in that, In addition to obtaining the compensation time amount based on the ripple amplitude multiplied by the dynamic coefficient, the method also includes: The ripple frequency is monitored in real time, and the power supply compensation coefficient is adjusted in real time based on the ripple frequency.
5. The master-slave device synchronization control method as described in claim 1, characterized in that, The step of calculating the phase compensation value based on the time-domain compensation amount and the communication transmission delay amount includes: The time-domain compensation amount and the communication transmission delay amount are fused into the phase compensation value through a preset mathematical model.
6. The master-slave device synchronization control method as described in claim 5, characterized in that, The preset mathematical model is expressed as follows: ;in, For time-domain compensation, Ripple amplitude, Let be the power supply compensation coefficient for the i-th frequency band included in the ripple. For communication compensation coefficient, This refers to the communication transmission delay. The frequency of the signal to be compensated. To convert the time offset into a phase radian value, This is the phase compensation value.
7. The master-slave device synchronization control method as described in claim 6, characterized in that, The communication compensation coefficient is inversely correlated with the sliding window variance of the communication transmission delay.
8. A master-slave device synchronization control device, characterized in that, include: The acquisition module is used to acquire the first timestamp carried in the signal broadcast by the master device to the slave device and the second timestamp of the signal received by the slave device. The first calculation module is used to calculate the communication transmission delay based on the first timestamp and the second timestamp; A conversion module is used to measure the power ripple data of the slave device and convert the power ripple data into a time domain compensation amount. The second calculation module is used to calculate the phase compensation value based on the time domain compensation amount and the communication transmission delay amount; The adjustment module is used to dynamically adjust the generation time of the control signal according to the phase compensation value in order to synchronously control the master and slave devices.
9. A master-slave device synchronization control device, characterized in that, include: Processor, memory, and computer programs stored in said memory and executable on said processor; When the processor executes the computer program, it implements the method as described in any one of claims 1 to 7.
10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by a processor, it implements the method as described in any one of claims 1 to 7.
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