N-type TOPCon battery and preparation method thereof

Abstract

The embodiment of the invention provides an N-type TOPCon battery and a preparation method thereof, and the preparation method of the N-type TOPCon battery provided by the embodiment of the invention omits the step of laser doping treatment on a silicon wafer after boron doping treatment, but after electrode sintering and light injection, laser irradiation is carried out on the battery piece and deflection electricity is applied at the same time, so that the reliability of the battery piece is improved. The current formed by the laser is transmitted along a low contact resistance path to trigger silver-silicon mutual diffusion, so that the contact resistance is obviously reduced, and carrier recombination caused by direct contact of a metal-silicon substrate can be avoided on the premise that an original passivation layer is reserved. Therefore, according to the preparation method provided by the invention, the effect of replacing SE doping can be realized, and the problems of relatively high process requirements and tedious steps of preparing a P-type emitter in an N-type TOPCon battery through a laser SE technology in the prior art are avoided.

Description

Technical Field

[0001] The present invention relates to the technical field of crystalline silicon solar cell manufacturing, and in particular to an N-type TOPCon cell and a preparation method thereof. Background Art

[0002] Currently, TOPCon cells in crystalline silicon solar cells are widely used due to their advantages such as low attenuation, obvious advantages in overall cell efficiency and power generation.

[0003] The front side of existing TOPCon cells uses superimposed laser SE to achieve high-concentration doping at and near the contact area between the metal grid line (electrode) and the silicon wafer, thereby forming a P-type emitter. Low-concentration doping is performed in areas outside the electrode. While this approach can reduce diffusion layer recombination, improve short-wavelength light response, and reduce the contact resistance between the front metal electrode and silicon, thereby improving open-circuit voltage, short-circuit current, and fill factor, it places high demands on SE laser offset and is a complex process. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide an N-type TOPCon battery and a preparation method thereof, so as to solve the problem that the P-type emitter process in the N-type TOPCon battery prepared by laser SE technology has high process requirements and complicated steps.

[0005] In order to solve the above problems, the present invention is achieved through the following technical solutions:

[0006] The present invention provides a method for preparing an N-type TOPCon battery, which comprises:

[0007] Performing boron diffusion treatment on the front side of the N-type silicon wafer, forming a tunneling oxide layer and a polysilicon layer on the back side in sequence, and doping the polysilicon layer with phosphorus to form a phosphorus-doped polysilicon layer;

[0008] forming a passivation layer and a printed electrode in sequence on the front side of the silicon wafer and the surface of the phosphorus-doped polysilicon layer;

[0009] sequentially performing sintering and light injection treatments on the silicon wafer with the electrodes formed thereon;

[0010] The front electrode of the silicon wafer after light injection treatment is subjected to laser irradiation and deflection voltage treatment to produce an N-type TOPCon battery; wherein the direction of the electric field formed by the deflection voltage is opposite to the direction of the electric field built into the N-type TOPCon battery.

[0011] Furthermore, in the preparation method, during the sintering process, the sintering temperature is 500-850°C.

[0012] Furthermore, in the preparation method, during the light injection treatment, the light intensity is 10 to 50 suns.

[0013] Furthermore, in the preparation method, during the laser irradiation and deflection voltage treatment, the laser power is 5 to 30 W, the voltage intensity is 15 to 50 V, and the application time is 0.1 to 3.0 s.

[0014] Furthermore, in the preparation method, the boron concentration on the front side of the silicon wafer after the boron diffusion treatment is 1E18-1E19 cm -3 and / or

[0015] The phosphorus concentration on the back of the silicon wafer after phosphorus doping treatment is 1E20~1E21cm -3 .

[0016] Furthermore, in the preparation method, the tunneling oxide layer includes a silicon dioxide layer.

[0017] Furthermore, in the preparation method, the thickness of the silicon dioxide layer is 1 to 2 nm, and the thickness of the polysilicon layer is 100 to 160 nm.

[0018] Furthermore, in the preparation method, the passivation layer includes an aluminum oxide layer, and the thickness of the aluminum oxide layer is 1 to 5 nm.

[0019] Furthermore, in the preparation method, before performing the boron diffusion treatment on the front surface of the N-type silicon wafer, the method further comprises:

[0020] performing a texturing process on the silicon wafer;

[0021] Before sequentially forming a silicon oxide layer and a polysilicon layer on the back surface, the method further comprises:

[0022] The back side of the silicon wafer after boron diffusion treatment is polished.

[0023] Furthermore, in the preparation method, before sequentially forming a passivation layer and printing electrodes on the front surface of the silicon wafer and the surface of the phosphorus-doped polysilicon layer, the method further comprises:

[0024] Chain pickling is used to remove the phosphosilicate glass layer on the front of the silicon wafer, and then alkaline polishing is performed.

[0025] The present invention also provides an N-type TOPCon battery, which is prepared by the above-mentioned method.

[0026] Compared with the prior art, the embodiments of the present invention have the following advantages:

[0027] In an embodiment of the present invention, a method for preparing an N-type TOPCon cell is provided. First, a boron diffusion treatment is performed on the front side of an N-type silicon wafer, and a tunneling oxide layer and a polysilicon layer are sequentially formed on the back side. The polysilicon layer is then phosphorus-doped to form a phosphorus-doped polysilicon layer. A passivation layer and electrodes are then sequentially formed on the front side of the silicon wafer and on the surface of the phosphorus-doped polysilicon layer. The silicon wafer with the electrodes is then sintered and light-injected. The front electrode of the light-injected silicon wafer is then laser-irradiated and subjected to a deflection voltage treatment to produce the N-type TOPCon cell. The direction of the electric field generated by the deflection voltage is opposite to the direction of the built-in electric field of the N-type TOPCon cell. Because the laser irradiation and deflection voltage are applied to the cell after electrode sintering and light-injection, the laser-generated current is transmitted along a low-contact resistance path, inducing silver-silicon interdiffusion, thereby significantly reducing contact resistance. This prevents carrier recombination caused by direct metal-silicon substrate contact while retaining the original passivation layer. Therefore, the preparation method provided by the present invention can achieve the effect of replacing SE doping, that is, it avoids the problem of high process requirements and complicated steps in the existing preparation of P-type emitter in N-type TOPCon cells by laser SE technology.

[0028] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 This is a flow chart of a method for preparing an N-type TOPCon battery provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0030] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0031] Compared with P-type PERC cells, TOPCon cells require a 1-2nm ultra-thin oxide layer and a 150-200nm phosphorus-doped polysilicon layer on the back to achieve passivation contact and selective carrier passage, avoiding the damage layer caused by laser grooving on the back of the cell. This can greatly improve the open circuit voltage and fill factor of the cell, and has a greater efficiency advantage.

[0032] The applicant of the present invention has discovered that when preparing an N-type TOPCon cell, it is necessary to form a P-type emitter on the front side of the N-type silicon wafer using tubular boron diffusion combined with laser doping technology. However, the above method requires SE laser after light diffusion doping, followed by secondary boron diffusion oxidation, which has high requirements for SE laser offset and more process steps.

[0033] In order to solve the above problems, the present invention provides a method for preparing an N-type TOPCon battery. Figure 1 As shown, it includes steps 101 to 103:

[0034] Step 101 : performing boron diffusion treatment on the front side of an N-type silicon wafer, forming a tunneling oxide layer and a polysilicon layer on the back side in sequence, and doping the polysilicon layer with phosphorus to form a phosphorus-doped polysilicon layer.

[0035] In the above step 101, after boron diffusion treatment is performed on the front side of the silicon wafer, a low-pressure chemical vapor deposition (LPCVD) technology is used to first prepare an ultra-thin silicon dioxide layer on the surface of the battery as the above-mentioned tunneling oxide layer. Then, a polysilicon thin layer is deposited on the ultra-thin silicon dioxide layer to form a passivation contact structure, wherein the thickness of the ultra-thin silicon dioxide layer is 1-2 nm and the thickness of the polysilicon thin layer is 100-160 nm. Then, the polysilicon thin layer is phosphorus-doped using a tubular thermal decomposition POCl3 technology to form a battery passivation contact structure and carrier selective passage, thereby reducing battery surface recombination and metal contact resistance.

[0036] Optionally, in one embodiment, the boron diffusion treatment temperature for the front side of the N-type silicon wafer is 800-1100° C., the BCl 3 flow rate is 100-300 sccm, and the total treatment time is 30-60 min.

[0037] In this embodiment, the boron deposition treatment is performed on the silicon wafer at a temperature of 800-1100° C., and the entire deposition treatment time is controlled to be 30-60 minutes, for example, 40-50 minutes, or 45 minutes, so that the boron diffusion treatment of the silicon wafer can be completed quickly.

[0038] Optionally, in one embodiment, during the boron deposition process, the flow ratio of BCl3 to O2 is 1:3 to 1:5. In this embodiment, using BCl3 as a boron source, controlling its flow ratio to oxygen to be 1:3 to 1:5, and then performing boron deposition on a silicon wafer at a temperature of 800 to 1100°C can effectively complete the boron deposition process.

[0039] In the above embodiment, the boron concentration on the front side of the silicon wafer after the boron diffusion process can be controlled to be 1E18-1E19 cm -3 , the junction depth is 0.5~1.5μm.

[0040] Optionally, in one embodiment, doping the polysilicon layer with phosphorus includes: performing phosphorus diffusion deposition on the polysilicon layer, wherein the phosphorus source includes POCl3 with a flow rate of 1000-1700 sccm and a diffusion temperature of 800-900°C.

[0041] In the above embodiment, the phosphorus concentration on the back of the silicon wafer after phosphorus doping treatment can be controlled to be 1E20-1E21 cm -3 .

[0042] Alternatively, in some embodiments, the phosphorus diffusion treatment temperature is 850-950° C. and the time is 30-90 min.

[0043] Step 102: forming a passivation layer and an electrode on the front side of the silicon wafer and the surface of the phosphorus-doped polysilicon layer in sequence.

[0044] In the above step 102, an atomic layer deposition (ALD) process is used to plate a passivation layer on the entire front and back of the product to form field passivation. After the passivation layer is formed, an anti-reflection layer can be first plated on the front of the battery and then on the back to further enhance the passivation effect of the battery cell. Finally, a metallization paste is printed by screen printing or other methods to form electrodes.

[0045] Optionally, the passivation layer may be an aluminum oxide layer with a thickness of 3 to 5 nm, an ALD process temperature of 200 to 300° C., and a deposition time of 8 to 10 minutes.

[0046] Optionally, the anti-reflection layer may be SiN x Specifically, SiN can be deposited on the front and back of the battery using PECVD technology. x The thickness of the layer is 75 to 80 nm, the PECVD process temperature is 500 to 600 ° C, and the deposition time is 4 to 6 minutes. The setting of the anti-reflection layer can passivate the dangling bonds inside the battery and enhance the reflection of incident light.

[0047] Optionally, metallic silver paste can be used as the front metallization paste, and metallic aluminum paste can be used as the back metallization paste, and the front and back electrodes of the battery can be prepared using screen printing technology.

[0048] Step 103 : sequentially subjecting the silicon wafer with the electrodes to sintering and light injection treatment.

[0049] In the above step 103, the printed electrode is sintered and annealed at 500-850°C. The above sintering temperature can volatilize the organic solvent in the paste, melt the glass powder, and precipitate the silver powder in the silver paste, so that the paste forms a preliminary contact with the silicon wafer.

[0050] In step 103, the printed and sintered cells are subjected to a light injection process. Specifically, a light source is used to directly inject light into the cells, while simultaneously performing auxiliary heating. This provides a high light injection intensity within a short period of time, thereby maximizing the amount of light injected into the cells and significantly improving their passivation effect. Optionally, the light intensity during the light injection process is 10 to 50 suns.

[0051] Step 104 , subjecting the front electrode of the silicon wafer after the light injection treatment to laser irradiation and deflection voltage treatment to produce an N-type TOPCon cell; wherein the direction of the electric field formed by the deflection voltage is opposite to the direction of the built-in electric field of the N-type TOPCon cell.

[0052] In the above step 104, after printing and sintering, the cell is irradiated with a high-intensity laser and a deflection voltage is applied at the same time. The current generated by the laser is transmitted along a low contact resistance path, inducing silver-silicon interdiffusion, thereby significantly reducing the contact resistance. The duration of the laser irradiation process matches the carrier lifetime, and the laser is quickly stopped after the laser, thereby achieving maximum retention of the original passivation layer and avoiding carrier recombination caused by direct contact between the metal and silicon substrate.

[0053] Optionally, in a specific embodiment, during the laser irradiation and deflection voltage treatment, the laser power is 5 to 30 W, the voltage intensity is 15 to 50 V, and the application time is 0.1 to 3.0 seconds. In this specific embodiment, the laser intensity, voltage intensity, and application time are reasonably matched to effectively reduce the contact resistance between the front electrode and the silicon wafer while maintaining the original passivation layer, achieving a similar effect to laser doping, thereby achieving the same or similar doping effect as SE laser without SE doping.

[0054] In the preparation method of an N-type TOPCon cell provided by an embodiment of the present invention, after electrode sintering and light injection, the cell is subjected to laser irradiation and deflection voltage is applied simultaneously. This allows the current generated by the laser to be transmitted along a low-contact resistance path, inducing silver-silicon interdiffusion, thereby significantly reducing contact resistance. This can avoid carrier recombination caused by direct contact between the metal and the silicon substrate while retaining the original passivation layer. Therefore, the preparation method provided by the present invention can achieve the effect of replacing SE doping, that is, it avoids the high process requirements and cumbersome steps of the existing preparation of P-type emitters in N-type TOPCon cells using laser SE technology.

[0055] In the above step 101, the above silicon wafer is an N-type silicon wafer after texturing. Through the texturing process, a double-surface pyramid structure can be formed on the silicon wafer.

[0056] Optionally, in one embodiment, before the above step 101, the process further includes step 100:

[0057] Step 100: Place the N-type silicon wafer into a texturing tank for single crystal alkaline texturing.

[0058] In this embodiment, an alkali texturing treatment is performed to remove the mechanical damage layer and metal ions on the surface of the single crystal N-type original silicon wafer, and a "pyramid" appearance is formed on the surface of the battery, thereby improving the light trapping effect of the battery.

[0059] Among them, the texturing liquid in the texturing tank mainly includes acid and alkali solutions, and the single crystal alkali texturing specifically includes: first using alkali solution for alkali texturing, and then using acid solution for pickling; wherein, the alkali solution includes NaOH or KOH, and the solution mass ratio is 0.5~1.2%; the acid solution is HCL or HF, and the solution mass ratio is 0.5~1.2%; the above-mentioned single crystal alkali texturing time is between 550~650s, and the corresponding weight loss is 0.2~0.4g.

[0060] Optionally, in one embodiment, the method provided in the embodiment of the present invention further includes step 1011 after performing boron diffusion treatment on the front side of the N-type silicon wafer and before sequentially forming the tunneling oxide layer and the polysilicon layer on the back side:

[0061] Chain pickling is used to remove the borosilicate glass layer on the back of the silicon wafer, and then alkaline polishing is performed.

[0062] In this embodiment, since boron diffusion only needs to be performed on the front side of the silicon wafer, single-sided diffusion is required. The borosilicate glass layer formed on the back side of the non-diffused surface is removed by chain pickling, and the silicon wafer is alkaline polished using a high-concentration alkaline solution to form a block-sized morphology structure, forming a polished surface with high reflectivity, thereby improving the surface flatness of the battery, increasing the reflection of long-wave light, promoting secondary absorption of light, increasing short-circuit current and reducing leakage current.

[0063] Optionally, the acidic solution in the chain pickling is HF or HNO3 with a mass concentration of 3-10%, the alkaline solution is NaOH or KOH with a mass concentration of 5-10%, and the alkali polishing reaction time is between 280 and 300 seconds, which can effectively improve the surface flatness of the battery, increase the reflection of long-wave light, promote the secondary absorption of light, increase the short-circuit current and reduce the leakage current.

[0064] Optionally, in one embodiment, the method provided in the embodiment of the present invention further includes step 1021 before step 102:

[0065] Chain pickling is used to remove the phosphosilicate glass layer on the front of the silicon wafer, and then alkaline polishing is performed.

[0066] In this embodiment, because phosphorus doping is performed using a furnace tube, a phosphosilicate glass layer is generated on the front side of the silicon wafer. Therefore, it is necessary to remove the front phosphosilicate glass by single-sided etching, thereby reducing the recombination of electrons in the emission area and increasing the short-circuit current and open-circuit voltage.

[0067] In addition, if the polysilicon layer is prepared on both sides in step 101, before the passivation layer and the electrode are formed on the front side of the silicon wafer and the surface of the phosphorus-doped polysilicon layer in sequence, the front polysilicon layer needs to be etched with alkali or alkali + additive to remove the front polysilicon layer and retain the back polysilicon structure.

[0068] The acidic solution in the chain pickling is HF or HNO3 with a mass concentration of 3-10%, the alkaline solution is NaOH or KOH with a mass concentration of 5-10%, and the alkali polishing reaction time is between 280 and 300 seconds, which can effectively remove the phosphosilicate glass on the front of the battery after phosphorus diffusion, reduce the recombination of electrons in the emission area, and improve the short-circuit current and open-circuit voltage.

[0069] The present invention also provides an N-type TOPCon battery, wherein the battery is prepared by the above-mentioned preparation method of the N-type TOPCon battery.

[0070] For the above-mentioned N-type TOPCon battery embodiment, it is prepared by the above-mentioned preparation method and can achieve the same technical effect. In order to avoid repetition, it will not be described here. For relevant details, please refer to the partial description of the preparation method embodiment.

[0071] The present invention is described in detail below by way of examples.

[0072] Example 1

[0073] (1) Provide a single crystal N-type silicon wafer with a resistivity of 0.4Ω·cm, a minority carrier lifetime of 240us, a size of 182×182mm, and a thickness of 180μm, and place it in a texturing tank for single crystal alkaline texturing. The alkaline solution in the texturing tank is NaOH with a mass concentration of 0.8%, and the acidic solution is HF with a mass concentration of 0.8%. The texturing time is controlled to be 600s;

[0074] (2) The silicon wafer after texturing is sent into the furnace tube, and BCl3 and O2 with a flow ratio of 1:3 are first introduced at a temperature of 850°C for 45 minutes for low-temperature deposition, and then high-temperature advancement is carried out at a temperature of 950°C. After the high-temperature advancement is completed, the silicon wafer is cooled and taken out of the boat without oxygen;

[0075] (3) The non-diffusion surface of the silicon wafer after boron diffusion treatment is subjected to chain HF single-side etching to remove the borosilicate glass layer, and then alkali polishing is performed to form a square morphology structure; wherein the HF concentration is 5%, the solution used for the alkali polishing treatment is 8% by mass NaOH, and the reaction time is 280s;

[0076] (4) First, grow an ultra-thin oxide layer with a thickness of 1.5nm on the back side, and then prepare a polysilicon layer with a thickness of 150nm on both sides; send the silicon wafer into the furnace tube for phosphorus doping treatment, the phosphorus doping temperature is 850℃, and the phosphorus doping time is 6min;

[0077] (5) first remove the front phosphosilicate glass by single-sided acid etching, and then remove the front polysilicon layer by alkaline etching; wherein the solution in the acid etching treatment is 5% by mass HF, and the solution in the alkaline etching treatment is 8% by mass NaOH, and the treatment time is 280s;

[0078] (6) Depositing an aluminum oxide layer and a SiNx layer on the front and back of the silicon wafer in sequence as a passivation layer and an anti-reflection layer, respectively. The thickness of the aluminum oxide layer is 3 nm, and the thickness of the SiNx layer is 75 nm. The deposition temperature of the aluminum oxide layer is 250°C and the deposition time is 8 min. The deposition temperature of the SiNx layer is 600°C and the deposition time is 6 min.

[0079] (7) Prepare the front and back metal electrodes, use silver paste for the front and back main grids, and silver paste for the front and back fine grids. The thickness of the front fine grid is 19 μm and the thickness of the back fine grid is 17 μm. Then, sinter at 750°C and perform light injection under a light intensity of 30 suns.

[0080] (8) The sintered cell is passed through a laser device to perform laser irradiation and deflection voltage treatment on the front electrode of the silicon wafer to produce an N-type TOPCon cell; wherein the direction of the electric field formed by the deflection voltage is opposite to the direction of the electric field built into the N-type TOPCon cell, the laser power is 20W, the voltage intensity is 45V, and the application time is 1.5s.

[0081] Example 2

[0082] (1) Provide a single crystal N-type silicon wafer with a resistivity of 0.4Ω·cm, a minority carrier lifetime of 240us, a size of 182×182mm, and a thickness of 180μm, and place it in a texturing tank for single crystal alkaline texturing. The alkaline solution in the texturing tank is NaOH with a mass concentration of 0.8%, and the acidic solution is HF with a mass concentration of 0.8%. The texturing time is controlled to be 600s;

[0083] (2) The silicon wafer after texturing is fed into the furnace tube, and BCl3 and O2 with a flow ratio of 1:3 are first introduced at a temperature of 850°C for 45 minutes for low-temperature deposition, and then high-temperature advancement is carried out at a temperature of 950°C. After the high-temperature advancement is completed, the silicon wafer is cooled down without oxygen and taken out of the boat;

[0084] (3) The non-diffusion surface of the silicon wafer after boron diffusion treatment is subjected to chain HF single-side etching to remove the borosilicate glass layer, and then alkali polishing is performed to form a square morphology structure; wherein the HF concentration is 5%, the solution used for the alkali polishing treatment is 8% by mass NaOH, and the reaction time is 280s;

[0085] (4) First, grow an ultra-thin oxide layer with a thickness of 1.5nm on the back side, and then prepare a polysilicon layer with a thickness of 150nm on both sides; send the silicon wafer into the furnace tube for phosphorus doping treatment, the phosphorus doping temperature is 850℃, and the phosphorus doping time is 6 minutes.

[0086] (5) First, remove the front phosphosilicate glass by single-sided acid etching, and then remove the front polysilicon layer by alkaline etching; wherein, the solution in the acid etching treatment is 5% by mass HF, and the solution in the alkaline etching treatment is 8% by mass NaOH, and the processing time is 280s.

[0087] (6) Depositing an aluminum oxide layer and a SiNx layer on the front and back of the silicon wafer in sequence as a passivation layer and an anti-reflection layer, respectively. The thickness of the aluminum oxide layer is 3 nm, and the thickness of the SiNx layer is 75 nm. The deposition temperature of the aluminum oxide layer is 250°C and the deposition time is 8 min. The deposition temperature of the SiNx layer is 600°C and the deposition time is 6 min.

[0088] (7) Prepare the front and back metal electrodes, use silver paste for the front and back main grids, and use silver paste for the front and back fine grids. The thickness of the front fine grid is 19 μm and the thickness of the back fine grid is 17 μm. Then, sinter them at 500°C and perform light injection under a light intensity of 10 suns.

[0089] (8) The sintered cell is passed through a laser device to perform laser irradiation and deflection voltage treatment on the front electrode of the silicon wafer to produce an N-type TOPCon cell; wherein the direction of the electric field formed by the deflection voltage is opposite to the direction of the electric field built into the N-type TOPCon cell, the laser power is 5W, the voltage intensity is 15V, and the application time is 0.1s.

[0090] Example 3

[0091] (1) Provide a single crystal N-type raw silicon wafer with a resistivity of 0.4Ω·cm, a minority carrier lifetime of 240us, a size of 182×182mm, and a thickness of 180μm, and place it in a texturing tank for single crystal alkaline texturing. The alkaline solution in the texturing tank is NaOH with a mass concentration of 0.8%, and the acidic solution is HF with a mass concentration of 0.8%. The texturing time is controlled to be 600s.

[0092] (2) The silicon wafer after texturing is fed into the furnace tube, and BCl3 and O2 with a flow ratio of 1:3 are first introduced at a temperature of 850°C for 45 minutes for low-temperature deposition, and then high-temperature advancement is carried out at a temperature of 950°C. After the high-temperature advancement is completed, the silicon wafer is cooled down without oxygen and taken out of the boat;

[0093] (3) The non-diffusion surface of the silicon wafer after boron diffusion treatment is subjected to chain HF single-sided etching to remove the borosilicate glass layer, and a square morphology structure is formed by alkaline polishing; wherein, the HF concentration is 5%, the solution used for alkaline polishing is 8% by mass NaOH, and the reaction time is 280s.

[0094] (4) First, grow an ultra-thin oxide layer with a thickness of 1.5nm on the back side, and then prepare a polysilicon layer with a thickness of 150nm on both sides; send the silicon wafer into the furnace tube for phosphorus doping treatment, the phosphorus doping temperature is 850℃, and the phosphorus doping time is 6 minutes.

[0095] (5) First, remove the front phosphosilicate glass by single-sided acid etching, and then remove the front polysilicon layer by alkaline etching; wherein, the solution in the acid etching treatment is 5% by mass HF, and the solution in the alkaline etching treatment is 8% by mass NaOH, and the processing time is 280s.

[0096] (6) Depositing an aluminum oxide layer and a SiNx layer on the front and back of the silicon wafer in sequence as a passivation layer and an anti-reflection layer, respectively. The thickness of the aluminum oxide layer is 3 nm, and the thickness of the SiNx layer is 75 nm. The deposition temperature of the aluminum oxide layer is 250°C and the deposition time is 8 min. The deposition temperature of the SiNx layer is 600°C and the deposition time is 6 min.

[0097] (7) Prepare the front and back metal electrodes, use silver paste for the front and back main grids, and use silver paste for the front and back fine grids. The thickness of the front fine grid is 19 μm and the thickness of the back fine grid is 17 μm. Then, sinter at 850°C and perform light injection under a light intensity of 50 suns.

[0098] (8) The sintered cell is passed through a laser device to perform laser irradiation and deflection voltage treatment on the front electrode of the silicon wafer to produce an N-type TOPCon cell; wherein the direction of the electric field formed by the deflection voltage is opposite to the direction of the electric field built into the N-type TOPCon cell, the laser power is 30W, the voltage intensity is 50V, and the application time is 3.0s.

[0099] Comparative Example 1

[0100] (1) Provide a single crystal N-type silicon wafer with a resistivity of 0.4Ω·cm, a minority carrier lifetime of 240us, a size of 182×182mm, and a thickness of 180μm, and place it in a texturing tank for single crystal alkaline texturing. The alkaline solution in the texturing tank is NaOH with a mass concentration of 0.8%, and the acidic solution is HF with a mass concentration of 0.8%. The texturing time is controlled to be 600s;

[0101] (2) The silicon wafer after texturing is fed into the furnace tube, and BCl3 and O2 with a flow ratio of 1:3 are first introduced at a temperature of 850°C for 45 minutes for low-temperature deposition, and then high-temperature advancement is carried out at a temperature of 950°C. After the high-temperature advancement is completed, the silicon wafer is cooled down without oxygen and taken out of the boat;

[0102] (3) Laser SE doping is performed on the silicon wafer after boron diffusion treatment. The laser power is 30W, and a heavily doped area is formed in the laser area on the front of the silicon wafer.

[0103] (4) The silicon wafer after laser SE is thermally oxidized. Oxygen is introduced at a temperature of 1000°C with an oxygen flow rate of 10,000 sccm for 60 minutes. The high temperature is used to redistribute the light and heavy doping areas.

[0104] (5) The non-diffusion surface of the silicon wafer after thermal oxidation treatment is subjected to chain HF single-sided etching to remove the borosilicate glass layer, and a square morphology structure is formed by alkaline polishing; wherein, the HF concentration is 5%, the solution used for the alkaline polishing treatment is 8% by mass NaOH, and the reaction time is 280s.

[0105] (6) First, grow an ultra-thin oxide layer with a thickness of 1.5nm on the back side, and then prepare a polysilicon layer with a thickness of 150nm on both sides; send the silicon wafer into the furnace tube for phosphorus doping treatment, the phosphorus doping temperature is 850℃, and the phosphorus doping time is 6 minutes.

[0106] (7) First, remove the front phosphosilicate glass by single-sided acid etching, and then remove the front polysilicon layer by alkaline etching; wherein, the solution in the acid etching treatment is 5% by mass HF, and the solution in the alkaline etching treatment is 8% by mass NaOH, and the processing time is 280s.

[0107] (8) Depositing an aluminum oxide layer and a SiNx layer on the front and back of the silicon wafer in sequence as a passivation layer and an anti-reflection layer, respectively. The thickness of the aluminum oxide layer is 3 nm, and the thickness of the SiNx layer is 75 nm. The deposition temperature of the aluminum oxide layer is 250°C and the deposition time is 8 min. The deposition temperature of the SiNx layer is 600°C and the deposition time is 6 min.

[0108] (9) Prepare the front and back metal electrodes, use silver paste for the front and back main grids, use silver paste for the front and back fine grids, and the thickness of the front fine grid is 19μm and the thickness of the back fine grid is 17μm. Then sinter at 850℃ to obtain an N-type TOPCon battery.

[0109] The N-type TOPCon batteries prepared in Examples 1 to 3 and Comparative Example 1 were subjected to electrical performance IV tests, and the results are shown in Table 1.

[0110] As shown in Table 1, compared with the N-type TOPCon cell prepared by conventional laser doping and boron diffusion, the preparation method provided by the embodiment of the present invention, although omitting the laser doping step, improves the overall efficiency of the prepared cell by about 0.03%, showing a higher efficiency advantage.

[0111] Table 1

[0112]

[0113] In summary, in this embodiment, the preparation method of the N-type TOPCon cell provided, after electrode sintering and light injection, laser irradiates the cell while applying deflection electricity, so that the current generated by the laser is transmitted along a low contact resistance path, inducing silver-silicon interdiffusion, thereby significantly reducing the contact resistance. It can avoid carrier recombination caused by direct contact between the metal and the silicon substrate while retaining the original passivation layer. Therefore, the preparation method provided by the present invention can achieve the effect of replacing SE doping, that is, it avoids the problem of high process requirements and cumbersome steps in the existing preparation of P-type emitters in N-type TOPCon cells using laser SE technology.

[0114] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they are aware of the basic creative concepts. Therefore, the claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0115] The above is a detailed introduction to an N-type TOPCon battery and its preparation method provided by the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the ideas of the present invention, there will be changes in the specific implementation methods and application scopes. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A method for preparing an N-type TOPCon battery, characterized in that: include: Performing boron diffusion treatment on the front side of the N-type silicon wafer, forming a tunneling oxide layer and a polysilicon layer on the back side in sequence, and doping the polysilicon layer with phosphorus to form a phosphorus-doped polysilicon layer; forming a passivation layer and a printed electrode in sequence on the front side of the silicon wafer and the surface of the phosphorus-doped polysilicon layer; sequentially performing sintering and light injection treatments on the silicon wafer with the electrodes formed thereon; The front electrode of the silicon wafer after light injection treatment is subjected to laser irradiation and deflection voltage treatment to produce an N-type TOPCon battery; wherein the direction of the electric field formed by the deflection voltage is opposite to the direction of the electric field built into the N-type TOPCon battery.

2. The preparation method according to claim 1, characterized in that During the sintering process, the sintering temperature is 500 to 850°C.

3. The preparation method according to claim 1, characterized in that During the light injection treatment, the light intensity is 10 to 50 suns.

4. The preparation method according to claim 1, characterized in that In the laser irradiation and deflection voltage treatment, the laser power is 5 to 30 W, the voltage intensity is 15 to 50 V, and the application time is 0.1 to 3.0 s.

5. The preparation method according to claim 1, characterized in that The boron concentration on the front of the silicon wafer after boron diffusion treatment is 1E18~1E19cm -3 and / or The phosphorus concentration on the back of the silicon wafer after phosphorus doping treatment is 1E20~1E21cm -3 .

6. The preparation method according to claim 1, characterized in that The tunnel oxide layer includes a silicon dioxide layer, and the thickness of the silicon dioxide layer is 1-2 nm, and the thickness of the polysilicon layer is 100-160 nm.

7. The preparation method according to claim 1, characterized in that The passivation layer includes an aluminum oxide layer, and the thickness of the aluminum oxide layer is 1 to 5 nm.

8. The preparation method according to claim 1, characterized in that Before performing boron diffusion treatment on the front surface of the N-type silicon wafer, the method further includes: performing a texturing process on the silicon wafer; Before sequentially forming a silicon oxide layer and a polysilicon layer on the back surface, the method further comprises: The back side of the silicon wafer after boron diffusion treatment is polished.

9. The preparation method according to claim 1, characterized in that Before sequentially forming a passivation layer and a printed electrode on the front surface of the silicon wafer and the surface of the phosphorus-doped polysilicon layer, the method further comprises: Chain pickling is used to remove the phosphosilicate glass layer on the front of the silicon wafer, and then alkaline polishing is performed.

10. An N-type TOPCon battery, characterized in that: The method is prepared by any one of claims 1 to 9.

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