Method, system and equipment for detecting high-resistance grounding fault of small-resistance grounding system

Abstract

The invention discloses a low-resistance grounding system high-resistance grounding fault detection method, system and device, and particularly relates to the technical field of power distribution network relay protection, and the technical key points are as follows: obtaining first neutral line zero-sequence current waveforms of a low-resistance grounding system under different fault types; based on a preset interception condition, intercepting a second neutral line zero-sequence current waveform with a preset length from each first neutral line zero-sequence current waveform, and performing graph conversion on each second neutral line zero-sequence current waveform to obtain a plurality of two-dimensional graphs; setting labels for the plurality of two-dimensional graphs, and training and optimizing a support vector machine by using the labeled two-dimensional graphs to obtain an optimized fault detection model; and using the optimized fault detection model to detect a to-be-detected neutral line zero sequence current waveform of the small resistance grounding system to obtain a fault detection result.

Description

Technical Field

[0001] The present invention relates to the technical field of relay protection for distribution networks, and in particular to a method, system and device for detecting high-resistance grounding faults in a low-resistance grounding system. Background Art

[0002] With the continuous acceleration of urbanization, the cableization rate of my country's urban medium-voltage distribution networks is increasing. At the same time, the significant increase in capacitive current makes it difficult for arc suppression coils to compensate for the large capacitive current. The traditional neutral point grounding method through arc suppression coils performs poorly in urban cable distribution networks. Low-resistance grounding systems are widely used in urban distribution networks due to their advantages such as fast fault clearance and low overvoltage levels.

[0003] Current low-resistance grounding systems primarily rely on time-determined zero-sequence overcurrent protection, which is set based on the maximum capacitive current and has a high setting value, typically 40A to 60A. However, based on actual operating experience, this setting value can only detect faults with a grounding resistance of 85Ω to 140Ω.

[0004] However, when a high-resistance grounding fault with a grounding resistance greater than 140Ω occurs, the line zero-sequence current amplitude may be smaller than this action value, and the high-resistance grounding fault cannot be detected or cannot be detected in time; when a high-resistance grounding fault cannot be detected or cannot be detected in time, the protection of the faulty line may refuse to operate, the fault severity may further increase, and the operational stability of the power system may be damaged.

[0005] Based on this, the present invention aims to provide a method, system and device for detecting high-resistance grounding faults in a low-resistance grounding system to solve the above-mentioned related problems. Summary of the Invention

[0006] The technical problem to be solved by the present invention is that in the prior art, when a high-resistance grounding fault occurs in a low-resistance grounding system, the system cannot detect or cannot detect the occurrence of the fault in a timely manner. The purpose is to provide a high-resistance grounding fault detection method, system and equipment for a low-resistance grounding system. The method obtains the first neutral line zero-sequence current waveform of the low-resistance grounding system under different fault types, and when a sampling point in the first neutral line zero-sequence current waveform exceeds a preset neutral line zero-sequence current amplitude setting value, the sampling point is used as the interception point, and a second neutral line zero-sequence current waveform within a certain range before and after the interception point is intercepted in the first neutral line zero-sequence current waveform; the second neutral line zero-sequence current waveform is converted into a two-dimensional graph through a Markov transition field, and the labeled two-dimensional graph is used to train and test a support vector machine, and the two-dimensional graphs corresponding to different events are classified by the support vector machine to achieve the distinction between single-phase high-resistance grounding faults and system asymmetric events.

[0007] The present invention is achieved through the following technical solutions: A method for detecting a high-resistance grounding fault in a low-resistance grounding system, the method comprising: Obtain the zero-sequence current waveform of the first neutral line of a low-resistance grounding system under different fault types; Based on a preset interception condition, a second neutral line zero-sequence current waveform of a preset length is intercepted from each first neutral line zero-sequence current waveform, and each second neutral line zero-sequence current waveform is converted into a graph to obtain a plurality of two-dimensional graphs; Label multiple two-dimensional graphics, and use the labeled two-dimensional graphics to train and optimize the support vector machine to obtain an optimized fault detection model; The optimized fault detection model is used to detect the zero-sequence current waveform of the neutral line of the low-resistance grounding system to be detected, and the fault detection result is obtained.

[0008] Furthermore, the zero-sequence current waveforms of the first neutral line of the low-resistance grounding system under different fault types are obtained, specifically: Construct a single-phase high-resistance grounding fault simulation model for a low-resistance grounding system; Using the single-phase high-resistance grounding fault simulation model of a low-resistance grounding system, the zero-sequence current waveform of the first neutral line is simulated under different fault simulation conditions and different fault types. Among them, the different fault simulation conditions include different fault lines, different fault times, different transition resistances, and whether a grounding arc is set. The fault types include single-phase grounding faults and system asymmetry events.

[0009] Furthermore, based on the preset interception conditions, a second neutral line zero-sequence current waveform of a preset length is intercepted from each first neutral line zero-sequence current waveform, and each second neutral line zero-sequence current waveform is subjected to graphic conversion to obtain multiple two-dimensional graphics, specifically: Setting an interception condition; wherein the interception condition is that when a sampling point in the first neutral line zero-sequence current waveform exceeds a preset neutral line zero-sequence current amplitude setting value, the sampling point is used as the interception point; intercepting a second neutral line zero-sequence current waveform of a preset length at an interception point corresponding to each first neutral line zero-sequence current waveform; The Markov transfer field is used to perform graphic transformation on the zero-sequence current waveform of each second neutral line to obtain multiple two-dimensional graphics.

[0010] Furthermore, the preset neutral line zero-sequence current amplitude setting value range is 1.5-5A.

[0011] Furthermore, at the interception point position corresponding to each first neutral line zero-sequence current waveform, a second neutral line zero-sequence current waveform of a preset length is intercepted, specifically: At the interception point position corresponding to each first neutral line zero-sequence current waveform, the second neutral line zero-sequence current waveform located between 0.005s before the interception point and 0.01s after the interception point is intercepted.

[0012] Furthermore, labels are set for multiple two-dimensional graphics, and the labeled two-dimensional graphics are used to train and optimize the support vector machine to obtain an optimized fault detection model, specifically: The label of the two-dimensional graph whose fault type is a single-phase grounding fault is set as the first label; the label of the two-dimensional graph whose fault type is a system asymmetry event is set as the second label; Divide multiple labeled two-dimensional graphics into a model training set and a model test set; The model training set is input into the support vector machine for training, and the trained two-dimensional graphics are tested and optimized using the model test set to obtain the optimized fault detection model.

[0013] The present invention further provides a system for detecting high-resistance grounding faults in a low-resistance grounding system, which is used in any one of the above-mentioned methods for detecting high-resistance grounding faults in a low-resistance grounding system. The system comprises: A zero-sequence current waveform acquisition module is used to obtain the zero-sequence current waveform of the first neutral line of a low-resistance grounding system under different fault types; a two-dimensional graphic conversion module, configured to intercept a second neutral line zero-sequence current waveform of a preset length from each first neutral line zero-sequence current waveform based on a preset interception condition, and perform graphic conversion on each second neutral line zero-sequence current waveform to obtain a plurality of two-dimensional graphics; A fault detection model building module is used to set labels for multiple two-dimensional graphics and use the labeled two-dimensional graphics to train and optimize the support vector machine to obtain an optimized fault detection model; The fault detection module is used to detect the zero-sequence current waveform of the neutral line of the low-resistance grounding system to be detected using the optimized fault detection model to obtain a fault detection result.

[0014] The present invention also provides a computer device, comprising a system memory and a processor, wherein the system memory stores a computer program, and the processor implements the steps of any one of the above methods when executing the computer program.

[0015] The present invention also provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the steps of any one of the methods described above are implemented.

[0016] The present invention also provides a computer program product comprising instructions, which, when executed by a computer device cluster, enables the computer device cluster to perform any of the above methods.

[0017] Compared with the prior art, the present invention has the following advantages and beneficial effects: In the present invention, the first neutral line zero-sequence current waveform of a low-resistance grounding system under different fault types is obtained, and when a certain sampling point in the first neutral line zero-sequence current waveform exceeds a preset neutral line zero-sequence current amplitude setting value, the sampling point is used as an interception point, and a second neutral line zero-sequence current waveform within a certain range before and after the interception point is intercepted in the first neutral line zero-sequence current waveform; the second neutral line zero-sequence current waveform is converted into a two-dimensional graph through a Markov transition field, and a support vector machine is trained and tested using the labeled two-dimensional graph, and the two-dimensional graphs corresponding to different events are classified by the support vector machine to achieve the distinction between single-phase high-resistance grounding faults and system asymmetric events. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, the following briefly introduces the drawings required for use in the examples. It should be understood that the following drawings only illustrate certain embodiments of the present invention and should not be considered as limiting the scope. A person of ordinary skill in the art can also derive other relevant drawings based on these drawings without inventive effort. In the drawings: Figure 1 1 is a flow chart of a method for detecting a high-resistance grounding fault in a low-resistance grounding system according to this embodiment; Figure 2 Schematic diagram of a simulation model of a single-phase high-resistance grounding fault in a low-resistance grounding system in a high-resistance grounding fault detection method in a low-resistance grounding system according to this embodiment; Figure 3 This is a schematic diagram of a neutral line zero-sequence current waveform obtained by running a simulation model in a method for detecting a high-resistance grounding fault in a low-resistance grounding system in this embodiment when a 3000-ohm single-phase arc grounding fault occurs on the line L3 in the B phase; Figure 4 Schematic diagram of the neutral line zero-sequence current waveform when a load switching operation occurs in line L6 obtained by running a simulation model in a method for detecting a high-resistance grounding fault in a low-resistance grounding system in this embodiment; Figure 5 Schematic diagram of the process of using analog-to-digital conversion of continuous signals in a method for detecting high-resistance grounding faults in a low-resistance grounding system according to this embodiment; Figure 6 Schematic diagram of the structure of a digital-to-analog conversion module in a method for detecting a high-resistance grounding fault in a low-resistance grounding system according to this embodiment; Figure 7 and Figure 8This is a schematic diagram of a two-dimensional graph obtained by using the Markov transfer field in a method for detecting a high-resistance grounding fault in a low-resistance grounding system in this embodiment; Figure 9 Schematic diagram showing comparison of prediction results of a training set obtained by running a support vector machine in a method for detecting a high-resistance grounding fault in a low-resistance grounding system according to this embodiment; Figure 10 Schematic diagram showing comparison of prediction results of a test set obtained by running a support vector machine in a method for detecting a high-resistance grounding fault in a low-resistance grounding system according to this embodiment; Figure 11 This is a schematic diagram of a confusion matrix of a training set obtained by running a support vector machine in a method for detecting a high-resistance grounding fault in a low-resistance grounding system in this embodiment; Figure 12 This is a schematic diagram of a confusion matrix of a test set obtained by running a support vector machine in a method for detecting a high-resistance grounding fault in a low-resistance grounding system in this embodiment; Figure 13 Schematic diagram of the structure of a high-resistance grounding fault detection system for a low-resistance grounding system according to this embodiment; Figure 14 This is a structural diagram of a computer device in this embodiment. DETAILED DESCRIPTION

[0019] The following description of exemplary embodiments of the present disclosure is made in conjunction with the accompanying drawings, including various details of the embodiments of the present disclosure to facilitate understanding, which should be considered as merely exemplary. Therefore, it should be appreciated by those skilled in the art that various changes and modifications may be made to the embodiments described herein without departing from the scope of the present disclosure. Similarly, for the sake of clarity and conciseness, descriptions of well-known functions and structures are omitted in the following description.

[0020] In this disclosure, unless otherwise specified, the use of terms such as "first" and "second" to describe various elements is not intended to limit the positional relationship, temporal relationship, or importance relationship of these elements. Such terms are only used to distinguish one element from another. In some examples, the first element and the second element may refer to the same instance of the element, while in some cases, based on the context of the description, they may also refer to different instances.

[0021] The terms used in the descriptions of various examples in this disclosure are for the purpose of describing specific examples only and are not intended to be limiting. Unless the context clearly indicates otherwise, if the number of elements is not specifically limited, the element may be one or more. In addition, the term "and / or" used in this disclosure encompasses any one and all possible combinations of the listed items.

[0022] Example 1 See also Figure 1 , Figure 1 A schematic flow chart of a method for detecting a high-resistance grounding fault in a low-resistance grounding system is shown, wherein the method comprises: S1: Obtain the zero-sequence current waveform of the first neutral line of the low-resistance grounding system under different fault types; Specifically, in this embodiment, a single-phase high-resistance grounding fault simulation model of a low-resistance grounding system is first constructed; then, the single-phase high-resistance grounding fault simulation model of the low-resistance grounding system is used to simulate and obtain the first neutral line zero-sequence current waveform under different fault simulation conditions and different fault types; wherein, different fault simulation conditions include different fault lines, different fault times, different transition resistances, and whether a grounding arc is set; and fault types include single-phase grounding faults and system asymmetric events.

[0023] It should be noted that, in this embodiment, the following Figure 2 The following is a simulation model of a single-phase high-resistance grounding fault in a 10kV neutral point low-resistance grounding system. In this system model, the neutral point grounding resistance is set to 10 ohms. The system model also includes six feeders with lengths of 2 km, 6 km, 8 km, 10 km, 12 km, and 20 km, respectively. The positive sequence parameters of the line are: R1 = 0.28 Ω / km, X1 = 0.26 mh / km, C1 = 0.38 μF / km; the zero sequence parameters are: R0 = 2.8 Ω / km, X0 = 1.11 mh / km, C0 = 0.28 μF / km. Then, different fault simulation conditions and different fault types are set in the simulation model, where different fault lines are set as: line L1, line L2, line L3, line L4, line L5, line L6, different fault times are set to 0.05s-0.07s, different transition resistances are set to 0.01 ohm-3000 ohm, and with / without grounding arc; different fault types include single-phase grounding faults and system asymmetry events, where system asymmetry events refer to events that will cause the neutral line zero-sequence current amplitude to increase, specifically including capacitor switching and unbalanced load switching events. Part of the first neutral line zero-sequence current waveform after simulation is shown as follows: When a B-phase 3000 ohm single-phase arc grounding fault occurs in line L3, the neutral line zero-sequence current waveform is as follows: Figure 3 As shown, the neutral line zero sequence current waveform when load switching operation occurs in line L6 is as follows: Figure 4 shown.

[0024] S2: Based on a preset interception condition, intercepting a second neutral line zero-sequence current waveform of a preset length from each first neutral line zero-sequence current waveform, and performing graphic conversion on each second neutral line zero-sequence current waveform to obtain a plurality of two-dimensional graphics; Specifically, in this embodiment, an interception condition is first set; wherein the interception condition is that when a sampling point in the first neutral line zero-sequence current waveform exceeds a preset neutral line zero-sequence current amplitude setting value, the sampling point is used as the interception point; then, at the interception point position corresponding to each first neutral line zero-sequence current waveform, the second neutral line zero-sequence current waveform located between 0.005s before and 0.01s after the interception point is intercepted; It should be noted that, in this embodiment, the sampling time interval of each sampling point in the first neutral line zero-sequence current waveform is 0.001s. In other embodiments, other sampling time intervals may also be set, which will not be described in detail here. At the same time, according to general parameters based on engineering experience, the maximum unbalanced zero-sequence current corresponding to a single-phase grounding fault occurring in a pure overhead line or a pure cable line is approximately 0.37A and 0.26A respectively. Since the protection device receives a three-fold zero-sequence current electrical signal, the neutral line zero-sequence current setting value should be greater than 1.11A. Therefore, the preset neutral line zero-sequence current amplitude setting value range is 1.5-5A. In this embodiment, 1.5A is used, which can detect a single-phase high-resistance grounding fault of 3000 ohms. Other setting values ​​may also be used in other embodiments, which will not be described in detail here. At the same time, before the graphic conversion, the intercepted second neutral line zero sequence current waveform is converted into a digital signal through the analog-to-digital conversion module, and the analog-to-digital conversion module adopts conventional technical means in this field. The analog-to-digital conversion process is specifically as follows: the continuous signal sampling process is as follows Figure 5 The analog-to-digital conversion module is shown in Figure 6 As shown, it consists of a sampler, a quantizer, and an encoder. In this disclosure, the sampling time is set to 0.0001s; Zero-Order Hold (sampler): samples the analog signal at the set sampling time to generate discrete sample points; Quantizer (quantizer): quantizes the sampled discrete signal amplitude and converts it into a finite discrete value; Data Type Conversion (encoder): converts the quantized value into the binary form of the digital signal; Finally, the Markov transfer field is used to perform graphical transformation on the zero-sequence current waveform of each second neutral line to obtain multiple two-dimensional graphs.

[0025] It should be noted that, in this embodiment, the Markov transfer field adopts conventional technical means in this field. The process of Markov transfer field conversion is as follows: first, the neutral line zero sequence current signal sequence Divide into Q bins (labeled 1, 2, ..., Q, with the same amount of data in each bin); then change each data in the time series to the serial number of its corresponding bin; and then construct the transfer matrix W as follows: ,in, represents the frequency of transfer from bin i to bin j, ; The constructed Markov transition field M is as follows: ; Some two-dimensional graphics generated by MTF conversion are as follows Figure 7 、 Figure 8 shown S3: Label multiple two-dimensional graphics and use the labeled two-dimensional graphics to train and optimize the support vector machine to obtain an optimized fault detection model; Specifically, in this embodiment, first, a first label is set for the label of the two-dimensional graph whose fault type is a single-phase grounding fault; a second label is set for the label of the two-dimensional graph whose fault type is a system asymmetric event; the multiple labeled two-dimensional graphs are divided into a model training set and a model test set; the model training set is input into a support vector machine for training, and the trained two-dimensional graph is tested and optimized using the model test set to obtain an optimized fault detection model.

[0026] It should be noted that, in this embodiment, the training method of the support vector machine adopts conventional technical means in this field, which will not be described in detail here; the model training set is put into the support vector machine for training, and the support vector machine is used to classify the two-dimensional graphics corresponding to the system asymmetry event to achieve the classification of high-resistance grounding faults and system asymmetry events, thereby realizing the detection of single-phase high-resistance grounding faults in a low-resistance grounding system. The prediction results obtained by the support vector machine operation are compared with the confusion matrix as shown in Figure 2. Figure 9 、 Figure 10 、 Figure 11 、 Figure 12 shown.

[0027] S4: Use the optimized fault detection model to detect the zero-sequence current waveform of the neutral line of the low-resistance grounding system to be detected, and obtain the fault detection result.

[0028] Specifically, in this embodiment, the first neutral line zero-sequence current waveform of the low-resistance grounding system under different fault types is obtained, and when a sampling point in the first neutral line zero-sequence current waveform exceeds the preset neutral line zero-sequence current amplitude setting value, the sampling point is used as the interception point, and the second neutral line zero-sequence current waveform within a certain range before and after the interception point is intercepted in the first neutral line zero-sequence current waveform; the second neutral line zero-sequence current waveform is converted into a two-dimensional graph through the Markov transfer field, and the labeled two-dimensional graph is used to train and test the support vector machine, and the two-dimensional graphs corresponding to different events are classified by the support vector machine to achieve the distinction between single-phase high-resistance grounding faults and system asymmetric events.

[0029] Example 2 See also Figure 13As shown, the present invention also provides a system for detecting high-resistance grounding faults in a low-resistance grounding system, which is used in any of the above-mentioned methods for detecting high-resistance grounding faults in a low-resistance grounding system, and the system includes: The zero-sequence current waveform acquisition module 100 is used to obtain the zero-sequence current waveform of the first neutral line of the low-resistance grounding system under different fault types; A two-dimensional graph conversion module 200 is configured to extract a second neutral line zero-sequence current waveform of a preset length from each first neutral line zero-sequence current waveform based on a preset interception condition, and perform graph conversion on each second neutral line zero-sequence current waveform to obtain a plurality of two-dimensional graphs; The fault detection model building module 300 is used to set labels for multiple two-dimensional graphics and use the labeled two-dimensional graphics to train and optimize the support vector machine to obtain an optimized fault detection model; The fault detection module 400 is used to detect the zero-sequence current waveform of the neutral line of the low-resistance grounding system to be detected using the optimized fault detection model to obtain a fault detection result.

[0030] It should be noted that the modules in the system of Example 2 correspond to the steps in the method of Example 1. The steps in the method of Example 1 have been described in detail in Example 1, and the contents of the modules in the system will not be described in detail in this Example 2.

[0031] Example 3 See also Figure 14 As shown, this embodiment further provides a computer device, including a system memory 1005 and a processor 1001, wherein the system memory 1005 stores a computer program, and the processor 1001 implements the steps of any of the above methods when executing the computer program.

[0032] It should be noted that the processor 1001 is configured to execute the steps of the above method embodiments according to the instructions in the program code. Alternatively, the processor 1001 implements the functions of the modules / units in the above system / device embodiments when executing the computer program.

[0033] Specifically, in this embodiment, the computer program may be divided into one or more modules / units, one or more modules / units being stored in the system memory 1005 and executed by the processor 1001 to complete the present application. One or more modules / units may be a series of computer program instruction segments capable of completing specific functions, and the instruction segments are used to describe the execution process of the computer program in the terminal device.

[0034] The terminal device may be a computing device such as a desktop computer, laptop, PDA, or cloud server. The terminal device may include, but is not limited to, a processor 1001 and a system memory 1005. Those skilled in the art will appreciate that this does not limit the terminal device and may include more or fewer components than shown, or a combination of certain components, or different components. For example, the terminal device may also include an input / output device 1003, a network access device 1002, a bus 1006, and the like.

[0035] The processor 1001 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor.

[0036] The system memory 1005 can be an internal storage unit of the terminal device, such as a hard disk or memory of the terminal device. The system memory 1005 can also be the storage device 1004 of the terminal device, such as a plug-in hard disk, a SmartMedia Card (SMC), a Secure Digital (SD) card, a Flash Card, etc. equipped on the terminal device. Furthermore, the system memory 1005 can also include both the internal storage unit of the terminal device and the storage device 1004. The system memory 1005 is used to store computer programs and other programs and data required by the terminal device. The system memory 1005 can also be used to temporarily store data that has been output or is about to be output.

[0037] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described systems, systems and units can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0038] Example 4 This embodiment provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the steps of any one of the above methods are implemented.

[0039] Among them, the computer-readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared or semiconductor system, system or device, or any combination thereof. More specific examples of computer-readable storage media (a non-exhaustive list) include: an electrical connection with one or more wires, a portable computer disk, a hard disk. Random Access Memory (RAM), Read-Only Memory (ROM), Erasable Programmable Read Only Memory (EPROM), a register, a hard disk, an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above, or any other form of computer-readable storage medium known in the art.

[0040] An exemplary storage medium is coupled to a processor so that the processor can read information from the storage medium and write information to the storage medium. Of course, the storage medium can also be an integral part of the processor. The processor and the storage medium can be located in an application-specific integrated circuit (ASIC). In an embodiment of the present invention, a computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, system, or device.

[0041] Example 5 This embodiment further provides a computer program product comprising instructions. When the instructions are executed by a computer device cluster, the computer device cluster executes the method described in Embodiment 1.

[0042] The specific implementation methods described above further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific implementation method of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A method for detecting high-resistance grounding faults in a low-resistance grounding system, characterized in that: Methods include: Obtain the zero-sequence current waveform of the first neutral line of a low-resistance grounding system under different fault types; Based on a preset interception condition, a second neutral line zero-sequence current waveform of a preset length is intercepted from each first neutral line zero-sequence current waveform, and each second neutral line zero-sequence current waveform is converted into a graph to obtain a plurality of two-dimensional graphs; Label multiple two-dimensional graphics, and use the labeled two-dimensional graphics to train and optimize the support vector machine to obtain an optimized fault detection model; The optimized fault detection model is used to detect the zero-sequence current waveform of the neutral line of the low-resistance grounding system to be detected, and the fault detection result is obtained.

2. The method for detecting high-resistance grounding faults in a low-resistance grounding system according to claim 1, wherein: Obtain the zero-sequence current waveform of the first neutral line of the low-resistance grounding system under different fault types, specifically: Construct a single-phase high-resistance grounding fault simulation model for a low-resistance grounding system; Using the single-phase high-resistance grounding fault simulation model of a low-resistance grounding system, the zero-sequence current waveform of the first neutral line is simulated under different fault simulation conditions and different fault types. Among them, the different fault simulation conditions include different fault lines, different fault times, different transition resistances, and whether a grounding arc is set. The fault types include single-phase grounding faults and system asymmetry events.

3. The method for detecting high-resistance grounding faults in a low-resistance grounding system according to claim 1, wherein: Based on the preset interception conditions, a second neutral line zero-sequence current waveform of a preset length is intercepted from each first neutral line zero-sequence current waveform, and each second neutral line zero-sequence current waveform is converted into a graph to obtain multiple two-dimensional graphs, specifically: Setting an interception condition; wherein the interception condition is that when a sampling point in the first neutral line zero-sequence current waveform exceeds a preset neutral line zero-sequence current amplitude setting value, the sampling point is used as the interception point; intercepting a second neutral line zero-sequence current waveform of a preset length at an interception point corresponding to each first neutral line zero-sequence current waveform; The Markov transfer field is used to perform graphic transformation on the zero-sequence current waveform of each second neutral line to obtain multiple two-dimensional graphics.

4. The method for detecting high-resistance grounding faults in a low-resistance grounding system according to claim 3, wherein: The preset neutral line zero-sequence current amplitude setting value range is 1.5-5A.

5. The method for detecting high-resistance grounding faults in a low-resistance grounding system according to claim 3, wherein: At the interception point position corresponding to each first neutral line zero-sequence current waveform, a second neutral line zero-sequence current waveform of a preset length is intercepted, specifically: At the interception point position corresponding to each first neutral line zero-sequence current waveform, the second neutral line zero-sequence current waveform located between 0.005s before the interception point and 0.01s after the interception point is intercepted.

6. The method for detecting high-resistance grounding faults in a low-resistance grounding system according to claim 2, wherein: Label multiple two-dimensional graphics and use the labeled two-dimensional graphics to train and optimize the support vector machine to obtain the optimized fault detection model, specifically: Setting the label of the two-dimensional graph whose fault type is single-phase grounding fault as the first label; Setting a second label for the label of the two-dimensional graph whose fault type is a system asymmetry event; Divide multiple labeled two-dimensional graphics into a model training set and a model test set; The model training set is input into the support vector machine for training, and the trained two-dimensional graphics are tested and optimized using the model test set to obtain the optimized fault detection model.

7. A high-resistance grounding fault detection system for a low-resistance grounding system, characterized in that: The system is used in a method for detecting high-resistance grounding faults in a low-resistance grounding system according to any one of claims 1 to 6, and the system comprises: A zero-sequence current waveform acquisition module is used to obtain the zero-sequence current waveform of the first neutral line of a low-resistance grounding system under different fault types; a two-dimensional graphic conversion module, configured to intercept a second neutral line zero-sequence current waveform of a preset length from each first neutral line zero-sequence current waveform based on a preset interception condition, and perform graphic conversion on each second neutral line zero-sequence current waveform to obtain a plurality of two-dimensional graphics; A fault detection model building module is used to set labels for multiple two-dimensional graphics and use the labeled two-dimensional graphics to train and optimize the support vector machine to obtain an optimized fault detection model; The fault detection module is used to detect the zero-sequence current waveform of the neutral line of the low-resistance grounding system to be detected using the optimized fault detection model to obtain a fault detection result.

8. A computer device comprising a system memory and a processor, wherein the system memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 6 are implemented.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

10. A computer program product comprising instructions, characterized in that When the instructions are executed by a computer device cluster, the computer device cluster is caused to perform the method according to any one of claims 1 to 6.

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