PCB busbar integrated design method of multi-unit three-phase motor driving system

Abstract

The invention discloses a PCB busbar integrated design method of a multi-unit three-phase motor driving system, and aims to solve the problems that a traditional busbar is large in size and multi-phase loop parameters are asymmetric. A scheme of integrating a PCB busbar and a high-voltage ceramic capacitor is adopted, the busbar is in a U shape or a regular polygon shape, a direct current input terminal is arranged in the middle, output terminals and the ceramic capacitor are uniformly and symmetrically distributed along each side of the busbar, and the top layer capacitor and the bottom layer capacitor are symmetrical through double-sided layout. The design process comprises the following steps: calculating the capacitance value of a required capacitor according to system parameters, selecting a ceramic capacitor, preliminarily designing a special-shaped busbar, and optimizing parasitic parameters, volume and weight by using ANSYS Q3D simulation software. The parasitic inductance difference rate of each phase loop and system parasitic parameters are reduced through the symmetrical structure and the ceramic capacitor, and compared with a traditional scheme that a laminated busbar is combined with a thin film capacitor, the power density and reliability of the system are effectively improved, the space utilization rate is optimized, and the system stability is enhanced.

Description

Technical Field

[0001] The present invention relates to the field of motor drive systems, and in particular to a PCB busbar integrated design method for a multi-unit three-phase motor drive system. Background Art

[0002] In the inverter system, DC bus capacitors and busbars are core components, but their volume and weight account for more than 50% of the total system, and traditional designs have significant defects.

[0003] Volume and weight bottlenecks: In the traditional stacked busbar and thin-film capacitor solution, the volume of the thin-film capacitor accounts for about 1 / 3 of the total volume of the inverter, and the busbar structure is complex, making it difficult to increase the system power density and unable to meet the miniaturization and high power requirements of scenarios such as new energy vehicles and industrial drives.

[0004] Parasitic parameter defects: The equivalent series inductance (ESL) and equivalent series resistance (ESR) of laminated busbars are high, which can easily cause voltage oscillation, electromagnetic noise, and heat generation. Existing PCB busbar designs are mostly designed for single-phase or three-phase systems. When expanded to multi-unit three-phase systems, the traditional "straight" capacitor arrangement can cause the parasitic inductance of each phase loop to vary by more than 20%, causing current imbalance and affecting motor drive performance.

[0005] Lack of design methods: For multi-unit three-phase systems, there is a lack of a universal busbar design method, especially in capacitor layout, busbar structure symmetry and parasitic parameter optimization. This restricts the improvement of the reliability and stability of multi-phase motor drive systems. Summary of the Invention

[0006] The purpose of the present invention is to address the deficiencies of the above-mentioned prior art. The present invention proposes a PCB busbar integrated design method for a multi-unit three-phase motor drive system. The PCB busbar and high-voltage ceramic capacitor integration solution is adopted to effectively improve the system power density and reliability, optimize space utilization, and enhance system stability.

[0007] The technical solution to achieve the purpose of the present invention is:

[0008] A PCB busbar integration design method for a multi-unit three-phase motor drive system is characterized by adopting a PCB busbar and high-voltage ceramic capacitor integration solution. The busbar is shaped like a "U" or a regular n-gon, with DC input terminals located in the center of the board surface, output terminals located on each side of the board surface, and capacitors evenly and symmetrically distributed on each side. The high-voltage ceramic capacitors are symmetrically arranged on the top and bottom layers of the busbar, and the capacitors on the same layer are evenly distributed.

[0009] Furthermore, the parasitic parameters of the busbar are obtained by finite element analysis, and the busbar is modeled and simulated by finite element software ANSYS Q3D, so as to obtain the parasitic parameters of the busbar.

[0010] Furthermore, the number of units n of the multi-unit multi-phase motor is an integer greater than or equal to 1, and the corresponding number of phases is 3×n.

[0011] Furthermore, for the three-unit motor, the busbar adopts a double-sided layout, with the same number of high-voltage ceramic capacitors arranged on the top and bottom layers respectively.

[0012] Furthermore, for a three-unit motor, the busbar is in a "U" shape, the DC input terminal is located in the center of the board, the output terminals are located on the three sides of the board, and the capacitors are evenly and symmetrically placed on the three sides.

[0013] Furthermore, for a motor with a unit number n greater than 3, the busbar shape is a regular n-gon, and the ceramic capacitors are evenly distributed on the n sides.

[0014] Furthermore, for motors with a unit number n greater than 3, the design process is as follows:

[0015] Step S1: According to the DC bus voltage V dc , switching frequency f s , output current peak I o , DC side voltage ripple maximum value ΔU Cmax , modulation ratio M, load power factor Calculate the capacitance C of the DC bus capacitor dc ;

[0016] Step S2: Select a suitable type of high-voltage ceramic capacitor and perform preliminary special-shaped busbar design;

[0017] Step S3: Using ANSYS Q3D, Maxwell, and MATLAB simulation software, simulate the parasitic parameters and loop current density of the design scheme, taking into account factors including but not limited to volume and weight;

[0018] Step S4: Obtain the final design solution.

[0019] Compared with the prior art, the present invention adopts the above technical solution and has the following beneficial effects:

[0020] (1) The PCB busbar and high-voltage ceramic capacitor integration solution adopted by the present invention takes advantage of the small package size and high capacitance density of ceramic capacitors to achieve the target capacitance by connecting multiple capacitors in parallel, effectively reducing the overall volume and weight of the system.

[0021] (2) By symmetrically arranging “U”-shaped or regular n-gon busbars, the paths of each phase loop are averaged, and combined with ANSYS Q3D simulation optimization, the parasitic inductance variation rate is effectively reduced. At the same time, the low equivalent series inductance and low equivalent series resistance characteristics of ceramic capacitors effectively suppress voltage oscillations and ripple current, improving the system’s electromagnetic compatibility and long-term operational reliability.

[0022] (3) The geometric symmetry of the busbar structure ensures that the parasitic impedance of each phase circuit is highly consistent, avoiding the current imbalance problem caused by parameter differences, significantly improving the current balance of each phase winding of the motor, thereby improving system efficiency and suppressing the temperature rise of the winding.

[0023] (4) The special-shaped busbar design method proposed in the present invention is highly versatile and can be flexibly extended to any multi-unit three-phase system. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 This is a flowchart of the special-shaped busbar design for the PCB busbar integrated design method of a multi-unit three-phase motor drive system proposed by the present invention;

[0025] Figure 2 This is a physical picture of the laminated busbar film capacitor;

[0026] Figure 3 This is a physical picture of the integrated capacitor;

[0027] Figure 4 This is a physical picture of the PCB busbar + ceramic capacitor used in the present invention;

[0028] Figure 5 This is a comparison chart of the weight and volume effects of three types of DC busbars;

[0029] Figure 6 The following is a comparison chart of the equivalent series inductance (ESL) and equivalent series resistance (ESR) of three types of DC busbars;

[0030] Figure 7 It is a "one" type busbar arrangement model;

[0031] Figure 8 This is the physical structure diagram of the double-layer flat DC busbar;

[0032] Figure 9 This is the equivalent circuit diagram of the double-layer flat DC busbar;

[0033] Figure 10 This is the plan design drawing of the three-unit three-phase busbar;

[0034] Figure 11 This is a side sectional view of a three-unit three-phase busbar;

[0035] Figure 12 This is the exploded diagram of the three-unit three-phase busbar;

[0036] Figure 13 This is the simulation interface diagram of the three-unit three-phase ANSYS Q3D software;

[0037] Figure 14 This is a schematic diagram of the three-unit three-phase "U"-shaped busbar design;

[0038] Figure 15 This is a schematic diagram of the design of a four-unit three-phase regular quadrilateral busbar. DETAILED DESCRIPTION

[0039] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0040] In an inverter system, DC bus capacitors play a role in voltage stabilization, filtering, and energy storage, and are essential components. Busbars have advantages such as low parasitic inductance and high current capacity, making them the preferred component for connecting capacitors. As key components of the inverter, the two occupy most of the inverter's volume and weight. Figure 2-Figure 4 As shown; Figure 5-Figure 6 The volume, weight, equivalent series resistance (ESR), equivalent series inductance (ESL), and ripple current tolerance of the three schemes are compared. The design conditions of the schemes are: bus voltage 540V, maximum output power 30kW, bus capacitance 125μF, and input current peak 56A.

[0041] It can be seen that under the same design requirements, compared with the traditional laminated busbar film capacitor solution and the integrated capacitor solution, the PCB busbar + ceramic capacitor has the following advantages: (1) Minimum volume and weight, which can further improve the power density; (2) Small package stray inductance, small equivalent series resistance (ESR) and equivalent series inductance (ESL); (3) Greater ripple current tolerance and less heating.

[0042] Existing PCB busbar designs are mostly targeted at three-phase motor drive systems, but there is no universal design method for busbars driven by multi-unit three-phase motors. When designing PCB busbars, in addition to considering reducing the stray inductance of the circuit, the impedance symmetry between the parallel circuits is also a key factor that needs to be considered. The asymmetry of the busbar structure will inevitably lead to the asymmetry of the parasitic impedance, which in turn leads to current imbalance between the phase circuits. Taking the three-phase busbar as an example, the simplest busbar capacitor arrangement is as follows Figure 7The top two holes are DC input terminals, the bottom row of holes are output terminals for connecting to the power circuit, and the capacitors are arranged horizontally in the middle, forming a "one" shape, as shown in the figure. Figure 7 As shown. Finite element simulation of each phase loop was performed using ANSYS Q3D software to obtain the parasitic inductance of each phase loop. The results are summarized in Table 1. It can be seen that the maximum inductance is 44.60nH and the minimum inductance is 35.24nH. The difference between the two is 9.36nH, which is approximately 20.99% of the maximum inductance value. It can be seen that in the "I" arrangement model, not only do some loops have excessive parasitic inductance due to their long paths, but the paths of the phase loops are also quite different, resulting in large differences in the parasitic inductance of the power loops of different bridge arms. This will lead to poor parameter consistency between the phases. How to optimize the PCB busbar structure and capacitor arrangement is of great significance to improving space utilization.

[0043] Table 1 Summary of parasitic inductance of each phase loop of the “I” model

[0044] A B C U V W X Y Z Parasitic inductance (nH) 44.54 42.76 40.64 37.40 35.24 37.84 40.67 42.81 44.60

[0045] Whether it is a laminated busbar or a PCB busbar, its most basic structure consists of a conductor layer (positive plate layer, negative plate layer) and an insulating layer in the middle. Here we take a regular flat DC busbar as an example. Figure 8 This is the physical structure of a double-layer flat-plate DC busbar. The busbar's structural parameters include length l, width w, thickness h, and the distance d between the two plates. Since the busbar is considered a regular flat plate, the current distribution on the busbar is uniform during operation. This allows the stray resistance, capacitance, and mutual inductance on the positive and negative busbars to be evenly distributed between the conductance and mutual capacitance between the busbars, forming the equivalent circuit of the DC busbar, as shown in the figure below. Figure 9 As shown, where R P 、R N is the parasitic resistance on the positive and negative plates, L P , L N is the parasitic self-inductance, C P 、C N is the parasitic capacitance to ground, M is the equivalent mutual inductance between the two plates, C is the equivalent mutual capacitance, and G is the conductance.

[0046] For this regular flat busbar, combined with Figure 9 The busbar size and its physical quantities can be calculated by the formula:

[0047]

[0048] Among them, ε0, ε r are the dielectric constants of vacuum and insulating materials, μ0 and μ rare the vacuum magnetic permeability and the insulating material magnetic permeability respectively, d0 is the distance between the busbar and the ground, σ is the conductivity of the insulating material, k is the correction coefficient, is the vector angle between the currents flowing through the positive and negative busbars, L total is the total parasitic inductance of the busbar. The above formula can be used to estimate the busbar's parasitic parameters. However, it should be noted that the above analysis of busbar parasitic parameters is based on a regular flat busbar. For complex busbar structures, such as those with bends, holes, and slots, it is difficult to directly establish analytical equations to extract their parasitic parameters. Finite element analysis is usually applied, using the finite element software ANSYS Q3D to model and simulate the busbar to obtain the busbar's parasitic parameters.

[0049] This invention proposes a PCB busbar integrated design method for a multi-unit three-phase motor drive system, which uses a PCB busbar and high-voltage ceramic capacitor integration solution. Ceramic capacitors have small package size parameters and low single capacitor capacitance. Dozens or even hundreds of capacitors are required in parallel to meet the DC busbar capacitance requirements in inverter applications. Therefore, their overall ESR and ESL are relatively low. Taking a three-unit three-phase busbar with n=3 units as an example, its planar design diagram is shown in the figure below. Figure 10 As shown, the busbar adopts a double-sided layout, with the same number of high-voltage ceramic capacitors arranged on the top and bottom layers. "DC+" is the DC positive input terminal, "DC-" is the DC negative input terminal, "A+," "B+," "C+," "U+," "V+," "W+," "X+," "Y+," and "Z+" are the nine-phase positive output terminals, and "A-," "B-," "C-," "U-," "V-," "W-," "X-," "Y-," and "Z-" are the nine-phase negative output terminals. The busbar is U-shaped, with the DC input terminal located in the center of the board and the output terminals located on the three sides. The capacitors are evenly and symmetrically placed on the three sides.

[0050] The side cross-sectional view and exploded view of the busbar are as follows: Figure 11 and Figure 12 ANSYS Q3D software is used to extract the parasitic parameters of the PCB busbar. The simulation software interface is as shown in the figure. Figure 13 The simulation results of the parasitic inductance of each phase loop are shown in Table 2. The maximum inductance is 12.43nH, and the minimum inductance is 11.09nH. The difference between the two is 1.34nH, which is approximately 10.78% of the maximum inductance. It can be seen that compared with the "straight" arrangement, the difference in parasitic parameters is significantly reduced after adopting the "U" arrangement. This is because the "U" arrangement makes the paths of each phase loop more uniform, effectively improving the consistency of the parameters of each phase.

[0051] Table 2 Summary of parasitic inductance of each phase loop of “U” type model

[0052] A B C U V W X Y Z Parasitic inductance (nH) 11.17 11.50 11.38 11.52 12.43 12.01 11.09 11.46 11.21

[0053] When the number of units n>3, the busbar shape is a regular n-gon, and the ceramic capacitors are evenly distributed on the n sides. Take n=4 as an example, Figure 14 As shown, "1+", "2+", "3+", "4+", "5+", "6+", "7+", "8+", "9+", "10+", "11+", and "12+" are the twelve-phase positive output terminals, and "1-", "2-", "3-", "4-", "5-", "6-", "7-", "8-", "9-", "10-", "11-", and "12-" are the twelve-phase negative output terminals. The design process of the n-sided busbar is as follows: Figure 1 As shown. First, according to the DC bus voltage V dc , switching frequency f s , output current peak I o , Maximum value of DC side voltage ripple ΔU Cmax , modulation ratio M, load power factor These indicators are used to calculate the capacitance C of the DC bus capacitor. dc , the calculation formula is as follows (for the convenience of calculation, take M = 1):

[0054]

[0055] Then, based on the calculated capacitance, the appropriate type of high-voltage ceramic capacitor is selected to carry out a preliminary special-shaped busbar design. Then, the parasitic parameters of the design scheme are simulated through simulation software such as Q3D. Taking into account factors such as overall volume and weight, the scheme is adjusted, such as reselecting the ceramic capacitor, adjusting the arrangement of the capacitors, adjusting the spacing between capacitors, etc., and finally obtaining the final design scheme.

[0056] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A PCB busbar integrated design method for a multi-unit three-phase motor drive system, characterized in that: A PCB busbar and high-voltage ceramic capacitor integration solution is adopted. The busbar is shaped like a "U" or a regular n-gon. The DC input terminal is located in the center of the board, and the output terminals are located on each side of the board. The capacitors are evenly and symmetrically distributed on each side. The high-voltage ceramic capacitors are symmetrically arranged on the top and bottom layers of the busbar, and the capacitors on the same layer are evenly distributed.

2. The PCB busbar integrated design method for a multi-unit three-phase motor drive system according to claim 1, characterized in that: The parasitic parameters of the busbar are obtained by finite element analysis, and the busbar is modeled and simulated by finite element software ANSYS Q3D to obtain the parasitic parameters of the busbar.

3. The PCB busbar integrated design method for a multi-unit three-phase motor drive system according to claim 1, characterized in that: The number of units n of the multi-unit multi-phase motor is an integer greater than or equal to 1, and the corresponding number of phases is 3×n.

4. The PCB busbar integrated design method for a multi-unit three-phase motor drive system according to claim 1, characterized in that: For three-unit motors, the busbar adopts a double-sided layout, with the same number of high-voltage ceramic capacitors arranged on the top and bottom layers respectively.

5. The PCB busbar integrated design method for a multi-unit three-phase motor drive system according to claim 1, characterized in that: For a three-unit motor, the busbar is in a "U" shape, with the DC input terminal located in the center of the board, and the output terminals located on the three sides of the board, and the capacitors are evenly and symmetrically placed on the three sides.

6. The PCB busbar integrated design method for a multi-unit three-phase motor drive system according to claim 1, characterized in that: For motors with a unit number n greater than 3, the busbar shape is a regular n-gon, and the ceramic capacitors are evenly distributed on the n sides.

7. The PCB busbar integrated design method for a multi-unit three-phase motor drive system according to claim 1, characterized in that: For motors with a unit number n greater than 3, the design process is as follows: Step S1: According to the DC bus voltage V dc , switching frequency f s , output current peak I o , Maximum value of DC side voltage ripple ΔU Cmax , modulation ratio M, load power factor cosφ to calculate the DC bus capacitor value C dc ; Step S2: Select a suitable type of high-voltage ceramic capacitor and perform preliminary special-shaped busbar design; Step S3: Using ANSYS Q3D, Maxwell, and MATLAB simulation software, simulate the parasitic parameters and loop current density of the design scheme, taking into account factors including but not limited to volume and weight; Step S4: Obtain the final design solution.

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