CAN (Controller Area Network) port high-voltage-resistant, negative-voltage and electric leakage-resistant protection circuit

Abstract

The invention discloses a CAN port high-voltage-resistant, negative-voltage and electric leakage protection circuit which comprises a CANH end protection circuit and a CANL end protection circuit, in the CANH end protection circuit, the CANH end is connected with the drain end of a high-voltage PMOS device, the source end of the CANH end protection circuit is connected with the cathode of a CANH end high-voltage diode and the cathode of a voltage stabilizing diode, and the grid end of the CANH end protection circuit is connected with the anode of the voltage stabilizing diode and a bias constant current source; the anode of the CANH end high-voltage diode is connected with the drain end of the low-voltage PMOS device, the source end of the low-voltage PMOS device is connected with a low-voltage power supply, and the grid end of the low-voltage PMOS device is connected with CANH end bias voltage; both the high-voltage PMOS device and the CANH end high-voltage diode are provided with parasitic diodes; in the CANL end protection circuit, a CANL end is connected with the anode of a CANL end high-voltage diode, and the cathode of the CANL end high-voltage diode is connected with the drain end of a high-voltage NMOS device. The source end of the high-voltage NMOS device is connected with the drain end of the low-voltage NMOS device, and the grid end of the high-voltage NMOS device is connected with a low-voltage power The grid end of the low-voltage NOMS device is connected with CANL end bias voltage, and the source end of the low-voltage NOMS device is grounded; the high-voltage NMOS device and the CANL end high-voltage diode are both provided with parasitic diodes.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor design, and more specifically, relates to a CAN port CANH, CANL high-voltage and negative-voltage resistant protection circuit, which has a protective effect on nodes used in a CAN network in a car. Background Art

[0002] CAN bus is now widely used in automobiles. Many components in automobiles communicate via CAN bus, such as Figure 1 As shown in the schematic, all nodes are connected to the bus via twisted-pair cables. Due to the complexity of the physical environment in which the wiring harness resides and the varying application conditions, the voltages at both ends of the CAN bus may be high or negative relative to the power supply or ground. For example, the ISO 11897-2:2024 protocol constrains the voltage values ​​of the ports, requiring them to remain intact when high or negative voltages occur. Furthermore, when these extreme scenarios occur, the lower the leakage current of the ports, the better, in order to avoid affecting the normal communication of other nodes on the bus. For example, the ISO 11897-2:2024 protocol constrains the current when the CAN bus is active, and also constrains the leakage current when the power is lost.

[0003] As can be seen from the above description, CAN ports may experience high and negative voltage scenarios. To meet the above protocol constraints, protect port devices from damage, and meet low leakage requirements, current port circuits typically use SOI technology to design circuits. This eliminates the influence of parasitic devices, resulting in relatively simple circuit design, but the process cost is relatively high.

[0004] The Chinese patent application with publication number CN117997671A on May 7, 2024 disclosed a CAN transceiver high voltage resistant transmission circuit. Although the circuit can work safely under high voltage conditions and does not rely on SOI technology, as shown in its partial circuit diagram Figure 2 As shown in the figure, when the CANL circuit of the port shown in the figure is connected to a negative voltage, the parasitic diode Para_D1 will have a large leakage current (the current direction is shown in the schematic diagram), which cannot meet the protocol specifications. Summary of the Invention

[0005] In order to solve the problem that the existing CAN port circuit design relies on the SOI process, resulting in high costs, while the circuit designed without relying on the SOI process has difficulty meeting the protocol constraints of the port circuit, the present invention provides a CAN port high-voltage resistance, negative pressure and low leakage protection circuit. The circuit is designed using the BDC process and can ensure that when high voltage and negative pressure appear on the CANH / CANL port, the port is not damaged, while the leakage current is low and does not affect the normal communication of other nodes on the bus.

[0006] According to one aspect of the present invention, a CAN port high-voltage resistance, negative-voltage low-leakage protection circuit is provided, comprising a CANH terminal protection circuit and a CANL terminal protection circuit, wherein:

[0007] In the CANH terminal protection circuit, the CANH terminal is connected to the drain terminal of the high-voltage PMOS device, its source terminal is connected to the cathode of the CANH terminal high-voltage diode and the voltage regulator diode, and the gate terminal is connected to the anode of the voltage regulator diode and the bias constant current source; the anode of the CANH terminal high-voltage diode is connected to the drain terminal of the low-voltage PMOS device, the source terminal of the low-voltage PMOS device is connected to the low-voltage power supply, and the gate terminal is connected to the CANH terminal bias voltage; the high-voltage PMOS device and the CANH terminal high-voltage diode are both provided with parasitic diodes;

[0008] In the CANL terminal protection circuit, the CANL terminal is connected to the anode of the CANL terminal high-voltage diode, and its cathode is connected to the drain terminal of the high-voltage NMOS device; the source terminal of the high-voltage NMOS device is connected to the drain terminal of the low-voltage NMOS device, and the gate terminal is connected to the low-voltage power supply; the gate terminal of the low-voltage NMOS device is connected to the CANL terminal bias voltage, and the source terminal is grounded; the high-voltage NMOS device and the CANL terminal high-voltage diode are both provided with parasitic diodes.

[0009] As a further technical solution, when the CAN port outputs recessive, the CANH terminal bias voltage is biased to the low-voltage power supply, the low-voltage PMOS device is turned off, the CANL terminal bias voltage is biased to 0, and the low-voltage NMOS device is turned off.

[0010] As a further technical solution, when the CAN port output is dominant, the CANH bias voltage is driven by the current mirror, the low-voltage PMOS device is turned on, and the CANL bias voltage is driven by the current mirror, the low-voltage NMOS device is turned on.

[0011] As a further technical solution, when the voltage at the CANH port is negative, the current flowing out of the CANH terminal is driven by a current mirror of the CANH terminal bias voltage according to design requirements.

[0012] As a further technical solution, when the CANL port voltage is a positive high voltage, the current flowing into the CANL end is driven by a current mirror of the CANL end bias voltage according to design requirements.

[0013] As a further technical solution, when the CAN port is in an unpowered scenario, the high-voltage PMOS device, the high-voltage NMOS device, the low-voltage PMOS device, and the low-voltage NMOS device are all turned off.

[0014] As a further technical solution, the CANH-end high-voltage diode and the CANL-end high-voltage diode are respectively provided with parasitic diodes facing the substrate.

[0015] As a further technical solution, the parasitic diodes at the CANH end and the CANL end are both high-voltage diodes.

[0016] As a further technical solution, the protection circuit is designed based on the BCD process.

[0017] According to one aspect of the present invention, a CAN port circuit is provided, which is equipped with the CAN port high-voltage-resistant and negative-voltage low-leakage protection circuit.

[0018] Compared with the prior art, the present invention has the following beneficial effects:

[0019] 1. The present invention designs circuits based on the BCD process rather than the SOI process, which greatly saves process costs.

[0020] 2. When high pressure or negative pressure appears on the CANH / CANL port, the port is not damaged and the leakage current is low, which does not affect the normal communication of other nodes on the bus. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, a brief introduction will be given below to the drawings used in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0022] Figure 1 This is a schematic diagram of CAN application in the prior art.

[0023] Figure 2 This is a schematic diagram of a local circuit of a port in the prior art.

[0024] Figure 3 (a)-(b) are schematic diagrams of protection circuits for the CANH port and the CANL port provided in an embodiment of the present invention, wherein (a) is a protection circuit for the CANH port, and (b) is a protection circuit for the CANL port.

[0025] Figure 4 A schematic diagram of the current simulation results of the CANH / CANL ports when the CAN is in active state provided by an embodiment of the present invention.

[0026] Figure 5 This is a schematic diagram of the simulation results of the leakage current of the CANH / CANL port when the CAN is in NO POWER state provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0027] In view of the current situation that the existing CAN port circuit design usually adopts the SOI process, which leads to high cost, while the solutions that do not rely on the SOI process have large leakage current and do not meet the protocol specifications, the present invention provides a CAN port high-voltage and negative-voltage low-leakage protection circuit. The purposes are: first, adopting the 1.BCD process instead of the SOI process to save process costs; second, designing the CAN port CANH / CANL to withstand high voltage and negative pressure without damaging the port; third, meeting the low leakage requirement of the port.

[0028] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention. In addition, the technical features in the various embodiments or single embodiments provided by the present invention are arbitrarily combined with each other to form a new technical solution. This combination is not restricted by the sequence of steps and / or structural composition mode, but must be based on the ability of ordinary technicians in this field to implement it. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that this combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0029] An embodiment of the present invention provides a CAN port high-voltage resistance, negative-voltage low-leakage protection circuit, comprising a CANH terminal protection circuit and a CANL terminal protection circuit.

[0030] In the CANH terminal protection circuit, the CANH terminal is connected to the drain terminal of the high-voltage PMOS device, its source terminal is connected to the cathode of the CANH terminal high-voltage diode and the voltage regulator diode, and the gate terminal is connected to the anode of the voltage regulator diode and the bias constant current source; the anode of the CANH terminal high-voltage diode is connected to the drain terminal of the low-voltage PMOS device, the source terminal of the low-voltage PMOS device is connected to the low-voltage power supply, and the gate terminal is connected to the CANH terminal bias voltage; the high-voltage PMOS device and the CANH terminal high-voltage diode are both provided with parasitic diodes.

[0031] Specific as Figure 3As shown in (a), CANH is connected to the drain of the high-voltage PMOS device HV_MP2. Its source is connected to the cathode of the high-voltage diode HV_DIO_D1 and the cathode of the Zener diode Z1. The anode of Z1 is connected to the gate of HV_MP2. The anode of the high-voltage diode HV_DIO_D1 is connected to the drain of the low-voltage PMOS device LV_MP1. The source of LV_MP1 is connected to the low-voltage 5V power supply VDD, and its gate is connected to the bias voltage P_BIAS. Para_D3 is the parasitic diode of the high-voltage PMOS device HV_MP2, and Para_D4 is the parasitic diode of the high-voltage diode HV_DIO_D1 to the substrate.

[0032] In the CANL terminal protection circuit, the CANL terminal is connected to the anode of the CANL terminal high-voltage diode, and its cathode is connected to the drain terminal of the high-voltage NMOS device; the source terminal of the high-voltage NMOS device is connected to the drain terminal of the low-voltage NMOS device, and the gate terminal is connected to the low-voltage power supply; the gate terminal of the low-voltage NMOS device is connected to the CANL terminal bias voltage, and the source terminal is grounded; the high-voltage NMOS device and the CANL terminal high-voltage diode are both provided with parasitic diodes.

[0033] Specific as Figure 3 As shown in (b), CANL is connected to the anode of high-voltage diode HV_DIO_D2, its cathode to the drain of high-voltage NMOS device HV_MN2, and its gate is driven by the low-voltage 5V power supply VDD. Its source is connected to the drain of low-voltage device LV_MN1, and its GATE is connected to the bias voltage N_BIAS. Para_D5 is the parasitic diode of high-voltage NMOS device HV_MN2, and Para_D6 is the parasitic diode of high-voltage diode HV_DIO_D2 to the substrate.

[0034] In the embodiment of the present invention, when the CAN port outputs recessive, that is, P_BIAS is biased to VDD, LV_MP1 is turned off, N_BIAS is biased to 0, and LV_MN1 is turned off, the protection circuit works as follows:

[0035] ① When the CANH port voltage reaches 58V, the parasitic diode Para_D3 of HV_MP2 causes the voltage at its source to also reach a high voltage, approaching 58V. The components connected to the source, HV_DIO_D1 and Para_D4, are both high-voltage devices, providing protection. Zener diode Z1 protects the gate and source of the high-voltage device HV_MP2 from breakdown. Signal HV_COM is a floating level, controlled by a biased constant current source circuit, resulting in a low fixed current, IDC.

[0036] ②When the CANH port voltage is -58V, the drain and source of the high-voltage device HV_MP2 are resistant to high voltage, so the protection purpose is also achieved.

[0037] ③ When the CANL port voltage is 58V, after passing through the high-voltage diode HV_DIO_D2, the drain end of the high-voltage NMOS device HV_MN2 is also high voltage, close to 58V. The drain and source of the high-voltage NMOS device are resistant to high voltage, and the parasitic diode Para_D6 is also resistant to high voltage, achieving the purpose of protection.

[0038] ④When the CANL port voltage is -58V, the high-voltage diode HV_DIO_D2 is resistant to high voltage and achieves the purpose of protecting the port.

[0039] In the embodiment of the present invention, when the CAN port output is dominant, P_BIAS is driven by the current mirror, LV_MP1 is turned on, N_BIAS is driven by the current mirror, LV_MN1 is turned on, and the protection circuit works as follows:

[0040] (1) When the voltage at the CANH port is negative, the current flowing out of the CANH terminal is driven by the current mirror of P_BIAS according to the design requirements (the design requirements can be regarded as the electrical parameter definition of the chip), such as Figure 4 Simulation results show that this current is driven by the current mirror, that is, Figure 3 (a) is driven by the current driving circuit of the front stage of LV_MP1. The signal HV_COM is a floating level, which is generated by the bias constant current source circuit. The current flowing through Z1 is determined by the design value. The current value is small and fixed and does not change with the change of the CANH terminal voltage. In this scenario, there is no additional parasitic device leakage, and the current size meets the protocol constraints. As the voltage increases, the source terminal voltage of the high-voltage device HV_MP2 increases, and the high-voltage diode HV_DIO_D1 changes from on to off. The current flowing out of CANH slowly decreases until the voltage reaches the high voltage and the current reaches the internally designed current value. The voltage protection principle is as described in ① and ② above.

[0041] (2) When the CANL port voltage is positive high voltage, the current flowing into the CANL terminal is driven by the current mirror of N_BIAS according to the design requirements, such as Figure 4 The simulation results show that this current is also driven by the current mirror. In this scenario, there is no additional parasitic leakage, and the current meets the protocol constraints. As the voltage decreases, the high-voltage diode HV_DIO_D2 switches from on to off, and the current flowing into CANL slowly decreases until the voltage drops to a negative voltage and the current reaches the internally designed current value. The voltage protection principle is described in ③ and ④ above.

[0042] In the embodiment of the present invention, when the CAN is in the NO POWER scenario, the power supply voltage VDD is also 0, and the high-voltage devices HV_MP2, HV_MN2, and the low-voltage devices LV_MP1, LV_MN1 are all cut off, that is, the paths from CANH / CANL to the power supply and ground are all cut off. By simulating the leakage of this scenario, as shown in FIG. Figure 5 As shown, the leakage current is less than 1uA, meeting the protocol constraints. In this scenario, HV_DIO_D1, HV_DIO_D2, Para_D3, Para_D4, Para_D5, and Para_D6 are all high-voltage components. If a high voltage is applied to the input terminal at this time, whether it is 58V or -58V, they will not be damaged.

[0043] Based on the same inventive concept as the aforementioned embodiment, an embodiment of the present invention further provides a CAN port circuit, which is equipped with the aforementioned CAN port high-voltage-resistant and negative-voltage low-leakage protection circuit.

[0044] In summary, the present invention designs a port high-voltage and negative-voltage protection circuit based on the BCD process. Regardless of whether it is active (powered) or no-power (unpowered), the leakage current is very small and meets the protocol specifications.

[0045] The terms "including" and "having" and any variations thereof in the description and claims of the present invention and the above-mentioned drawings are intended to cover non-exclusive inclusions, for example, a process, method, system, product or apparatus that includes a series of steps or units is not necessarily limited to the steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to these processes, methods, products or apparatuses.

[0046] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the technical solutions of the embodiments of the present invention.

Claims

1. A CAN port high-voltage and negative-voltage low-leakage protection circuit, characterized in that: It includes CANH terminal protection circuit and CANL terminal protection circuit, among which, In the CANH terminal protection circuit, the CANH terminal is connected to the drain terminal of the high-voltage PMOS device, its source terminal is connected to the cathode of the CANH terminal high-voltage diode and the voltage regulator diode, and the gate terminal is connected to the anode of the voltage regulator diode and the bias constant current source; the anode of the CANH terminal high-voltage diode is connected to the drain terminal of the low-voltage PMOS device, the source terminal of the low-voltage PMOS device is connected to the low-voltage power supply, and the gate terminal is connected to the CANH terminal bias voltage; the high-voltage PMOS device and the CANH terminal high-voltage diode are both provided with parasitic diodes; In the CANL terminal protection circuit, the CANL terminal is connected to the anode of the CANL terminal high-voltage diode, and its cathode is connected to the drain terminal of the high-voltage NMOS device; the source terminal of the high-voltage NMOS device is connected to the drain terminal of the low-voltage NMOS device, and the gate terminal is connected to the low-voltage power supply; the gate terminal of the low-voltage NMOS device is connected to the CANL terminal bias voltage, and the source terminal is grounded; the high-voltage NMOS device and the CANL terminal high-voltage diode are both provided with parasitic diodes.

2. A CAN port high-voltage resistance, negative-voltage low-leakage protection circuit according to claim 1, characterized in that: When the CAN port outputs recessive, the CANH bias voltage is biased to the low-voltage power supply, the low-voltage PMOS device is turned off, the CANL bias voltage is biased to 0, and the low-voltage NMOS device is turned off.

3. A CAN port high-voltage resistance and negative-voltage low-leakage protection circuit according to claim 1, characterized in that: When the CAN port output is dominant, the bias voltage at the CANH end is driven by the current mirror, and the low-voltage PMOS device is turned on. The bias voltage at the CANL end is driven by the current mirror, and the low-voltage NMOS device is turned on.

4. A CAN port high-voltage resistance, negative-voltage low-leakage protection circuit according to claim 3, characterized in that: When the voltage at the CANH port is negative, the current flowing out of the CANH terminal is driven by the current mirror of the CANH terminal bias voltage according to design requirements.

5. A CAN port high-voltage resistance and negative-voltage low-leakage protection circuit according to claim 3, characterized in that: When the CANL port voltage is a positive high voltage, the current flowing into the CANL end is driven by the current mirror of the CANL end bias voltage according to design requirements.

6. A CAN port high-voltage resistance and negative-voltage low-leakage protection circuit according to claim 1, characterized in that: When the CAN port is in an unpowered state, the high-voltage PMOS device, the high-voltage NMOS device, the low-voltage PMOS device, and the low-voltage NMOS device are all turned off.

7. A CAN port high-voltage resistance and negative-voltage low-leakage protection circuit according to claim 1, characterized in that: The CANH-end high-voltage diode and the CANL-end high-voltage diode are respectively provided with parasitic diodes facing the substrate.

8. A CAN port high-voltage resistance and negative-voltage low-leakage protection circuit according to claim 1 or 7, characterized in that: The parasitic diodes at the CANH and CANL ends are both high-voltage diodes.

9. A CAN port high-voltage resistance and negative-voltage low-leakage protection circuit according to claim 1, characterized in that: The protection circuit is designed based on the BCD process.

10. A CAN port circuit, characterized in that: The invention is provided with a CAN port high-voltage-resistant and negative-voltage low-leakage protection circuit as described in any one of claims 1 to 9.

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