Grid processing method and device, computer equipment and readable storage medium

Abstract

The invention discloses a grid processing method and device, computer equipment and a readable storage medium, in the method, a polygonal grid comprises a plurality of vertexes connected into a plane, a first face of the faces includes at least a first vertex in a first list of vertices associated to the first face, a first preorder vertex of the first vertex, a first subsequent vertex of the first vertex. The method comprises the steps that a first association surface set associated with a first vertex is generated, the first association surface set comprises a first surface set with the first vertex as an association vertex, and the first association surface set comprises a first surface; further, the method includes configuring an array according to a first set of association planes associated with the first vertex, and determining an iteration order of the first set of planes based on the array.

Description

Incorporation by reference

[0001] This application claims the benefit of priority to U.S. Provisional Application No. 63 / 570,218, filed on March 26, 2024, U.S. Provisional Application No. 63 / 682,219, filed on August 12, 2024, and U.S. Application No. 19 / 059,145, filed on February 20, 2025. The entire disclosures of these prior applications are hereby incorporated by reference herein in their entirety. Technical Field

[0002] The present disclosure relates to grid coding and decoding technology, and in particular to a grid processing method, apparatus, computer equipment, and readable storage medium. Background Art

[0003] The background description provided herein is intended to generally present the context of the present disclosure. The work of the presently named inventors is neither explicitly nor implicitly admitted as prior art to the present disclosure, to the extent that such work is described in this background section, nor is it admitted, either explicitly or implicitly, as prior art to the present disclosure, insofar as ...sofar as such work is prior art at the time of filing.

[0004] Various technologies have been developed to capture and represent the world, such as objects in the world in 3-dimensional (3D) space, the environment in the world, etc. 3D representations of the world can enable more immersive forms of interaction and communication. For example, technological developments in 3D media processing (such as advances in three-dimensional (3D) capture, 3D modeling, and 3D rendering) have promoted the ubiquity of 3D media content across several platforms and devices. In an example, a baby's first steps can be captured in one place, and media technology can allow grandparents to see (and possibly interact with) and enjoy an immersive experience with the baby in another place. According to one aspect of the present disclosure, in order to improve the immersive experience, 3D models are becoming increasingly complex, and the creation and consumption of 3D models takes up a large amount of data resources, such as data storage and data transmission resources. In some examples, a 3D mesh can be used as a 3D representation of the world.

[0005] In the prior art, when performing mesh processing, a half-edge data structure is usually used to loop through all associated faces of vertices in a polygonal mesh, but the construction cost of the half-edge data structure is relatively high. Summary of the Invention

[0006] Various embodiments of the present disclosure provide a method, an apparatus, a computer device, and a readable storage medium for network processing.

[0007] Some aspects of the present disclosure provide a method for mesh processing. The method includes receiving a polygonal mesh to be processed. The polygonal mesh includes a plurality of vertices connected into at least two faces, each face including a list of associated vertices of the face, a first face of the at least two faces including at least a first vertex, a first preceding vertex of the first vertex, and a first succeeding vertex of the first vertex, the first vertex, the first preceding vertex, and the first succeeding vertex being in a first list associated with the first face. The method also includes generating a first associated face set associated with the first vertex, the first associated face set including a first face set with the first vertex as an associated vertex, the first associated face set including the first face. In addition, the method includes configuring an array based on the first associated face set associated with the first vertex, and determining an iteration order of the first face set based on the array. The array includes at least one array element configured based on the first face, an index of the at least one array element is determined based on the first vertex of the first succeeding vertex and the first preceding vertex, and a value of the at least one array element indicates the first face and / or the second vertex of the first succeeding vertex and the first preceding vertex.

[0008] Some aspects of the present disclosure provide a method for processing mesh data, the method comprising processing a code stream of the mesh data according to a format rule. A polygonal mesh comprises a plurality of vertices connected into at least two faces, each face comprising a list of associated vertices of the face, a first face of the at least two faces comprising at least a first vertex, a first preceding vertex of the first vertex, and a first succeeding vertex of the first vertex, the first vertex, the first preceding vertex, and the first succeeding vertex being in a first list associated with the first face. The format rule specifies: generating a first associated face set associated with the first vertex, the first associated face set comprising a first face set with the first vertex as an associated vertex, the first associated face set comprising the first face; configuring an array according to the first associated face set associated with the first vertex, the array comprising at least one array element configured based on the first face, the index of the at least one array element being determined based on the first vertex among the first succeeding vertex and the first preceding vertex, the value of the at least one array element indicating the first face and / or the second vertex among the first succeeding vertex and the first preceding vertex; and determining an iteration order of the first face set based on the array.

[0009] Aspects of the present disclosure also provide a mesh processing device. The mesh processing device includes: a receiving module for receiving a polygon mesh to be processed, the polygon mesh including a plurality of vertices connected into at least two faces, each face including a list of associated vertices of the face, the first face of the at least two faces including at least a first vertex, a first preceding vertex of the first vertex, and a first succeeding vertex of the first vertex, the first vertex, the first preceding vertex, and the first succeeding vertex being in a first list associated with the first face; a generating module for generating a first associated face set associated with the first vertex, the first associated face set including a first face set with the first vertex as an associated vertex, the first associated face set including the first face; an array configuration module for configuring an array according to the first associated face set associated with the first vertex, the array including at least one array element configured based on the first face, the value of at least one array element being based on the first vertex among the first succeeding vertex and the first preceding vertex, the value of at least one array element indicating the first face and / or the second vertex among the first succeeding vertex and the first preceding vertex; and an order determination module for determining an iteration order of the first face set based on the array.

[0010] Aspects of the present disclosure also provide a computer device comprising at least one processor and at least one memory, wherein at least one instruction is stored in the at least one memory, and the at least one instruction is loaded and executed by the at least one processor to implement any of the described grid processing methods.

[0011] Aspects of the present disclosure also provide a non-transitory computer-readable medium storing instructions that, when executed by a computer, cause the computer to perform any of the described methods of grid processing.

[0012] According to one aspect of the present disclosure, dual-degree-based connectivity coding is performed without constructing a half-edge data structure to reduce costs, and the dual-degree-based connectivity coding has high coding efficiency, and further, the polygon face information obtained from the dual-degree-based connectivity coding can be used to improve geometric coding efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Other features, properties, and various advantages of the disclosed subject matter will become more apparent from the following detailed description and accompanying drawings, in which:

[0014] Figure 1 A block diagram of a streaming media system in some examples is shown.

[0015] Figure 2 is a diagram illustrating an example of a block diagram of a video decoder.

[0016] Figure 3 is a diagram illustrating an example of a block diagram of a video encoder.

[0017] Figure 4 An example of an encoding process for mesh processing according to an aspect of the present disclosure is shown.

[0018] Figure 5 An example of a decoding process for trellis processing according to an aspect of the present disclosure is shown.

[0019] Figure 6 An example of a polygon fan according to an aspect of the present disclosure is shown.

[0020] Figure 7 Examples of topological configurations used for triangle-based connectivity encoding in some examples are shown.

[0021] Figure 8 A table showing predictor sets for different neighborhood configurations in some examples is shown.

[0022] Figure 9 A diagram of a polygonal mesh is shown that is used to illustrate vertex degree and facet degree in some examples.

[0023] Figure 10 An example of a primal grid and a dual grid according to an aspect of the present disclosure is shown.

[0024] Figures 11 to 12 An example of a traversal sequence of a dual degree algorithm according to an aspect of the present disclosure is shown.

[0025] Figure 13 A diagram illustrating half edges in some examples is shown.

[0026] Figure 14 A diagram showing the process of associating face iterations in an illustrative example is shown.

[0027] Figure 15 A flowchart outlining a process according to some aspects of the present disclosure is shown.

[0028] Figure 16 A flowchart outlining a decoding process according to some aspects of the present disclosure is shown.

[0029] Figure 17 A flowchart outlining an encoding process according to some aspects of the present disclosure is shown.

[0030] Figure 18 is a schematic diagram of a computer system according to one aspect. DETAILED DESCRIPTION

[0031] Aspects of the present disclosure provide techniques in the field of grid processing.

[0032] A mesh (also called a mesh model) includes several polygons (also called faces) that describe the surface of a volumetric object. Each polygon can be defined by vertices in three-dimensional (3D) space and information about how the vertices are connected (called connectivity information). In some examples, the mesh also includes vertex attributes associated with the mesh vertices, such as color, normals, displacement, etc. In addition, in some examples, the mesh can include attributes associated with the surface of the mesh by utilizing mapping information that parameterizes the mesh using a two-dimensional (2D) property map. This mapping is typically described by a set of parametric coordinates called UV coordinates or texture coordinates associated with the mesh vertices. 2D property maps are used to store high-resolution attribute information, such as textures, normals, displacements, etc. 2D property maps can be used for various purposes, such as texture mapping, shading, and mesh reconstruction.

[0033] Figure 1 A block diagram of a streaming media system (100) in some examples is shown. The streaming media system (100) is an example of an application of the disclosed subject matter, namely a grid encoder and a grid decoder in a streaming media environment. The disclosed subject matter can also be applied to other grid-enabled applications, including, for example, conferencing, 3D television, streaming media services, storage of compressed 3D data on digital media including CDs, DVDs, memory sticks, etc.

[0034] The streaming media system (100) includes a capture subsystem (113) that can include a 3D source (101), such as a light detection and ranging (LIDAR) system, a 3D camera, a 3D scanner, a graphics generation component, etc., for creating an uncompressed 3D data stream (102). In an example, the 3D data stream (102) includes samples captured by the 3D camera system. The 3D data stream (102), which is depicted as a thick line to emphasize the high data volume compared to the encoded 3D data (104) (or encoded bitstream), can be processed by an electronic device (120) including a 3D encoder (103) coupled to the 3D source (101). The 3D encoder (103) can include hardware, software, or a combination thereof to implement or embody various aspects of the disclosed subject matter as described in more detail below. The encoded 3D data (104) (or encoded code stream), depicted as thin lines to emphasize the lower data volume compared to the 3D data stream (102), can be stored on the streaming server (105) for future use. Figure 1At least one of the client subsystems (106) and (108) in the streaming media server (105) can access the streaming media server (105) to retrieve copies (107) and (109) of the encoded 3D data (104). The client subsystem (106) can include, for example, a 3D decoder (110) in the electronic device (130). The 3D decoder (110) decodes the input copy (107) of the encoded 3D data and creates an output stream of a 3D representation (111) that can be rendered on a display (112) (e.g., a display screen) or other rendering device (not depicted). In some streaming media systems, the encoded 3D data (104), (107), and (109) (e.g., a video stream) can be encoded according to some 3D encoding / compression standard (such as a grid encoding / compression standard, etc.).

[0035] Note that the electronic devices (120) and (130) may include other components (not shown). For example, the electronic device (120) may include a 3D decoder (not shown), and the electronic device (130) may also include a 3D encoder (not shown).

[0036] It should also be noted that in some examples, the 3D encoder and / or 3D decoder may use 2D encoding / decoder technology.For example, the 3D encoder and / or 3D decoder may include a video encoder or a video decoder.

[0037] Figure 2 An example of a block diagram of a video decoder (210) is shown. The video decoder (210) may be included in an electronic device (230). The electronic device (230) may include a receiver (231) (e.g., a receiving circuit). The video decoder (210) may be used to Figure 1 The 3D decoder (110) of the example.

[0038] A receiver (231) can receive at least one encoded video sequence, for example, included in a bitstream, to be decoded by a video decoder (210). In one aspect, the encoded video sequences are received one at a time, wherein the decoding of each encoded video sequence is independent of the decoding of the other encoded video sequences. The encoded video sequence can be received from a channel (201), which can be a hardware / software link to a storage device storing the encoded video data. The receiver (231) can receive the encoded video data with other data, for example, encoded audio data and / or ancillary data streams that can be forwarded to their respective consuming entities (not depicted). The receiver (231) can separate the encoded video sequence from the other data. To combat network jitter, a buffer memory (215) can be coupled between the receiver (231) and the entropy decoder / parser (220) (hereinafter referred to as "parser (220)"). In some applications, the buffer memory (215) is part of the video decoder (210). In other applications, the buffer memory can be external to the video decoder (210) (not depicted). In other cases, a buffer memory (not depicted) may be external to the video decoder (210), for example, to combat network jitter, and another buffer memory (215) may be internal to the video decoder (210), for example, to handle playback timing. When the receiver (231) receives data from a store / forward device with sufficient bandwidth and controllability or from an isochronous network, the buffer memory (215) may not be required, or the buffer memory (215) may be very small. For use over a best-effort packet network such as the Internet, a buffer memory (215) may be necessary, which may be relatively large and advantageously have an adaptive size, and may be implemented at least partially in an operating system or similar element (not depicted) external to the video decoder (210).

[0039] The video decoder (210) may include a parser (220) for reconstructing symbols (221) from an encoded video sequence. The types of symbols include information for managing the operation of the video decoder (210) and potentially information for controlling a display device, such as a display device (212) (e.g., a display screen), which is not part of the electronic device (230) but can be coupled to the electronic device (230), such as Figure 2As shown in . The control information for the display device may be a parameter set fragment (not shown) of Supplemental Enhancement Information (SEI message) or Video Usability Information (VUI). The parser (220) may parse / entropy decode the received coded video sequence. The coding of the coded video sequence may be performed according to a video coding technique or standard and may follow various principles, including variable length coding, Huffman coding, arithmetic coding with or without context sensitivity, and the like. The parser (220) may extract a subgroup parameter set for at least one subgroup of the subgroups of pixels in the video decoder from the coded video sequence based on at least one parameter corresponding to the group. The subgroup may include a Group of Pictures (GOP), a picture, a tile, a slice, a macroblock, a Coding Unit (CU), a block, a Transform Unit (TU), a Prediction Unit (PU), and the like. The parser (220) may also extract information from the encoded video sequence, such as transform coefficients, quantizer parameter values, motion vectors, and so on.

[0040] The parser (220) may perform entropy decoding / parsing operations on the video sequence received from the buffer memory (215), thereby creating symbols (221).

[0041] Depending on the type of coded video picture or portion of a coded video picture (e.g., inter-frame and intra-frame pictures, inter-frame blocks and intra-frame blocks) and other factors, the reconstruction of the symbol (221) may involve multiple different units. Which units are involved and how they are involved can be controlled by subgroup control information parsed from the coded video sequence by the parser (220). For the sake of brevity, the flow of such subgroup control information between the parser (220) and the multiple units below is not described.

[0042] In addition to the functional blocks already mentioned, the video decoder (210) can be conceptually broken down into several functional units as described below. In practical embodiments operating under commercial constraints, many of these units interact closely with each other and may be integrated with each other. However, for the purposes of describing the disclosed subject matter, the conceptual breakdown into the following functional units is appropriate.

[0043] The first unit is a scaler / inverse transform unit (251). The scaler / inverse transform unit (251) receives quantized transform coefficients as symbols (221) from the parser (220) along with control information, including which transform method to use, block size, quantization factor, quantization scaling matrix, etc. The scaler / inverse transform unit (251) may output a block comprising sample values, which may be input to an aggregator (255).

[0044] In some cases, the output samples of the scaler / inverse transform unit (251) may belong to an intra-coded block; that is, a block that does not use predictive information from a previously reconstructed picture, but may use predictive information from a previously reconstructed portion of the current picture. Such predictive information may be provided by an intra-picture prediction unit (252). In some cases, the intra-picture prediction unit (252) uses reconstructed information extracted from the current picture buffer (258) to generate surrounding blocks of the same size and shape as the block being reconstructed. For example, the current picture buffer (258) buffers partially reconstructed current pictures and / or fully reconstructed current pictures. In some cases, the aggregator (255) adds the prediction information generated by the intra-prediction unit (252) to the output sample information provided by the scaler / inverse transform unit (251) on a per-sample basis.

[0045] In other cases, the output samples of the scaler / inverse transform unit (251) may belong to inter-frame coded and potentially motion compensated blocks. In this case, the motion compensated prediction unit (253) may access the reference picture memory (257) to extract samples for prediction. After the extracted samples are motion compensated according to the symbols (221), these samples may be added to the output of the scaler / inverse transform unit (251) (in this case referred to as residual samples or residual signal) by the aggregator (255) to generate output sample information. The retrieval of the prediction samples by the motion compensated prediction unit (253) from the address in the reference picture memory (257) may be controlled by a motion vector, and the motion vector is provided to the motion compensated prediction unit (253) in the form of the symbols (221), for example, including X, Y and reference picture components. Motion compensation may also include interpolation of sample values ​​extracted from the reference picture memory (257) when using sub-sample accurate motion vectors, motion vector prediction mechanisms, etc.

[0046] The output samples of the aggregator (255) may be used in a loop filter unit (256) by various loop filtering techniques. The video compression techniques may include in-loop filtering techniques that are controlled by parameters included in the coded video sequence (also referred to as the coded video bitstream) and that are available to the loop filter unit (256) as symbols (221) from the parser (220). However, in other embodiments, the video compression may also be responsive to meta-information obtained during decoding of a coded picture or a previous (in decoding order) portion of the coded video sequence, as well as to previously reconstructed and loop-filtered sample values.

[0047] The output of the loop filter unit (256) may be a sample stream that may be output to a display device (212) and stored in a reference picture memory (257) for subsequent inter-picture prediction.

[0048] Once fully reconstructed, certain coded pictures can be used as reference pictures for future prediction. For example, once the coded picture corresponding to the current picture is fully reconstructed and the coded picture is identified as a reference picture (e.g., by the parser (220)), the current picture buffer (258) can become part of the reference picture memory (257) and a new current picture buffer can be reallocated before starting to reconstruct a subsequent coded picture.

[0049] The video decoder (210) may perform decoding operations according to a predetermined video compression technique, such as in the ITU-T H.265 standard. The encoded video sequence may conform to the syntax specified by the video compression technique or standard used in the sense that the encoded video sequence follows the syntax of the video compression technique or standard and a profile recorded in the video compression technique or standard. Specifically, the profile may select certain tools from all the tools available in the video compression technique or standard as the only tools available for use under the profile. For compliance, the complexity of the encoded video sequence is also required to be within the range defined by the hierarchy of the video compression technique or standard. In some cases, the hierarchy limits the maximum picture size, maximum frame rate, maximum reconstruction sampling rate (measured in, for example, megasamples per second), maximum reference picture size, etc. In some cases, the limits set by the hierarchy may be further defined by the Hypothetical Reference Decoder (HRD) specification and metadata of the HRD buffer management signaled in the encoded video sequence.

[0050] In one aspect, a receiver (231) may receive additional (redundant) data along with the encoded video. The additional data may be part of the encoded video sequence. The additional data may be used by the video decoder (210) to properly decode the data and / or more accurately reconstruct the original video data. The additional data may be in the form of, for example, temporal, spatial, or signal-to-noise ratio (SNR) enhancement layers, redundant slices, redundant pictures, forward error correction codes, and the like.

[0051] Figure 3 An example of a block diagram of a video encoder (303) is shown. The video encoder (303) is provided in an electronic device (320). The electronic device (320) includes a transmitter (340) (e.g., a transmission circuit). The video encoder (303) may be used to Figure 1 3D encoder (103) in an embodiment.

[0052] The video encoder (303) can be used to generate a video from a video source (301) (not Figure 3 In another embodiment, the video source (301) is a part of the electronic device (320) that receives the video samples, and the video source can obtain the video images to be encoded by the video encoder (303). In another embodiment, the video source (301) is a part of the electronic device (320).

[0053] The video source (301) may provide a source video sequence in the form of a stream of digital video samples to be encoded by the video encoder (303), wherein the stream of digital video samples may have any suitable bit depth (e.g., 8-bit, 10-bit, 12-bit, ...), any color space (e.g., BT.601 Y CrCB, RGB, ...), and any suitable sampling structure (e.g., Y CrCb 4:2:0, Y CrCb 4:4:4). In a media serving system, the video source (301) may be a storage device storing previously prepared videos. In a video conferencing system, the video source (301) may be a camera that captures local image information as a video sequence. The video data may be provided as a plurality of individual pictures that are imparted with motion when viewed sequentially. The pictures themselves may be constructed as a spatial array of pixels, where each pixel may include at least one sample, depending on the sampling structure, color space, etc. used. The following description focuses on samples.

[0054] According to one aspect, the video encoder (303) can encode and compress pictures of a source video sequence into an encoded video sequence (343) in real time or under any other time constraints as required. Implementing an appropriate encoding speed is a function of the controller (350). In some aspects, the controller (350) controls other functional units as described below and is functionally coupled to these units. For the sake of simplicity, the coupling is not shown in the figure. The parameters set by the controller (350) may include rate control related parameters (picture skipping, quantizer, lambda value of rate-distortion optimization techniques, etc.), picture size, group of pictures (GOP) layout, maximum motion vector search range, etc. The controller (350) can be used to have other suitable functions that are related to the video encoder (303) optimized for a certain system design.

[0055] In some embodiments, the video encoder (303) operates in a coding loop. As a simplified description, in some embodiments, the coding loop may include a source encoder (330) (e.g., responsible for creating symbols, such as a symbol stream, based on an input picture to be encoded and a reference picture) and a (local) decoder (333) embedded in the video encoder (303). The decoder (333) reconstructs the symbols to create sample data in a manner similar to how the (remote) decoder creates sample data. The reconstructed sample stream (sample data) is input to a reference picture memory (334). Because the decoding of the symbol stream produces bit-accurate results that are independent of the decoder's location (local or remote), the contents of the reference picture memory (334) are also bit-accurate between the local encoder and the remote encoder. In other words, the reference picture samples "seen" by the prediction portion of the encoder are exactly the same sample values ​​that the decoder will "see" when using prediction during decoding. This basic principle of reference picture synchronization (and the drift that occurs when synchronization cannot be maintained, such as due to channel errors) is also used in some related technologies.

[0056] The operation of the "local" decoder (333) can be combined with, for example, Figure 2 The "remote" decoder of the video decoder (210) is described in detail. However, additional brief reference is made to Figure 2 , when symbols are available and the entropy encoder (345) and parser (220) are capable of losslessly encoding / decoding the symbols into an encoded video sequence, the entropy decoding portion of the video decoder (210), including the buffer memory (215) and the parser (220), may not be fully implemented in the local decoder (333).

[0057] In one aspect, decoder techniques other than parsing / entropy decoding present in the decoder are present in the corresponding encoder in the same or substantially the same functional form. Therefore, this application focuses on decoder operation. The description of encoder techniques can be simplified because encoder techniques are mutually inverse to the decoder techniques described comprehensively. A more detailed description is provided below in certain areas.

[0058] During operation, in some embodiments, the source encoder (330) may perform motion-compensated predictive coding. The motion-compensated predictive coding predictively encodes an input picture with reference to at least one previously encoded picture from a video sequence designated as a "reference picture." In this manner, the encoding engine (332) encodes the differences between pixel blocks of the input picture and pixel blocks of a reference picture that may be selected as a prediction reference for the input picture.

[0059] The local video decoder (333) may decode the encoded video data of a picture that may be designated as a reference picture based on the symbols created by the source encoder (330). The operation of the encoding engine (332) may be a lossy process. When the encoded video data is available at the video decoder ( Figure 3 When decoded at a remote location (not shown), the reconstructed video sequence may typically be a copy of the source video sequence with some errors. The local video decoder (333) replicates the decoding process that may be performed by the video decoder on the reference picture and may cause the reconstructed reference picture to be stored in the reference picture memory (334). In this way, the video encoder (303) may locally store a copy of the reconstructed reference picture that has common content (absent transmission errors) with the reconstructed reference picture that will be obtained by the remote video decoder.

[0060] The predictor (335) may perform a prediction search for the encoding engine (332). That is, for a new picture to be encoded, the predictor (335) may search the reference picture memory (334) for sample data (as candidate reference pixel blocks) or certain metadata, such as reference picture motion vectors, block shapes, etc., that may serve as suitable prediction references for the new picture. The predictor (335) may operate on a pixel block-by-pixel block basis based on sample blocks to find a suitable prediction reference. In some cases, based on the search results obtained by the predictor (335), it may be determined that the input picture may have prediction references taken from multiple reference pictures stored in the reference picture memory (334).

[0061] The controller (350) may manage encoding operations of the source encoder (330), including, for example, setting parameters and subgroup parameters for encoding video data.

[0062] The outputs of all the above functional units may be entropy coded in an entropy coder (345). The entropy coder (345) converts the symbols generated by the various functional units into a coded video sequence by losslessly compressing the symbols according to techniques such as Huffman coding, variable length coding, arithmetic coding, etc.

[0063] The transmitter (340) can buffer the encoded video sequence created by the entropy encoder (345) in preparation for transmission over a communication channel (360), which can be a hardware / software link to a storage device where the encoded video data will be stored. The transmitter (340) can combine the encoded video data from the video encoder (303) with other data to be transmitted, such as encoded audio data and / or an auxiliary data stream (source not shown).

[0064] The controller (350) can manage the operation of the video encoder (303). During encoding, the controller (350) can assign a certain coded picture type to each coded picture, but this may affect the coding techniques that can be applied to the corresponding picture. For example, a picture can generally be assigned to any of the following picture types:

[0065] Intra pictures (I pictures) can be encoded and decoded without using any other pictures in the sequence as a prediction source.Some video codecs allow different types of intra pictures, including, for example, Independent Decoder Refresh ("IDR") pictures.

[0066] Predictive pictures (P pictures) can be encoded and decoded using intra prediction or inter prediction, which uses a motion vector and a reference index to predict sample values ​​for each block.

[0067] Bidirectionally predictive pictures (B pictures) can be encoded and decoded using intra prediction or inter prediction, which uses two motion vectors and reference indices to predict the sample values ​​of each block. Similarly, multiple predictive pictures can use more than two reference pictures and associated metadata to reconstruct a single block.

[0068] A source picture is typically spatially subdivided into blocks of samples (e.g., blocks of 4×4, 8×8, 4×8, or 16×16 samples) and coded block by block. These blocks may be predictively coded with reference to other (already coded) blocks, determined according to the coding allocation applied to the block's corresponding picture. For example, blocks of an I picture may be non-predictively coded, or they may be predictively coded (spatial or intra-predicted) with reference to already coded blocks of the same picture. Pixel blocks of a P picture may be predictively coded using spatial prediction with reference to one previously coded reference picture or using temporal prediction. Blocks of a B picture may be predictively coded using spatial prediction with reference to one or two previously coded reference pictures or using temporal prediction.

[0069] The video encoder (303) may perform encoding operations according to a predetermined video coding technique or standard, such as ITU-T Recommendation H.265. In operation, the video encoder (303) may perform various compression operations, including predictive coding operations that exploit temporal and spatial redundancy in the input video sequence. Thus, the encoded video data may conform to the syntax specified by the video coding technique or standard used.

[0070] In one aspect, the transmitter (340) may transmit additional data along with the encoded video. The source encoder (330) may include such data as part of the encoded video sequence. The additional data may include temporal / spatial / SNR enhancement layers, redundant pictures and slices, and other forms of redundant data, SEI messages, VUI parameter set fragments, and the like.

[0071] The captured video may be presented as a temporal sequence of multiple source pictures (video pictures). Intra-picture prediction (often shortened to intra prediction) exploits spatial correlation within a given picture, while inter-picture prediction exploits correlation (temporal or otherwise) between pictures. In an embodiment, a particular picture being encoded / decoded is divided into blocks, and the particular picture being encoded / decoded is referred to as the current picture. When a block in the current picture is similar to a reference block in a previously encoded and buffered reference picture in the video, the block in the current picture can be encoded using a vector called a motion vector. The motion vector points to the reference block in a reference picture, and when multiple reference pictures are used, the motion vector may have a third dimension that identifies the reference picture.

[0072] In some aspects, bidirectional prediction techniques can be used for inter-picture prediction. According to bidirectional prediction techniques, two reference pictures are used, for example, a first reference picture and a second reference picture, both preceding the current picture in the video in decoding order (but potentially in the past and future, respectively, in display order). A block in the current picture can be encoded using a first motion vector pointing to a first reference block in the first reference picture and a second motion vector pointing to a second reference block in the second reference picture. Specifically, the block can be predicted using a combination of the first reference block and the second reference block.

[0073] In addition, merge mode technology can be used in inter-picture prediction to improve coding efficiency.

[0074] According to some aspects of the present disclosure, predictions such as inter-picture prediction and intra-picture prediction are performed in units of blocks. For example, according to the HEVC standard, pictures in a video picture sequence are divided into coding tree units (CTUs) for compression, and the CTUs in the pictures have the same size, such as 64×64 pixels, 32×32 pixels, or 16×16 pixels. Generally speaking, a CTU includes three coding tree blocks (CTBs), which are a luminance CTB and two chrominance CTBs. Furthermore, each CTU can be split into at least one coding unit (CU) using a quadtree. For example, a 64×64 pixel CTU can be split into a 64×64 pixel CU, or four 32×32 pixel CUs, or sixteen 16×16 pixel CUs. On the one hand, each CU is analyzed to determine the prediction type used for the CU, such as an inter prediction type or an intra prediction type. In addition, depending on temporal and / or spatial predictability, the CU is split into at least one prediction unit (PU). Typically, each PU includes a luma prediction block (PB) and two chroma PBs. In an embodiment, the prediction operation in encoding (encoding / decoding) is performed in units of prediction blocks. Taking the luma prediction block as an example, the prediction block includes a matrix of pixel values ​​(e.g., luma values), such as 8×8 pixels, 16×16 pixels, 8×16 pixels, 16×8 pixels, and the like.

[0075] Note that encoders (103) and (303) and decoders (110) and (210) can be implemented using any suitable technology. In one aspect, encoders (103) and (303) and decoders (110) and (210) can be implemented using at least one integrated circuit. In another aspect, encoders (103) and (303) and decoders (110) and (210) can be implemented using at least one processor executing software instructions.

[0076] In some examples, the 3D data includes a mesh model, and the 3D encoder (103) may include a mesh encoder, and the 3D decoder (110) may include a mesh decoder.

[0077] According to one aspect of the present disclosure, a dynamic mesh is a mesh in which at least one of its components (geometric information, connectivity information, mapping information, vertex attributes, and attribute graph) changes over time. A dynamic mesh can be described by a sequence of meshes (also referred to as mesh frames). In some examples, the mesh frames in a dynamic mesh can be representations of the surface of an object at different times, and each mesh frame is a representation of the surface of the object at a specific time (also referred to as a time instance). Dynamic meshes can require a large amount of data because the dynamic mesh may include a large amount of information that changes over time. Compression techniques for meshes can allow efficient storage and transmission of media content in the mesh representation.

[0078] Dynamic mesh sequences can require a large amount of data because they may contain a large amount of information that changes over time. Therefore, efficient compression techniques can be used to store and transmit such content.

[0079] Figure 4 An example of an encoding process (400) for mesh processing according to an aspect of the present disclosure is shown. Figure 4 As shown, the encoding process (400) includes a preprocessing step (410) and an encoding step (420). The preprocessing step (410) is configured to generate a base mesh m(i) of the current frame and a displacement field d(i) of the current frame based on an input mesh M(i) of the current frame, the displacement field d(i) including a displacement vector. The encoding step (420) is configured to encode the base mesh m(i), the displacement field d(i), and the texture information of the base mesh m(i). The displacement field d(i) of the current frame includes a displacement vector. The index i is used to indicate the current frame. In one aspect, a mode decision method can be performed in the encoding process (400) to determine whether inter-frame coding (also known as inter-frame prediction or inter-frame mode), intra-frame coding (also known as intra-frame prediction or intra-frame mode), etc. is applied to the current frame. For example, the mode decision method can compare the cost of the intra-frame mode and the cost of the inter-frame mode, and determine the encoding mode of the base mesh m(i) of the current frame based on which of the costs is smaller. In some examples, the base mesh m(i) is encoded using skip mode. In the example, the skip mode is a special mode of the inter mode. For example, the base grid m(i) can be intra-coded, inter-coded, or coded in the skip mode.

[0080] Still refer to Figure 4, the pre-processing step (410) may include a mesh extraction process (412), a parameterization process such as an atlas parameterization process (414), and a subdivision surface fitting process (416). The mesh extraction process (412) is configured to downsample the vertices of the input mesh M(i) to generate an extracted mesh dm(i), which may include a plurality of extracted (or downsampled) vertices. In an example, the number of extracted vertices is less than the number of vertices of the input mesh M(i). The parameterization process such as the atlas parameterization process (414) is configured to map the extracted mesh dm(i) onto a planar domain, such as onto a UV atlas (or UV map), to generate a reparameterized mesh pm(i). In an example, the atlas parameterization may be performed based on a video processing tool (such as a UVAtlas tool). The subdivision surface fitting process (416) is configured to take as input the reparameterized mesh pm(i) and the input mesh M(i) and generate a base mesh m(i) and a displacement field d(i) comprising a displacement vector or a set of displacements. In an example of the subdivision surface fitting process (416), pm(i) is subdivided using a subdivision scheme such as iterative interpolation to obtain a subdivided mesh. Iterative interpolation includes inserting a new point in the middle of each edge of the reparameterized mesh pm(i) at each iteration. Any suitable subdivision scheme can be applied to subdivide pm(i). The displacement field d(i) is calculated by determining the closest point on the surface of the input mesh M(i) for each vertex of the subdivided mesh.

[0081] Advantages of subdividing meshes can include having a subdivision structure that allows for efficient compression while providing a faithful approximation of the input mesh. The improved compression efficiency can be obtained due to the following properties. The decimated mesh dm(i) can have a small number of vertices and can be encoded and transmitted using fewer bits than the input mesh M(i) or the subdivided mesh. Figure 4 , a base mesh m(i) can be generated from the extracted mesh dm(i). In the example, the base mesh m(i) is the extracted mesh dm(i). Since the subdivision mesh can be generated based on the subdivision method, the decoder can automatically generate the subdivision mesh when decoding the base mesh or the subdivision mesh (for example, without using any information other than the subdivision scheme and the subdivision iteration count). On the decoder side, the displacement field d(i) can be generated by decoding the displacement vectors associated with the vertices of the subdivision mesh. In addition to allowing spatial / quality scalability, the subdivision structure also allows efficient transforms, such as wavelet decomposition, which can provide high compression performance.

[0082] exist Figure 4In an example, the encoding step (420) includes base mesh encoding (422), displacement encoding (424), texture encoding (426), etc. The base mesh encoding (422) is configured to encode geometric information of the base mesh m(i) associated with the current frame. In intra-frame coding, the base mesh m(i) can be first quantized (e.g., using uniform quantization) and then encoded, for example, by using a coding mode determined by a mode decision method. The coding mode can be an inter-frame mode, an intra-frame mode, a skip mode, etc. The encoder for intra-coding the base mesh m(i) can be called a static mesh encoder. In inter-frame coding, a reference base mesh associated with a reference frame indicated by index j (e.g., a reconstructed quantized reference base mesh m'(j)) can be used to predict the base mesh m(i) associated with the current frame indicated by index i. The displacement encoding (424) is configured to encode the displacement field d(i) generated in the preprocessing step (410). The displacement field d(i) can include a set of displacement vectors (or displacements) associated with the subdivided mesh vertices. The texture encoding (426) is configured to encode attribute information of the base mesh m(i). The attribute information may include texture, normal, color, etc. The attribute information may be encoded based on a suitable codec, such as High Efficiency Video Coding (HEVC) or Versatile Video Coding (VVC).

[0083] On the one hand, reference Figure 4 A mesh encoding process, such as encoding process (420), begins with preprocessing (e.g., preprocessing step (410)). Preprocessing can convert an input mesh (e.g., an input dynamic mesh) M(i) into a base mesh m(i) and a displacement field d(i) comprising a set of displacements (or a set of displacement vectors). The encoding step (420) can compress the output from the preprocessing (e.g., m(i), d(i), etc.) and generate a compressed codestream b(i). The compressed codestream b(i) can include a compressed base mesh codestream, a compressed displacement field codestream, a compressed attribute codestream, etc.

[0084] Figure 5An example of a decoding process (500) for grid processing according to an aspect of the present disclosure is shown. The decoding process (500) may include a decoding step (510) and a post-processing step (520). A compressed code stream b(i) may be fed to the decoding step (510). In an example, such as for lossless transmission, the compressed code stream b(i) is the output b(i) from the encoding process (400). The decoding step (510) may extract various sub-code streams, such as a compressed base grid sub-stream, a compressed displacement field sub-stream, a compressed attribute sub-stream, etc. The decoding step (510) may decompress the sub-code streams to generate the following components: patch metadata indicated by metadata(i), a decoded base grid m"(i), a decoded displacement field (including displacement) d"(i), a decoded attribute map A"(i), etc.

[0085] In one aspect, the base grid substream can be fed to a grid decoder to generate a reconstructed quantized base grid m'(i). The decoded base grid (or reconstructed base grid) m"(i) can be obtained by applying inverse quantization to m'(i). The displacement field substream comprising the encoded packed and quantized wavelet coefficients can be decoded by a video and / or image decoder. Image unpacking and inverse quantization can be applied to the reconstructed packed quantized wavelet coefficients to obtain unpacked and unquantized transform coefficients (e.g., wavelet coefficients). An inverse wavelet transform can be applied to the unpacked and unquantized wavelet coefficients to generate a decoded displacement field (or reconstructed displacement) d"(i).

[0086] The decoded components (e.g., including metadata(i), m”(i), d”(i), A”(i), etc.) can be fed to a post-processing step (520). A mesh (also referred to as a decoded / reconstructed mesh) M”(i) can be generated by the post-processing step (520) based on m”(i) and d”(i). In an example, the mesh M”(i) (also referred to as a reconstructed deformed mesh DM(i)) can be obtained by subdividing m”(i) using a subdivision scheme and applying the reconstructed displacements d”(i) to the vertices of the subdivided mesh. In an example, DM(i) can include a displacement curve. In an example, when the encoding process (400), the decoding process (500), and the transmission are lossless, the mesh M”(i) can be the same as the input mesh M(i). When one of the encoding process (400), the decoding process (500), and the transmission is lossy, M”(i) is different from M(i). In various examples, the difference (if any) between M”(i) and M(i) can be relatively small. In the example, the attribute graph A”(i) is also generated by the post-processing step (520).

[0087] In some examples, a mesh may also include attributes associated with the vertices, such as color, normals, and the like. Attributes may be associated with the surface of a mesh by utilizing mapping information that parameterizes the mesh using a 2D attribute map. This mapping information is typically described by a set of parametric coordinates, called UV coordinates or texture coordinates, associated with the mesh vertices. A 2D attribute map (referred to as a texture map in some examples) is used to store high-resolution attribute information, such as texture, normals, displacement, and the like. This information can be used for various purposes, such as texture mapping and shading.

[0088] According to some aspects, a polygon mesh encoder is used for base mesh encoding. The polygon mesh encoder includes a geometry encoder and an attribute encoder. The geometry encoder is configured to generate a geometry compressed codestream, and the attribute encoder is configured to generate an attribute compressed codestream. In some examples, the geometry compressed codestream and the attribute compressed codestream are multiplexed into a final codestream.

[0089] In some examples, the geometry encoder can use polygon fan connectivity coding and polygon fan geometry coding. For example, the geometry encoder can traverse the vertices of the mesh (also referred to as polygon mesh in some examples) according to an order that can be reproduced on the decoder side. For the vertices of the mesh, the geometry encoder can decompose the faces associated with the vertex (for example, also referred to as polygons, polygon faces in some examples) into a set of polygon fans that share the vertex as a pivot. The polygon fan includes at least one face (for example, a polygon) associated with the same vertex (referred to as a pivot vertex), and the at least one face is a continuous face, and two adjacent faces in at least one continuous face share an edge. In some examples, the polygon fan associated with the vertex (pivot vertex) is triangulated and encoded using triangle-based connectivity coding and triangle-based geometry coding.

[0090] In some embodiments, a polygon mesh may include geometric information and connectivity information. In some examples, the geometric information is described by a set of 3D positions associated with the vertices of the polygon mesh. In some examples, (x, y, z) coordinates may be used to describe the 3D position of a vertex and are also referred to as 3D coordinates. In some examples, the connectivity information includes a set of vertex indices that describe how to connect the vertices to create a 3D surface.

[0091] Figure 6 An example of a polygon fan (600) according to one aspect of the present disclosure is shown. The polygon fan (600) includes three associated faces (611) to (613) that share a pivot (or pivot vertex) (601). In one aspect, all faces in the polygon fan are associated with the pivot vertex, and the polygon fan includes continuous faces. Two continuous faces can share an edge.

[0092] In the example, the connectivity and geometry of polygon fans are encoded in an interleaved manner. For each polygon fan, the connectivity information of the corresponding polygon fan is encoded. The connectivity information is then used to assist the geometry information encoding.

[0093] In some examples, the connectivity and geometry of a polygon fan are encoded using triangle-based connectivity coding and triangle-based geometry coding. To apply triangle-based connectivity coding, the polygon fan of at least one face (polygon) is first triangulated, and the number of triangles of the polygon fan is compressed, for example, using context-adaptive binary arithmetic coding. The connectivity of the triangles of the polygon fan is compressed using a topological configuration.

[0094] Figure 7 Examples of topological configurations C0 to C8 used for triangle-based connectivity coding in some examples are shown. Figure 7 In the example of , polygon fans are triangulated, such as shown by shaded triangles. For example, the polygon fan of C0 includes 3 shaded triangles, the polygon fan of C1 includes 2 shaded triangles, and the polygon fan of C4 includes 1 triangle.

[0095] In some examples, polygon fans are triangulated and coded based on their relationship to adjacent coded parts (e.g., Figure 7 The positional relationship of the blank triangles shown in the figure is classified as one of the topological configurations, such as Figure 7 One of C0 to C8.

[0096] In some examples, to apply triangle-based geometry coding, vertex positions are encoded by applying prediction and compressing the prediction residuals, for example using context-adaptive binary arithmetic coding. The current vertex can be predicted based on vertices that have already been geometry-encoded (encoded / decoded), such as vertices of neighboring triangles that have been geometry-encoded (encoded / decoded). In some examples, a set of predictors can be considered based on a local neighborhood configuration.

[0097] Figure 8 A table showing sets of predictors for different neighborhood configurations in some examples is shown. Figure 8 In the example of Figure 8 denoted by p in the figure) can be classified into five configurations (e.g., Figure 8One of configurations 0 to 4 in

[0045] . For each configuration, a set of predictors can be considered. In some examples, the selected predictor can be appropriately encoded based on its index from the set of predictors. The selected predictor is used to generate predicted geometric information for the current vertex. In addition, a prediction residual is calculated on the encoder side based on the geometric information of the current vertex and the predicted geometric information, and the prediction residual is appropriately encoded, for example, using adaptive binary arithmetic coding.

[0098] According to one aspect of the present disclosure, a dual-degree-based technique can be used to encode the connectivity of polygonal meshes with arbitrary facet or vertex degrees. The dual-degree-based technique exploits the duality between the original mesh and the dual mesh to encode the connectivity by generating two symbol sequences (vertex degree and facet degree).

[0099] Figure 9 A diagram of a polygon mesh used in some examples to illustrate vertex degrees and face degrees is shown. In the examples, the vertex degree of a vertex is also referred to as the vertex's valence. The vertex degree of a vertex specifies the number of edges associated with the vertex. Figure 9 In the example, four edges are associated with vertex (910), so the vertex degree of vertex (910) is 4. The degree of a face specifies the number of edges associated with the face. Figure 9 In the example, five edges are associated with face (920), so the facet degree of face (920) is 5.

[0100] Figure 10 An example of an original mesh (1001) and a dual mesh (1002) according to one aspect of the present disclosure is shown. The dual mesh (1002) can be constructed by a dual process (1003), for example, by placing a node in each original face in the original mesh (1001) and connecting the nodes by each edge associated with two original faces in the original mesh (1001). Thus, a primitive face in the original mesh (1001) with face degree N1 corresponds to a vertex in the dual mesh (1002) with vertex degree N1, where the vertex is a node within the primitive face. Reference Figure 10 , the original face (1011) in the original mesh (1001) with face degree 3 corresponds to the vertex (1021) in the dual mesh (1002) with vertex degree 3. Figure 10 , the original face (1012) in the original mesh (1001) with face degree 5 corresponds to the vertex (1022) in the dual mesh (1002) with vertex degree 5.

[0101] The encoding performance of dual-degree-based techniques depends on the regularity of the mesh, as measured by the variance of vertex and / or facet degrees. For example, smaller vertex / facet degree variance indicates a more regular mesh, and dual-degree-based techniques achieve higher connectivity coding efficiency. In some examples, dual-degree-based techniques can achieve near-optimal worst-case meshes, demonstrating that the entropy of two symbol sequences reaches the Tutte entropy bound for planar graphs with 2 bits per edge.

[0102] In some examples, vertex and face data structures may be explicitly maintained. For a vertex, the vertex degree (VD) and references to all associated faces in order (e.g., counterclockwise order) may be stored in the data structure associated with the vertex. For a face, the face degree (FD) and references to all associated vertices in order (e.g., counterclockwise order) may be stored. Vertices and faces may transition through a series of states, such as an empty state, an active state, and a completed state. In examples, at a given time, at most one face may be active, and multiple vertices may be active. In examples, multiple active vertices may be stored in an active vertex queue. When a face is processed, for example, from an empty state (e.g., when the face has not been processed) to an active state (e.g., when the face is being processed), and then to a completed state (e.g., when the face has been processed), all vertices of the face that are not yet active can be activated by inserting them into the active vertex queue. Therefore, each active vertex has at least one completed associated face. When no faces associated with a vertex are being processed, the vertex is not active and is in the empty state. The vertex has not been visited. When all faces associated with a vertex have become complete (eg, all faces are processed), the vertex changes its state to complete (eg, vertex processed) and the vertex can be removed from the active vertex queue.

[0103] In some examples, the active vertex queue is an active vertex priority queue, where the active vertex with the highest priority is traversed before other active vertices in the active vertex queue. For example, the active vertex with the highest priority becomes the current vertex, such as a pivot vertex, and is processed and then removed from the active vertex queue. In examples, the active vertex queue represents a boundary between portions of the polygon mesh that have been traversed and portions of the polygon mesh that have not yet been visited.

[0104] Figures 11 to 12 An example of a traversal sequence (1100) of a dual degree algorithm according to one aspect of the present disclosure is shown. In the example, the traversal sequence (1100) begins with a seed face (1101) of a polygonal mesh (1150). At the start (e.g., at step (1170)), the seed face degree (FD) (e.g., 6, as indicated by FD6) is output along with the vertex degrees of all vertices of the seed face (1101). Figure 11In the example shown, the seed face (1101) has 6 vertices V1 to V6, each of which has a vertex degree (VD) of 4, as indicated by VD4. The traversal sequence (1100) may proceed to step (1171).

[0105] At step (1171), the first vertex (e.g., V1) of the seed face (1101) becomes active and the next face (1102) can be traversed, for example, in counterclockwise order, producing one face degree and two vertex value outputs, such as FD4, VD4, and VD4.

[0106] The traversal continues until all faces and vertices in the polygon mesh (1150) have been visited.

[0107] In this example, a seed face (1101) is selected, and all neighbors of the seed face (1101) are recursively traversed until all faces of the corresponding connected components are visited. Figures 11 to 12 , a subset of all neighbors of the seed face (1101) is traversed in steps (1172) to (1181). A new seed face for the next connected component is then selected, and the traversal sequence (1100) can continue. Each time the encoder traverses the next element of the polygonal mesh (1150), the encoder can output a symbol that uniquely identifies the new state. The decoder can reconstruct the polygonal mesh (1150) from this symbol stream. In an example, two sets of symbols can be used to encode vertex degrees and face degrees. At a given moment, the encoder and decoder can know which type of symbol (face or vertex) is being processed.

[0108] In one aspect, a mesh traversal, such as traversal sequence (1100), can be started by selecting a seed face (1101). In step (1170), the encoder outputs the face degree of the seed face (1101), followed by the vertex degrees of all vertices V1 to V6 associated with the seed face (1101), such as FD6-VD4-VD4-VD4-VD4-VD4-VD4, in a counterclockwise order. The vertices (e.g., 6 vertices V1 to V6) can be added to an active vertex queue. The decoder can receive the seed face degree (e.g., FD6) and create a corresponding face. The decoder can fill all slots of the associated vertices, move the associated vertices from an empty state to an active state, for example, by entering the associated vertex into the decoder's active vertex queue. Thus, the encoder and decoder can maintain a matching state.

[0109] A traversal such as the traversal sequence (1100) can continue by removing the highest priority active vertex from the active vertex queue and making it the current vertex. For example, the algorithm proceeds counterclockwise around the active vertex, skipping all faces that have been completed. In the example, for the active vertex, at least one face is completed and at least one associated face is still empty, otherwise the vertex may not be in the active vertex queue.

[0110] When the encoder detects an empty face (such as an empty slot in the associated face data structure associated with the current vertex), the encoder can perform the following steps: (i) activate the face and make it the "current" face, and output the face degree of the current face; (ii) add the current face to the appropriate slot in the associated face data structure associated with the current vertex and any other active vertices associated with the current face; (iii) activate any remaining empty vertices of the current face and output the corresponding vertex degrees in sequence (e.g., in counterclockwise order); and (iv) complete the current face and remove it from processing.

[0111] According to one aspect, the traversal sequence (1100) can process elements (e.g., vertices and faces) of the polygonal mesh (1150) by alternating vertices and faces. In one aspect, referring to Figures 11 to 12 , the active vertex and the subsequently selected active face can be considered as continuous pivots and can be referred to as the pivot vertex and the current face, respectively.

[0112] The decoder can use a symmetric process to ensure the same traversal as the encoder. When the decoder finds the first empty face slot in the current active vertex, the decoder can proceed as follows: (i) read the face degree and create the face, moving the face from the state "empty" to "active", and calling the face the "current" face; (ii) add the current face to the appropriate slots in the active vertex and any other active vertices associated with the current face; (iii) read the vertex degrees of the remaining empty vertices associated with the current face, and activate the remaining empty vertices associated with the current face by inserting them into the active vertex queue; (iv) move the current face to the completed state.

[0113] In this example, vertices completed during the current face traversal are removed from the active vertex queue. Vertices completed during the previous traversal no longer fall within the boundaries of the traversal region. After processing the current face, the algorithm proceeds to the next face in the current active vertex queue until the current active vertex is completed. Subsequently, a new active vertex is removed from the queue, and the process repeats until the active vertex queue is empty. If there are any connected components remaining, a new seed face is selected on it and another component traversal begins.

[0114] Note that in some examples, the connectivity of a polygonal mesh can be efficiently encoded by an algorithm based on a bi-degree technique. The bi-degree based technique can be directly applied to polygonal meshes of arbitrary facet degree without the need for triangulation.

[0115] According to one aspect of the present disclosure, a bi-degree based algorithm can be used to efficiently compress polygon meshes. The bi-degree based algorithm iterates all associated faces of a vertex (also called a pivot vertex) in a clockwise or counterclockwise direction during traversal. Figures 11 to 12 In the example of , steps (1171) to (1173) traverse the associated faces of vertex V1. In some examples, a half-edge data structure can be used to loop through all associated faces of a vertex.

[0116] Figure 13 A diagram illustrating half edges in some examples is shown. Figure 13 In FIG, polygonal face (1300) includes four vertices (1301) to (1304) connected by four edges (1305) to (1308) shown as dashed lines. Each of the four edges (1305) to (1308) can be represented by a pair of half-edges pointing in opposite directions, which are also called twin edges. For example, edge (1305) is represented by half-edges (1311) and (1312) pointing in opposite directions; edge (1306) is represented by half-edges (1313) and (1314) pointing in opposite directions; edge (1307) is represented by half-edges (1315) and (1316) pointing in opposite directions; and edge (1308) is represented by half-edges (1317) and (1318) pointing in opposite directions.

[0117] In the halfedge data structure, each edge is stored as a pair of halfedge elements, one for each of its two halfedges (also called twin edges in some examples). In some examples, a halfedge element stores a reference to its twin edge, a reference to the previous halfedge, and a reference to the next halfedge along the same face. In the halfedge data structure, a vertex element stores the position of a vertex and a reference to the halfedge element that originated from the vertex, and a face element stores any halfedge elements that belong to a face.

[0118] According to one aspect of the present disclosure, half-edge data structures are expensive to construct. Some aspects of the present disclosure provide techniques for iterating over the associated faces of each vertex in a polygonal mesh without using a half-edge data structure. These techniques can be applied to each vertex in a polygonal mesh separately and iterate over all associated faces for each vertex in the polygonal mesh. Thus, the techniques can be used in dual-degree-based connectivity coding, and in some examples, dual-degree-based connectivity coding can be performed without constructing a half-edge data structure.

[0119] In some examples, a processing device may generate a first associated face set associated with a first vertex, the first associated face set including a first face set with the first vertex as an associated vertex. The processing device may configure an array based on the first associated face set associated with the first vertex. For example, the array may include at least one array element configured based on the first face, an index of the at least one array element is determined based on the first vertex between the first subsequent vertex and the first preceding vertex, and a value of the at least one array element indicates the first face and / or the second vertex between the first subsequent vertex and the first preceding vertex. The processing device may determine an iteration order of the first face set based on the array.

[0120] Note that, without loss of generality, the following description uses a counterclockwise orientation for facet iteration. This description can be appropriately adapted for a clockwise orientation. The following description provides various techniques to be used in the algorithm to iterate over the facets associated with a pivot vertex during traversal. Each technique can be used individually or in any suitable combination. In some examples, the process for iterating over the facets associated with a vertex includes the following four steps.

[0121] In the first step, for each vertex in the polygonal mesh, all associated faces for the vertex are found. In some examples, all faces in the polygonal mesh are looped through, and for each face, all associated vertices for that face are looped through. For each associated vertex in a face, the face's index is added to the vertex's associated face set. In some examples, when a face is degenerate (a degenerate face has duplicate associated vertices), the face index is added once to the duplicate vertex's associated face set. For example, when a degenerate face exists in the polygonal mesh with two vertices having the same vertex index, and therefore has no geometric area, and no normal for the degenerate face, the face's index is added once to the associated face set associated with the same vertex index.

[0122] In the second step, after identifying all the associated faces for each vertex in the polygon mesh, an array (denoted by A) of size 2×V is constructed, where V is the number of vertices in the polygon mesh. The constructed array A is then used to iterate over the associated faces of a given vertex in a counterclockwise direction. Note that in some examples, array A can be reused for different vertices.

[0123] In the third step, for a given vertex with index v in the polygon mesh, loop through all associated faces identified in the first step. For each associated face of v (index denoted as f), find the index of v inside f, and then find the preceding vertex inside f relative to v (index denoted as u). Similarly, find the succeeding vertex inside f relative to v (index denoted as w). Then, some array elements can be set. In an example, two array elements A[w] and A[V+w] can be set according to A[w]=f and A[V+w]=u. In another example, two elements A[2×w] and A[2×w+1] can be set according to A[2×w]=f and A[2×w+1]=u.

[0124] In the fourth step, to iterate over the associated faces of vertex v, any associated face of vertex v can be picked as a starting point, with the selected associated face having an index denoted by f. Then, similar to step 3, the index of v within f can be found, and then the subsequent vertex within f relative to v (with index w) can be found. Furthermore, the index u of the preceding vertex within f relative to v is u = A[V+w]. After that, the second face in the counterclockwise direction is A[u], and the third face is A[A[V+u]], and so on.

[0125] Note that to iterate over the associated faces of another vertex, the third and fourth steps can be performed and the array A can be reused.

[0126] Note that in some examples, to iterate the associated faces in a clockwise direction, the preceding and succeeding vertices in steps 3 and 4 can be swapped and the same process can be used.

[0127] Figure 14 A diagram showing the process of iterating over the associated surfaces in the illustrated example. Figure 14 In the example of FIG. 1 , a polygon mesh (1400) includes a plurality of faces (also referred to as polygonal faces in some examples), and each face is formed by a plurality of vertices. The representation of the polygon mesh (1400) includes a face description portion (1410) for each face. In the face description portion (1410), for each face, a plurality of vertex indices of vertices in the face are associated with a face index of the face. The face index is determined based on a direction (such as Figure 14 ) lists the vertices in a face in a counterclockwise direction.

[0128] In the first step of this process, for each vertex in the polygon mesh, find all of the vertex's associated faces. For example, loop through all of the faces listed in the face description section (1410). For each face, loop through all of the vertices associated with that face. For each associated vertex in a face, add the face's index to the associated face set associated with the vertex index of the associated vertex.

[0129] exist Figure 14 In the example of , after the first step, a plurality of associated face sets ( 1420 ) are generated that are respectively associated with the vertex indexes. For example, the associated face set associated with the vertex index v1 includes faces indexed by f1, f2, f3, and f4.

[0130] In the second step of the process, an array (denoted by A) of size 2 x V is constructed, where V is the number of vertices in the polygon mesh (1400).

[0131] In a third step, for a given vertex (to become the pivot vertex), such as the vertex with index v1 in the polygon mesh (1400), all associated faces identified in the first step are looped through. For each associated face of v1 (e.g., f1, f2, f3, and f4), the index of v1 within the face is found according to the face description portion (1410), and then the preceding vertex within the face relative to v1 is found. Similarly, the succeeding vertex within the face relative to v1 is found. Array A is then configured to link the succeeding vertex in each face with the face and the preceding vertex in the face relative to the pivot vertex. In some examples, some elements of array A are set as follows: for a face including vertex v1, the succeeding vertex of vertex v1 in the face (e.g., using the vertex index of the succeeding vertex) is used to indicate the face (the face index of the face) and the preceding vertex of vertex v1 in the face (the vertex index of the preceding vertex). In Figure 14 In the example of , eight array elements are set in the third step, as shown in (1430).

[0132] In the fourth step, the associated faces of vertex v1 are iterated using array A. For example, when selecting the associated face f2. In face f2, the subsequent vertex of v1 is v3, and then the preceding vertex in f2 is A[V+v3], which is v4 according to (1430). The second face is A[v4], which is f4 according to (1430). In face f4, the preceding vertex is A[v4+V], which is v5 according to (1430). The third face is A[v5], which is f1 according to (1430). In face f1, the preceding vertex is A[v5+V], which is v2 according to (1430). The fourth face is A[v2], which is f3 according to (1430). Therefore, the associated faces of vertex v1 are iterated in the order of f2, f4, f1, and f3.

[0133] Note that in some examples, the third and fourth steps may be performed for another vertex to iterate the associated faces of the other vertex, and array A may be reused.

[0134] Note that while the size of array A in the above example is 2×V, note that in some examples, an array of size V may be used. For example, an array element based on the index of a subsequent vertex in a face may store a value indicating a combination of a face and a preceding vertex, and the combination may be separated into a face portion and a preceding vertex portion.

[0135] Figure 15 A flowchart outlining a process (1500) according to one aspect of the present disclosure is shown. The process (1500) can be used in a mesh processing device, such as a mesh encoder, a mesh compression device, or the like. In various aspects, the process (1500) is performed by a processing circuit, such as a processing circuit that performs the functions of the 3D encoder (103). In some aspects, the process (1500) is implemented as software instructions, so that when the processing circuit executes the software instructions, the processing circuit performs the process (1500). The process begins at (S1501) and proceeds to (S1510).

[0136] At (S1510), a polygonal mesh to be processed is received, the polygonal mesh comprising a plurality of vertices connected to form at least two faces, each face comprising a list of vertices associated with the face. In some examples, a first face of the at least two faces is provided with a first list of vertices associated with the first face, the first list of vertices comprising at least the first vertex, a first preceding vertex of the first vertex, and a first succeeding vertex of the first vertex.

[0137] At (S1520), a first associated face set associated with the first vertex is generated. The first associated face set includes a first face set with the first vertex as an associated vertex, and the first associated face set includes the first face.

[0138] At (S1530), an array is configured based on a first associated face set associated with the first vertex. The array includes at least one array element configured based on the first face. An index of the at least one array element is determined based on a first vertex between a first subsequent vertex and a first preceding vertex, and a value of the at least one array element indicates the first face and / or a second vertex between the first subsequent vertex and the first preceding vertex.

[0139] At (S1540), an iteration order of the first face set is determined based on the array.

[0140] According to one aspect of the present disclosure, an array includes a first array element and a second array element configured based on a first face, the first array element and the second array element are indexed based on the first of a first subsequent vertex and a first preceding vertex, the value of the first array element indicates the first face, and the value of the second array element indicates the second vertex of the first subsequent vertex and the first preceding vertex.

[0141] In some examples, the first array element and the second array element are indexed based on the first subsequent vertex, and the value of the second array element indicates the first preceding vertex. In an example, to determine the iteration order, the preceding vertex of the first vertex in the current face is determined based on the array element indexed based on the subsequent vertex of the first vertex in the current face, and the next face is determined based on the array element indexed based on the preceding vertex. The iteration order can have a counterclockwise orientation.

[0142] In some examples, the first array element and the second array element are indexed based on the first preceding vertex, and the value of the second array element indicates the first succeeding vertex. In an example, to determine the iteration order, a succeeding vertex of the first vertex in the current face is determined based on the array element indexed based on the preceding vertex of the first vertex in the current face; and a next face is determined based on the array element indexed based on the succeeding vertex. The iteration order may have a clockwise orientation.

[0143] In some examples, the indices of the first and second array elements in the array are spaced based on the number of vertices in the polygon mesh. For example, when the first array element is A[w], the second array element is A[w+V], where V is the number of vertices in the polygon mesh and w is the index of the vertex in the example.

[0144] In some examples, the indices of the first array element and the second array element in the array are consecutive integers. For example, when the first array element is A[2×w], the second array element is A[2×w+1], where w is the index of the vertex in the example.

[0145] In some examples, the size of the array is configured based on the number of vertices in the polygonal mesh. In an example, the size of the array is configured to be twice the number of vertices in the polygonal mesh.

[0146] In some examples, a second associated face set associated with the second vertex is generated, the second associated face set including a second face set associated with the second vertex. An array is then configured based on the second associated face set associated with the second vertex, and an iteration order of the second face set is determined based on the array.

[0147] The process then proceeds to (S1599) and terminates.

[0148] The process (1500) may be modified as appropriate. At least one step in the process (1500) may be modified and / or omitted. At least one additional step may be added. Any suitable order of implementation may be used.

[0149] According to one aspect of the present disclosure, a method for processing a mesh is provided. In this method, conversion between a mesh file and a compressed mesh bitstream is performed according to format rules. For example, the bitstream may be a bitstream decoded / encoded using any of the decoding and / or encoding methods described herein. The format rules may specify at least one constraint on the bitstream and / or at least one process to be performed by a decoder and / or encoder.

[0150] In an example, a polygonal mesh includes a plurality of vertices connected into at least two faces, each face including a list of associated vertices of the face, a first face of the at least two faces including at least a first vertex, a first preceding vertex of the first vertex, and a first succeeding vertex of the first vertex, the first vertex, the first preceding vertex, and the first succeeding vertex being in a first list associated with the first face. A format rule specifies: generating a first associated face set associated with the first vertex, the first associated face set including a first face set with the first vertex as an associated vertex, the first associated face set including the first face; configuring an array based on the first associated face set associated with the first vertex, the array including at least one array element configured based on the first face, an index of the at least one array element being determined based on a first vertex among a first succeeding vertex and a first preceding vertex, a value of the at least one array element indicating the first face and / or a second vertex among the first succeeding vertex and the first preceding vertex; and determining an iteration order for processing the first face set based on the array.

[0151] Note that in the polygon fan algorithm used to encode the connectivity of polygon meshes, the facet degree of each facet is encoded as it is accessed. Some aspects of the present disclosure provide techniques for encoding facet degree in polygon meshes to improve encoding efficiency. The techniques for encoding facet degree can be applied individually or in any combination.

[0152] In some examples, during the polygon fan encoding algorithm, on the encoder side, the encoder can analyze the input mesh and determine a facet mode. In some examples, the facet mode is the most frequently occurring facet. For example, when the most frequently occurring facet in the input mesh is 4, the facet mode is 4.

[0153] In some examples, before traversing the input mesh, an array (e.g., named F) of a size equal to the number of vertices of the input mesh can be created, and all elements in F can be initialized according to the facet mode. In this example, when the facet mode is 4, all elements in the array F are initialized to 4.

[0154] In some examples, to encode / decode the facet dimensions of the currently visited facet around the pivot vertex p, we can use the facet dimensions stored at F[p] to improve the encoding / decoding of the current facet dimensions by the following method. In the example, F[p] is used as a prediction of the current facet dimensions, and then the prediction residual is encoded / decoded, which is the difference between the prediction and the current facet dimensions. In another example, F[p] can be used to determine a context for encoding / decoding the current facet dimensions. In another example, F[p] can be used as at least one of a prediction and / or a context to encode / decode the current facet dimensions.

[0155] In some examples, after encoding / decoding of the current facet, the current facet may be used to replace the previous value stored at F[p].

[0156] In some examples, the facet mode is signaled from the encoder to the decoder so that the decoder can also create an array F and initialize it with the facet mode.

[0157] Figure 16 A flow chart outlining a process (1600) according to one aspect of the present disclosure is shown. The process (1600) can be used in a trellis decoder. In various aspects, the process (1600) is performed by a processing circuit, such as a processing circuit that performs the functions of the 3D decoder (110). In some aspects, the process (1600) is implemented as software instructions, so that when the processing circuit executes the software instructions, the processing circuit performs the process (1600). The process begins at (S1601) and proceeds to (S1610).

[0158] At (S1610), a code stream including encoded information of a polygon mesh is received. The polygon mesh includes vertices connected to form faces, and the encoded information indicates connectivity information of the vertices.

[0159] At (S1620), a facet mode is determined from the encoded information of the polygon mesh, the facet mode indicating the most frequently used facets in the polygon mesh.

[0160] At (S1630), the current facet size of the facet is determined based on the facet size mode.

[0161] In some examples, a prediction of a current facet size of a facet is determined based on a facet size mode. A prediction residual is determined (eg, decoded) from encoded information of the polygon mesh. The current facet size is determined based on a combination of the prediction of the current facet size and the prediction residual.

[0162] In some examples, a syntax element is decoded from the codestream, the syntax element indicating the frame mode.

[0163] In some examples, an initial value of at least the facetness of a face associated with a vertex is set according to a facetness mode.

[0164] In some examples, an array of elements is created, each associated with a vertex in a polygon mesh. The elements in the array can be initialized according to a facet mode. For example, an element associated with a vertex provides an initial value for the facet associated with the vertex.

[0165] In some examples, when the facetness of the face associated with the vertex is determined, the element associated with the vertex is updated.

[0166] In some examples, the elements associated with the vertex are used as context to determine the current facetness of the face associated with the vertex.

[0167] The process then proceeds to (S1699) and terminates.

[0168] The process (1600) may be modified as appropriate. At least one step in the process (1600) may be modified and / or omitted. At least one additional step may be added. Any suitable order of implementation may be used.

[0169] Figure 17 A flow chart outlining a process (1700) according to one aspect of the present disclosure is shown. The process (1700) can be used in a trellis encoder. In various aspects, the process (1700) is performed by a processing circuit (such as a processing circuit that performs the functions of the 3D encoder (103)). In some aspects, the process (1700) is implemented as software instructions, so that when the processing circuit executes the software instructions, the processing circuit performs the process (1700). The process begins at (S1701) and proceeds to (S1710).

[0170] At (S1710), a facet pattern of a polygonal mesh is determined, the polygonal mesh including vertices connected into faces, the facet pattern indicating the most frequently occurring facets in the polygonal mesh.

[0171] At (S1720), the facet dimensions of the facets are encoded into a code stream according to the facet dimension mode.

[0172] At (S1730), the face mode is included in the code stream.

[0173] In some examples, a prediction of the current face size of the face is determined based on the face size mode. A prediction residual is calculated as the difference between the current face size and the prediction. The prediction residual for the face is encoded into the bitstream.

[0174] In some examples, a syntax element is encoded into the codestream, which indicates the frame mode.

[0175] In some examples, an initial value of the facetness of a face associated with a vertex is set according to a facetness mode.

[0176] In some examples, an array of elements is created, each associated with a vertex in a polygon mesh. The elements in the array are initialized according to a facet mode, with the elements associated with the vertex providing an initial value for the facet associated with the vertex.

[0177] In some examples, when the facetness of the face associated with the vertex is determined, the element associated with the vertex is updated.

[0178] In some examples, the elements associated with a vertex may be used as context to encode the current facetness of the face associated with the vertex.

[0179] The process then proceeds to (S1799) and terminates.

[0180] The process (1700) may be modified as appropriate. At least one step in the process (1700) may be modified and / or omitted. At least one additional step may be added. Any suitable order of implementation may be used.

[0181] The above techniques may be implemented as computer software using computer-readable instructions and physically stored in at least one computer-readable medium. For example, Figure 18 A computer system (1800) suitable for implementing certain aspects of the disclosed subject matter is shown.

[0182] Computer software may be encoded using any suitable machine code or computer language that may be assembled, compiled, linked, or similar mechanisms to create code comprising instructions that may be executed by at least one computer central processing unit (CPU), graphics processing unit (GPU), etc., either directly or through interpretation, microcode execution, etc.

[0183] The instructions may be executed on various types of computers or components thereof, including, for example, personal computers, tablet computers, servers, smart phones, gaming devices, IoT devices, and the like.

[0184] Figure 18 The components shown for the computer system (1800) are examples and are not intended to suggest any limitation on the scope of use or functionality of computer software implementing aspects of the present disclosure. Neither should the configuration of components be interpreted as having any dependency or requirement on any one component or combination of components illustrated in the example aspects of the computer system (1800).

[0185] The computer system (1800) may include certain human interface input devices. Such human interface input devices may be responsive to input from at least one human user through, for example, tactile input (such as keystrokes, swipes, data glove movements), audio input (such as voice, taps), visual input (such as gestures), or olfactory input (not depicted). The human interface devices may also be used to capture certain media that are not necessarily directly related to conscious human input, such as audio (such as voice, music, ambient sounds), images (such as scanned images, photographic images obtained from a still camera), and video (such as two-dimensional video, three-dimensional video including stereoscopic video).

[0186] Input human interface devices may include at least one of the following (only one of each is depicted): keyboard (1801), mouse (1802), touchpad (1803), touch screen (1810), data gloves (not shown), joystick (1805), microphone (1806), scanner (1807), camera (1808).

[0187] The computer system (1800) may also include certain human interface output devices. Such human interface output devices may stimulate at least one sense of a human user through, for example, tactile output, sound, light, and smell / taste. Such human interface output devices may include tactile output devices (e.g., tactile feedback from a touch screen (1810), a data glove (not shown), or a joystick (1805), although there may also be tactile feedback devices that do not function as input devices), audio output devices (such as speakers (1809), headphones (not depicted)), visual output devices (such as screens (1810), including CRT screens, LCD screens, plasma screens, OLED screens, each with or without touch screen input capabilities, each with or without tactile feedback capabilities—some of which are capable of outputting two-dimensional visual output or more than three-dimensional output through, for example, stereoscopic output; virtual reality glasses (not depicted), holographic displays, and smoke canisters (not depicted)), and printers (not depicted).

[0188] The computer system (1800) may also include human-accessible storage devices and their associated media, such as optical media including media (1821) such as CD / DVD ROM / RW (1820) including CD / DVD, thumb drives (1822), removable hard drives or solid-state drives (1823), traditional magnetic media such as tapes and floppy disks (not depicted), dedicated ROM / ASIC / PLD-based devices such as security dongles (not depicted), and the like.

[0189] Those skilled in the art will also understand that the term "computer-readable media" used in connection with the presently disclosed subject matter does not include transmission media, carrier waves, or other volatile signals.

[0190] The computer system (1800) may also include an interface (1854) to at least one communication network (1855). The network may be, for example, wireless, wired, or optical. The network may further be local, wide-area, metropolitan, vehicular and industrial, real-time, delay-tolerant, and the like. Examples of networks include local area networks such as Ethernet, wireless LANs, cellular networks including GSM, 3G, 4G, 5G, LTE, and the like, television wired or wireless wide-area digital networks including cable, satellite, and terrestrial broadcast television, vehicular and industrial networks including CANBus, and the like. Some networks typically require an external network interface adapter attached to some common data port or peripheral bus (1849) (such as, for example, a USB port of the computer system (1800)); other systems are typically integrated into the core of the computer system (1800) by attaching to a system bus as described below (e.g., an Ethernet interface to a PC computer system or a cellular network interface to a smartphone computer system). Using any of these networks, the computer system (1800) can communicate with other entities. Such communications can be one-way receive-only (e.g., broadcast television), one-way send-only (e.g., CANbus to certain CANbus devices), or two-way, such as to other computer systems using a local area digital network or a wide area digital network. Certain protocols and protocol stacks can be used on each of those networks and network interfaces as described above.

[0191] The above-mentioned human interface devices, human-accessible storage devices, and network interfaces may be attached to the core (1840) of the computer system (1800).

[0192] The core (1840) may include at least one central processing unit (CPU) (1841), a graphics processing unit (GPU) (1842), a dedicated programmable processing unit in the form of a field programmable gate array (FPGA) (1843), hardware accelerators (1844) for certain tasks, a graphics adapter (1850), and the like. These devices, along with read-only memory (ROM) (1845), random access memory (1846), and internal mass storage devices (1847) such as internal non-user accessible hard drives, SSDs, and the like, may be connected via a system bus (1848). In some computer systems, the system bus (1848) may be accessible in the form of at least one physical plug to enable expansion with additional CPUs, GPUs, and the like. Peripheral devices may be attached directly to the core's system bus (1848) or to the core's system bus (1848) via a peripheral bus (1849). In an example, a screen (1810) may be connected to a graphics adapter (1850). Architectures for peripheral buses include PCI, USB, and the like.

[0193] The CPU (1841), GPU (1842), FPGA (1843), and accelerator (1844) can execute certain instructions, the combination of which can constitute the aforementioned computer code. The computer code can be stored in ROM (1845) or RAM (1846). Transient data can also be stored in RAM (1846), while permanent data can be stored, for example, in an internal mass storage device (1847). Fast storage and retrieval of any memory device can be enabled by using a cache memory, which can be closely associated with at least one CPU (1841), GPU (1842), mass storage device (1847), ROM (1845), RAM (1846), etc.

[0194] The computer readable medium may have computer code thereon for performing various computer-implemented operations. The media and computer code may be those specially designed and constructed for the purposes of this disclosure, or they may be of a type well known and available to those skilled in the art of computer software.

[0195] By way of example and not limitation, a computer system (1800) having an architecture, and in particular a core (1840), may provide functionality as a result of at least one processor (including a CPU, GPU, FPGA, accelerator, etc.) executing software embodied in at least one tangible computer-readable medium. Such computer-readable media may be media associated with a user-accessible mass storage device as described above, as well as certain memories of the core (1840) having non-volatile properties, such as a core-internal mass storage device (1847) or ROM (1845). Software implementing various aspects of the present disclosure may be stored in such devices and executed by the core (1840). Depending on the particular needs, the computer-readable medium may include at least one memory device or chip. The software may cause the core (1840), and in particular the processors therein (including CPU, GPU, FPGA, etc.), to perform specific processes or specific portions of specific processes described herein, including defining data structures stored in RAM (1846) and modifying such data structures according to processes defined by the software. Additionally or alternatively, the computer system may provide functionality as a result of hard-wired logic or otherwise embodied in circuitry (e.g., accelerator (1844)) that may operate in place of or in conjunction with software to perform specific processes or specific portions of specific processes described herein. Where appropriate, references to software may include logic and vice versa. Where appropriate, references to computer-readable media may include circuitry (such as an integrated circuit (IC)) storing software for execution, circuitry embodying logic for execution, or both. The present disclosure includes any suitable combination of hardware and software.

[0196] The use of "at least one of" or "one of" in this disclosure is intended to include any one or combination of the referenced elements. For example, reference to at least one of A, B, or C; at least one of A, B, and C; at least one of A, B, and / or C; and at least one of A through C is intended to include only A, only B, only C, or any combination thereof. References to one of A or B and one of A and B are intended to include A or B or (A and B). When applicable, such as when the elements are not mutually exclusive, the use of "one of" does not exclude any combination of the referenced elements.

[0197] Although the present disclosure has described several examples of various aspects, there are changes, permutations, and various substitute equivalents that fall within the scope of the present disclosure. It will therefore be appreciated that those skilled in the art will be able to devise many systems and methods that, although not explicitly shown or described herein, embody the principles of the present disclosure and are therefore within the spirit and scope of the present disclosure.

[0198] The above disclosure also includes the features mentioned below. The features can be combined in various ways and are not limited to the combinations mentioned below.

[0199] (1) A method for mesh processing, comprising: receiving a polygonal mesh to be processed, the polygonal mesh comprising a plurality of vertices connected into at least two faces, each face comprising a list of associated vertices of the face, a first face of the at least two faces comprising at least a first vertex, a first preceding vertex of the first vertex, and a first succeeding vertex of the first vertex, the first vertex, the first preceding vertex, and the first succeeding vertex being in a first list associated with the first face; generating a first associated face set associated with the first vertex, the first associated face set comprising a first face set with the first vertex as an associated vertex, the first associated face set comprising the first face; configuring an array according to the first associated face set associated with the first vertex, the array comprising at least one array element configured based on the first face, an index of the at least one array element being based on the first vertex among the first succeeding vertex and the first preceding vertex, a value of the at least one array element indicating the first face and / or the second vertex among the first succeeding vertex and the first preceding vertex; and determining an iteration order for processing the first face set based on the array.

[0200] (2) A method according to feature (1), wherein the array includes a first array element and a second array element configured based on the first face, the indexes of the first array element and the second array element are based on the first subsequent vertex and the first preceding vertex, the value of the first array element indicates the first face, and the value of the second array element indicates the second vertex of the first subsequent vertex and the first preceding vertex.

[0201] (3) A method according to any one of features (1) to (2), wherein the indexes of the first array element and the second array element are based on the first post-order vertex, and the value of the second array element indicates the first pre-order vertex.

[0202] (4) A method according to any one of features (1) to (3), wherein determining the iteration order comprises: determining a preceding vertex of the first vertex in the current face based on an array element based on a succeeding vertex index of the first vertex in the current face; and determining a next face based on an array element based on the preceding vertex index.

[0203] (5) A method according to any one of features (1) to (4), wherein the indexes of the first array element and the second array element are based on the first preceding vertex, and the value of the second array element indicates the first succeeding vertex.

[0204] (6) A method according to any one of features (1) to (5), wherein determining the iteration order comprises: determining a subsequent vertex of the first vertex in the current face based on an array element based on a preceding vertex index of the first vertex in the current face; and determining a next face based on an array element based on the subsequent vertex index.

[0205] (7) A method according to any one of features (1) to (6), wherein the indices of the first array element and the second array element in the array are spaced based on the number of vertices in the polygonal mesh.

[0206] (8) A method according to any one of features (1) to (7), wherein the indices of the first array element and the second array element in the array are consecutive integers.

[0207] (9) A method according to any one of features (1) to (8), wherein configuring the array includes: configuring the size of the array based on the number of vertices in the polygonal mesh.

[0208] (10) A method according to any one of features (1) to (9), wherein configuring the array includes: configuring the size of the array to be twice the number of vertices in the polygonal mesh.

[0209] (11) The method according to any one of features (1) to (10), further comprising: generating a second associated face set associated with the second vertex, the second associated face set including a second face set with the second vertex as an associated vertex; configuring the array according to the second associated face set associated with the second vertex; and determining an iteration order of the second face set based on the array.

[0210] (12) A method for processing mesh data, the method comprising: processing a code stream of a polygonal mesh according to a format rule: the polygonal mesh comprises a plurality of vertices connected into at least two faces, each face comprises a list of associated vertices of the face, a first face of the at least two faces comprises at least a first vertex, a first preceding vertex of the first vertex, and a first succeeding vertex of the first vertex, the first vertex, the first preceding vertex, and the first succeeding vertex being in a first list associated with the first face; the format rule specifies: generating a first associated face set associated with the first vertex, the first associated face set comprising a first face set with the first vertex as an associated vertex, the first associated face set comprising the first face; configuring an array according to the first associated face set associated with the first vertex, the array comprising at least one array element configured based on the first face, the index of the at least one array element being based on the first vertex among the first succeeding vertex and the first preceding vertex, the value of the at least one array element indicating the first face and / or the second vertex among the first succeeding vertex and the first preceding vertex; and determining an iteration order of the first face set based on the array.

[0211] (13) A method for mesh decoding, comprising: receiving a code stream including encoded information of a polygonal mesh, the polygonal mesh including vertices connected to form a face, the encoded information indicating connectivity information of the vertices; determining a facet mode from the encoded information of the polygonal mesh, the facet mode indicating the most frequently used facet mode in the polygonal mesh; and determining a current facet mode of a face based on the facet mode.

[0212] (14) The method according to feature (13) comprises: determining a prediction of the current face dimension of the face based on the face dimension pattern; determining a prediction residual from the encoded information of the polygonal mesh; and determining the current face dimension based on a combination of the prediction of the current face dimension and the prediction residual.

[0213] (15) The method according to any one of features (13) to (14), comprising: decoding a syntax element from the code stream, wherein the syntax element indicates the face mode.

[0214] (16) The method according to any one of features (13) to (15), comprising: setting an initial value of the facet dimensions of the face associated with the vertex according to the facet dimension pattern.

[0215] (17) A method according to any one of features (13) to (16), comprising: creating an array of elements respectively associated with vertices in the polygonal mesh; and initializing the elements in the array according to the facet mode, the elements associated with the vertex being the initial values ​​of the facets associated with the vertex.

[0216] (18) The method according to any one of features (13) to (17), comprising: updating the element associated with the vertex when determining the surface degree of the face associated with the vertex.

[0217] (19) A method according to any one of features (13) to (18), comprising: using the element associated with the vertex as a context to determine the current facetness of the face associated with the vertex.

[0218] (20) A method for mesh encoding, comprising: determining a facet pattern of a polygonal mesh, the polygonal mesh comprising vertices connected to form faces, the facet pattern indicating the most frequently occurring facets in the polygonal mesh; encoding the facets of the face into a code stream according to the facet pattern; and including the facet pattern in the code stream.

[0219] (21) The method according to feature (20) comprises: determining a prediction of a current face size of a face based on the face size pattern; determining a prediction residual as a difference between the current face size and the prediction; and encoding the prediction residual of the face into the bitstream.

[0220] (22) The method according to any one of features (20) to (21), comprising: encoding a syntax element into the bitstream, wherein the syntax element indicates the face mode.

[0221] (23) The method according to any one of features (20) to (22), comprising: setting an initial value of the facet dimensions of the face associated with the vertex according to the facet dimension pattern.

[0222] (24) A method according to any one of features (20) to (23), comprising: creating an array of elements respectively associated with vertices in the polygonal mesh; and initializing the elements in the array according to the facet mode, the elements associated with the vertex being the initial values ​​of the facets associated with the vertex.

[0223] (25) The method according to any one of features (20) to (24), comprising: updating the element associated with the vertex when determining the surface degree of the face associated with the vertex.

[0224] (26) A method according to any one of features (20) to (25), comprising: using the element associated with the vertex as a context to encode the current facetness of the face associated with the vertex.

[0225] (27) A method for processing mesh data, the method comprising: processing a code stream of a polygonal mesh according to a format rule, wherein: the code stream comprises encoded information of the polygonal mesh, the polygonal mesh comprises vertices connected into faces, the encoded information indicates connectivity information of the vertices; and the format rule specifies: determining a facet mode from the encoded information of the polygonal mesh, the facet mode indicating the most frequently used facet mode in the polygonal mesh; and determining a current facet mode of a face based on the facet mode.

[0226] (28) An apparatus for grid processing, comprising a processing circuit configured to perform the method according to any one of features (1) to (12).

[0227] (29) An apparatus for grid processing, comprising a processing circuit configured to perform the method according to any one of features (13) to (19).

[0228] (30) An apparatus for grid processing, comprising a processing circuit configured to perform the method according to any one of features (20) to (26).

[0229] (31) A computer device, characterized in that the device includes at least one processor and at least one memory, wherein at least one instruction is stored in the at least one memory, and the at least one instruction is loaded by the at least one processor and executed according to any one of features (1) to (27).

[0230] (32) A non-volatile computer-readable storage medium storing instructions that, when executed by at least one processor, cause the at least one processor to perform the method according to any one of features (1) to (27).

Claims

1. A method for grid processing, characterized in that: include: Receive a polygonal mesh, the polygonal mesh comprising a plurality of vertices connected into at least two faces, each face comprising a list of vertices associated with the face, a first face of the at least two faces comprising at least a first vertex, a first preceding vertex of the first vertex, and a first succeeding vertex of the first vertex, the first vertex, the first preceding vertex, and the first succeeding vertex being in a first list associated with the first face; generating a first associated face set associated with the first vertex, wherein the first associated face set includes a first face set with the first vertex as an associated vertex, and the first associated face set includes the first face; configuring an array according to the first associated face set associated with the first vertex, the array comprising at least one array element configured based on the first face, an index of the at least one array element being based on a first vertex between the first subsequent vertex and the first preceding vertex, and a value of the at least one array element indicating the first face and / or a second vertex between the first subsequent vertex and the first preceding vertex; as well as An iteration order of the first set of associated faces is determined based on the array.

2. The method according to claim 1, characterized in that The array includes a first array element and a second array element configured based on the first face, indexes of the first array element and the second array element are based on the first subsequent vertex and the first preceding vertex, a value of the first array element has an index indicating the first face, and a value of the second array element indicates the second vertex of the first subsequent vertex and the first preceding vertex.

3. The method according to claim 2, characterized in that The indices of the first array element and the second array element are based on the first subsequent vertex, and the value of the second array element has a value indicative of the first preceding vertex.

4. The method according to claim 3, characterized in that Determining the iteration order includes: Determining a preceding vertex of the first vertex in the current face according to an array element based on a subsequent vertex index of the first vertex in the current face; and The next face is determined based on the array element indexed based on the preceding vertex.

5. The method according to claim 2, characterized in that The indices of the first array element and the second array element are based on the first pre-order vertex, and the value of the second array element indicates the first post-order vertex.

6. The method according to claim 5, characterized in that Determining the iteration order includes: determining a subsequent vertex of the first vertex in the current face according to an array element based on a preceding vertex index of the first vertex in the current face; and The next face is determined based on the array element indexed based on the subsequent vertex.

7. The method according to claim 2, characterized in that The indices of the first array elements and the second array elements in the array are spaced based on a number of vertices in the polygon mesh.

8. The method according to claim 2, characterized in that The indices of the first array element and the second array element in the array are consecutive integers.

9. The method according to claim 1, characterized in that Configuring the array includes: The size of the array is configured based on the number of vertices in the polygon mesh.

10. The method according to claim 1, characterized in that Configuring the array includes: Configure the size of the array to be twice the number of vertices in the polygon mesh.

11. The method according to claim 1, characterized in that Further including: generating a second associated face set associated with the second vertex, wherein the second associated face set includes a second face set having the second vertex as an associated vertex; configuring the array according to the second set of associated faces associated with the second vertex; and An iteration order for processing the second set of faces is determined based on the array.

12. A grid processing device, characterized in that: include: a receiving module configured to receive a polygonal mesh, the polygonal mesh comprising a plurality of vertices connected to form at least two faces, each face comprising a list of vertices associated with the face, a first face of the at least two faces comprising at least a first vertex, a first preceding vertex of the first vertex, and a first succeeding vertex of the first vertex, the first vertex, the first preceding vertex, and the first succeeding vertex being in a first list associated with the first face; a generating module, configured to generate a first associated face set associated with the first vertex, wherein the first associated face set includes a first face set with the first vertex as an associated vertex, and the first associated face set includes the first face; an array configuration module, configured to configure an array according to the first associated face set associated with the first vertex, the array comprising at least one array element configured based on the first face, an index of the at least one array element based on the first subsequent vertex and the first preceding vertex, and a value of the at least one array element indicating the first face and / or the second vertex of the first subsequent vertex and the first preceding vertex; as well as An order determination module is configured to determine an iteration order of the first face set based on the array.

13. The device according to claim 12, characterized in that The array includes a first array element and a second array element configured based on the first face, indexes of the first array element and the second array element are based on the first subsequent vertex and the first preceding vertex, a value of the first array element indicates the first face, and a value of the second array element indicates the second vertex between the first subsequent vertex and the first preceding vertex.

14. The device according to claim 13, characterized in that The indices of the first array element and the second array element are based on the first subsequent vertex, and the value of the second array element indicates the first preceding vertex.

15. The device according to claim 14, characterized in that The array configuration module is used to: Determine a preceding vertex of the first vertex in the current face according to an array element based on a subsequent vertex index of the first vertex in the current face; as well as The next face is determined based on an array element that is indexed based on the preceding vertex.

16. The device according to claim 13, characterized in that The indices of the first array element and the second array element are based on the first pre-order vertex, and the value of the second array element indicates the first post-order vertex.

17. The device according to claim 16, characterized in that The array configuration module is used to: Determine a subsequent vertex of the first vertex in the current face according to an array element based on a preceding vertex index of the first vertex in the current face; as well as The next face is determined based on an array element that is indexed based on the subsequent vertex.

18. The device according to claim 13, characterized in that The indices of the first array elements and the second array elements in the array are spaced based on a number of vertices in the polygon mesh.

19. The device according to claim 13, characterized in that The indices of the first array element and the second array element in the array are consecutive integers.

20. A method for processing grid data, characterized in that, The method comprises: Process the code stream of polygon meshes according to the format rules: The polygonal mesh includes a plurality of vertices connected to form at least two faces, each face including a list of vertices associated with the face, a first face of the at least two faces including at least a first vertex, a first preceding vertex of the first vertex, and a first succeeding vertex of the first vertex, the first vertex, the first preceding vertex, and the first succeeding vertex being in a first list associated with the first face; The formatting rules specify: generating a first associated face set associated with the first vertex, wherein the first associated face set includes a first face set with the first vertex as an associated vertex, and the first associated face set includes the first face; configuring an array according to the first associated face set associated with the first vertex, the array comprising at least one array element configured based on the first face, an index of the at least one array element being based on a first vertex between the first subsequent vertex and the first preceding vertex, and a value of the at least one array element indicating the first face and / or a second vertex between the first subsequent vertex and the first preceding vertex; and An iteration order for the first set of faces is determined based on the array.

21. A computer device, characterized in that: The device includes at least one processor and at least one memory, wherein at least one instruction is stored in the at least one memory, and the at least one instruction is loaded and executed by the at least one processor to implement the method according to any one of claims 1 to 11 or the method according to claim 20.

22. A non-transitory computer-readable storage medium storing instructions that, when executed by a computer, cause the computer to perform the method of any one of claims 1 to 11 or the method of claim 20.

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