A control method for a low-voltage ripple charge pump and the low-voltage ripple charge pump

Abstract

This invention relates to the field of integrated circuit technology, and discloses a control method and a low-voltage ripple charge pump. The low-voltage ripple charge pump includes a voltage output terminal, multiple sets of charge pump units connected in parallel, a voltage divider feedback network circuit, multiple comparators, and combinational logic circuits. The output terminals of the multiple charge pump units are all connected to the voltage output terminal. The voltage output terminal is connected to one end of the voltage divider feedback network circuit, and the other end of the voltage divider feedback network circuit is grounded. The voltage divider feedback network circuit is connected to the negative input terminal of the comparators. The positive input terminal of the comparators is connected to a reference voltage, and the output terminal of the comparators is connected to the input terminal of the combinational logic circuit. The output terminal of the combinational logic circuit is connected to the input terminal of the charge pump unit. This invention can achieve low output voltage ripple and shorten settling time.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and in particular to a control method for a low-voltage ripple charge pump and the low-voltage ripple charge pump itself. Background Technology

[0002] Charge pumps utilize switched capacitor networks to achieve DC-DC boost or buck conversion and are widely used in highly integrated applications such as systems-on-chips and miniature sensor nodes. To achieve low output voltage ripple, traditional charge pumps typically use external microfarad or nanofarad level filter capacitors at the output. However, external capacitors increase package size, pin count, and material cost, and hinder further system miniaturization.

[0003] When external capacitors cannot be used, designers must rely on on-chip picofarad capacitors for output energy storage. In this case, the proportion of charge injected into the output node by the charge pump in each switching cycle increases significantly, leading to a larger output voltage step size. When the output voltage approaches the target value, even if the clock stops, residual charge in the pump capacitor continues to transfer to the output node, causing significant overshoot, which in turn triggers oscillation in the voltage regulation loop and amplifies ripple.

[0004] Furthermore, charge pumps with a fixed number of stages or a fixed frequency struggle to balance settling time and ripple suppression during load transients. Increasing the drive capability to shorten the settling time increases the amount of charge injected per cycle, leading to higher ripple; conversely, decreasing the drive capability to reduce ripple lengthens the settling time. Existing technologies fail to simultaneously satisfy the conflicting requirements of eliminating the need for external capacitors, achieving fast settling, and minimizing ripple.

[0005] Therefore, it is urgent to propose a control method and a low-voltage ripple charge pump for the low-voltage ripple charge pump to solve the above problems. Summary of the Invention

[0006] The purpose of this invention is to provide a control method and a low-voltage ripple charge pump, which can achieve low output voltage ripple and shorten settling time.

[0007] To address the aforementioned technical problems, this invention provides a control method for a low-voltage ripple charge pump, specifically comprising the following:

[0008] Multiple feedback voltages are generated based on the output voltage;

[0009] The multiple feedback voltages are compared with the same reference voltage to generate multiple comparison results; and

[0010] Based on the multiple comparison results, the opening and closing of multiple groups of charge pump units with different pump capacitor capacities are controlled; wherein, when the output voltage is lower than a first threshold, all the charge pump units are turned on; when the output voltage is between the first threshold and the second threshold, the group of charge pump units with the largest pump capacitor capacity is turned off; when the output voltage is between the second threshold and the target voltage, the group of charge pump units with the second largest pump capacitor capacity is further turned off, and when the output voltage reaches the target voltage, only the group of charge pump units with the smallest pump capacitor capacity is retained.

[0011] Furthermore, multiple control signals are generated based on the multiple comparison results, and the multiple control signals are logically combined to generate clock control signals for each group of charge pump units, so as to control the opening and closing of the multiple groups of charge pump units respectively.

[0012] Furthermore, the charge pump unit causes the output voltage to rise by an amount ΔV = in each clock cycle. , where V prev These are the initial values ​​before the start of each cycle. The pump capacitance value for each charge pump unit. VDD is the capacitance value of the built-in capacitor, and VDD is the input voltage.

[0013] Furthermore, both the first threshold and the second threshold are less than the target voltage, and the first threshold is less than the second threshold.

[0014] Furthermore, the first threshold is 50% of the target voltage, and the second threshold is 70% of the target voltage.

[0015] In addition, the present invention also provides a low-voltage ripple charge pump, including a voltage output terminal, multiple sets of charge pump units connected in parallel, a voltage divider feedback network circuit, multiple comparators and combinational logic circuits;

[0016] The output terminals of multiple charge pump units are all connected to the voltage output terminal; the voltage output terminal is connected to one end of the voltage divider feedback network circuit, and the other end of the voltage divider feedback network circuit is grounded; the voltage divider feedback network circuit is connected to the negative input terminal of the comparator; the positive input terminal of the comparator is connected to the reference voltage, and the output terminal of the comparator is connected to the input terminal of the combinational logic circuit; the output terminal of the combinational logic circuit is connected to the input terminal of the charge pump unit.

[0017] In the multiple groups of charge pump units, each group of charge pump units has a different pump capacitor capacity, and includes at least a first group of charge pump units with the largest pump capacitor capacity, a second group of charge pump units with the second largest pump capacitor capacity, and a third group of charge pump units with the smallest pump capacitor capacity.

[0018] Furthermore, the voltage divider feedback network circuit includes multiple resistors connected in series; the negative input terminal of the comparator is connected between some adjacent resistors.

[0019] Furthermore, the voltage output terminal is also connected to a built-in capacitor, with the end of the built-in capacitor furthest from the voltage output terminal grounded.

[0020] Furthermore, the built-in capacitor is a pF-level capacitor.

[0021] Furthermore, the pump capacitor capacity of the first group of charge pump units ranges from 17 to 21 pF; the pump capacitor capacity of the second group of charge pump units ranges from 1 to 3 pF; and the pump capacitor capacity of the third group of charge pump units ranges from 200 to 550 pF.

[0022] Through the above technical solution, the present invention has the following beneficial effects:

[0023] By employing multiple charge pump units with different pump capacitor capacities operating in parallel, and combining them with a step-by-step gating strategy implemented using a voltage divider feedback network circuit, comparator, and combinational logic circuit, output voltage ripple can be effectively suppressed without requiring any external capacitors, while also shortening the settling time.

[0024] Furthermore, by setting the first and second thresholds to 50% and 70% of the target voltage, respectively, and by sequentially decreasing the pump capacitor capacity of the three charge pump units, the charge injection amount is gradually reduced. This not only avoids overshoot and oscillation when approaching the target voltage, but also reduces on-chip area and power consumption, thereby achieving a balance between low cost, high integration, and high reliability. Attached Figure Description

[0025] Figure 1 This is a block diagram of a low-voltage ripple charge pump according to an embodiment of the present invention;

[0026] Figure 2 This is a schematic diagram of the structure of the charge pump unit and the voltage divider feedback network circuit in a low-voltage ripple charge pump according to an embodiment of the present invention;

[0027] Figure 3 This is a schematic diagram of the combinational logic circuit in a low-voltage ripple charge pump according to an embodiment of the present invention;

[0028] Figure 4 This is a timing diagram of a control method for a low-voltage ripple charge pump according to an embodiment of the present invention. Detailed Implementation

[0029] Based on the teachings of this specification, those skilled in the art can form new technical solutions through cross-combination of different implementation methods without creating technical contradictions. Such variations should all be considered to fall within the protection scope of this invention.

[0030] The following description, in conjunction with the accompanying drawings, provides a more detailed account of a control method for a low-voltage ripple charge pump and the low-voltage ripple charge pump of the present invention, illustrating preferred embodiments of the invention. It should be understood that those skilled in the art can modify the invention described herein while still achieving its advantageous effects. Therefore, the following description should be understood as being of general knowledge to those skilled in the art and is not intended to limit the invention.

[0031] The invention is described more specifically by way of example in the following paragraphs with reference to the accompanying drawings. The advantages and features of the invention will become clearer from the following description. It should be noted that the drawings are in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the invention.

[0032] like Figures 1-3 As shown, this embodiment of the invention proposes a low-voltage ripple charge pump for applications without external capacitors, including a voltage output terminal VPUMP_OUT, multiple sets of charge pump units connected in parallel, a voltage divider feedback network circuit, multiple comparators, and combinational logic circuits.

[0033] Specifically, the output terminals of multiple charge pump units are all connected to the voltage output terminal VPUMP_OUT; the voltage output terminal VPUMP_OUT is connected to one end of the voltage divider feedback network circuit, and the other end of the voltage divider feedback network circuit is grounded; the voltage divider feedback network circuit is connected to the negative input terminal of the comparator, forming a charge pump output voltage threshold identification module; the positive input terminal of the comparator is connected to the reference voltage VREF, and the output terminal of the comparator is connected to the input terminal of the combinational logic circuit; the output terminal of the combinational logic circuit is connected to the input terminal of the charge pump unit. In the multiple groups of charge pump units, each group has a different pump capacitor capacity, and includes at least a first group of charge pump units PUMP_CORE1 with the largest pump capacitor capacity, a second group of charge pump units PUMP_CORE2 with the second largest pump capacitor capacity, and a third group of charge pump units PUMP_CORE3 with the smallest pump capacitor capacity.

[0034] In this embodiment, the voltage output terminal VPUMP_OUT is also connected to a built-in capacitor C4. The end of the built-in capacitor C4 furthest from the voltage output terminal VPUMP_OUT is grounded, and it is used for short-term energy storage and high-frequency filtering. The capacitance value is between 10pF and 200pF. Those skilled in the art will know that the capacitor type and value can be selected according to the process platform and ripple specifications, and the capacitor settings also include other embodiments besides this one. In this embodiment, the voltage output terminal VPUMP_OUT is only connected to the built-in capacitor C4, and no external external filter capacitor is required.

[0035] Preferably, the voltage divider feedback network circuit is used to generate multiple feedback voltages that vary with the output voltage based on the output voltage of the voltage output terminal VPUMP_OUT; the multiple comparators are used to compare the multiple feedback voltages with the same reference voltage VREF respectively to generate multiple comparison results; the combinational logic circuit generates multiple control signals VSET (i.e., ...) based on the multiple comparison results. Figure 1 and Figure 2 The multiple control signals VSET1, VSET2, and VSET3 are logically combined to generate clock control signals CLK for each group of charge pump units, so as to control the opening and closing of the multiple groups of charge pump units respectively.

[0036] In a specific example, the pump capacitor capacity of the first group of charge pump units PUMP_CORE1 is between 17 and 21 pF; the pump capacitor capacity of the second group of charge pump units PUMP_CORE2 is between 1 and 3 pF; and the pump capacitor capacity of the third group of charge pump units PUMP_CORE3 is between 200 and 550 pF.

[0037] Furthermore, the clock control signal CLK controls the on / off state of multiple groups of charge pump units, such that all charge pump units are turned on when the output voltage is below a first threshold; when the output voltage is between the first and second thresholds, the group of charge pump units with the largest pump capacitor capacity is turned off; when the output voltage is between the second threshold and the target voltage, the group of charge pump units with the second largest pump capacitor capacity is further turned off, and when the output voltage reaches the target voltage, only the group of charge pump units with the smallest pump capacitor capacity remains on. The selection of the three groups of pump capacitor capacities directly corresponds to the turn-off threshold points of the three groups of charge pump units. This type of charge pump with built-in capacitor C4 is generally used under small-size load conditions, where the charge pump unit causes the output voltage to rise by an amount ΔV = ... In the formula, V prev These are the initial values ​​before the start of each cycle. The pump capacitance value for each charge pump unit. Here is the capacitance value of the built-in capacitor C4; VDD is the input voltage. Once the pump capacitor is determined, the rise in output voltage each time is related to the size of the pump capacitor. The larger the pump capacitor, the larger the step size of each pump. When the output voltage finally approaches the target voltage, the output voltage ripple caused by overshoot is larger. Considering the time it takes for the output voltage to build up to the target value, balancing the build-up time and voltage ripple, the pump capacitors (i.e., the first group of charge pump units PUMP_CORE1, the second group of charge pump units PUMP_CORE2, and the third group of charge pump units PUMP_CORE3) are selected as 20pF, 2pF, and 500fF, respectively. The corresponding turn-off threshold points for the three groups of charge pumps are 50%, 70%, and 100%, respectively.

[0038] In this embodiment, the voltage divider feedback network circuit includes multiple resistors connected in series; some adjacent resistors are connected to the negative input terminal of the comparator. Specifically, adjacent resistor nodes are respectively connected to the negative input terminal of the corresponding comparator to form multiple feedback voltages; wherein, the resistance ratio determines the threshold voltage ratio, and the resistance value affects the power consumption of the voltage divider network. The comparator in this embodiment compares the feedback voltage with the reference voltage VREF and outputs a high or low level; the combinational logic circuit performs AND, OR, NOT operations on the comparison result and the clock signal to generate a gated clock. In a specific example, the combinational logic circuit can be implemented using AND gates, OR gates, and inverters from the standard cell library, or it can be implemented using transmission gates and clock gate units, both of which can reduce dynamic power consumption.

[0039] In one embodiment, the clock control signal CLK (i.e. Figure 1 and Figure 2 The clock control signals CLK1, CLK2, and CLK3 in the circuit control the charge pump units in stages for different output voltage ranges. The clock control signals are combined with combinational logic circuits to form the clock control logic. Specifically, when the output voltage is below the first threshold, all charge pump units are turned on to increase the drive current and shorten the setup time. When the output voltage is between the first and second thresholds, the group of charge pump units with the largest pump capacitor capacity is turned off to reduce the amount of charge injected in a single operation. When the output voltage is between the second threshold and the target voltage, the group of charge pump units with the second largest pump capacitor capacity is then turned off. When the output voltage reaches the target voltage, only the group of charge pump units with the smallest pump capacitor capacity continues to operate to suppress overshoot and reduce ripple.

[0040] Preferably, both the first threshold and the second threshold are less than the target voltage, and the first threshold is less than the second threshold.

[0041] In one specific example, the first threshold is 50% of the target voltage. Further, the second threshold is 70% of the target voltage, and the clock control signal, based on a comparison between the output voltage and the threshold, directionally shuts down the first charge pump unit PUMP_CORE1 with the largest pump capacitor capacity and the second charge pump unit PUMP_CORE2 with the second largest pump capacitor capacity. Those skilled in the art will understand that the above threshold ratios can be adjusted according to process, load, and ripple performance requirements, and the threshold settings also include other numerical combinations besides those in this embodiment.

[0042] In this embodiment, the threshold comparison result is ANDed with the clock signal via combinational logic circuitry to generate a gated clock. When the gated clock is high, the corresponding charge pump unit enters the charge transfer stage; when it is low, the switching stops, thereby achieving adaptive control of the charge injection amount. Through threshold-gating mapping, the output voltage rise rate slows down as the voltage approaches the target value, effectively suppressing ripple.

[0043] In one embodiment, each group of charge pump units has a different pump capacitor capacity. The capacity difference can be expressed by the number of unit capacitor units connected in parallel (i.e., Figure 1 The number of capacitors C1, C2, and C3 in the layout can be used to implement this, or it can be achieved through the layout area ratio. In this embodiment, one end of each of capacitors C1, C2, and C3 is connected to the voltage output terminal VPUMP_OUT, and the other end is connected to the clock control signals CLK1, CLK2, and CLK3, respectively.

[0044] Preferably, the multiple parallel-connected charge pump units form an integral charge pump structure PUMP_CORE, and the charge pump structure PUMP_CORE includes a first group of charge pump units PUMP_CORE1, a second group of charge pump units PUMP_CORE2, and a third group of charge pump units PUMP_CORE3; the first group of charge pump units PUMP_CORE1 has the largest pump capacitor capacity (i.e., capacitor C1 is the largest), and the third group of charge pump units PUMP_CORE3 has the smallest pump capacitor capacity (i.e., capacitor C3 is the smallest). Those skilled in the art will understand that the number of groups and the capacity ratio can be selected based on the output current requirements and chip area trade-offs, and the capacity settings also include other combinations besides those in this embodiment.

[0045] In this embodiment, Figure 1 and Figure 2 The clock control signals CLK1, CLK2 and CLK3 control the first charge pump unit PUMP_CORE1, the second charge pump unit PUMP_CORE2 and the third charge pump unit PUMP_CORE3 respectively.

[0046] Furthermore, this embodiment also proposes a control method for a low-voltage ripple charge pump, which controls the low-voltage ripple charge pump as described above, specifically including the following steps:

[0047] S1. Generate multiple feedback voltages based on the output voltage;

[0048] S2. Compare the multiple feedback voltages with the same reference voltage to generate multiple comparison results; and

[0049] S3. Based on the multiple comparison results, control the opening and closing of multiple groups of charge pump units with different pump capacitor capacities; wherein, when the output voltage is lower than a first threshold, all the charge pump units are turned on; when the output voltage is between the first threshold and the second threshold, the group of charge pump units with the largest pump capacitor capacity is turned off; when the output voltage is between the second threshold and the target voltage, the group of charge pump units with the second largest pump capacitor capacity is further turned off, and when the output voltage reaches the target voltage, only the group of charge pump units with the smallest pump capacitor capacity is retained.

[0050] In this embodiment, the purpose is to address the issue that traditional cross-coupled charge pumps rely on external filter capacitors to stabilize the output voltage and achieve low voltage ripple. However, in highly integrated scenarios (such as SOC power management modules and micro sensor nodes), external capacitors increase package size and cost. This embodiment provides a solution when external capacitors cannot be used, thereby reducing output voltage ripple and lowering production costs.

[0051] When there is no external capacitor, the charge pump typically has a built-in pF-level capacitor. The step size of each voltage rise by the charge pump is determined by the clock frequency, the size of the pump capacitor, and the size of the output capacitor. When the output capacitor changes from an external nF or uF-level capacitor to a built-in pF-level capacitor, the step size of the charge pump increases by tens of times. When the target voltage is reached, the clock is turned off, but the charge in the pump capacitor continues to be output, causing the output voltage to continue to rise, resulting in a significant increase in ripple.

[0052] In this embodiment, the cross-coupled charge pumps (i.e., the multiple parallel charge pump units in this embodiment) are divided into three groups, each with a different pump capacitor size (i.e., capacitors C1, C2, and C3 are different sizes). The clock control signal is a combination logic of the original charge pump clock (i.e., clock signal) and the control signal. The output voltage is divided by resistor feedback to generate voltage signals at different levels, which serve as input signals for the three comparators. The comparators have the same reference voltage. Thus, the three output signals of the three comparators can be combined to generate three control signals, which respectively participate in controlling the working state of the three groups of charge pumps.

[0053] To balance charge pump settling time and output voltage ripple, the output voltage flip threshold is set at 50%, 70%, and 100% of the target voltage value. When the voltage is below 50% of the target voltage, all three charge pumps are activated, providing the strongest driving capability. When the voltage is above 50% but below 70% of the target voltage, the charge pump with the largest pump capacitor is deactivated. When the voltage is above 70% but below the target voltage, the charge pump with the larger pump capacitor of the remaining two groups is deactivated. The remaining charge pump with the smallest pump capacitor continues to operate until the target voltage value is reached. If the clock is turned off and the pump capacitor continues to output charge, the increase in output voltage is minimal due to the small pump capacitor size, thus achieving the low output voltage ripple requirement without external capacitors. Since the charge pumps adaptively adjust their operating states based on the output voltage, the settling time is also guaranteed. This method achieves a trade-off between chip area, settling time, and output voltage ripple, ensuring low output voltage ripple and settling time requirements without the use of external capacitors.

[0054] like Figure 4As shown, the low-voltage ripple charge pump in this embodiment employs a multi-stage threshold control strategy to achieve a smooth rise in output voltage and low-ripple output. The horizontal axis represents time (t / s), and the vertical axis represents output voltage (V / v). In the initial stage, when the output voltage is below 50% of the target voltage threshold, all charge pump units (including the first group of charge pump units PUMP_CORE1, the second group of charge pump units PUMP_CORE2, and the third group of charge pump units PUMP_CORE3) operate simultaneously. At this time, the voltage rise rate is the fastest, and the voltage step size is relatively large. When the output voltage exceeds the 50% threshold of the target voltage and enters the second stage, the system shuts down the first group of charge pump units PUMP_CORE1, which has the largest pump capacitor capacity, and only keeps the second group of charge pump units PUMP_CORE2 and the third group of charge pump units PUMP_CORE3 operating. At this time, the voltage rise rate decreases, and the voltage step size also decreases accordingly, which is reflected in the change of slope and the reduction of ripple amplitude in the figure. When the output voltage continues to rise and exceeds the 70% threshold of the target voltage, entering the third stage, the system further shuts down the second charge pump unit PUMP_CORE2 with the second largest pump capacitor, leaving only the third charge pump unit PUMP_CORE3 with the smallest pump capacitor operational. At this point, the voltage rise rate further decreases, the voltage step size is significantly reduced, and the ripple in the figure becomes smoother. Finally, when the output voltage reaches the target voltage value, because only the third charge pump unit PUMP_CORE3 with the smallest pump capacitor remains operational, the charge injection amount is very small each time. Even without an external filter capacitor, the output voltage ripple remains at a low level, as shown in the rightmost part of the figure. This multi-level threshold control strategy achieves an optimal balance between fast settling time and low output ripple by progressively reducing the number of operating charge pump units and their pump capacitor capacities, obtaining a stable output voltage without the need for any external filter capacitors.

[0055] This embodiment employs multiple charge pump units with varying pump capacitor capacities, rather than multiple identical charge pump units connected in parallel. This allows for rapid establishment of the output voltage during startup using all charge pump units (characterized by speed and time savings). Subsequently, based on the output voltage level, larger-capacity charge pump units are sequentially shut down, ultimately keeping only the smallest-capacity charge pump unit operational, achieving precise charge injection control. This configuration not only resolves the inherent trade-off between setup time and ripple suppression in traditional charge pumps without external filter capacitors but also allows for precise adjustment of the charge injection amount according to actual needs. Furthermore, it improves load adaptability, reduces dynamic power consumption, and enhances voltage accuracy. Therefore, the differentiated capacity configuration in this embodiment enables the system to precisely control the total amount of operating pump capacitors based on actual requirements, avoiding excessive charge transfer and waste, thereby reducing dynamic power consumption.

[0056] Therefore, this embodiment can be used in compact packaging or highly integrated applications, eliminating the need for external capacitors and reducing costs. It also effectively reduces output voltage ripple. Furthermore, this embodiment uses three charge pumps with different pump capacitor sizes connected in parallel, employing three comparators and resistor feedback voltage dividers to generate three signals. These three signals are combined using logic to generate control signals that regulate the charge pump's operating state. The number of charge pumps activated is adjusted based on the output voltage, thereby reducing output voltage ripple and meeting balance settling time requirements. As can be seen, the circuit of this embodiment is simple, reliable, and easy to implement. Whether adding two comparators or dividing the charge pumps into three groups, the modules can be reused, and the control signals are implemented using simple combinational logic circuits, with minimal impact under PVT conditions. Therefore, this circuit has good reliability and practicality.

[0057] In summary, the control method and low-voltage ripple charge pump proposed in this invention have the following advantages:

[0058] By employing multiple charge pump units with different pump capacitor capacities operating in parallel, and combining them with a step-by-step gating strategy implemented using a voltage divider feedback network circuit, comparator, and combinational logic circuit, output voltage ripple can be effectively suppressed without requiring any external capacitors, while also shortening the settling time.

[0059] Furthermore, by setting the first and second thresholds to 50% and 70% of the target voltage, respectively, and by sequentially decreasing the pump capacitor capacity of the three charge pump units, the charge injection amount is gradually reduced. This not only avoids overshoot and oscillation when approaching the target voltage, but also reduces on-chip area and power consumption, thereby achieving a balance between low cost, high integration, and high reliability.

[0060] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A control method for a low-voltage ripple charge pump, characterized in that, The low-voltage ripple charge pump includes multiple sets of charge pump units with different pump capacitor capacities, and the method specifically includes the following: Multiple feedback voltages are generated based on the output voltage; The multiple feedback voltages are compared with the same reference voltage to generate multiple comparison results; and The multiple comparison results are used to control the opening and closing of multiple groups of charge pump units with different pump capacitor capacities; wherein, when the output voltage is lower than a first threshold, all charge pump units are turned on; when the output voltage is between the first threshold and a second threshold, the group of charge pump units with the largest pump capacitor capacity is turned off; when the output voltage is between the second threshold and a target voltage, the group of charge pump units with the second largest pump capacitor capacity is further turned off, and when the output voltage reaches the target voltage, only the group of charge pump units with the smallest pump capacitor capacity is retained; The charge pump unit causes the output voltage to rise by an amount DV = during each clock cycle. , where V prev These are the initial values ​​before the start of each cycle. The pump capacitance value for each charge pump unit. VDD is the capacitance value of the built-in capacitor, and VDD is the input voltage.

2. The control method for a low-voltage ripple charge pump as described in claim 1, characterized in that, Multiple control signals are generated based on the multiple comparison results, and the multiple control signals are logically combined to generate clock control signals for each group of charge pump units, so as to control the opening and closing of the multiple groups of charge pump units respectively.

3. The control method for a low-voltage ripple charge pump as described in claim 1, characterized in that, Both the first threshold and the second threshold are less than the target voltage, and the first threshold is less than the second threshold.

4. The control method for a low-voltage ripple charge pump as described in claim 1, characterized in that, The first threshold is 50% of the target voltage, and the second threshold is 70% of the target voltage.

5. A low-voltage ripple charge pump, implementing the control method for the low-voltage ripple charge pump as described in claim 1, characterized in that, It includes a voltage output terminal, multiple parallel-connected charge pump units, a voltage divider feedback network circuit, multiple comparators, and combinational logic circuits; The output terminals of multiple charge pump units are all connected to the voltage output terminal; the voltage output terminal is connected to one end of the voltage divider feedback network circuit, and the other end of the voltage divider feedback network circuit is grounded; the voltage divider feedback network circuit is connected to the negative input terminal of the comparator; the positive input terminal of the comparator is connected to the reference voltage, and the output terminal of the comparator is connected to the input terminal of the combinational logic circuit; the output terminal of the combinational logic circuit is connected to the input terminal of the charge pump unit. In the multiple groups of charge pump units, each group of charge pump units has a different pump capacitor capacity, and includes at least a first group of charge pump units with the largest pump capacitor capacity, a second group of charge pump units with the second largest pump capacitor capacity, and a third group of charge pump units with the smallest pump capacitor capacity.

6. The low-voltage ripple charge pump as described in claim 5, characterized in that, The voltage divider feedback network circuit includes multiple resistors connected in series; the negative input terminal of the comparator is connected between some adjacent resistors.

7. The low-voltage ripple charge pump as described in claim 5, characterized in that, The voltage output terminal is also connected to a built-in capacitor, and the end of the built-in capacitor furthest from the voltage output terminal is grounded.

8. The low-voltage ripple charge pump as described in claim 7, characterized in that, The built-in capacitor is a pF level capacitor.

9. The low-voltage ripple charge pump as described in claim 5, characterized in that, The pump capacitor capacity of the first group of charge pump units ranges from 17 to 21 pF; the pump capacitor capacity of the second group of charge pump units ranges from 1 to 3 pF; and the pump capacitor capacity of the third group of charge pump units ranges from 200 to 550 pF.

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