Method for processing one-dimensional high-precision V-shaped groove by using semiconductor technology
By combining semiconductor processes with plasma and wet etching technology, the problem of decreased V-groove accuracy in optical fiber arrays caused by mechanical cutting methods was solved, and the processing of high-precision optical fiber arrays was achieved, meeting the needs of highly integrated and low-loss optical fiber arrays.
Patent Information
- Application Number
- CN202510890667.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-30
- Publication Date
- 2025-09-30
AI Technical Summary
In the existing technology, when processing V-grooves in optical fiber arrays by mechanical cutting, the blade wears severely, resulting in reduced precision and accumulated errors. The V-grooves are also prone to cracking, making it difficult to achieve the high-precision and high-integration requirements of optical fiber arrays.
Using semiconductor technology, plasma dielectric etching and plasma deep silicon etching combined with wet etching methods are used to process first and second grooves of different depths on the silicon wafer. The groove depth difference is controlled at the submicron or nanometer level using the precision of the photolithography process, and finally the depth is further adjusted by wet etching.
High-precision processing of V-grooves in optical fiber arrays is achieved, with a groove spacing error of less than ±0.5μm and an angle error of less than ±0.5°, meeting the requirements of highly integrated and low-loss optical fiber arrays while reducing processing costs.
Smart Images
Figure CN120722508A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of optical communication technology, in particular to a method for machining a one-dimensional high-precision V-groove using a semiconductor process. Background Art
[0002] Fiber arrays, due to their high precision, high-density integration, and strong anti-interference capabilities, have become a key component in the optical communications industry, particularly in wavelength division multiplexing systems and fiber coupling and splitting systems. With the development of technologies such as 5G communications and silicon photonics, the demand for highly integrated, high-precision, and low-loss fiber arrays has increased dramatically, placing even higher demands on the precision of the V-grooves in fiber arrays.
[0003] The V-grooves in a fiber array typically consist of a first and second interconnected groove body. The first groove body consists of several parallel, spaced, shallow grooves, while the second groove body is a wider groove at one end that is deeper than the first. A ribbon of optical fibers (typically 10 to 30) is inserted into the first groove body after its polymer cladding is removed from its front end. The rear end of the ribbon, with its polymer cladding, is then inserted into the second groove body. A glass cover is placed over the V-grooves to form the fiber array module. Currently, the primary method for producing these V-grooves is mechanical cutting. However, the blades are susceptible to wear during this process, resulting in reduced precision, cumulative errors, and cracking of the resulting V-grooves. Summary of the Invention
[0004] The technical problem to be solved by the present invention is to provide a method for machining one-dimensional high-precision V-grooves using semiconductor technology in response to the current status of the above-mentioned existing technology. The method can machine V-grooves with different depths on the same plane.
[0005] The technical solution adopted by the present invention to solve the above technical problems is: a method for machining a one-dimensional high-precision V-groove using a semiconductor process, comprising the following steps:
[0006] Step 1: Generate a silicon oxide protective layer on the upper surface of the silicon wafer;
[0007] Step 2: Apply photoresist on the upper surface of the silicon oxide protective layer to obtain a V-groove first intermediate;
[0008] Step 3: placing a pre-designed first mask directly above the V-groove first intermediate and sequentially exposing and developing the photoresist on the V-groove first intermediate, thereby transferring the pattern on the first mask to the photoresist to obtain a V-groove second intermediate; wherein the pattern on the first mask includes the shapes of the first groove body and the second groove body;
[0009] Step 4: Etching the V-groove second intermediate body with a plasma dielectric etcher, transferring the first mask pattern to the silicon oxide protective layer and removing the photoresist on the silicon oxide protective layer to obtain a V-groove third intermediate body; at this time, the first groove body and the second groove body are arranged on the silicon oxide protective layer of the V-groove third intermediate body, and the depths of the first groove body and the second groove body are the same and equal to the thickness of the silicon oxide protective layer;
[0010] Step 5: Apply photoresist on the upper surface of the V-groove third intermediate to obtain a V-groove fourth intermediate;
[0011] Step 6: placing a pre-designed second mask directly above the photoresist of the V-groove fourth intermediate, and sequentially exposing and developing the photoresist on the V-groove fourth intermediate, thereby transferring the pattern on the second mask to the photoresist to obtain a V-groove fifth intermediate; wherein the pattern on the second mask only includes the shape of the second groove body;
[0012] Step 7: Etch the V-groove fifth intermediate using a plasma deep silicon etcher, and transfer the pattern on the second mask to the silicon wafer to obtain a V-groove sixth intermediate. At this time, the second groove body is deepened onto the silicon wafer. The depth difference between the first groove body and the second groove body is the depth of the plasma deep silicon etcher. During processing, the depth difference between the first groove body and the second groove body can be precisely controlled by controlling the depth of the plasma deep silicon etcher.
[0013] Step 8: removing the photoresist on the upper surface of the V-groove sixth intermediate to obtain a V-groove seventh intermediate;
[0014] Step 9: wet-etching the seventh V-groove intermediate to obtain an eighth V-groove intermediate; the depth difference between the first groove body and the second groove body produced in step 7 is maintained during the wet etching process in step 9;
[0015] Step 10: Place the V-groove eighth intermediate into a buffered oxide etching solution to remove the silicon oxide protective layer on its surface, thereby obtaining a one-dimensional high-precision V-groove.
[0016] Preferably, in step 1, the thickness of the silicon oxide protective layer is 3 μm.
[0017] Preferably, the silicon oxide protective layer is processed by a chemical vapor deposition process or an oxidation furnace high temperature oxidation process.
[0018] Preferably, in step 2 and step 5, the photoresist is a positive photoresist or a negative photoresist.
[0019] Preferably, the photoresist is AZ4620, and the thickness of the photoresist is 10 μm.
[0020] Preferably, in step 9, the wet etching process conditions are as follows: the V-groove seventh intermediate is immersed in a KOH solution at a temperature of 70-90°C and a concentration of 25-35% for a predetermined time to obtain the V-groove eighth intermediate. The V-groove seventh intermediate adopts the above-mentioned scheme. After the first and second groove bodies are shaped and differentiated to different depths, a more cost-effective wet etching method is used to further increase the depth of the first and second groove bodies. The depth of the first and second groove bodies is controlled by the immersion time of the V-groove seventh intermediate.
[0021] Preferably, in step 9, the process conditions of the wet etching are: soaking the V-groove seventh intermediate in a KOH solution at 80° C. and 30% concentration for the preset time to obtain the V-groove eighth intermediate.
[0022] Preferably, in step 5 and step 8, the photoresist is removed by using an acetone or N-methylpyrrolidone cleaning process.
[0023] Preferably, the first groove body includes a plurality of strip grooves arranged at intervals and parallel to each other, and the strip grooves are used to place the exposed section of the optical fiber after removing the polymer cladding; the second groove body is arranged at one end of the first groove body and is connected to the plurality of strip grooves in the first groove body, and the second groove body is used to place the complete section of the optical fiber with the polymer cladding.
[0024] Compared with the prior art, the advantages of the present invention are as follows: in order to accommodate the first and second groove bodies of different depths on the V-groove, the present invention first uses a plasma dielectric etcher to machine the first and second groove bodies on the silicon oxide protective layer, and further uses a plasma deep silicon etcher to deepen the depth of the second groove body separately on the silicon wafer, at which point the depth of the second groove body is already greater than that of the first groove body; finally, wet etching is used to simultaneously deepen the depths of the first and second groove bodies on the silicon wafer. The processing steps are reasonably arranged, and the photolithography process accuracy is at the submicron or nanometer level. Therefore, the V-grooves machined by this method can achieve a spacing error of less than ±0.5 μm and an angle error of less than ±0.5°.
[0025] The present invention combines plasma etching and wet etching, wherein the plasma etching is used to control the depth difference between the first groove body and the second groove body, and the wet etching is used to reduce the processing cost. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] Figure 1 A side view of the first intermediate body of the V-groove in an embodiment of the present invention;
[0027] Figure 2 This is a structural schematic diagram of an embodiment of the present invention in which the first mask is placed directly above the first intermediate body of the V-groove;
[0028] Figure 3This is a schematic structural diagram of the second intermediate body of the V-groove in an embodiment of the present invention;
[0029] Figure 4 This is a schematic structural diagram of the third intermediate body of the V-groove in an embodiment of the present invention;
[0030] Figure 5 This is a cross-sectional view of the fourth intermediate body of the V-shaped groove near the first groove body in an embodiment of the present invention;
[0031] Figure 6 This is a cross-sectional view of the fourth intermediate body of the V-shaped groove near the second groove body in an embodiment of the present invention;
[0032] Figure 7 This is a structural schematic diagram of an embodiment of the present invention in which the second mask is placed directly above the fourth intermediate body of the V-groove;
[0033] Figure 8 This is a schematic structural diagram of the fifth intermediate body of the V-groove in an embodiment of the present invention;
[0034] Figure 9 This is a schematic structural diagram of the sixth intermediate body of the V-groove in an embodiment of the present invention;
[0035] Figure 10 This is a schematic structural diagram of the seventh intermediate body of the V-groove in an embodiment of the present invention;
[0036] Figure 11 Schematic diagram of the structure of a one-dimensional high-precision V-groove in an embodiment of the present invention. DETAILED DESCRIPTION
[0037] The present invention will be described in further detail below with reference to the accompanying drawings and embodiments.
[0038] like Figures 1 to 11 As shown, the present invention discloses a method for processing a one-dimensional high-precision V-shaped groove using a semiconductor process. Figure 11 As shown, the one-dimensional high-precision V-groove comprises a first groove body 100 and a second groove body 200, both disposed on the top surface of a silicon wafer 1. The depth of the first groove body 100 is less than that of the second groove body 200. The first groove body 100 comprises a plurality of parallel, spaced strip grooves, which are used to accommodate the exposed segments of optical fibers after the polymer cladding is removed. The second groove body 200 is disposed at one end of the first groove body 100 and communicates with the plurality of strip grooves within the first groove body 100. The second groove body 200 is used to accommodate the intact segments of optical fibers with polymer cladding. Properly controlling the depth difference between the first groove body 100 and the second groove body 200 helps prevent excessive upward warping of the optical fibers during assembly of the optical fiber array. Furthermore, the double-shoulder design of the second groove body 200 effectively prevents fiber breakage caused by left-right swinging of the optical fibers.
[0039] The method for machining a one-dimensional high-precision V-groove using a semiconductor process comprises the following steps:
[0040] Step 1: growing a 3 μm thick silicon oxide protective layer 2 on the upper surface of the silicon wafer 1. The silicon oxide protective layer 2 is processed by a chemical vapor deposition process (PECVD) or an oxidation furnace high temperature oxidation process;
[0041] Step 2: A layer of AZ4620 photoresist 3 with a thickness of 10 μm is coated on the upper surface of the silicon oxide protective layer 2 to obtain a V-groove first intermediate. The structure of the V-groove first intermediate is as follows: Figure 1 As shown;
[0042] Step 3: Place the designed first mask 4 directly above the first intermediate body of the V-groove (see Figure 2 ); and the V-groove first intermediate photoresist 3 is exposed, and then developed to transfer the pattern on the first mask 4 to the photoresist 3 to obtain a V-groove second intermediate, such as Figure 3 As shown; wherein the pattern on the first mask 4 includes the shape of the first slot 100 and the second slot 200;
[0043] Step 4: Etch the V-groove second intermediate with a plasma dielectric etcher to transfer the pattern of the first mask 4 to the silicon oxide protective layer 2, and then use acetone or N-methylpyrrolidone (NMP) cleaning process to remove the photoresist 3 to obtain a V-groove third intermediate, such as Figure 4 As shown; at this time, the first trough body 100 and the second trough body 200 are arranged on the silicon oxide protective layer of the third intermediate body of the V-shaped groove; the depth of the first trough body 100 and the second trough body 200 is the same and the depth is consistent with the thickness of the silicon oxide protective layer;
[0044] Step 5: Apply photoresist 3 on the upper surface of the V-groove third intermediate to obtain a V-groove fourth intermediate. The structure of the V-groove fourth intermediate is as follows: Figure 5 、 6 As shown, Figure 5 is a cross-sectional view of the first tank body 100, Figure 6 is a cross-sectional view of the second tank body 200;
[0045] Step 6: Place the designed second mask 5 directly above the fourth intermediate of the V-groove (see Figure 7 ), and the photoresist 3 on the V-groove fourth intermediate is exposed, and then the pattern on the second mask 5 is transferred to the photoresist 3 to obtain the V-groove fifth intermediate, such as Figure 8 As shown; wherein the pattern on the second mask 5 only includes the shape of the second slot 200;
[0046] Step 7: Use a plasma deep silicon etcher to etch the V-groove fifth intermediate, and transfer the pattern on the second mask 5 to the silicon wafer 1 to obtain the V-groove sixth intermediate, as shown in FIG. Figure 9 As shown, the sixth intermediate body of the V-shaped groove has a second groove body 200; at this time, the second groove body 200 is deepened onto the silicon wafer. The depth difference between the first groove body 100 and the second groove body 200 is the etching depth of the plasma deep silicon etcher. During processing, the depth difference between the first groove body 100 and the second groove body 200 can be precisely controlled by controlling the etching depth of the plasma deep silicon etcher. As needed, the deep silicon etching depth is controlled within the range of 70 microns to half the thickness of the silicon wafer.
[0047] Step 8: Use acetone or N-methylpyrrolidone (NMP) cleaning process to remove the photoresist 3 on the upper surface of the V-groove sixth intermediate to obtain the V-groove seventh intermediate. The structure of the V-groove seventh intermediate is as follows: Figure 10 As shown;
[0048] Step 9: Soaking the seventh V-groove intermediate in a 30% KOH solution at 80° C. for 1 hour to obtain an eighth V-groove intermediate; the soaking time determines the depth of the first groove body 100 and the second groove body 200; the depth difference between the first groove body and the second groove body produced in step 7 is maintained during the wet etching process in step 9;
[0049] Step 10: Place the eighth intermediate of the V-shaped groove into a buffered oxide etching solution to remove the silicon oxide protective layer 2 on the surface to obtain a one-dimensional high-precision V-shaped groove. Figure 11 shown.
[0050] Compared with the existing technology, the advantages of the present invention are as follows: To accommodate the different depths of the first and second groove bodies 100, 200 on the V-groove, the present invention first uses a plasma dielectric etcher to machine the first and second groove bodies 100, 200 on the silicon oxide protective layer 2. A plasma deep silicon etcher is then used to deepen the depth of the second groove body 200 on the silicon wafer 1, at which point the depth of the second groove body 200 is greater than that of the first groove body 100. Finally, wet etching is used to simultaneously deepen the depths of the first and second groove bodies 100, 200 on the silicon wafer 1. The present invention utilizes a semiconductor process to machine one-dimensional high-precision V-grooves with a rationally arranged processing step arrangement. The resulting V-grooves can achieve a spacing error of less than ±0.5μm and an angle error of less than ±0.5°. Furthermore, the addition of a wet etching process significantly reduces the processing cost of the method. While the spacing error of V-grooves produced by conventional mechanical cutting processes is greater than 1μm, the spacing error of products produced by this method is less than 0.5μm, meeting market demand for high-precision V-grooves.
Claims
1. A method for machining a one-dimensional high-precision V-groove using a semiconductor process, characterized in that: The steps include: Step 1: forming a silicon oxide protective layer (2) on the upper surface of a silicon wafer (1); Step 2: coating a photoresist (3) on the upper surface of the silicon oxide protective layer (2) to obtain a V-groove first intermediate; Step 3: placing a pre-designed first mask (4) directly above the V-groove first intermediate and sequentially exposing and developing the photoresist (3) on the V-groove first intermediate, thereby transferring the pattern on the first mask (4) to the photoresist (3) to obtain a V-groove second intermediate; wherein the pattern on the first mask (4) includes the shapes of the first groove body (100) and the second groove body (200); Step 4: etching the V-groove second intermediate using a plasma dielectric etcher, transferring the pattern of the first mask (4) onto the silicon oxide protective layer (2) and removing the photoresist (3) on the silicon oxide protective layer (2), thereby obtaining a V-groove third intermediate; Step 5: coating the upper surface of the V-groove third intermediate with a photoresist (3) to obtain a V-groove fourth intermediate; Step 6: placing a pre-designed second mask (5) directly above the photoresist (3) of the V-groove fourth intermediate, and sequentially exposing and developing the photoresist (3) on the V-groove fourth intermediate, thereby transferring the pattern on the second mask (5) to the photoresist (3), and obtaining a V-groove fifth intermediate; wherein the pattern on the second mask (5) only includes the shape of the second groove body (200); Step 7: Etching the V-groove fifth intermediate using a plasma deep silicon etcher, transferring the pattern on the second mask (5) to the silicon wafer (1), to obtain a V-groove sixth intermediate; Step 8: removing the photoresist (3) on the upper surface of the V-groove sixth intermediate to obtain a V-groove seventh intermediate; Step 9: wet-etching the seventh V-groove intermediate to obtain an eighth V-groove intermediate; Step 10: Place the eighth V-groove intermediate into a buffered oxide etching solution to remove the silicon oxide protective layer (2) on its surface, thereby obtaining a one-dimensional high-precision V-groove.
2. The method for machining a one-dimensional high-precision V-groove using a semiconductor process according to claim 1, wherein: In step 1, the thickness of the silicon oxide protective layer (2) is 3 μm.
3. The method for machining a one-dimensional high-precision V-groove using a semiconductor process according to claim 1, wherein: The silicon oxide protective layer (2) is processed by a chemical vapor deposition process or an oxidation furnace high-temperature oxidation process.
4. The method for machining a one-dimensional high-precision V-groove using a semiconductor process according to claim 1, wherein: In step 2 and step 5, the photoresist (3) is a positive photoresist or a negative photoresist.
5. The method for machining a one-dimensional high-precision V-groove using a semiconductor process according to claim 4, wherein: The photoresist (3) is AZ4620, and the thickness of the photoresist (3) is 10 μm.
6. The method for machining a one-dimensional high-precision V-groove using a semiconductor process according to claim 1, wherein: In step 9, the wet etching process conditions are as follows: the V-groove seventh intermediate is immersed in a KOH solution at 70-90° C. and 25-35% concentration for a preset time to obtain a V-groove eighth intermediate.
7. The method for machining a one-dimensional high-precision V-groove using a semiconductor process according to claim 6, wherein: In step 9, the wet etching process conditions are as follows: the V-groove seventh intermediate is immersed in a KOH solution at 80° C. and 30% concentration for the preset time to obtain the V-groove eighth intermediate.
8. The method for machining a one-dimensional high-precision V-groove using a semiconductor process according to claim 1, wherein: In step 5 and step 8, the photoresist (3) is removed by using an acetone or N-methylpyrrolidone cleaning process.
9. The method for machining a one-dimensional high-precision V-groove using a semiconductor process according to any one of claims 1 to 8, wherein: The first groove body (100) comprises a plurality of strip grooves arranged at intervals and parallel to each other, wherein the strip grooves are used to place the exposed sections of the optical fiber after the polymer cladding is removed; The second groove body (200) is arranged at one end of the first groove body (100) and is connected to a plurality of strip grooves in the first groove body (100). The second groove body (200) is used to place a complete section of an optical fiber with a polymer cladding.