A low power reference current source integrated circuit

Abstract

This invention proposes a low-power reference current source integrated circuit. It generates two currents, one directly proportional to absolute temperature and the other inversely proportional, through cascaded MOSFETs operating in the weak inversion region. These currents are then superimposed to generate a temperature-independent reference current. The invention includes a proportional current circuit and a reference output circuit. The proportional current circuit generates a current Ipt proportional to absolute temperature under stable bias current conditions and outputs it to the reference output circuit. The reference output circuit generates a current Ict inversely proportional to absolute temperature and combines the two currents to generate a temperature-independent reference current Iref. The circuit structure of this invention is simple, and the main MOSFETs in the circuit have extremely low operating voltage requirements, exhibiting excellent energy efficiency.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and more specifically, to a low-power reference current source integrated circuit. Background Technology

[0002] In high-endurance portable electronic devices, power consumption of the circuit system is typically subject to strict limitations, usually requiring a reference source circuit that can operate normally at a supply voltage below 1V. Bandgap reference source circuits, due to their reliance on transistors, have high supply voltage requirements, making them unsuitable for low-power circuit systems. Furthermore, currently common MOSFET-based reference source circuits require a supply voltage greater than 1.5V to generate currents with opposite temperature characteristics. Therefore, it is necessary to research low-power reference source circuits with extremely low supply voltage requirements to meet the needs of high-endurance portable electronic devices. Summary of the Invention

[0003] The problem addressed by this invention is to propose a low-power reference current source integrated circuit. This circuit generates two currents—one directly proportional to and one inversely proportional to absolute temperature—using cascaded MOSFETs operating in the weak inversion region, and then superimposes these currents to generate a reference current unaffected by temperature. The circuit structure of this invention is simple, and the main MOSFETs in the circuit have extremely low operating voltage requirements, exhibiting excellent energy efficiency.

[0004] To address the aforementioned problems, the present invention provides a low-power reference current source integrated circuit comprising a proportional current circuit and a reference output circuit.

[0005] A proportional current circuit is connected to a reference output circuit. The proportional current circuit, via a port connection, outputs a current Ipt that is proportional to the absolute temperature to the reference output circuit. The reference output circuit generates a current Ict that is inversely proportional to the absolute temperature. It then combines the inversely proportional current Ict and the directly proportional current Ipt to generate a temperature-independent reference current Iref. The reference output circuit outputs the reference current via a port and maintains the stability of the reference current through a third-order negative feedback loop.

[0006] The proportional current circuit includes the port IPTA.

[0007] The reference output circuit includes ports IATT and IREF.

[0008] Port IPTA connects to port IATT and is used to transmit the current Ipt, which is inversely proportional to absolute temperature. Port IREF is used to transmit the reference current Iref.

[0009] A proportional current circuit includes a stable bias circuit and a current generation circuit.

[0010] The stabilizing bias circuit is connected to the current generating circuit. The stabilizing bias circuit generates a bias current Ibs that is unaffected by power supply fluctuations and transmits it to the current generating circuit. The current generating circuit generates a current Ipt that is proportional to the absolute temperature and outputs it.

[0011] The reference output circuit includes an inverse current circuit and a feedback merging circuit.

[0012] The inverse current circuit is connected to the feedback combining circuit. The inverse current circuit generates a current Ict that is inversely proportional to the absolute temperature and transmits it to the feedback combining circuit. The feedback combining circuit receives a current Ipt that is directly proportional to the absolute temperature through a port and combines the current Ict (which is inversely proportional to the absolute temperature) with the current Ipt to generate a temperature-independent reference current Iref. The feedback combining circuit contains a third-order negative feedback loop to maintain the stability of the system output reference current Iref.

[0013] Compared with existing technologies, the beneficial effects of this invention are as follows: This invention proposes a low-power reference current source integrated circuit, which generates two currents—one proportional to and one inversely proportional to absolute temperature—through cascaded MOS transistors operating in the weak inversion region, and generates a temperature-independent reference current by superimposing these currents. This invention includes a proportional current circuit and a reference output circuit. The proportional current circuit generates a current Ipt proportional to absolute temperature under stable bias current conditions and outputs it to the reference output circuit. The reference output circuit generates a current Ict inversely proportional to absolute temperature and combines the inversely proportional current Ict and the proportionally proportional current Ipt to generate a temperature-independent reference current Iref. The reference current is kept stable through a third-order negative feedback loop. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of the system structure of the present invention;

[0015] Figure 2 This is a schematic diagram of the proportional current circuit of the present invention.

[0016] Figure 3 This is a schematic diagram of the reference output circuit of the present invention.

[0017] Explanation of reference numerals in the attached figures:

[0018] 1-Proportional current circuit; 2-Reference output circuit; 11-Stable bias circuit; 12-Current generation circuit; 21-Inverse current circuit; 22-Feedback merging circuit. Detailed Implementation

[0019] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0020] like Figure 1 As shown, a low-power reference current source integrated circuit includes a proportional current circuit 1 and a reference output circuit 2.

[0021] A proportional current circuit is connected to reference output circuit 2. Proportional current circuit 1 is connected via a port and outputs a current Ipt proportional to the absolute temperature to reference output circuit 2. Reference output circuit 2 generates a current Ict inversely proportional to the absolute temperature and combines the inversely proportional current Ict and the directly proportional current Ipt to generate a temperature-independent reference current Iref. Reference output circuit 2 outputs the reference current via a port and maintains the stability of the reference current through a third-order negative feedback loop.

[0022] The proportional current circuit 1 includes port IPTA. The reference output circuit 2 includes ports IATT and IREF. Port IPTA is connected to port IATT and is used to transmit a current Ipt that is inversely proportional to the absolute temperature. Port IREF is used to transmit the reference current Iref.

[0023] like Figure 1 As shown, the proportional current circuit 1 includes a stable bias circuit 11 and a current generation circuit 12.

[0024] The stabilizing bias circuit 11 is connected to the current generating circuit 12. The stabilizing bias circuit 11 generates a bias current Ibs that is unaffected by power supply fluctuations and transmits it to the current generating circuit 12. The current generating circuit 12 generates a current Ipt that is proportional to the absolute temperature and outputs it.

[0025] like Figure 1 As shown, the reference output circuit 2 includes an inverse current circuit 21 and a feedback merging circuit 22.

[0026] The inverse current circuit 21 is connected to the feedback combining circuit 22. The inverse current circuit 21 generates a current Ict that is inversely proportional to the absolute temperature and transmits it to the feedback combining circuit 22. The feedback combining circuit 22 receives a current Ipt that is directly proportional to the absolute temperature through a port and combines the current Ict (which is inversely proportional to the absolute temperature) with the current Ipt to generate a reference current Iref that is unaffected by temperature. The feedback combining circuit 22 includes a third-order negative feedback loop to maintain the stability of the system output reference current Iref.

[0027] like Figure 2 As shown, the stable bias circuit 11 includes an anti-interference circuit 111 and a bias current circuit 112.

[0028] The anti-interference circuit 111 is connected to the bias current circuit 112. When the power supply voltage drops, the anti-interference circuit 111 maintains the normal operating voltage of the relevant MOSFET by charging and discharging the gate-source parasitic capacitance of the relevant MOSFET. The bias current circuit 112 generates a bias current Ibs based on a self-biasing structure and outputs it to the current generation circuit 12.

[0029] The anti-interference circuit 111 includes MOSFETs M2, M3, and M4.

[0030] The drain of MOSFET M2 is connected to the drain of MOSFET M1, the gate of MOSFET M2 is connected to the gate of MOSFET M5, and the source of MOSFET M2 is grounded. The drain of MOSFET M3 is connected to the gate of MOSFET M1, the gate of MOSFET M3 is connected to the drain of MOSFET M3, and the source of MOSFET M3 is connected to the gate of MOSFET M2. The source of MOSFET M4 is connected to the power supply VDD, the gate of MOSFET M4 is connected to the drain of MOSFET M3, and the drain of MOSFET M4 is connected to the drain of MOSFET M5.

[0031] MOSFETs M2, M3, and M4 are connected to form an anti-interference path. When the power supply voltage VDD drops, the gate-source parasitic capacitance of MOSFET M4 charges, while the gate-source parasitic capacitance of MOSFET M2 discharges based on the connection structure of MOSFET M3, in order to maintain the normal operation of the related circuit structures of MOSFETs M1, M2, M4, and M5.

[0032] The bias current circuit 112 includes MOSFETs M1, M2, M4, M5, and M6.

[0033] The source of MOSFET M1 is connected to the source of MOSFET M4, the gate of MOSFET M1 is connected to the gate of MOSFET M4, and the drain of MOSFET M1 is connected to the drain of MOSFET M2. The drain of MOSFET M2 is connected to the drain of MOSFET M1, the gate of MOSFET M2 is connected to the gate of MOSFET M5, and the source of MOSFET M2 is grounded. The source of MOSFET M4 is connected to the power supply VDD, the gate of MOSFET M4 is connected to the drain of MOSFET M4, and the drain of MOSFET M4 is connected to the drain of MOSFET M5. The drain of MOSFET M5 is connected to the gate of MOSFET M4, the gate of MOSFET M5 is connected to the drain of MOSFET M2, and the source of MOSFET M5 is connected to the drain of MOSFET M6. The drain of MOSFET M6 is connected to the source of MOSFET M5, the gate of MOSFET M6 is connected to the drain of MOSFET M6, and the source of MOSFET M6 is grounded.

[0034] The circuit connections of MOSFETs M1, M2, M4, and M5 have self-biasing capabilities and all operate in the strong inversion region. The sum of the absolute values ​​of the threshold voltages of MOSFETs M4, M3, and M2 should be less than the power supply voltage, i.e., Vth4 + Vth3 + Vth2 < VDD, to ensure that the stable bias current circuit 112 has a faster settling time when the power supply voltage fluctuates, thereby ensuring the stable operation of the stable bias circuit 11 system. The sum of the gate-source voltages of MOSFETs M4, M3, and M2 should be greater than the power supply voltage, i.e., Vgs4 + Vgs3 + Vgs2 > VDD, to ensure that MOSFET M3 is turned off after MOSFETs M1, M2, M4, and M5 enter the normal operating region, reducing quiescent current consumption and lowering system power consumption. The bias current circuit 112 outputs the current in the branch containing the drain and source of MOSFET M5 as the bias current Ibs, as shown in the following expression.

[0035] ;

[0036] In the formula, Vt is the thermal voltage, W5 is the channel width of MOSFET M5, L4 is the channel length of MOSFET M4, Rs6 is the on-resistance of MOSFET M6, L5 is the channel length of MOSFET M5, W4 is the channel width of MOSFET M4, W2 is the channel width of MOSFET M2, W1 is the channel width of MOSFET M1, L1 is the channel length of MOSFET M1, and L2 is the channel length of MOSFET M2. As can be seen from the formula, under normal operating conditions, the bias current Ibs is not affected by the power supply voltage VDD.

[0037] like Figure 2 As shown, the current generation circuit 12 includes a proportional voltage circuit 121 and a feedback current circuit 122.

[0038] A proportional voltage circuit 121 is connected to a feedback current circuit 122. The proportional voltage circuit 121 generates a voltage Vpt proportional to the absolute temperature and transmits it to the feedback current circuit 122. The feedback current circuit 122, based on a feedback structure, converts the voltage Vpt proportional to the absolute temperature into a current Ipt proportional to the absolute temperature and outputs it through a port.

[0039] The proportional voltage circuit 121 includes MOSFETs M7, M8, M9, M11, and M12.

[0040] The source of MOSFET M7 is connected to the power supply VDD, the gate of MOSFET M7 is connected to the gate of MOSFET M4, and the drain of MOSFET M7 is connected to the drain of MOSFET M8. The drain of MOSFET M8 is connected to the drain of MOSFET M7, the gate of MOSFET M8 is connected to the drain of MOSFET M8, and the source of MOSFET M8 is connected to the drain of MOSFET M9. The drain of MOSFET M9 is connected to the source of MOSFET M8, the gate of MOSFET M9 is connected to the gate of MOSFET M8, and the source of MOSFET M9 is grounded. The drain of MOSFET M11 is connected to the drain of MOSFET M10, the gate of MOSFET M11 is connected to the drain of MOSFET M11, the source of MOSFET M11 is connected to the drain of MOSFET M12, and the substrate of MOSFET M11 is grounded. The drain of MOSFET M12 is connected to the source of MOSFET M11, the gate of MOSFET M12 is connected to the gate of MOSFET M11, the source of MOSFET M12 is connected to the drain of MOSFET M9, and the substrate of MOSFET M12 is grounded.

[0041] MOSFETs M11 and M12 are both N-channel MOSFETs. The source of MOSFET M11 is connected to the drain of MOSFET M12, and the gate of MOSFET M11 is connected to the gate of MOSFET M12, thus forming a cascaded MOSFET structure. The substrates of both MOSFETs M11 and M12 are grounded. The circuit connection structure of MOSFETs M11 and M12 generates a voltage Vpt proportional to absolute temperature. The circuit structures of MOSFETs M7, M8, and M9 have a negative feedback function, keeping the temperature-proportional voltage Vpt stable.

[0042] The MOSFET M11 operates in the weak inversion region, and the expression for its drain current Id11 is as follows.

[0043] ;

[0044] ;

[0045] In the formula, Vgs11 is the gate-source voltage of MOSFET M11, Vth11 is the threshold voltage of MOSFET M11, n is the slope factor of the weak inversion region, Vt is the thermal voltage, Vds11 is the drain-source voltage of MOSFET M11, u is the electron mobility, COX is the gate oxide capacitance per unit area, W11 is the channel width of MOSFET M11, and L11 is the channel length of MOSFET M11.

[0046] Based on the expression for the drain current Id11 of MOSFET M11, the expression for the gate-source voltage Vgs11 of MOSFET M11 is as follows.

[0047] ;

[0048] Similarly, the expression for the gate-source voltage Vgs12 of MOSFET M12 is shown below.

[0049] ;

[0050] ;

[0051] In the two formulas above, n is the slope factor of the weak inversion region, Vt is the thermal voltage, Id11 is the drain current of MOSFET M11, Vds11 is the drain-source voltage of MOSFET M11, Vth11 is the threshold voltage of MOSFET M11, Id12 is the drain current of MOSFET M12, Vds12 is the drain-source voltage of MOSFET M12, Vth12 is the threshold voltage of MOSFET M12, W12 is the channel width of MOSFET M12, and L12 is the channel length of MOSFET M12.

[0052] The voltage Vpt at the junction of the source of MOSFET M11 and the drain of MOSFET M12 is the difference between the gate-source voltage Vgs12 of MOSFET M12 and the gate-source voltage Vgs11 of MOSFET M11. The expression for voltage Vpt is as follows.

[0053] ;

[0054] In the formula, n is the slope factor of the weak inversion region, Vt is the thermal voltage, Id12 is the drain current of MOSFET M12, W11 is the channel width of MOSFET M11, L11 is the channel length of MOSFET M11, Vds11 is the drain-source voltage of MOSFET M11, Id11 is the drain current of MOSFET M11, W12 is the channel width of MOSFET M12, L12 is the channel length of MOSFET M12, and Vds12 is the drain-source voltage of MOSFET M12.

[0055] If the drain-source voltage Vds11 of MOSFET M11 is set to be greater than four times the thermal voltage Vt, and the drain-source voltage Vds12 of MOSFET M12 is also set to be greater than four times the thermal voltage Vt, then the expression for voltage Vpt can be simplified as follows.

[0056] ;

[0057] As can be seen from the expression for voltage Vpt, voltage Vpt is directly proportional to thermal voltage Vt, that is, voltage Vpt is a voltage that is directly proportional to absolute temperature.

[0058] In the proportional voltage circuit 121, since the connection structure of MOSFETs M8 and M9 is the same as that of MOSFETs M11 and M12, and the source of MOSFET M12 is connected to the drain of MOSFET M9, the expression for the junction voltage Vpt121 between the source of MOSFET M11 and the drain of MOSFET M12 in the circuit system of the proportional voltage circuit 121 is as follows.

[0059] ;

[0060] In the formula, Vds12 is the drain-source voltage of MOSFET M12, Vds9 is the drain-source voltage of MOSFET M9, Id9 is the drain current of MOSFET M9, Id8 is the drain current of MOSFET M8, W8 is the channel width of MOSFET M8, L8 is the channel length of MOSFET M8, and W9 is the channel width and L9 is the channel length of MOSFET M9. Furthermore, the formula for voltage Vpt121 shows that voltage Vpt121 is proportional to absolute temperature.

[0061] Based on the circuit structure of the proportional voltage circuit 121, the minimum power supply voltage value Vddmin of the entire circuit system of the present invention can also be derived, and its expression is as follows.

[0062] ;

[0063] In the formula, Vsd10 is the drain-source voltage of MOSFET M10, Vgs12 is the gate-source voltage of MOSFET M12, and Vds9 is the drain-source voltage of MOSFET M9. In a 180nm CMOS manufacturing process, Vddmin is approximately 700mV.

[0064] The feedback current circuit 122 includes MOSFETs M10, M13, M14, M15, M16, M17, and M18, resistor R1, and port IPTA.

[0065] The source of MOSFET M10 is connected to the power supply VDD, the gate of MOSFET M10 is connected to the gate of MOSFET M13, and the drain of MOSFET M10 is connected to the drain of MOSFET M11. The source of MOSFET M13 is connected to the source of MOSFET M10, the gate of MOSFET M13 is connected to the gate of MOSFET M7, and the drain of MOSFET M13 is connected to the upper end of resistor R1, with the lower end of resistor R1 grounded. The source of MOSFET M14 is connected to the source of MOSFET M13, the gate of MOSFET M14 is connected to the gate of MOSFET M17, the drain of MOSFET M14 is connected to the gate of MOSFET M13, and the drain of MOSFET M14 is connected to port IPTA.

[0066] The drain of MOSFET M15 is connected to the drain of MOSFET M14, the gate of MOSFET M15 is connected to the source of MOSFET M11, and the source of MOSFET M15 is connected to the drain of MOSFET M16. The drain of MOSFET M16 is connected to the source of MOSFET M15, the gate of MOSFET M16 is connected to the drain of MOSFET M16, and the source of MOSFET M16 is grounded. The source of MOSFET M17 is connected to the power supply VDD, the gate of MOSFET M17 is connected to the drain of MOSFET M17, and the drain of MOSFET M17 is connected to the drain of MOSFET M18. The drain of MOSFET M18 is connected to the source of MOSFET M17, the gate of MOSFET M18 is connected to the drain of MOSFET M13, and the source of MOSFET M18 is connected to the source of MOSFET M15.

[0067] The current mirror structure of MOSFETs M10 and M13 provides bias current for the relevant MOSFETs in the feedback current circuit 122. The gate of MOSFET M15 is connected to the source of MOSFET M11 to receive voltage Vpt121. Based on the negative feedback structure of MOSFETs M14, M15, M16, M17, and M18, the gate voltage Vg18 of MOSFET M18 is equal to the voltage Vpt121. Therefore, the voltage across resistor R1 is also a voltage Vpt121 proportional to the absolute temperature, and it generates a current Ipt proportional to the absolute temperature, as shown in the following expression.

[0068] ;

[0069] As can be seen from the expression for the current Ipt, the current Ipt is proportional to the absolute temperature. The gate of the MOSFET M13 is connected to port IPTA. Based on the relevant current mirror structure, the current Ipt is output to the reference output circuit 2 through port IPTA.

[0070] like Figure 3 As shown, the inverse current circuit 21 includes an inverse voltage circuit 211 and a voltage conversion circuit 212.

[0071] The inverse proportional voltage circuit 211 is connected to the voltage conversion circuit 212. The inverse proportional voltage circuit 211 generates a voltage Vct that is inversely proportional to the absolute temperature and transmits the voltage Vct to the voltage conversion circuit 212. The voltage conversion circuit 212 converts the voltage Vct into a current Ict that is inversely proportional to the absolute temperature and transmits the current Ict to the feedback merging circuit 22.

[0072] The inverse proportional voltage circuit 211 includes MOSFETs M23, M24, and M25.

[0073] The source of MOSFET M23 is connected to the power supply VDD, the gate of MOSFET M23 is connected to the gate of MOSFET M26, and the drain of MOSFET M23 is connected to the source of MOSFET M24. The source of MOSFET M24 is connected to the drain of MOSFET M23, the gate of MOSFET M24 is connected to the gate of MOSFET M25, and the drain of MOSFET M24 is connected to the source of MOSFET M25. The substrate of MOSFET M24 is connected to the power supply VDD. The source of MOSFET M25 is connected to the drain of MOSFET M24, the gate and drain of MOSFET M25 are grounded, and the substrate of MOSFET M25 is connected to the power supply VDD.

[0074] Both MOSFETs M24 and M25 are P-channel MOSFETs, and both operate in the weak inversion region. The drain of MOSFET M24 is connected to the source of MOSFET M25, and the gate of MOSFET M24 is connected to the gate of MOSFET M25 and ground. The substrates of both MOSFETs M24 and M25 are connected to the power supply VDD, thus forming a cascaded P-channel MOSFET structure. This cascaded P-channel MOSFET structure generates a voltage Vct that is inversely proportional to absolute temperature.

[0075] Based on the circuit structure of the inverse current circuit 21, and assuming that the drain-source voltage Vsd24 of MOSFET M24 is greater than four times the thermal voltage Vt, and the drain-source voltage Vsd25 of MOSFET M25 is also greater than four times the thermal voltage Vt, the expression for the junction voltage Vct of the drain of MOSFET M24 and the source of MOSFET M25 is as follows.

[0076] ;

[0077] In the formula, Vsd25 is the drain-source voltage of MOSFET M25, Vsg24 is the gate-source voltage of MOSFET M24, Vsd24 is the drain-source voltage of MOSFET M24, n is the slope factor of the weak inversion region, Vt is the thermal voltage, Id24 is the drain current of MOSFET M24, W25 is the channel width of MOSFET M25, L24 is the channel length of MOSFET M24.

[0078] In the formula for voltage Vct, the gate-source voltage Vsg24 of the MOSFET M24 is inversely proportional to the absolute temperature. The second term in the Vct formula is directly proportional to the absolute temperature. However, since the second term is logarithmic, its effect on the first term is minimal, existing only as a fine-tuning term. Therefore, voltage Vct is the voltage inversely proportional to absolute temperature.

[0079] The voltage conversion circuit 212 includes MOSFETs M19, M20, M21, M22, and M26, and resistor R2.

[0080] The source of MOSFET M19 is connected to the power supply VDD, the gate of MOSFET M19 is connected to the gate of MOSFET M21, and the drain of MOSFET M19 is connected to the drain of MOSFET M20. The drain of MOSFET M20 is connected to the drain of MOSFET M19, the gate of MOSFET M20 is connected to the drain of MOSFET M26, and the source of MOSFET M20 is grounded. The source of MOSFET M21 is connected to the source of MOSFET M19, the gate of MOSFET M21 is connected to the drain of MOSFET M19, and the drain of MOSFET M21 is connected to the drain of MOSFET M22. The drain of MOSFET M22 is connected to the drain of MOSFET M21, the gate of MOSFET M22 is connected to the drain of MOSFET M24, and the source of MOSFET M22 is grounded. The source of MOSFET M26 is connected to the power supply VDD, the gate of MOSFET M26 is connected to the drain of MOSFET M21, the drain of MOSFET M26 is connected to the upper end of resistor R2, and the lower end of resistor R2 is grounded.

[0081] The circuit connection structure of MOSFETs M19, M20, M21, M22, and M26 has a negative feedback function, making the drain voltage of MOSFET M26 equal to the junction voltage Vct between the drain of MOSFET M24 and the source of MOSFET M25. Therefore, the voltage across resistor R2 is also an inversely proportional voltage Vct to the absolute temperature. Thus, the current Ict flowing through resistor R2 is also an inversely proportional current to the absolute temperature.

[0082] Based on the 180nm CMOS manufacturing process, the N-wells of both MOSFETs M24 and M25 are connected to the gate of MOSFET M22 in the voltage conversion circuit 212. This connection structure avoids the influence of body effects on MOSFET M25 and maintains a minimum power supply requirement for MOSFET M25. In the circuit structure of the inverse current circuit 21, the drain of MOSFET M24 is connected to the gate of MOSFET M22, thus the drain of MOSFET M24 is connected to the N-well of MOSFET M24. This connection structure significantly reduces the impact of power supply voltage fluctuations on the current Ict generated in the inverse current circuit 21. The expression for current Ict is shown below.

[0083] ;

[0084] In the formula, Vgd24 is the gate-drain voltage of MOSFET M24, Id24 is the drain current of MOSFET M24, W25 is the channel width of MOSFET M25, L24 is the channel length of MOSFET M24, Id25 is the drain current of MOSFET M25, W24 is the channel width of MOSFET M24, and L25 is the channel length of MOSFET M25.

[0085] like Figure 3 As shown, the feedback merging circuit 22 includes MOSFETs M27, M28, M29, M30, and M31, resistors R3, R4, and R5, capacitor C1, port IATT, and port IREF.

[0086] The source of MOSFET M27 is connected to the power supply VDD, the gate of MOSFET M27 is connected to the gate of MOSFET M26, and the drain of MOSFET M27 is connected to port IREF. The source of MOSFET M28 is connected to the source of MOSFET M27, the gate of MOSFET M28 is connected to port IATT, and the drain of MOSFET M28 is connected to the drain of MOSFET M27. The upper end of resistor R3 is connected to the source of MOSFET M28, and the lower end of resistor R3 is connected to the source of MOSFET M29. The gate of MOSFET M29 is connected to the gate of MOSFET M30, and the drain of MOSFET M29 is connected to the upper end of resistor R4. The lower end of resistor R4 is connected to the drain of MOSFET M28. The upper end of resistor R5 is connected to the upper end of resistor R3, and the lower end of resistor R5 is connected to the source of MOSFET M30. The gate of MOSFET M30 is connected to the drain of MOSFET M30, and the drain of MOSFET M30 is connected to the drain of MOSFET M31. The drain of MOSFET M31 is connected to the gate of MOSFET M29, the gate of MOSFET M31 is connected to the drain of MOSFET M27, and the source of MOSFET M31 is grounded. The upper end of capacitor C1 is connected to the gate of MOSFET M31, and the lower end of capacitor C1 is grounded.

[0087] The gate of MOSFET M27 is connected to the gate of MOSFET M26, thus forming a current mirror structure. This converts the current Ict, which is inversely proportional to the absolute temperature, to the drain-source branch of MOSFET M27. The gate of MOSFET M28 is connected to port IATT, and port IATT is connected to port IPTA. This makes MOSFET M28 and MOSFET M13 form a current mirror, converting the current Ipt, which is directly proportional to the absolute temperature, to the drain-source branch of MOSFET M28.

[0088] The drains of MOSFET M27 and M28 are connected, causing the currents Ict and Ipt to be superimposed in the merged branch, forming a temperature-independent reference current Iref, which is output through port IREF. MOSFETs M29, M30, and M31, along with resistors R3, R4, and R5 and capacitor C1, form a third-order negative feedback loop to stabilize the output of the reference current Iref. The expression for the reference current Iref is shown below.

[0089] ;

[0090] In the formula, K1 is the current mirror ratio of MOSFETs M27 and M26, and K2 is the current mirror ratio of MOSFETs M28 and M13. Since current Ict is inversely proportional to absolute temperature and current Ipt is directly proportional to absolute temperature, by adjusting the coefficients of the two currents, the reference current Iref can be made unaffected by temperature changes.

Claims

1. A low-power reference current source integrated circuit, characterized in that, It includes a proportional current circuit (1) and a reference output circuit (2); The proportional current circuit is connected to the reference output circuit (2). The proportional current circuit (1) is connected through the port to output a current Ipt that is proportional to the absolute temperature to the reference output circuit (2). The reference output circuit (2) generates a current Ict that is inversely proportional to the absolute temperature, and combines the current Ict that is inversely proportional to the absolute temperature and the current Ipt that is proportional to the absolute temperature to generate a reference current Iref that is not affected by temperature. The reference output circuit (2) outputs the reference current through the port and maintains the stability of the reference current through a third-order negative feedback loop; The proportional current circuit (1) includes a stable bias circuit (11) and a current generation circuit (12). The stable bias circuit (11) is connected to the current generation circuit (12). The stable bias circuit (11) generates a bias current Ibs that is not affected by power supply fluctuations and transmits it to the current generation circuit (12). The current generation circuit (12) generates a current Ipt that is proportional to the absolute temperature and outputs it. The stable bias circuit (11) includes an anti-interference circuit (111) and a bias current circuit (112). The anti-interference circuit (111) is connected to the bias current circuit (112). When the power supply voltage drops, the anti-interference circuit (111) charges the gate-source parasitic capacitance of MOSFET M4, while the gate-source parasitic capacitance of MOSFET M2 discharges based on the connection structure of MOSFET M3, in order to maintain the normal operating voltage of the MOSFETs related to the bias current circuit (112). The bias current circuit (112) generates a bias current Ibs based on the self-biasing structure and outputs it to the current generation circuit (12); The anti-interference circuit (111) includes MOSFET M2, MOSFET M3, and MOSFET M4; The drain of MOSFET M2 is connected to the drain of MOSFET M1, the gate of MOSFET M2 is connected to the gate of MOSFET M5, the source of MOSFET M2 is grounded, the drain of MOSFET M3 is connected to the gate of MOSFET M1, the gate of MOSFET M3 is connected to the drain of MOSFET M3, the source of MOSFET M3 is connected to the gate of MOSFET M2, the source of MOSFET M4 is connected to the power supply VDD, the gate of MOSFET M4 is connected to the drain of MOSFET M3, and the drain of MOSFET M4 is connected to the drain of MOSFET M5. The bias current circuit (112) includes MOSFETs M1, M2, M4, M5, and M6; The source of MOSFET M1 is connected to the source of MOSFET M4, the gate of MOSFET M1 is connected to the gate of MOSFET M4, the drain of MOSFET M1 is connected to the drain of MOSFET M2, the drain of MOSFET M2 is connected to the drain of MOSFET M1, the gate of MOSFET M2 is connected to the gate of MOSFET M5, and the source of MOSFET M2 is grounded. The source of MOSFET M4 is connected to the power supply VDD, the gate of MOSFET M4 is connected to the drain of MOSFET M4, the drain of MOSFET M4 is connected to the drain of MOSFET M5, the drain of MOSFET M5 is connected to the gate of MOSFET M4, the gate of MOSFET M5 is connected to the drain of MOSFET M2, the source of MOSFET M5 is connected to the drain of MOSFET M6, the drain of MOSFET M6 is connected to the source of MOSFET M5, the gate of MOSFET M6 is connected to the drain of MOSFET M6, and the source of MOSFET M6 is grounded.

2. The low-power reference current source integrated circuit according to claim 1, characterized in that, The reference output circuit (2) includes an inverse current circuit (21) and a feedback merging circuit (22); The inverse current circuit (21) is connected to the feedback merging circuit (22). The inverse current circuit (21) generates a current Ict that is inversely proportional to the absolute temperature and transmits it to the feedback merging circuit (22). The feedback merging circuit (22) receives a current Ipt that is proportional to the absolute temperature through the port and merges it with a current Ict that is inversely proportional to the absolute temperature to generate a reference current Iref that is not affected by temperature. The feedback merging circuit (22) includes a third-order negative feedback loop to maintain the stability of the system output reference current Iref.

3. The low-power reference current source integrated circuit according to claim 1, characterized in that, The current generation circuit (12) includes a proportional voltage circuit (121) and a feedback current circuit (122). The proportional voltage circuit (121) is connected to the feedback current circuit (122). The proportional voltage circuit (121) generates a voltage Vpt that is proportional to the absolute temperature and transmits it to the feedback current circuit (122). The feedback current circuit (122) converts the voltage Vpt, which is proportional to the absolute temperature, into a current Ipt, which is proportional to the absolute temperature, based on the feedback structure, and outputs it through the port.

4. The low-power reference current source integrated circuit according to claim 2, characterized in that, The inverse current circuit (21) includes an inverse voltage circuit (211) and a voltage conversion circuit (212). The inverse proportional voltage circuit (211) is connected to the voltage conversion circuit (212). The inverse proportional voltage circuit (211) generates a voltage Vct that is inversely proportional to the absolute temperature and transmits the voltage Vct to the voltage conversion circuit (212). The voltage conversion circuit (212) converts the voltage Vct into a current Ict that is inversely proportional to the absolute temperature and transmits the current Ict to the feedback merging circuit (22).

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