Processing method of universal fault splitting locking device

Abstract

The invention provides a processing method of a universal fault splitting locking device, and particularly relates to the field of power system relay protection. A voltage sensor collects bus voltage values at not less than three positions within a specified time limit in an access line, and a bus dynamic voltage value sequence is constructed; for a certain bus dynamic voltage value sequence, original outlier amplitudes in the bus dynamic voltage value sequence are obtained, and according to the similarity of the original outlier amplitudes among all the bus dynamic voltage value sequences, the original outlier amplitudes of all the bus dynamic voltage value sequences are subjected to data preprocessing to obtain target outlier amplitudes; according to the target outlier amplitude of all the bus dynamic voltage value sequences, the corresponding bus dynamic voltage value sequences are sequentially and autonomously reduced by adopting a data algorithm, so that the accuracy of information transmitted into plc is improved, a closed locking contact is responded in time, the safety risk of misoperation of a fault splitting device is effectively eliminated, and safe and reliable operation of a power grid is protected.

Description

Technical Field

[0001] The present invention provides a method for processing a universal fault tripping locking device, particularly in the field of power system relay protection. Background Art

[0002] With the rapid development of the power grid, the scale of the power grid continues to expand, and the connections between power grids are becoming increasingly close. While obtaining the benefits of networking, the scope of influence of fault risks has also been expanded. Therefore, it is necessary to install automatic decoupling devices at appropriate locations to prevent accidents from expanding. At the same time, changes in the laying of power lines or changes in the power carrying capacity of the wires will cause some abnormal fluctuations in the bus voltage values ​​collected by the voltage sensor line, resulting in erroneous data transmitted to the PLC, and the probability of the PLC making misjudgments will increase. At this stage, when collecting power information for transmission, most of the time, the RLE algorithm is used to reduce the collected power information, which can make storage more efficient.

[0003] However, the collected data has abnormal fluctuations. Using the RLE algorithm to reduce the collected power information will turn the abnormally fluctuating information into reasonably floating information, thereby reducing the accuracy of the information after reduction. The information with abnormal values ​​will be transmitted to the PLC, which will interfere with the normal logical judgment of the PLC and make it believe that there is no voltage drop in the line. It will not be able to respond in time to close the locking contacts, and will not be able to effectively eliminate the safety risk of false operation of the fault decoupling device to protect the safe and reliable operation of the power grid.

[0004] Therefore, the present invention proposes a universal method for handling a fault-tripping locking device. Summary of the Invention

[0005] In order to solve the deficiencies in the prior art, the present invention provides a method for processing a universal fault decoupling locking device, which improves the accuracy of the bus voltage value transmitted to the PLC programmable logic controller and removes abnormal interference values. As a result, the PLC programmable logic controller can more quickly determine the voltage value and close the locking contacts in time, effectively eliminating the safety risk of malfunction of the fault decoupling device and protecting the safe and reliable operation of the power grid.

[0006] The present invention adopts the following technical solutions.

[0007] The present invention provides a processing method for a universal fault decoupling locking device, in which a voltage sensor collects multiple bus voltage values ​​in a circuit and transmits the voltage values ​​to a programmable logic controller (PLC). The PLC then enters a logic judgment module to determine whether the voltage value is in a voltage instantaneous drop state. If it is determined to be a voltage drop, a programmable delay relay is used to output a voltage instantaneous drop locking contact, and the normally open locking contact is controlled to close via a programming language, thereby realizing controllable opening of the device's locking contacts. Based on the voltage slip locking logic, a voltage instantaneous drop locking judgment program is designed to control the closing of the normally open locking contact, thereby realizing that the device has a voltage instantaneous drop locking function when only the bus voltage is connected.

[0008] In a further preferred embodiment of the present invention, the voltage sensor collects bus voltage values ​​at no fewer than three locations in the access line within a specified time limit, constructs a bus dynamic voltage value sequence, obtains a relative dynamic difference between adjacent bus voltage values ​​in the line based on a particular bus dynamic voltage value sequence, and further obtains outlier probability fluctuation amplitudes for all relevant bus voltage values ​​in the bus dynamic voltage value sequence in the line. Based on a corresponding comparison of all bus voltage value outlier probability fluctuation amplitudes with the bus voltage values ​​in the bus dynamic voltage value sequence, one or more bus voltage values ​​with possible outlier fluctuations are obtained.

[0009] Based on the azimuth phase spacing of all possible outlier bus voltage values ​​in the bus dynamic voltage value sequence and the outlier probability fluctuation amplitude of the possible outlier bus voltage values, the original outlier amplitude in the bus dynamic voltage value sequence is obtained. According to the similarity of the original outlier amplitudes between all bus dynamic voltage value sequences, the original outlier amplitudes of all the bus dynamic voltage value sequences are subjected to data preprocessing to obtain the target outlier amplitude.

[0010] A further preferred embodiment of the present invention is to autonomously use a data algorithm to reduce the corresponding bus dynamic voltage value sequences in turn according to the target outlier amplitudes of all the bus dynamic voltage value sequences.

[0011] In a further preferred embodiment of the present invention, the relative dynamic difference between adjacent bus voltage values ​​in the line, and the outlier probability fluctuation amplitude of all relevant bus voltage values ​​in the bus dynamic voltage value sequence in the line are obtained, include:

[0012] All bus voltage values ​​in the bus dynamic voltage value sequence, i.e., value points, are numbered as value point 1, value point 2, ..., value point n, where n ≥ 3, and then an xy coordinate axis of the bus dynamic voltage value sequence is created, with time as the x-axis and the bus voltage value as the y-axis;

[0013] Based on the busbar dynamic voltage value sequence, excluding the first value point 1, a value point t, t∈(2,n), and the value points are sequentially placed in the xy coordinate axis. t With the previous value point t-1 The line Y1 is connected to the x-axis to form an angle θ1, and the corresponding angle tangent value tanθ1 is obtained. Once again, the value point t and the next value point t+1 The line Y2 is connected to the x-axis to form an angle θ2, and the corresponding tanθ2 is obtained. Finally, the absolute value of tanθ1-tanθ2 is taken.

[0014] In the xy coordinate axis of the busbar dynamic voltage value sequence, according to a certain value point t With the previous value point t-1 Forming the tanθ1 corresponding to the line Y1, the certain value point t All value points on the left, from value point 3, value point 4, ..., to value point t-1 The tangent value of the angle between each value point and the previous value point and the x-axis is compared with tanθ1. If tanθ1>0, take the first occurrence of a value point t The value point when the tangent value of the angle formed by the left value point is less than 0. If tanθ1<0, take the first occurrence of a certain value point t When the tangent value of the angle formed by the left value point is greater than 0, the final value point is the expected value point 1; based on a certain value point t and the next value point t+1 Forming the tanθ2 corresponding to the line Y2, the certain value point t All value points on the right, from value point t+1 , worth a point t+2 ,…, to the value point n-1 The tangent value of the angle between each value point and the next value point and the x-axis is compared with tanθ2. If tanθ2>0, take the first occurrence of a value point t The value point when the tangent value of the angle formed by the right value point is less than 0. If tanθ2<0, take the first occurrence of a certain value point t When the tangent value of the angle formed by the right value point is greater than 0, the final value point is the expected value point 2;

[0015] In the xy coordinate axis of the busbar dynamic voltage value sequence, the calculation is performed from the value point t To the left to the expected value point 1, from the expected value point 1, ..., value point t-1 , to the value point t The length of the line segment between each two adjacent value points is calculated as follows: t-3 The coordinates are (x t-3 ,y t-3 ), the adjacent value point takes the value point on the right t-2 The coordinates are (x t-2,y t-2 ), Then, the length of the line segment between each two adjacent value points is obtained, and the sum of the cumulative superposition is the expected distance value 1;

[0016] Operation from the value point t Go right to the expected value point 2, from the value point t , worth a point t+1 , ..., the value after the cumulative superposition and summation of the lengths of the line segments between each two adjacent value points to the expected value point 2 is the expected distance value 2. The calculation method of the expected distance value 2 is the same as the calculation method of the expected distance value 1; then take the average of the expected distance value 1 and the expected distance value 2;

[0017] The product of the absolute value of tanθ1-tanθ2 and the mean of the expected distance value 1 and the expected distance value 2 is the certain value point t The fluctuation amplitude of the outlier probability is

[0018] According to a further preferred embodiment of the present invention, the outlier probability fluctuation amplitude of the value point 1 which is at the first position in the busbar dynamic voltage value sequence is 0.

[0019] In a further preferred embodiment of the present invention, all the bus voltage value outlier probability fluctuation amplitudes are compared with the bus voltage values ​​in the bus dynamic voltage value sequence to obtain one or more bus voltage values ​​that may have outlier fluctuations, including:

[0020] A reasonable limit value of the outlier probability fluctuation amplitude is set in advance, and the outlier probability fluctuation amplitude of each value point is compared with the limit value. When the outlier probability fluctuation amplitude of a certain value point is ≥ the outlier probability fluctuation amplitude limit value, it is judged that the value point is a value point with possible outlier fluctuation.

[0021] In a further preferred embodiment of the present invention, obtaining the original outlier amplitude in the bus dynamic voltage value sequence based on the azimuth phase spacing of all possible outlier-fluctuating bus voltage values ​​in the bus dynamic voltage value sequence and the outlier probability fluctuation amplitude of the possible outlier-fluctuating bus voltage values ​​comprises:

[0022] According to the outlier probability fluctuation amplitudes of all the possible outlier fluctuation value points, calculating the total sum of the outlier probability fluctuation amplitudes of all the possible outlier fluctuation value points and the outlier probability fluctuation amplitude standard deviation of a certain possible outlier fluctuation value point;

[0023] According to the position of a possible outlier value point in the busbar dynamic voltage value sequence, the phase spacing value of each two adjacent possible outlier value points is obtained, the phase spacing value standard deviation between all phase spacing values ​​is obtained, and then the maximum phase spacing value between the first possible outlier value point and the last possible outlier value point in the busbar dynamic voltage value sequence is obtained;

[0024] The entropy value is obtained by dividing the highest phase spacing value obtained by the time span of the busbar dynamic voltage value sequence, and then the standard deviation of the outlier probability fluctuation amplitude is added to the standard deviation of the phase spacing values ​​between all phase spacing values ​​to obtain the corresponding sum value, then the exponential function value = e -和值 ;

[0025] Then the original outlier amplitude is the product of the sum of the entropy value, the exponential function value and the outlier probability fluctuation amplitude.

[0026] A further preferred solution of the present invention is to obtain a target outlier amplitude by performing data preprocessing on the original outlier amplitudes of all bus dynamic voltage value sequences based on the similarity of the original outlier amplitudes between all bus dynamic voltage value sequences, including:

[0027] For a certain bus dynamic voltage value sequence, the absolute values ​​of the differences between the original outlier amplitudes of the bus dynamic voltage value sequence and all other bus dynamic voltage value sequences are taken in descending order, and the lowest absolute value of the original outlier amplitude difference at the end of the descending order is taken. At the same time, the original outlier amplitude of the bus dynamic voltage value sequence is divided by the obtained lowest value to obtain the corresponding entropy value, and the entropy value is the target outlier amplitude of the certain bus dynamic voltage value sequence.

[0028] A further preferred solution of the present invention is to set a limit value of the outlier amplitude in advance for a certain bus dynamic voltage value sequence. When the target outlier amplitude of the bus dynamic voltage value sequence is greater than or equal to the limit value, a logarithmic transformation method is applied to the certain bus dynamic voltage value sequence to obtain a corresponding logarithmic pair 1, and then the logarithmic pair 1 is operated through the RLE algorithm to obtain the reduced data.

[0029] A further preferred embodiment of the present invention is that when the target outlier amplitude of the bus dynamic voltage value sequence is less than the limit value, a logarithmic transformation is applied to the bus dynamic voltage value sequence to obtain a corresponding logarithmic logarithm column 2. For a certain logarithmic value in the logarithmic logarithm column 2, the absolute value of the difference between the certain logarithmic value and its left adjacent logarithmic value is taken as logarithmic difference 1, and the absolute value of the difference between the certain logarithmic value and its right adjacent logarithmic value is taken as logarithmic difference 2. The obtained logarithmic difference 1 and logarithmic difference 2 are then sorted in descending order to obtain the smallest value at the end. When the smallest value is less than a preset constant value, the certain logarithmic value is replaced by the logarithmic value mapped to the minimum value.

[0030] Search all the logarithmic values ​​in the logarithmic sequence 2 in sequence, repeat the logarithmic value replacement operation mapped to the minimum value according to the required steps, obtain the replaced new logarithmic sequence 2, and then operate the replaced new logarithmic sequence 2 through the RLE algorithm to obtain the reduced data.

[0031] The beneficial effect of the present invention is that, compared with the prior art, the voltage sensor of the present invention collects bus voltage values ​​at no less than three locations in the access line within a specified time limit, constructs a bus dynamic voltage value sequence, obtains the relative dynamic difference between the adjacent bus voltage values ​​in the line based on a certain bus dynamic voltage value sequence, and then obtains the outlier probability fluctuation amplitude of all relevant bus voltage values ​​in the bus dynamic voltage value sequence in the line, and compares the outlier probability fluctuation amplitudes of all bus voltage values ​​with the bus voltage values ​​in the bus dynamic voltage value sequence, and obtains a possible outlier fluctuation amplitude that is greater than or equal to the outlier probability fluctuation amplitude of the bus voltage values. bus voltage value; based on the azimuth phase spacing of all possible outlier bus voltage values ​​in the bus dynamic voltage value sequence and the outlier probability fluctuation amplitude of the possible outlier bus voltage values, the original outlier amplitude in the bus dynamic voltage value sequence is obtained, and according to the similarity of the original outlier amplitudes between all bus dynamic voltage value sequences, the original outlier amplitudes of all the bus dynamic voltage value sequences are respectively subjected to data preprocessing to obtain the target outlier amplitude; according to the target outlier amplitudes of all the bus dynamic voltage value sequences, the corresponding bus dynamic voltage value sequences are autonomously reduced by a data algorithm in turn. Among them, analytical operations are performed on all the outlier and unreasonable value points in the bus dynamic voltage value sequence to obtain the corresponding original outlier amplitude. At the same time, according to the different abnormal characteristics between buses in different lines, the corresponding bus dynamic voltage value sequence original outlier amplitude is processed by data preprocessing. This step further improves the data accuracy and obtains a more reliable and accurate target outlier amplitude. Therefore, the bus dynamic voltage value sequence with an abnormal probability can be reliably reduced by the corresponding algorithm operation, that is, the original data is completely restored without causing any distortion. At the same time, for the normal and safe bus dynamic voltage value sequence, the Take lossy reduction, and use data algorithm to reduce the bus dynamic voltage value sequence independently. Although the original data cannot be completely restored after decompression, the lost part has little impact on the original data, but it gains a larger compression space, while ensuring the improvement of the efficiency of reduction and decompression and the accuracy of data after reduction; the above steps ultimately improve the accuracy of the bus voltage value transmitted to the PLC programmable logic controller and remove abnormal interference values, so that the PLC programmable logic controller can judge the voltage value more quickly and close the locking contact in time, effectively eliminating the safety risk of false operation of the fault decoupling device and protecting the safe and reliable operation of the power grid. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 The present invention provides a schematic diagram of a method for processing a universal fault disconnecting and locking device. DETAILED DESCRIPTION

[0033] To make the objectives, technical solutions, and advantages of the present invention more clear, the technical solutions of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. The embodiments described in this application are only part of the embodiments of the present invention, not all of them. Based on the spirit of the present invention, other embodiments obtained by ordinary technicians in this field without making creative efforts are all within the scope of protection of the present invention.

[0034] like Figure 1 As shown, the present invention provides a method for processing a universal fault disconnection locking device, comprising:

[0035] In S1, the voltage sensor collects bus voltage values ​​at no less than three locations in the access line within a specified time limit to construct a bus dynamic voltage value sequence.

[0036] What is measured here is the voltage value of the busbar in the access line. The three-phase voltage of busbar I and busbar II and the open triangle voltage are connected from the test terminal of the terminal block via the test line, and then enter the logic judgment module. Then, the judgment is made based on the voltage instantaneous drop criterion. When the locking relay is activated, the fault decoupling device is locked and an alarm is sounded to remind the patrol personnel, but there is no specific limitation on the type of busbar. According to the number of times the voltage value is collected within a predetermined time limit, the voltage sensors on certain buses are responsible for collecting the voltage values, and all busbar voltage values ​​within the time limit can be obtained, and then the busbar dynamic voltage value sequence can be divided and regularly constructed. In the embodiment of the present invention, the number of times the voltage value is collected within a predetermined time limit is sampled 10 times per second, and the predetermined time limit is 20 minutes, but this is only an example and is not a specific limitation.

[0037] Therefore, based on the above steps, many related bus dynamic voltage value sequences can be obtained.

[0038] In S2, based on a certain bus dynamic voltage value sequence, the numerical relative dynamic difference between adjacent bus voltage values ​​in the line is obtained, and then the outlier probability fluctuation amplitudes of all relevant bus voltage values ​​in the bus dynamic voltage value sequence in the line are obtained respectively. According to the corresponding comparison of all the bus voltage value outlier probability fluctuation amplitudes with the bus voltage values ​​in the bus dynamic voltage value sequence, a bus voltage value with a possible outlier fluctuation is obtained if it is greater than or equal to it.

[0039] There are multiple transmission buses in the voltage sensor acquisition circuit. When the sensor collects the voltage value of the bus and transmits the voltage value to the PLC programmable logic controller, there is a high probability that the voltage will fluctuate slightly during the transmission due to various subtle factors. The initial voltage value verification method, which is to compare any value point in the bus dynamic voltage value sequence with the value points on the left and right, is not enough to support the more accurate determination of the outlier fluctuation value point. Based on the improvement of current technology, the fluctuation amplitude difference generated in voltage transmission is relatively small, and the transformation of dynamic fluctuation is irregular. On the one hand, when unreasonable outlier value fluctuations occur, the amplitude of the outlier value will surge or drop sharply. On the other hand, within the normal fluctuation range, the accumulation of value points with the same fluctuation amplitude will also form an unreasonable voltage outlier value group. In summary, based on the above-mentioned characteristics, the embodiment of the present invention can be based on the stable fluctuation trend of the relative dynamic difference between any two adjacent value points in the bus dynamic voltage value sequence within a certain time limit, and then all bus voltage value points with outlier fluctuations that may exist in the bus dynamic voltage value sequence can be obtained in sequence.

[0040] Based on a certain bus dynamic voltage value sequence, the relative dynamic difference between adjacent bus voltage values ​​in the line is obtained, and then the outlier probability fluctuation amplitude of all relevant bus voltage values ​​in the bus dynamic voltage value sequence in the line is obtained. Specifically, the following steps are performed:

[0041] All bus voltage values ​​in the bus dynamic voltage value sequence, i.e., value points, are numbered as value point 1, value point 2, ..., value point n, where n ≥ 3, and then an xy coordinate axis of the bus dynamic voltage value sequence is created, with time as the x-axis and the bus voltage value as the y-axis;

[0042] Based on the busbar dynamic voltage value sequence, excluding the first value point 1, a value point t , t∈(2,n), and the value points are sequentially placed in the xy coordinate axis. t With the previous value point t-1 The line Y1 is connected to the x-axis to form an angle θ1, and the corresponding angle tangent value tanθ1 is obtained. Once again, the value point t and the next value point t+1 The line Y2 is connected to the x-axis to form an angle θ2, and the corresponding tanθ2 is obtained. Finally, the absolute value of tanθ1-tanθ2 is taken.

[0043] In the xy coordinate axis of the busbar dynamic voltage value sequence, according to a certain value point t With the previous value point t-1 Forming the tanθ1 corresponding to the line Y1, the certain value point t All value points on the left, from value point 3, value point 4, ..., to value point t-1The tangent value of the angle between each value point and the previous value point and the x-axis is compared with tanθ1. If tanθ1>0, take the first occurrence of a value point t The value point when the tangent value of the angle formed by the left value point is less than 0. If tanθ1<0, take the first occurrence of a certain value point t When the tangent value of the angle formed by the left value point is greater than 0, the final value point is the expected value point 1; based on a certain value point t and the next value point t+1 Forming the tanθ2 corresponding to the line Y2, the certain value point t All value points on the right, from value point t+1 , worth a point t+2 ,…, to the value point n-1 The tangent value of the angle between each value point and the next value point and the x-axis is compared with tanθ2. If tanθ2>0, take the first occurrence of a value point t The value point when the tangent value of the angle formed by the right value point is less than 0. If tanθ2<0, take the first occurrence of a certain value point t When the tangent value of the angle formed by the right value point is greater than 0, the final value point is the expected value point 2;

[0044] In the xy coordinate axis of the busbar dynamic voltage value sequence, the calculation is performed from the value point t To the left to the expected value point 1, from the expected value point 1, ..., value point t-1 , to the value point t The length of the line segment between each two adjacent value points is calculated as follows: t-3 The coordinates are (x t-3 ,y t-3 ), the adjacent value point takes the value point on the right t-2 The coordinates are (x t-2 ,y t-2 ), Then, the length of the line segment between each two adjacent value points is obtained, and the sum of the cumulative superposition is the expected distance value 1;

[0045] Operation from the value point t Go right to the expected value point 2, from the value point t , worth a point t+1 , ..., the value after the cumulative superposition and summation of the lengths of the line segments between each two adjacent value points to the expected value point 2 is the expected distance value 2. The calculation method of the expected distance value 2 is the same as the calculation method of the expected distance value 1; then take the average of the expected distance value 1 and the expected distance value 2;

[0046] The product of the absolute value of tanθ1-tanθ2 and the mean of the expected distance value 1 and the expected distance value 2 is the certain value point t The fluctuation amplitude of the outlier probability is

[0047] In the embodiment of the present invention, the vth bus dynamic voltage value sequence is randomly selected, and the value points in the bus dynamic voltage value sequence are plotted on the xy coordinate axis to create the xy coordinate axis of the bus dynamic voltage value sequence, with time as the x-axis and the bus voltage value as the y-axis. Usually, the value point at the first position is the starting value point, and there is no previous value point for comparison. Therefore, it is assumed that the value point at the first position is a reasonable and acceptable value point, and the outlier probability fluctuation amplitude of the first value point is taken as 0. A value point after the value point at the first position in the bus dynamic voltage value sequence is taken, that is, the value point at the tth position is taken, and the outlier probability fluctuation amplitude of the tth value point is obtained based on the relative dynamic difference of the values ​​of the value points on the left and right sides of the tth value point. Based on the above formula steps, the calculation formula for the outlier probability fluctuation amplitude of the tth value point can be obtained as follows:

[0048]

[0049] Specifically, is the outlier probability fluctuation amplitude of the t-th value point in the v-th busbar dynamic voltage value sequence. The value of t is not 1. tanθ t1 The line Y1 connecting the t-th value point and the previous value point (t-1th value point) on the xy coordinate axis forms an angle θ1 with the x-axis, and the corresponding tanθ is obtained. t1 The value of tanθ t2 The line Y2 connecting the t-th value point and the next value point, i.e., the t+1-th value point, on the xy coordinate axis forms an angle θ2 with the x-axis, and the corresponding tanθ is obtained. t2 The value of |tanθ t1 -tanθ t2 | is tanθ t1 and tanθ t2 The absolute value of the difference is taken; Z1 represents all value point groups 1 from the t-th value point to the left of the expected value point 1 in the xy coordinate axis, is the length of the line segment between the p-th value point and the p+1-th value point in value point group 1, L1 represents the expected distance value 1, that is, the cumulative sum of the lengths of the line segments calculated for value point group 1; G2 represents all value point groups 2 from the t-th value point to the right of the expected value point 2 on the xy coordinate axis, It is the length of the connecting segment between the j-th value point and the j+1-th value point in value point group 2, and L2 represents the expected distance value 2, that is, the cumulative sum of the connecting segment lengths calculated by value point group 2.

[0050] The expected value point 1 is the tanθ corresponding to the line Y1 formed by the t-th value point and the previous value point, i.e., the t-1th value point, on the xy coordinate axis. t1 The tangent value of the angle between the line formed by all two adjacent value points on the left side of the t-th value point and the x-axis is tanθ t1 The corresponding value point where the product of appears less than 0 for the first time; the expected value point 2 is the tanθ corresponding to the line Y2 formed by the t-th value point and the next value point, that is, the t+1-th value point on the xy coordinate axis t2 The tangent value of the angle between the line formed by all two adjacent value points on the right side of the t-th value point and the x-axis is tanθ t2 The first time the product of appears to be less than 0 corresponding value point.

[0051] At the same time |tanθ t1 -tanθ t2 The result of | represents the absolute value of the difference between the tangent of the angle between the t-th value point and the corresponding connecting lines of the two value points before and after it. This result can further represent that the larger this value is, the greater the relative dynamic difference between the t-th value point and the two value points before and after it, that is, the more obvious the voltage fluctuation is; the calculated value of L1 represents the total sum of the dynamic fluctuation values ​​of all value points between the t-th value point and the value point on the left where the connecting line inclination changes, and the calculated value of L2 represents the total sum of the dynamic fluctuation values ​​of all value points between the t-th value point and the value point on the right where the connecting line inclination changes, and use The obtained mean can more accurately indicate the fluctuation amplitude of the global expansion information of the t-th value point to the left and right. The higher the mean, the more it can represent that the global fluctuation amplitude of the t-th value point is higher, and the probability of the t-th value point being an outlier will be higher. At the same time, the fluctuation amplitude of the outlier probability of the t-th value point will be higher.

[0052] According to the above, the outlier probability fluctuation amplitudes of all value points in the bus dynamic voltage value sequence can be obtained. According to the corresponding comparison of all bus voltage value outlier probability fluctuation amplitudes with the bus voltage values ​​in the bus dynamic voltage value sequence, more than one bus voltage value with possible outlier fluctuations is obtained, and a reasonable limit value of the outlier probability fluctuation amplitude is set in advance. According to the comparison of the outlier probability fluctuation amplitude of each value point obtained and the limit value, when the outlier probability fluctuation amplitude of a certain value point ≥ the outlier probability fluctuation amplitude limit value, it is judged that the value point is a value point with possible outlier fluctuations.

[0053] In the embodiment of the present invention, the limit value of the outlier probability fluctuation amplitude is temporarily set to 0.5, and the specific limit value can be determined according to the specific situation. When the outlier probability fluctuation amplitude of a certain value point is ≥0.5, it is judged that the value point is a bus voltage value with possible outlier fluctuations. By performing the judgment in sequence, multiple bus voltage value points with possible outlier fluctuations can be obtained.

[0054] In S3, based on the azimuth phase spacing of all possible outlier bus voltage values ​​in the bus dynamic voltage value sequence and the outlier probability fluctuation amplitude of the possible outlier bus voltage values, the original outlier amplitude in the bus dynamic voltage value sequence is obtained, and according to the similarity of the original outlier amplitudes between all bus dynamic voltage value sequences, the original outlier amplitudes of all the bus dynamic voltage value sequences are subjected to data preprocessing to obtain the target outlier amplitude.

[0055] After the above-mentioned S2 operation analyzes the characteristics of the outlier fluctuations that may occur in the voltage of the bus, the influence of the small probability fluctuations of the voltage value points within the normal range on some subsequent unreasonable numerical studies is minimized, and the value points with higher accuracy and greater reliability that have outlier fluctuation characteristics are obtained, and then it is determined whether these value points are bus voltage values ​​with possible outlier fluctuations. After obtaining all the value points of possible outlier fluctuations in the bus dynamic voltage value sequence, based on the analysis of the voltage fluctuation characteristics in the bus dynamic voltage value sequence to obtain the bus voltage values ​​with possible outlier fluctuations, the limitation of the analytical operation will be generated, that is, the analytical level of the outlier amplitude in the bus dynamic voltage value sequence is limited. Therefore, in an embodiment of the present invention, based on the azimuth phase spacing of all possible outlier fluctuations in the bus dynamic voltage value sequence and the outlier probability fluctuation amplitude of the possible outlier fluctuations, the original outlier amplitude in the bus dynamic voltage value sequence is obtained, and the calculation process is:

[0056] According to the outlier probability fluctuation amplitudes of all the possible outlier fluctuation value points, calculating the total sum of the outlier probability fluctuation amplitudes of all the possible outlier fluctuation value points and the outlier probability fluctuation amplitude standard deviation of a certain possible outlier fluctuation value point;

[0057] According to the position of a possible outlier value point in the busbar dynamic voltage value sequence, the phase spacing value of each two adjacent possible outlier value points is obtained, the phase spacing value standard deviation between all phase spacing values ​​is obtained, and then the maximum phase spacing value between the first possible outlier value point and the last possible outlier value point in the busbar dynamic voltage value sequence is obtained;

[0058] Based on the obtained highest phase spacing value divided by the time span of the busbar dynamic voltage value sequence value point, the entropy value is obtained, and then the standard deviation of the outlier probability fluctuation amplitude is added to the standard deviation of the phase spacing values ​​between all phase spacing values ​​to obtain the corresponding sum value, then the exponential function value = e -和值 ;

[0059] Then the original outlier amplitude is the product of the sum of the entropy value, the exponential function value and the outlier probability fluctuation amplitude.

[0060] In the embodiment of the present invention, if the outlier fluctuation of the value point is caused by the disturbance of the unconstrained time band, the outlier value point will be sporadic and have the characteristics of time interval. Therefore, the outlier fluctuation caused by the change of the power line laying or the change of the power carrying capacity of the wire will have cyclic fluctuation. That is, the outlier value point is very likely to occur at a similar stable time node, and the time interval span will also be wider. Based on the above, the calculation formula of the original outlier amplitude in the bus dynamic voltage value sequence is:

[0061]

[0062] 1≤s≤C V .

[0063] Specifically, F v Represents the original outlier amplitude of the vth busbar dynamic voltage value sequence, C V Represents the number of possible outlier value points obtained through analysis. The outlier probability fluctuation amplitude of the sth position in the vth busbar dynamic voltage value sequence that may have outlier fluctuations, T n The last digit in the vth busbar dynamic voltage value sequence may contain the corresponding position of the outlier fluctuation value point, T1 represents the corresponding position of the first positive digit in the vth busbar dynamic voltage value sequence may contain the outlier fluctuation value point, and T represents the time span of the vth busbar dynamic voltage value sequence. It represents the standard deviation of the outlier probability fluctuation amplitude of all possible outlier fluctuation value points in the v-th bus dynamic voltage value sequence, and σ(ΔT) represents the standard deviation of the time span between two adjacent values ​​in the v-th bus dynamic voltage value sequence that may have outlier fluctuation value points.

[0064] Further explanation, T n -T1 represents the highest phase spacing value of the value points of the possible outlier fluctuation in the v-th bus dynamic voltage value sequence. The higher the value, the wider the highest phase spacing value, the longer the corresponding abnormal fluctuation duration, the higher the global outlier fluctuation amplitude that may exist in the v-th bus dynamic voltage value sequence, and the higher the original outlier amplitude of the corresponding v-th bus dynamic voltage value sequence; The smaller the result value of , the smaller the discreteness of the outlier amplitude between the value points of possible outlier fluctuations, and the more obvious the cyclic fluctuation. The smaller the result value of σ(ΔT), the more similar the phase spacing values ​​between the value points of possible outlier fluctuations are, the more obvious the distributed cyclic fluctuation of the value points of possible outlier fluctuations is, the more obvious the outlier amplitude characteristics caused by changes in the laying of power lines or changes in the power carrying capacity of wires are, and the higher the original outlier amplitude of the corresponding v-th bus dynamic voltage value sequence is.

[0065] By obtaining the original outlier amplitude of the vth bus dynamic voltage value sequence through the above-mentioned S2 and S3, the original outlier amplitudes of all bus dynamic voltage value sequences can be obtained respectively.

[0066] The voltage fluctuation will be transmitted to the PLC programmable logic controller through the laid lines. If the lines are arranged in parallel, and voltage or electromagnetic noise is generated locally, these noises are likely to be transmitted to the back-end circuit in the line, thereby causing similar abnormal changes in the circuit. Especially when the line is laid for a long distance and the voltage fluctuation is unstable or the fluctuation amplitude is large, the voltage values ​​of multiple buses are collected. There is also a certain similarity between the bus dynamic voltage value sequences of the existing outlier fluctuation points. When the similarity is low, it indicates that this fluctuation is likely caused by external factors. On the contrary, the higher it is, the more it indicates that it is based on changes in the laying of power lines or changes in the power carrying capacity of the wires. Therefore, our goal is to minimize the error value of the discrete amplitude of all bus dynamic voltage value sequences. According to the similarity of the original outlier amplitudes between all bus dynamic voltage value sequences, the original outlier amplitudes of all the bus dynamic voltage value sequences are subjected to data preprocessing to obtain the target outlier amplitude, including:

[0067] For a certain bus dynamic voltage value sequence, the absolute values ​​of the differences between the original outlier amplitudes of the bus dynamic voltage value sequence and all other bus dynamic voltage value sequences are taken in descending order, and the lowest absolute value of the original outlier amplitude difference at the end of the descending order is taken. At the same time, the original outlier amplitude of the bus dynamic voltage value sequence is divided by the obtained lowest value to obtain the corresponding entropy value, and the entropy value is the target outlier amplitude of the certain bus dynamic voltage value sequence.

[0068] In the embodiment of the present invention, the vth bus dynamic voltage value sequence is taken as an example, and the calculation formula of the target outlier amplitude in the vth bus dynamic voltage value sequence is:

[0069]

[0070] Specifically, M v represents the target outlier amplitude in the vth busbar dynamic voltage value sequence, F v Represents the original outlier amplitude of the vth busbar dynamic voltage value sequence, max(F v ) represents the original outlier amplitudes of the remaining bus dynamic voltage value sequences that are closest to the original outlier amplitude in the vth bus dynamic voltage value sequence. The closest means that the absolute value of the difference between the original outlier amplitudes is the lowest.

[0071] Further explanation, |F v -max(F vThe higher the result value of )|, that is, the closer the outlier amplitude of the associated busbar dynamic voltage value sequence is, the deeper it represents the abnormal fluctuations caused by the changes in the laying of power lines or the changes in the power carrying capacity of the wires. It means that the target outlier amplitude in the corresponding v-th bus dynamic voltage value sequence is higher.

[0072] Therefore, based on the above method, the target outlier amplitude in each bus dynamic voltage value sequence can be obtained.

[0073] In S4, according to the target outlier amplitudes of all the bus dynamic voltage value sequences, the corresponding bus dynamic voltage value sequences are reduced in turn by autonomously using a data algorithm.

[0074] After obtaining the target outlier amplitudes of all bus dynamic voltage value sequences based on operational analysis, the corresponding bus dynamic voltage value sequences are reduced in turn using a data algorithm independently according to the target outlier amplitude of each bus dynamic voltage value sequence.

[0075] Based on the pre-set limit value of the outlier amplitude, for a certain bus dynamic voltage value sequence, when the target outlier amplitude of the bus dynamic voltage value sequence is greater than or equal to the limit value, the bus dynamic voltage value sequence is subjected to a logarithmic transformation method to obtain the corresponding logarithmic pair 1, and then the logarithmic pair 1 is operated through the RLE algorithm to obtain the reduced data.

[0076] When the target outlier amplitude of the bus dynamic voltage value sequence is less than the limit value, a logarithmic transformation method is applied to the bus dynamic voltage value sequence to obtain a corresponding logarithmic logarithm column 2. For a certain logarithmic value in the logarithmic logarithm column 2, the absolute value of the difference between the certain logarithmic value and its left adjacent logarithmic value is taken as logarithmic difference 1, and the absolute value of the difference between the certain logarithmic value and its right adjacent logarithmic value is taken as logarithmic difference 2. The obtained logarithmic difference 1 and logarithmic difference 2 are then sorted in descending order to take the smallest value at the end. When the smallest value is less than a preset constant value, the certain logarithmic value is replaced by the logarithmic value mapped to the minimum value.

[0077] Search all the logarithmic values ​​in the logarithmic sequence 2 in sequence, repeat the logarithmic value replacement operation mapped to the minimum value according to the required steps, obtain the replaced new logarithmic sequence 2, and then operate the replaced new logarithmic sequence 2 through the RLE algorithm to obtain the reduced data.

[0078] In the embodiment of the present invention, the threshold value compared with the target outlier amplitude is 0.6, and the preset constant value is 2. The specific value is determined according to the specific situation, which is only used as an example.

[0079] At the same time, in the present invention, after the dynamic voltage values ​​of all buses are reduced by a data algorithm, the reduced numerical information is transmitted to the PLC programmable logic controller, and then the PLC enters the logic judgment module to determine whether the voltage value belongs to the instantaneous voltage drop state, that is, to perform relevant processing operations.

[0080] The beneficial effect of the present invention is that, compared with the prior art, the voltage sensor of the present invention collects bus voltage values ​​at no less than three locations in the access line within a specified time limit, constructs a bus dynamic voltage value sequence, obtains the relative dynamic difference between the adjacent bus voltage values ​​in the line based on a certain bus dynamic voltage value sequence, and then obtains the outlier probability fluctuation amplitude of all relevant bus voltage values ​​in the bus dynamic voltage value sequence in the line, and compares the outlier probability fluctuation amplitudes of all bus voltage values ​​with the bus voltage values ​​in the bus dynamic voltage value sequence, and obtains a possible outlier fluctuation amplitude that is greater than or equal to the outlier probability fluctuation amplitude of the bus voltage values. bus voltage value; based on the azimuth phase spacing of all possible outlier bus voltage values ​​in the bus dynamic voltage value sequence and the outlier probability fluctuation amplitude of the possible outlier bus voltage values, the original outlier amplitude in the bus dynamic voltage value sequence is obtained, and according to the similarity of the original outlier amplitudes between all bus dynamic voltage value sequences, the original outlier amplitudes of all the bus dynamic voltage value sequences are respectively subjected to data preprocessing to obtain the target outlier amplitude; according to the target outlier amplitudes of all the bus dynamic voltage value sequences, the corresponding bus dynamic voltage value sequences are autonomously reduced by a data algorithm in turn. Among them, analytical operations are performed on all the outlier and unreasonable value points in the bus dynamic voltage value sequence to obtain the corresponding original outlier amplitude. At the same time, according to the different abnormal characteristics between buses in different lines, the corresponding bus dynamic voltage value sequence original outlier amplitude is processed by data preprocessing. This step further improves the data accuracy and obtains a more reliable and accurate target outlier amplitude. Therefore, the bus dynamic voltage value sequence with an abnormal probability can be reliably reduced by the corresponding algorithm operation, that is, the original data is completely restored without causing any distortion. At the same time, for the normal and safe bus dynamic voltage value sequence, the Take lossy reduction, and use data algorithm to reduce the bus dynamic voltage value sequence independently. Although the original data cannot be completely restored after decompression, the lost part has little impact on the original data, but it gains a larger compression space, while ensuring the improvement of the efficiency of reduction and decompression and the accuracy of data after reduction; the above steps ultimately improve the accuracy of the bus voltage value transmitted to the PLC programmable logic controller and remove abnormal interference values, so that the PLC programmable logic controller can judge the voltage value more quickly and close the locking contact in time, effectively eliminating the safety risk of false operation of the fault decoupling device and protecting the safe and reliable operation of the power grid.

[0081] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in the field should understand that the specific implementation methods of the present invention can still be modified or replaced by equivalents. Any modification or equivalent replacement that does not depart from the spirit and scope of the present invention should be covered by the scope of protection of the claims of the present invention.

Claims

1. A method for handling a universal fault disconnect locking device, characterized in that: The voltage sensor collects multiple bus voltage values ​​in the line and transmits the voltage values ​​to the PLC programmable logic controller. The PLC then enters the logic judgment module to determine whether the voltage value is in a voltage instantaneous drop state. If it is determined to be a voltage drop, the programmable delay relay is used to output the voltage instantaneous drop locking contact, and the normally open locking contact is controlled to close through the programming language to achieve controllable opening of the device locking contact. Based on the voltage slip locking logic, a voltage instantaneous drop locking judgment program is designed to control the closing of the normally open locking contact, so that the device has a voltage instantaneous drop locking function when only the bus voltage is connected.

2. A method for handling a universal fault disconnect locking device according to claim 1, characterized in that: The voltage sensor collects bus voltage values ​​at no less than three locations in the access line within a specified time limit, constructs a bus dynamic voltage value sequence, obtains a relative dynamic difference between adjacent bus voltage values ​​in the line based on a certain bus dynamic voltage value sequence, and further obtains outlier probability fluctuation amplitudes of all relevant bus voltage values ​​in the bus dynamic voltage value sequence in the line, and obtains bus voltage values ​​of one or more possible outliers based on a corresponding comparison of all bus voltage value outlier probability fluctuation amplitudes with the bus voltage values ​​in the bus dynamic voltage value sequence; Based on the azimuth phase spacing of all possible outlier bus voltage values ​​in the bus dynamic voltage value sequence and the outlier probability fluctuation amplitude of the possible outlier bus voltage values, the original outlier amplitude in the bus dynamic voltage value sequence is obtained. According to the similarity of the original outlier amplitudes between all bus dynamic voltage value sequences, the original outlier amplitudes of all the bus dynamic voltage value sequences are subjected to data preprocessing to obtain the target outlier amplitude.

3. A method for handling a universal fault disconnect locking device according to claim 2, characterized in that: According to the target outlier amplitudes of all the bus dynamic voltage value sequences, the corresponding bus dynamic voltage value sequences are reduced in turn by autonomously using a data algorithm.

4. A method for handling a universal fault disconnect locking device according to claim 2, characterized in that: The relative dynamic difference between adjacent bus voltage values ​​in the line, and then the outlier probability fluctuation amplitude of all relevant bus voltage values ​​in the bus dynamic voltage value sequence in the line are obtained, including: All bus voltage values ​​in the bus dynamic voltage value sequence, i.e., value points, are numbered as value point 1, value point 2, ..., value point n, where n ≥ 3, and then an xy coordinate axis of the bus dynamic voltage value sequence is created, with time as the x-axis and the bus voltage value as the y-axis; Based on the busbar dynamic voltage value sequence, excluding the first value point 1, a value point t , t∈(2,n), and the value points are sequentially placed in the xy coordinate axis. t With the previous value point t-1 The line Y1 is connected to the x-axis to form an angle θ1, and the corresponding angle tangent value tanθ1 is obtained. Once again, the value point t and the next value point t+1 The line Y2 is connected to the x-axis to form an angle θ2, and the corresponding tanθ2 is obtained. Finally, the absolute value of tanθ1-tanθ2 is taken. In the xy coordinate axis of the busbar dynamic voltage value sequence, according to a certain value point t With the previous value point t-1 Forming the tanθ1 corresponding to the line Y1, the certain value point t All value points on the left, from value point 3, value point 4, ..., to value point t-1 The tangent value of the angle between each value point and the previous value point and the x-axis is compared with tanθ1. If tanθ1>0, take the first occurrence of a value point t The value point when the tangent value of the angle formed by the left value point is less than 0. If tanθ1<0, take the first occurrence of a certain value point t When the tangent value of the angle formed by the left value point is greater than 0, the final value point is the expected value point 1; based on a certain value point t and the next value point t+1 Forming the tanθ2 corresponding to the line Y2, the certain value point t All value points on the right, from value point t+1 , worth a point t+2 ,…, to the value point n-1 The tangent value of the angle between each value point and the next value point and the x-axis is compared with tanθ2. If tanθ2>0, take the first occurrence of a value point t The value point when the tangent value of the angle formed by the right value point is less than 0. If tanθ2<0, take the first occurrence of a certain value point t When the tangent value of the angle formed by the right value point is greater than 0, the final value point is the expected value point 2; In the xy coordinate axis of the busbar dynamic voltage value sequence, the calculation is performed from the value point t To the left to the expected value point 1, from the expected value point 1, ..., value point t-1 , to the value point t The length of the line segment between each two adjacent value points is calculated as follows: t-3 The coordinates are (x t-3 ,y t-3 ), the adjacent value point takes the value point on the right t-2 The coordinates are (x t-2 ,y t-2 ), Then, the length of the line segment between each two adjacent value points is obtained, and the sum of the cumulative superposition is the expected distance value 1; Operation from the value point t Go right to the expected value point 2, from the value point t , worth a point t+1 , ..., the value after the cumulative superposition and summation of the lengths of the line segments between each two adjacent value points to the expected value point 2 is the expected distance value 2. The calculation method of the expected distance value 2 is the same as the calculation method of the expected distance value 1; then take the average of the expected distance value 1 and the expected distance value 2; The product of the absolute value of tanθ1-tanθ2 and the mean of the expected distance value 1 and the expected distance value 2 is the certain value point t The fluctuation amplitude of the outlier probability is 5. A method for handling a universal fault disconnect locking device according to claim 4, characterized in that: The outlier probability fluctuation amplitude of the value point 1 that is at the first position in the busbar dynamic voltage value sequence is taken as 0.

6. A method for handling a universal fault disconnect locking device according to claim 2, characterized in that: The bus voltage values ​​of all bus voltage value outlier probability fluctuation amplitudes are compared with the bus voltage values ​​in the bus dynamic voltage value sequence to obtain one or more bus voltage values ​​that may have outlier fluctuations, including: A reasonable limit value of the outlier probability fluctuation amplitude is set in advance, and the outlier probability fluctuation amplitude of each value point is compared with the limit value. When the outlier probability fluctuation amplitude of a certain value point is ≥ the outlier probability fluctuation amplitude limit value, it is judged that the value point is a value point with possible outlier fluctuation.

7. A method for handling a universal fault disconnect locking device according to claim 2, characterized in that: The method of obtaining the original outlier amplitude in the bus dynamic voltage value sequence based on the azimuth phase spacing of all possible outlier-fluctuating bus voltage values ​​in the bus dynamic voltage value sequence and the outlier probability fluctuation amplitude of the possible outlier-fluctuating bus voltage values ​​comprises: According to the outlier probability fluctuation amplitudes of all the possible outlier fluctuation value points, calculating the total sum of the outlier probability fluctuation amplitudes of all the possible outlier fluctuation value points and the outlier probability fluctuation amplitude standard deviation of a certain possible outlier fluctuation value point; According to the position of a possible outlier value point in the busbar dynamic voltage value sequence, the phase spacing value of each two adjacent possible outlier value points is obtained, the phase spacing value standard deviation between all phase spacing values ​​is obtained, and then the maximum phase spacing value between the first possible outlier value point and the last possible outlier value point in the busbar dynamic voltage value sequence is obtained; The entropy value is obtained by dividing the highest phase spacing value obtained by the time span of the busbar dynamic voltage value sequence, and then the standard deviation of the outlier probability fluctuation amplitude is added to the standard deviation of the phase spacing values ​​between all phase spacing values ​​to obtain the corresponding sum value, then the exponential function value = e -和值 ; Then the original outlier amplitude is the product of the sum of the entropy value, the exponential function value and the outlier probability fluctuation amplitude.

8. A method for handling a universal fault disconnect locking device according to claim 2, characterized in that: According to the similarity of the original outlier amplitudes between all bus dynamic voltage value sequences, a data preprocessing method is applied to the original outlier amplitudes of all the bus dynamic voltage value sequences to obtain the target outlier amplitude, including: For a certain bus dynamic voltage value sequence, the absolute values ​​of the differences between the original outlier amplitudes of the bus dynamic voltage value sequence and all other bus dynamic voltage value sequences are taken in descending order, and the lowest absolute value of the original outlier amplitude difference at the end of the descending order is taken. At the same time, the original outlier amplitude of the bus dynamic voltage value sequence is divided by the obtained lowest value to obtain the corresponding entropy value, and the entropy value is the target outlier amplitude of the certain bus dynamic voltage value sequence.

9. A method for handling a universal fault disconnect locking device according to claim 3, characterized in that: Based on the pre-set limit value of the outlier amplitude, for a certain bus dynamic voltage value sequence, when the target outlier amplitude of the bus dynamic voltage value sequence is greater than or equal to the limit value, the bus dynamic voltage value sequence is subjected to a logarithmic transformation method to obtain the corresponding logarithmic pair 1, and then the logarithmic pair 1 is operated through the RLE algorithm to obtain the reduced data.

10. A method for handling a universal fault disconnect locking device according to claim 9, characterized in that: When the target outlier amplitude of the bus dynamic voltage value sequence is less than the limit value, a logarithmic transformation method is applied to the bus dynamic voltage value sequence to obtain a corresponding logarithmic logarithm column 2. For a certain logarithmic value in the logarithmic logarithm column 2, the absolute value of the difference between the certain logarithmic value and its left adjacent logarithmic value is taken as the logarithmic difference 1, and the absolute value of the difference between the certain logarithmic value and its right adjacent logarithmic value is taken as the logarithmic difference 2. The obtained logarithmic difference 1 and logarithmic difference 2 are then sorted in descending order to obtain the smallest value at the end. When the smallest value is less than a preset constant value, the certain logarithmic value is replaced by the logarithmic value mapped to the minimum value. Search all the logarithmic values ​​in the logarithmic sequence 2 in sequence, repeat the logarithmic value replacement operation mapped to the minimum value according to the required steps, obtain the replaced new logarithmic sequence 2, and then operate the replaced new logarithmic sequence 2 through the RLE algorithm to obtain the reduced data.

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