461 results about "Access line" patented technology

An access server architecture, and methods for use of the architecture, are disclosed. The architecture and methods are designed to increase the scalability of and balance processor load for a network access server. In this architecture, packet forwarding and packet processing are distributed amongst the cards serving the low-speed access lines, such that each line card is responsible for performing forwarding and packet processing for packets associated with the low-speed ports that line card serves. As the number of line cards expands, forwarding resources are expanded in at least rough proportion. The NAS route switch controller, and the high-speed ports, are largely relieved of packet processing tasks because the egress port uses a distribution engine that performs a cursory examination on one or more header fields on packets received—comprehending only enough information to allow each packet to be distributed to the appropriate line card for full processing.

A substantially automatic blood parameter testing apparatus for obtaining a blood sample and determining the concentration of at least one analyte is connected to a venous or arterial access line and further comprises a pump fixedly attached to a tube originating from the vascular access point; a valve fixedly attached to the tube and located above the pump mechanism; at least one measurement element; a needleless port; and an electronic meter. In addition, the automated blood parameter testing apparatus may be integrated into a complete system, further including a monitor and a central monitoring station.

A system, method and computer program product are described, by which a user, through a control interface in a subscriber interface device, requests from network intelligence both transport network bandwidth and type of service line mode as part of call setup. An improved system by which requests to change access line mode and bandwidth are communicated over transmission facilities via D channels through local switch fabric to local or remote network intelligence is detailed. Connections over the transmission facilities, established between user B channels and B channels of transport bandwidth or between user B channels and the Stat Mux function, are described. An improved system is summarized, in which connections directly to transport bandwidth support point-to-point n B+D upstream and m B+D downstream service, and connections via stat mux allow connectionless traffic to share a portion of the transport bandwidth on an as needed basis. The ability to request and change access to available bit rate (ABR), variable bit rate (VBR) and constant bit rate (CBR) services, in a connection-oriented (CONS) or connectionless (CLNS) network, are described.

Memory arrays and methods of their formation are disclosed. One such memory array has memory-cell strings are formed adjacent to separated substantially vertical, adjacent semiconductor structures, where the separated semiconductor structures couple the memory cells of the respective strings in series. For some embodiments, two dielectric pillars may be formed from a dielectric formed in a single opening, where each of the dielectric pillars has a pair of memory-cell strings adjacent thereto and where at least one memory cell of one of the strings on one of the pillars and at least one memory cell of one of the strings on the other pillar are commonly coupled to an access line.

The present invention relates to a handover technique used in a mobile communications system. For instance, a mobility management node selects an access line to be used for transferring application data, on the basis of the type of application data (http, ftp, voip, or the like) to be transferred from a communication node at the other end to a mobile node, and transfers the application data by means of the selected access line. As a result, a plurality of access lines connected simultaneously to the mobile node can be used according to the type of application, such as http, ftp, voip, or the like. Therefore, the quality desired by a user is ensured, and an attempt to effectively utilize a network can be realized.

A communication device according to the present invention enhances transfer of time-critical data between one or more LANs and a device (e.g., edge router, etc.) coupled to a backbone network. A virtual bottleneck in the form of a queue is introduced by the communication device at the customer premises or customer end of a backbone network access line where the network congestion or bottleneck resides. The virtual bottleneck delays and / or discards time insensitive traffic prior to time-critical or voice traffic being delayed in the edge router. This is accomplished by the virtual bottleneck queue including a storage capacity or length less than that of a queue utilized by the edge router. A traffic manager or scheduler controlling the virtual bottleneck dynamically adjusts the virtual bottleneck based on the bandwidth required for time-critical packets to ensure sufficient bandwidth is available for those packets.

Methods and apparatus for aggregating communication channels. In one exemplary embodiment an aggregation device is required only on one side of the set of communication channels being aggregated. Advantageously, no modifications to the source and / or destination of data transfers are required for operation of the invention. In one embodiment utilized for data transfers in the downstream direction, object download requests can be fulfilled by sending a sequence of partial download requests through the set of communication channels being aggregated, and forwarding the resulting partial data objects received to the original requester in the proper order. In another embodiment utilized for upstream data transfers, traffic is bifurcated to travel along a set of communication channels, and the bifurcated traffic is reassembled either at the network layer or the transport layer.

Memory devices and methods for operating such devices are described herein. A memory cell as described herein comprises a transistor electrically coupled to first and second access lines. A programmable resistance memory element is arranged along a current path between the first and second access lines. A capacitor is electrically coupled to the current path between the first and second access lines.

The present invention provides a data communication technology which is capable of securing flexibly a bandwidth for a traffic that is generated and which enables effective use of access lines or wireless resource. A mobile router uses a plurality of communication means, retains a plurality of narrow band communication routes for communicating with the home agent, and configures a broad band communication route by using the plurality of the narrow band communication routes as a single logical communication route. This enables a bandwidth to be flexibly secured in accordance with the traffic which is generated in the mobile network. In this case, the home agent is enabled to effectively use the access lines by referring to the route information so as to determine the destination address. Furthermore, it is possible to save the wireless resource under the initiative of the user by dynamically connecting to an alternative line or disconnecting a line which is being used in response to a request of the user.

Semiconductor arrays including a plurality of access devices disposed on a buried conductive line and methods for forming the same are provided. The access devices each include a transistor having a source region and drain region spaced apart by a channel region of opposite dopant type and an access line associated with the transistor. The access line may be electrically coupled with one or more of the transistors and may be operably coupled to a voltage source. The access devices may be formed in an array on one or more conductive lines. A system may be formed by integrating the semiconductor devices with one or more memory semiconductor arrays or conventional logic devices, such as a complementary metal-oxide-semiconductor (CMOS) device.

A technique for detecting a fiber fault in a WDM optical access network includes launching a test signal into a fiber trunk line linking a central office (“CO”) to a remote node (“RN”) of the WDM optical access network. The test signal is generated by an optical time domain reflectometry unit to simultaneously fault test fiber access lines linking the RN to customer premises. The test signal is separated from downstream WDM signals at the RN. The test signal is power split at the RN into a plurality of access line test signals. The access line test signals are each recombined with a corresponding one of the downstream WDM signals onto a corresponding one of the fiber access lines. Test signal reflections are received at the CO from the fiber access lines as a reflection signature and analyzed to identify a location of the fiber fault.

The invention embodiment discloses a method and a device for forwarding a data frame based on line bundle. The method for forwarding the data frame based on line bundle comprises the following steps: acquiring a first data frame transmitted by a user side or a network side; dividing the first data frame when the first data frame is greater than the maximum transmission unit MTU of any access linebundled to the user, wherein the sub data frames obtained from division are all less than or equal to the MTU; adding logical identifiers corresponding to the access line bundled to the user to the sub data frames; and transmitting a second data frame comprising the sub data frames and the logical identifiers of the sub data frames so that the data frame can be reformed after being received at anopposite end. The method and the device for forwarding the data frame based on the line bundle increase the bandwidth of the access line, prolong the transmission distance and improve the transmission reliability on the basis of ensuring the transmission quality of the access line.

A method and a system using the method enabling to decrease required resource for the bandwidth reservation in an inter-site connection network used for communication between communication sites. The aggregation of bandwidth is considered for allocating bandwidth in the inter-site connection network. The network consists of a plurality of nodes each having a packet switch, and a plurality of user sites each constituted by a host or an internal network respectively connected to the plurality of nodes via access lines. With respect to the plurality of user sites, when one user site is to be connected to the other site through the network, a necessary and sufficient bandwidth for interconnecting between the user site and the other is calculated according to the bandwidth of the access line connecting the user site to the network considered as a minimal bandwidth. Based on the calculated result, the bandwidth is allocated to the plurality of nodes.

An access server architecture, and methods for use of the architecture, are disclosed. The architecture and methods are designed to increase the scalability of and balance processor load for a network access server device. In this architecture, packet forwarding and packet processing are distributed amongst the cards serving the low-speed access lines (i.e., line cards), such that each line card is responsible for performing forwarding and packet processing for packets associated with the low-speed ports that line card serves. Thus, as the number of line cards expands, forwarding resources are expanded in at least rough proportion. The NAS route switch controller, as well as the high-speed ports used to access the network, are largely relieved of packet processing tasks for traffic passing through the server. The egress port uses a distribution engine that performs a cursory examination on one or more header fields on packets received at the high-speed interface-comprehending only enough information to allow each packet to be distributed to the appropriate line card for full packet processing. The route switch controller updates the routing information needed by each distribution or forwarding engine, and is largely uninvolved in the processing of individual packets.

A method is disclosed for forming a memory device having buried access lines (e.g., wordlines) and buried data / sense lines (e.g., digitlines) disposed below vertical cell contacts. The buried wordlines may be formed trenches in a substrate extending in a first direction, and the buried digitlines may be formed from trenches in a substrate extending in a second direction perpendicular to the first direction. The buried digitlines may be coupled to a silicon sidewall by a digitline contact disposed between the digitlines and the silicon substrate.

An LRU array and method for tracking the accessing of lines of an associative cache. The most recently accessed lines of the cache are identified in the table, and cache lines can be blocked from being replaced. The LRU array contains a data array having a row of data representing each line of the associative cache, having a common address portion. A first set of data for the cache line identifies the relative age of the cache line for each way with respect to every other way. A second set of data identifies whether a line of one of the ways is not to be replaced. For cache line replacement, the cache controller will select the least recently accessed line using contents of the LRU array, considering the value of the first set of data, as well as the value of the second set of data indicating whether or not a way is locked. Updates to the LRU occur after each pre-fetch or fetch of a line or when it replaces another line in the cache memory.

A driving scheme and pixel circuits therein for active matrix light-emitting device displays are provided. The driving scheme is structured to perform both line selection of and power delivery to the pixels via the same scan-power electrode, as opposed to conventional approach where scanning and drive are performed via separate access lines, thereby allowing more compact pixel design and better utilization of light emitting area. Furthermore, this driving scheme provides a dynamic reference for the active elements in a pixel, creating a different design concept and greater flexibility for pixel circuits. Embodiments of pixel circuits employing this driving scheme are exemplified in this disclosure.

Methods and an intermediary device are disclosed for sending a civic address and other information from the intermediary device to an apparatus associated with a predefined number (such as Public Safety Answering Point). The civic address may include a street number, street name, street type, and postal mailing code, all of which may be associated with a wireless calling access line assigned to the intermediary device. A calling mechanism (e.g., a telephone) operating in an off-hook state initiates a communication with the apparatus. The intermediary device may enter the off-hook state in response to the calling mechanism entering the off-hook state. The intermediary device can continue to operate in the off-hook state so as to send the civic address to the apparatus (e.g., a PSAP) even if the calling mechanism switches to an on-hook state prior to the civic address being sent to the apparatus.

The invention discloses a method for developing services in wideband network, and its kernel: a device in wideband access network system loads access line information of wideband service access layer device and wideband service access node device into DHCP message and transmits the DHCP message to a server; the server develops services according to the access line information. And it can make the server obtain complete user access line information, beneficial to fast determining position of an access user and raising user failure processing efficiency and accuracy and beneficial for a policy server to select more appropriate service policies and accurately and rapidly issue them all the more.

Apparatuses, memory section control circuits, and methods of refreshing memory are disclosed. An example apparatus includes a plurality of memory sections and a plurality of memory section control circuits. Each memory section control circuit is coupled to a respective one of the plurality of memory sections and includes a plurality of access line drivers, each of which includes a plurality of transistors having common coupled gates. During an operation of the apparatus a first voltage is provided to the commonly coupled gates of the transistors of at least some of the access line drivers of the memory section control circuit coupled to an active memory section and a second voltage is provided to the commonly coupled gates of the transistors of the access line drivers of the memory section control circuit coupled to an inactive memory section control circuit, wherein the first voltage is greater than the second voltage.

The invention provides a liquid crystal display panel, comprising a plurality of scan lines fabricated along a first axis, a plurality of data lines fabricated along a second axis, a first pixel and a second pixel. Each of the first and second pixels is surrounded by two adjacent scan lines and two adjacent data lines. The first pixel comprises a first thin film transistor (TFT). The second pixel comprises a second and a third TFT. The gates of the second and third TFT are electrically connected to the two adjacent scan lines surrounding the second pixel, respectively. The third TFT further comprises a source electrically connected to a photo-sensor, and a drain electrically connected to an access line fabricated along the second axis. One end of the access line is electrically connected to a signal processor via a switch.

Embodiments are provided that include a memory system that includes a memory system, having an access device coupled between a global line and a local line and a voltage source coupled to the global line and configured to output a bias voltage on the global line when the memory system is in a non-operation state. The access device is selected when the memory system is in the non-operation state, and the access device is deselected when the memory system is in an other state. Further embodiments provide, for example, a method that includes coupling a global access line to a local access line, biasing the local access line to a voltage other than a negative supply voltage while a memory device is in a first state and uncoupling the global access line from the local access line while the memory device is in an other state.

The invention discloses a synchronous control circuit for rail-vehicle-rescue emergency braking. Normally-closed contact coupling a relay and emergency braking relays are parallelly connected into emergency-braking train-line loops of lead vehicles of rescue vehicles and failed vehicles, and are used for rebuilding the emergency-braking train-line loops after rescue trains and failed trains are coupled; meanwhile, braking isolating switches are arranged on the lead vehicles of the rescue vehicles and the failed vehicles, rescue head-and-tail relays and braking isolating relays are parallelly connected, emergency-braking-button normally-closed contact of a driver table is connected into the emergency-braking train-line loops in a series mode, braking isolating electromagnetic valves of all the vehicles are parallelly connected into an emergency train-line loop, power is supplied through the emergency train-line loop, the emergency train-line loop is controlled to control the braking isolating electromagnetic valves, and under the working condition that rescue is achieved, emergency-braking synchronous control is achieved. A control method is safe and reliable, the synchronism is accurate, the purchasing expense of a whole project is saved more than 3-million yuan, device installation space is saved, and installation space and maintaining space are guaranteed for full power vehicles and unmanned driving vehicles.

When the provider edge PE1 detects the occurrence of a failure at the access line AL1, it sends the label withdraw message to the virtual circuit VC1, and when the provider edge PE2 receives the label withdraw message sent via the virtual circuit VC1, the access line AL2 is put to a link down state, and when the customer edge CE2 detects the link down state of the access line AL2, it switches from the normal path to the redundant path.

An interface device is disclosed for simultaneously connecting access lines to stations. Any one of the stations answers an incoming call from any one of the access lines. The interface device has line access modules each connected to a respective access line, and station access modules each connected to a respective station. A switching network selectively connects at least one of the line access modules to at least one of the station access modules. The switching network is controlled by a control unit in accordance with a predetermined sequence stored in the control unit or selected signals received from the stations through the station access modules. A speech synthesizer provides an audio signal to the stations indicating status the interface device, as well as available features and options of the interface device and the access lines. The control unit provides internal bridging of station access modules to the same access line module. In a private mode, the control unit prevents further connections and interruptions of a private connection between a station access module and an access line module. In response to a ring signal from one of the access lines, the control unit provides a ringing tone to all or selected stations which have no calls in progress, and optionally provides a line waiting tone to the stations which have calls in progress.

An architecture for distributing digital information to subscriber units wherein selection from among multiple digital services is accomplished by transmitting a tuning command from a subscriber unit to an intermediate interface. The intermediate interface selects the desired service from a broadband network and transmits it to the subscriber unit over a bandwidth-constrained access line. The bandwidth-constrained access line may be implemented with existing infrastructure, yet the subscriber unit may access a wide variety of digital information available on the broadband network. Universal broadband access is thus provided at low cost. Output bandwidth of broadcast equipment may also be optimized.

A virtual private network includes an internet protocol (IP) network and a public switched telephone network (PSTN). An enterprise gateway is operably connected to the IP network. The enterprise gateway is operably connected to a switch of the PSTN through a direct access line (DAL). The set-up signaling for virtual private network calls and the calls themselves are transported across the internet protocol network and the public switched telephone network through the direct access line.