Level signal conversion circuit and method, vehicle-mounted controller and vehicle

Abstract

The invention provides a level signal conversion circuit and method, a vehicle-mounted controller and a vehicle, and relates to the technical field of electronic information, in particular to the technical fields of automatic driving, power management, interface circuit design and the like. Specifically, the level signal conversion circuit comprises a controller and N level signal conversion modules; wherein the controller is respectively connected with the N level signal conversion modules; the N level signal conversion modules are connected with N power supply signals with different voltage standards in a one-to-one correspondence manner and are connected to the same signal output end; the controller is used for selecting a target conversion module from the N level signal conversion modules; and the target conversion module is used for converting a target power supply signal connected with the target conversion module in the N power supply signals to obtain a target high-level signal, and outputting the target high-level signal through the signal output end. The reusability of the level signal conversion circuit can be improved, and meanwhile, the application cost of the level signal conversion circuit is reduced.

Description

Technical Field

[0001] The present disclosure relates to the field of electronic information technology, in particular to technical fields such as autonomous driving, power management, and interface circuit design, and specifically to a level signal conversion circuit, method, vehicle-mounted controller, and vehicle. Background Art

[0002] A level signal conversion circuit is a circuit used to convert input signals into specific level signals that meet the driving requirements of a target device (e.g., circuit, chip, component, etc.), ensuring that the converted specific level signal can effectively drive the target device. Summary of the Invention

[0003] The present disclosure provides a level signal conversion circuit, method, vehicle-mounted controller and vehicle.

[0004] According to a first aspect of the present disclosure, a level signal conversion circuit is provided, comprising a controller and N level signal conversion modules; wherein the controller is connected to each of the N level signal conversion modules; the N level signal conversion modules are connected to N power supply signals having different voltage standards in a one-to-one correspondence and are connected to the same signal output terminal; N is an integer and is greater than or equal to 2;

[0005] The controller is used to select a target conversion module from N level signal conversion modules;

[0006] The target conversion module is used to convert the target power signal to obtain a target high-level signal, and output the target high-level signal through the signal output terminal; wherein the target power signal is the power signal connected to the target conversion module among the N power signals.

[0007] According to a second aspect of the present disclosure, a level signal conversion method is provided for use in a level signal conversion circuit including a controller and N level signal conversion modules; wherein the controller is connected to each of the N level signal conversion modules; the N level signal conversion modules are connected to N power supply signals having different voltage standards in a one-to-one correspondence and are connected to the same signal output terminal; N is an integer and is greater than or equal to 2; the method comprises:

[0008] The controller selects a target conversion module from N level signal conversion modules;

[0009] The target conversion module converts the target power signal to obtain a target high-level signal, and outputs the target high-level signal through the signal output terminal; wherein the target power signal is the power signal connected to the target conversion module among the N power signals.

[0010] According to a third aspect of the present disclosure, a vehicle-mounted controller is provided, comprising the level signal conversion circuit provided by the first aspect of the present disclosure.

[0011] According to a fourth aspect of the present disclosure, a vehicle is provided, comprising the on-board controller provided by the third aspect of the present disclosure.

[0012] According to a fifth aspect of the present disclosure, there is provided an electronic device, including:

[0013] at least one processor;

[0014] a memory communicatively coupled to the at least one processor;

[0015] The memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform at least part of the steps in the method provided in the first aspect of the present disclosure.

[0016] The present disclosure can improve the reusability of the level signal conversion circuit and reduce the application cost of the level signal conversion circuit.

[0017] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present disclosure, nor are they intended to limit the scope of the present disclosure. Other features of the present disclosure will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The accompanying drawings are provided to facilitate a better understanding of the present invention and do not constitute a limitation of the present disclosure.

[0019] Figure 1 A schematic structural diagram of a first level signal conversion circuit provided in an embodiment of the present disclosure;

[0020] Figure 2 A schematic structural diagram of a second level signal conversion circuit provided in an embodiment of the present disclosure;

[0021] Figure 3 A schematic structural diagram of a target level signal conversion unit provided in an embodiment of the present disclosure;

[0022] Figure 4 A schematic structural diagram of an idle level signal conversion unit provided in an embodiment of the present disclosure;

[0023] Figure 5 A schematic structural diagram of a third level signal conversion circuit provided in an embodiment of the present disclosure;

[0024] Figure 6 A schematic structural diagram of a fourth level signal conversion circuit provided in an embodiment of the present disclosure;

[0025] Figure 7 A schematic structural diagram of a fifth level signal conversion circuit provided in an embodiment of the present disclosure;

[0026] Figure 8 A schematic structural diagram of a sixth level signal conversion circuit provided in an embodiment of the present disclosure;

[0027] Figure 9 A schematic structural diagram of a seventh level signal conversion circuit provided in an embodiment of the present disclosure;

[0028] Figure 10 A schematic structural diagram of an eighth level signal conversion circuit provided in an embodiment of the present disclosure;

[0029] Figure 11 A schematic structural diagram of a low-level output unit provided in an embodiment of the present disclosure;

[0030] Figure 12 A schematic structural diagram of a ninth level signal conversion circuit provided in an embodiment of the present disclosure;

[0031] Figure 13 A schematic structural diagram of a tenth level signal conversion circuit provided in an embodiment of the present disclosure;

[0032] Figure 14 A schematic structural diagram of an eleventh level signal conversion circuit provided in an embodiment of the present disclosure;

[0033] Figure 15 A schematic structural diagram of a vehicle provided in an embodiment of the present disclosure;

[0034] Figure 16 A schematic flow chart of a level signal conversion method provided in an embodiment of the present disclosure;

[0035] Figure 17 A schematic structural block diagram of an electronic device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0036] The following description of exemplary embodiments of the present disclosure is made in conjunction with the accompanying drawings, including various details of the embodiments of the present disclosure to facilitate understanding, which should be considered as merely exemplary. Therefore, it should be appreciated by those skilled in the art that various changes and modifications may be made to the embodiments described herein without departing from the scope of the present disclosure. Similarly, for the sake of clarity and conciseness, descriptions of well-known functions and structures are omitted in the following description.

[0037] As mentioned above, the level signal conversion circuit is a circuit used to convert the input signal into a specific level signal that meets the driving requirements of the target device (e.g., circuit, chip, device, etc.), aiming to ensure that the converted specific level signal can effectively drive the target device.

[0038] However, the inventors have discovered that in the prior art, some level signal conversion circuits are generally only capable of outputting specific level signals of one voltage standard, and are unable to compatibly drive multiple target devices with different driving requirements. Therefore, these level signal conversion circuits have the problem of poor multiplexability. Although another part of the level signal conversion circuits can output multiple specific level signals of different voltage standards, generally speaking, these specific level signals need to be output one-to-one by multiple signal output terminals and connected one-to-one to multiple target devices by multiple external wiring harnesses. Therefore, the application cost of the level signal conversion circuit, for example, the cost of the external wiring harness, will increase.

[0039] In order to solve the above problems, the present disclosure provides a level signal conversion circuit. Figure 1 The level signal conversion circuit 100 includes a controller 101 and N level signal conversion modules 102. Moreover, the controller 101 is connected to the N level signal conversion modules 102 respectively; the N level signal conversion modules 102 are connected to N power supply signals VCC with different voltage standards in a one-to-one correspondence and are connected to the same signal output terminal Vout.

[0040] The controller 101 may be a field programmable gate array (FPGA), a microcontroller unit (MCU), a complex programmable logic device (CPLD), a central processing unit (CPU), a data processing unit (DPU), a system on chip (SOC), etc. Each of the N level signal conversion modules 102 may be a circuit module having a level signal conversion function composed of at least one circuit unit, and the N level signal conversion modules 102 may have the same or similar circuit structure. The N power supply signals VCC may include, but are not limited to, a power supply signal with a voltage standard of 12V, a power supply signal with a voltage standard of 5V, and a power supply signal with a voltage standard of 3.3V. Here, N ≥ 2 and is an integer.

[0041] In the disclosed embodiment, the controller 101 can be configured to select a target conversion module from N level signal conversion modules 102. The target conversion module can then convert a target power signal to obtain a target high-level signal and output the target high-level signal via a signal output terminal Vout. The target power signal can be the power signal VCC connected to the target conversion module among the N power signals VCC; the target high-level signal can be used to drive a target device. The target device can be a circuit, chip, device, etc., and specifically, a circuit, chip, device, etc. used in a vehicle.

[0042] For example, the controller 101 selects a first level signal conversion module from the N level signal conversion modules 102 as a target conversion module, and the power signal VCC connected to the first level signal conversion module (i.e., the target power signal) among the N power signals VCC is a 12V power signal. Then, the target conversion module converts the target power signal to obtain a target high-level signal with a voltage standard of 12V (specifically, it can be a target high-level signal with a voltage standard slightly less than 12V), and outputs the target high-level signal through the signal output terminal Vout to effectively drive a first target device. For another example, the controller 101 selects a second level signal conversion module from the N level signal conversion modules 102 as a target conversion module, and the power signal VCC connected to the second level signal conversion module (i.e., the target power signal) among the N power signals VCC is a 5V power signal. Then, the target conversion module converts the target power signal to obtain a target high-level signal with a voltage standard of 5V (specifically, it can be a target high-level signal with a voltage standard slightly less than 5V), and outputs the target high-level signal through the signal output terminal Vout to effectively drive a second target device. The driving requirement of the first target device may be to use a target high-level signal with a voltage standard of 12V as the driving signal; the driving requirement of the second target device may be to use a target high-level signal with a voltage standard of 5V as the driving signal.

[0043] The level signal conversion circuit 100 provided in the embodiment of the present disclosure can, after determining the driving requirements of the target device, select a target conversion module from the N level signal conversion modules 102 based on the determination, and then use the target conversion module to convert the target power signal (i.e., the power signal VCC of the N power signals VCC connected to the target conversion module) to obtain a target high-level signal that meets the driving requirements of the target device, and output the target high-level signal through the signal output terminal Vout to effectively drive the target device. In other words, in the embodiment of the present disclosure, the level signal conversion circuit 100 can not only compatibly drive multiple target devices with different driving requirements to improve its reusability, but also because the N level signal conversion modules 102 are connected to the same signal output terminal Vout, there is no need to equip multiple external wiring harnesses in the application scenario of the level signal conversion circuit 100, which can reduce the application cost of the level signal conversion circuit 100, such as the cost of the external wiring harness.

[0044] Furthermore, in an embodiment of the present disclosure, the controller 101 can be specifically configured to output a first disable signal to N-1 of the N level signal conversion modules 102, thereby selecting each of the N-1 level signal conversion modules 102 as an idle conversion module, and to output a first enable signal to the remaining conversion modules, excluding the idle conversion modules, of the N level signal conversion modules 102, thereby selecting the remaining conversion modules as target conversion modules. The signal attributes of the first disable signal and the first enable signal can be determined based on the circuit structure of the level signal conversion module 102. In one example, the first disable signal can be a high-level signal, and correspondingly, the first enable signal can be a low-level signal or a high-impedance signal. In another example, the first disable signal can be a low-level signal or a high-impedance signal, and correspondingly, the first enable signal can be a high-level signal. In the embodiment of the present disclosure, the first disable signal can be output by an input / output (I / O) port of the controller 101; the first enable signal can be output by another I / O port of the controller 101; the high-level signal can be a 1V level signal; and the low-level signal can be a level signal with a voltage standard of 0V.

[0045] In the disclosed embodiment, the target conversion module may be configured to, in response to a first enable signal, connect the signal path between the target power signal and the signal output terminal Vout, convert the target power signal to obtain a target high-level signal, and output the target high-level signal through the signal output terminal Vout. Correspondingly, the idle conversion module may be configured to disconnect the signal path between the idle power signal and the signal output terminal Vout in response to a first disable signal. The idle power signal may be a power signal VCC connected to the idle conversion module among the N power signals VCC.

[0046] Through the above settings, in the embodiment of the present disclosure, the target conversion module can be activated under the action of the first enable signal, that is, the signal path between the target power signal and the signal output terminal Vout is set to a connected state, and the target power signal is converted to obtain a target high-level signal, so as to output the target high-level signal through the signal output terminal Vout; correspondingly, the idle conversion module can be disabled under the action of the first disable signal, that is, the signal path between the idle power signal and the signal output terminal Vout is set to a disconnected state. In this way, it can be ensured that the signal output terminal Vout only maintains a connected state with one power signal VCC (that is, the target power signal) among the N power signals. In this way, after the target conversion module converts the target power signal to obtain the target high-level signal, the signal output terminal Vout can accurately output the target high-level signal, thereby improving the reliability of the level conversion circuit.

[0047] Please combine Figure 2 Furthermore, in the embodiment of the present disclosure, the target conversion module 202 may include a target level signal conversion unit 2021, wherein the control end of the target level signal conversion unit 2021 is connected to the controller 201, the input end of the target level signal conversion unit 2021 is connected to the target power supply signal VCC1, and the output end of the target level signal conversion unit 2021 is connected to the signal output end Vout. The target level signal conversion unit 2021 may be a circuit unit having a level signal conversion function and composed of at least one first electronic component. Here, the at least one first electronic component may include a switching element such as a transistor, a relay, or a photocoupler.

[0048] In the disclosed embodiment, the control terminal of the target level signal conversion unit 2021 can be configured to connect the input terminal of the target level signal conversion unit 2021 with the output terminal of the target level signal conversion unit 2021 in response to a connection control signal derived based on the first enable signal, thereby establishing a connection state between the target power signal VCC1 and the signal output terminal Vout. The input terminal of the target level signal conversion unit 2021 can be configured to receive the target power signal VCC1, thereby enabling the target level signal conversion unit 2021 to convert the target power signal VCC1 into a target high-level signal, which is then outputted via the output terminal of the target level signal conversion unit 2021 and the signal output terminal Vout. The connection control signal can be the first enable signal itself, or another control signal derived based on the first enable signal. In actual implementation, the signal attributes of the connection control signal can be determined based on the circuit structure of the target level signal conversion unit 2021. For example, the connection control signal can be a low-level signal or a high-impedance signal.

[0049] Correspondingly, in the embodiment of the present disclosure, the idle conversion module 203 may include an idle level signal conversion unit 2031, wherein the control end of the idle level signal conversion unit 2031 is connected to the controller 201, the input end of the idle level signal conversion unit 2031 is connected to the idle power supply signal VCC2, and the output end of the idle level signal conversion unit 2031 is connected to the signal output end Vout. The idle level signal conversion unit 2031 may have the same or similar circuit structure as the target level signal conversion unit 2021. That is, the idle level signal conversion unit 2031 may be a circuit unit having a level signal conversion function composed of at least one second electronic component. Here, the at least one second electronic component may include a switching element such as a transistor, a relay, or a photocoupler.

[0050] In the disclosed embodiment, the control terminal of the idle-level signal conversion unit 2031 can be configured to disconnect the input terminal of the idle-level signal conversion unit 2031 from the output terminal of the idle-level signal conversion unit 2031 in response to a disconnection control signal derived based on the first disable signal, thereby disconnecting the signal path between the idle power supply signal VCC2 and the signal output terminal Vout. The disconnection control signal can be the first disable signal itself, or another control signal derived based on the first disable signal. In actual implementation, the signal attributes of the disconnection control signal can be determined based on the circuit structure of the idle-level signal conversion unit 2031. For example, the disconnection control signal can be a high-level signal.

[0051] Through the above configuration, in the embodiment of the present disclosure, on the one hand, the control end of the target level signal conversion unit 2021, in response to the connection control signal obtained based on the first enable signal, sets the signal path between the target power signal VCC1 and the signal output terminal Vout to a connection state, thereby enabling the target power signal VCC1 to be accurately input into the target level signal conversion unit 2021 for conversion, and smoothly outputting the converted target high-level signal through its own output end and the signal output terminal Vout, thereby ensuring the reliability of the level signal conversion and output, while improving the controllability of the level signal conversion circuit 200. On the other hand, the control end of the idle level signal conversion unit 2031, in response to the disconnection control signal obtained based on the first disable signal, sets the signal path between the idle power signal VCC2 and the signal output terminal Vout to a disconnection state, thereby preventing other signals from interfering with the target high-level signal, thereby further ensuring the reliability of the level signal conversion and output, while further improving the controllability of the level signal conversion circuit 200.

[0052] Please combine Figure 3 In some optional embodiments, the target level signal conversion unit 300 may include a first resistor R1 and a first transistor T1. The first resistor R1 serves as a protection resistor for the first transistor T1 and may be a resistor with a resistance value of 47 kilo-ohms (KΩ). The first transistor T1 may be a metal-oxide-semiconductor field effect transistor (MOSFET), specifically a P-channel MOSFET, commonly known as a PMOS transistor.

[0053] Based on this, in the embodiments of the present disclosure, there may be:

[0054] A first end of the first resistor R1 is connected to the target power signal VCC1;

[0055] The source (S electrode) of the first transistor T1 serves as the input terminal of the target level signal conversion unit 300 and is connected to the target power signal VCC1;

[0056] The drain (D electrode) of the first transistor T1 serves as the output terminal of the target level signal conversion unit 300 and is connected to the signal output terminal Vout;

[0057] The gate (G) of the first transistor T1 serves as the control terminal of the target-level signal conversion unit 300 and is connected to a controller (e.g., the controller's I / O1 port) and the second end of the first resistor R1, respectively. In response to a connection control signal (i.e., a low-level signal or a high-impedance signal) derived based on the first enable signal Ves, the gate (G) of the first transistor T1 and the D of the first transistor T1 are turned on. In other words, the input of the target-level signal conversion unit 300 is connected to the output of the target-level signal conversion unit 300. The gate (G) of the first transistor T1, serving as the control terminal of the target-level signal conversion unit 300, can be directly connected to the controller or indirectly connected to the controller through another circuit unit (e.g., the target control signal conversion unit described below). When the gate (G) of the first transistor T1 is directly connected to the controller, the connection control signal can be the first enable signal Ves itself; when the gate (G) of the first transistor T1 is indirectly connected to the controller through another circuit unit, the connection control signal can be another control signal derived based on the first enable signal Ves.

[0058] Please combine Figure 4 Correspondingly, in the embodiment of the present disclosure, the idle level signal conversion unit 400 may include a third resistor R3 and a third transistor T3. The third resistor R3 serves as a protection resistor for the third transistor T3 and may be a resistor with a resistance value of 47KΩ. The third transistor T3 may be a MOSFET, specifically a P-channel MOSFET.

[0059] Based on this, in the embodiments of the present disclosure, there may be:

[0060] A first end of the third resistor R3 is connected to the idle power signal VCC2;

[0061] The S electrode of the third transistor T3 serves as the input terminal of the idle level signal conversion unit 400 and is connected to the idle power signal VCC2;

[0062] The D electrode of the third transistor T3 serves as the output terminal of the idle level signal conversion unit 400 and is connected to the signal output terminal Vout;

[0063] The G terminal of the third transistor T3 serves as the control terminal of the idle-level signal conversion unit 400 and is connected to the controller (e.g., the controller's I / O2 port) and the second end of the third resistor R3, respectively. In response to a disconnection control signal (i.e., a high-level signal) derived based on the first deactivation signal Vss, the S terminal and the D terminal of the third transistor T3 are turned off. In other words, the input terminal of the idle-level signal conversion unit 400 is disconnected from the output terminal of the idle-level signal conversion unit 400. The G terminal of the third transistor T3, serving as the control terminal of the idle-level signal conversion unit 400, can be directly connected to the controller or indirectly connected to the controller via another circuit unit (e.g., the idle control signal conversion unit described below). When the G terminal of the third transistor T3 is directly connected to the controller, the disconnection control signal can be the first deactivation signal Vss itself. When the G terminal of the third transistor T3 is indirectly connected to the controller via another circuit unit, the disconnection control signal can be another control signal derived based on the first deactivation signal Vss.

[0064] Through the above configuration, in the disclosed embodiments, a target level signal conversion unit can be implemented using a simple circuit structure. Specifically, the target level signal conversion unit can be implemented using a first resistor and a first transistor. Also, an idle level signal conversion unit can be implemented using a simple circuit structure. Specifically, the idle level signal conversion unit can be implemented using a third resistor and a third transistor. This reduces the hardware cost of the level signal conversion circuit, which in turn reduces the application cost of the level signal conversion circuit.

[0065] Please combine Figure 5 , exemplarily, the level signal conversion circuit 500 includes a controller 501 and two level signal conversion modules (ie, a target conversion module 502 and an idle conversion module 503). The target conversion module 502 includes a target level signal conversion unit 5021 having Figure 3 The circuit structure shown (i.e., including the first resistor R1 and the first transistor T1), and the G pole of the first transistor T1 is directly connected to the controller 501, specifically directly connected to the I / O1 port of the controller 501; the idle conversion module 503 includes an idle level signal conversion unit 5031 having Figure 4The circuit structure shown (i.e., including the third resistor R3 and the third transistor T3), and the G pole of the third transistor T3 is directly connected to the controller 501, specifically directly connected to the I / O2 port of the controller 501. Then, when the controller 501 outputs the first enable signal Ves (here, specifically a low-level signal or a high-impedance signal) as a connection control signal to the G pole of the first transistor T1 through the I / O1 port, the G pole of the first transistor T1 will respond to the connection control signal, so that the S pole of the first transistor T1 and the D pole of the first transistor T1 are in a conductive state, that is, the input end of the target level signal conversion unit 5021 and the output end of the target level signal conversion unit 5021 are in a connection state, and then the signal path between the target power supply signal VCC1 and the signal output end Vout is set to a connection state. In this way, the S pole of the first transistor T1 can receive the target power supply signal VCC1, so that when the target power supply signal VCC1 passes through the third resistor R3 and the third transistor T3, the target power supply signal VCC1 can be connected to the target power supply signal VCC1. After a transistor T1 is converted into a target high-level signal, the target high-level signal is output in sequence through the D-pole of the first transistor T1 and the signal output terminal Vout; when the controller 501 outputs the first deactivation signal Vss (here, specifically a high-level signal) as a disconnection control signal to the G-pole of the third transistor T3 through the I / O2 port, the G-pole of the third transistor T3 will respond to the disconnection control signal, so that the S-pole of the third transistor T3 and the D-pole of the third transistor T3 are in a cut-off state, and then the signal path between the target power supply signal VCC1 and the signal output terminal Vout is set to a disconnected state, that is, the input terminal of the idle-level signal conversion unit 5031 and the output terminal of the idle-level signal conversion unit 5031 are in a disconnected state.

[0066] However, affected by the selection result of the third transistor T3, the G pole of the third transistor T3 and the D pole of the third transistor T3 may need to be in the cut-off state only when the disconnection control signal received by the G pole of the third transistor T3 has a higher voltage standard (for example, greater than 1V), but in some cases, the high-level signal output by the controller 501 through the I / O2 port does not have a higher voltage standard; similarly, when it is necessary to switch the target conversion module 502 to a new idle conversion module, it may also be necessary for the G pole of the first transistor T1 to receive a current disconnection control signal with a higher voltage standard, so that the S pole of the first transistor T1 and the D pole of the first transistor T1 are in the cut-off state, but in some cases, the high-level signal output by the controller 501 through the I / O1 port does not have a higher voltage standard. Therefore, in Figure 5 In the illustrated level signal conversion circuit 500 , the first transistor T1 and the third transistor T3 may have a cutoff barrier problem, thereby affecting the controllability of the level signal conversion circuit 500 .

[0067] Based on this, please combine Figure 6To improve the controllability of the level signal conversion circuit 600, in the embodiment of the present disclosure, the target conversion module 602 may include, in addition to the target level signal conversion unit 6021, a target control signal conversion unit 6022. The control terminal of the target control signal conversion unit 6022 is connected to the controller 601 (for example, to the I / O1 port of the controller 601), the input terminal of the target control signal conversion unit 6022 is connected to the first ground signal GND1, and the output terminal of the target control signal conversion unit 6022 is connected to the control terminal of the target level signal conversion unit 6021. The target control signal conversion unit 6022 may be a circuit unit having a control signal conversion function composed of at least one third electronic component. Here, the at least one third electronic component may include a switching element such as a transistor, a relay, or a photocoupler.

[0068] In the embodiment of the present disclosure, the control end of the target control signal conversion unit 6022 can be used to respond to the first enable signal Ves, so that the input end of the target control signal conversion unit 6022 and the output end of the target control signal conversion unit 6022 are in a connected state, and the input end of the target control signal conversion unit 6022 can be used to receive the first ground signal GND1, so that the target control signal conversion unit 6022 converts the first ground signal GND1 to obtain a low-level signal as the connection control signal Vccs, and sends the connection control signal Vccs to the control end of the target level signal conversion unit 6021, that is, the gate G pole of the first transistor T1, through the output end of the target control signal conversion unit 6022, so that the S pole of the first transistor T1 and the D pole of the first transistor T1 are connected. In the on-state; on the contrary, when it is necessary to switch the target conversion module 602 to a new idle conversion module, the controller 601 can output a second deactivation signal to the control end of the target control signal conversion unit 6022, so that the input end of the target control signal conversion unit 6022 and the output end of the target control signal conversion unit 6022 are in a disconnected state, so that the control end of the target level signal conversion unit 6021 uses the high-level control signal (i.e., a signal with a higher voltage standard and a higher level) obtained based on the target power signal VCC1 and the first resistor R1 as the current disconnection control signal. In this way, the G electrode of the first transistor T1 will receive a current disconnection control signal with a higher voltage standard, so as to ensure that the S electrode of the first transistor T1 and the D electrode of the first transistor T1 are in a cut-off state. Among them, the high-level control signal obtained based on the target power signal VCC1 and the first resistor R1 can be understood as the signal with a higher voltage standard and a higher level obtained by the target power signal VCC1 after passing through the first resistor R1.

[0069] Correspondingly, in the embodiment of the present disclosure, the idle conversion module 603 may include, in addition to the idle level signal conversion unit 6031, an idle control signal conversion unit 6032. The control terminal of the idle control signal conversion unit 6032 is connected to the controller 601 (for example, to the I / O2 port of the controller 601), the input terminal of the idle control signal conversion unit 6032 is connected to the second ground signal GND2, and the output terminal of the idle control signal conversion unit 6032 is connected to the control terminal of the idle level signal conversion unit 6031. The idle control signal conversion unit 6032 may be a circuit unit having a control signal conversion function composed of at least one fourth electronic component. Here, the at least one fourth electronic component may include a switching element such as a transistor, a relay, or a photocoupler.

[0070] In the embodiment of the present disclosure, the control end of the idle control signal conversion unit 6032 can be used to respond to the first disable signal Vss, so that the input end of the idle control signal conversion unit 6032 and the output end of the idle control signal conversion unit 6032 are in a disconnected state, so that the control end of the idle level signal conversion unit 6031 uses the high level control signal (that is, a signal with a higher voltage standard and a higher level) obtained based on the idle power supply signal VCC2 and the third resistor R3 as the disconnection control signal Vdcs. In this way, the G pole of the third transistor T3 will receive a disconnection control signal Vdcs with a higher voltage standard to ensure that the S pole of the third transistor T3 and the D pole of the third transistor T3 are in a cut-off state; conversely, when it is necessary to switch the idle conversion module 603 to a new target conversion module, the control end can be used to connect the idle control signal to the idle level signal conversion unit 6031. The control terminal of the control signal conversion unit 6032 outputs a second enable signal. In response to the second enable signal, the control terminal of the idle control signal conversion unit 6032 connects the input terminal of the idle control signal conversion unit 6032 to the output terminal of the idle control signal conversion unit 6032. The input terminal of the idle control signal conversion unit 6032 can be used to receive the second ground signal GND2, so that the idle control signal conversion unit 6032 converts the second ground signal GND2 to obtain a low-level signal as the current connection control signal. The current connection control signal is then transmitted to the control terminal of the idle level signal conversion unit 6031, i.e., the gate G of the third transistor T3, via the output terminal of the idle control signal conversion unit 6032, thereby turning on the S and D terminals of the third transistor T3. The high-level control signal obtained based on the idle power supply signal VCC2 and the third resistor R3 can be understood as a higher voltage level signal obtained after the idle power supply signal VCC2 passes through the third resistor R3.

[0071] Through the above settings, in the embodiment of the present disclosure, the target control signal conversion unit 6022 can be used to effectively control the working state of the first transistor T1, and the idle control signal conversion unit 6032 can be used to effectively control the working state of the third transistor T3, thereby solving the cutoff obstacle problem that may exist in the first transistor T1 and the third transistor T3 and improving the controllability of the level signal conversion circuit 600.

[0072] Please combine Figure 7 In some optional embodiments, the target control signal conversion unit 7022 of the target conversion module 702 may include a second resistor R2 and a second transistor T2. The second resistor R2 may be a resistor with a resistance value of 4.7KΩ, serving as a pull-down resistor; and the second transistor T3 may be a MOSFET, specifically an N-channel MOSFET.

[0073] Based on this, in the embodiments of the present disclosure, there may be:

[0074] A first end of the second resistor R2 is connected to the first ground signal GND1;

[0075] The S electrode of the second transistor T2 serves as the input terminal of the target control signal conversion unit 7022 and is connected to the first ground signal GND1;

[0076] The D-pole of the second transistor T2 serves as the output terminal of the target control signal conversion unit 7022 and is connected to the control terminal of the target level signal conversion unit 7021;

[0077] The G electrode of the second transistor T2 serves as the control terminal of the target control signal conversion unit 7022 and is connected to the controller 701 (e.g., the I / O1 port of the controller 701) and the second end of the second resistor R2, respectively. In response to the first enable signal Ves (here, specifically a high-level signal), the S electrode of the second transistor T2 and the D electrode of the second transistor T2 are turned on. In other words, the input terminal of the target control signal conversion unit 7022 is connected to the output terminal of the target control signal conversion unit 7022. The G electrode of the second transistor T2, serving as the control terminal of the target control signal conversion unit 7022, can be connected to the controller 701 to receive the first enable signal Ves.

[0078] Correspondingly, the idle control signal conversion unit 7032 of the idle conversion module 703 may include a fourth resistor R4 and a fourth transistor T4. The fourth resistor R4 may be a resistor with a resistance value of 4.7KΩ, serving as a pull-down resistor; and the fourth transistor T4 may be a MOSFET, specifically an N-channel MOSFET.

[0079] Based on this, in the embodiments of the present disclosure, there may be:

[0080] A first end of the fourth resistor R4 is connected to the second ground signal GND2;

[0081] The source of the fourth transistor T4 serves as the input terminal of the idle control signal conversion unit 7032 and is connected to the second ground signal GND2;

[0082] The drain of the fourth transistor T4 serves as the output terminal of the idle control signal conversion unit 7032 and is connected to the control terminal of the idle level signal conversion unit 7031;

[0083] The gate of the fourth transistor T4 serves as the control terminal of the idle control signal conversion unit 7032 and is connected to the controller 701 (e.g., the I / O2 port of the controller 701) and the second end of the fourth resistor R4, respectively. In response to the first deactivation signal Vss (here, specifically a low-level signal), the S-pole and the D-pole of the fourth transistor T4 are turned off. In other words, the input terminal of the idle control signal conversion unit 7032 is disconnected from the output terminal of the idle control signal conversion unit 7032. The G-pole of the fourth transistor T4 serves as the control terminal of the idle control signal conversion unit 7032 and can be connected to the controller 701 to receive the first deactivation signal Vss.

[0084] Through the above configuration, in the embodiment of the present disclosure, the target control signal conversion unit 7022 can be implemented with a simple circuit structure. Specifically, the target control signal conversion unit 7022 can be implemented with the second resistor R2 and the second transistor T2. The idle control signal conversion unit 7032 can also be implemented with a simple circuit structure. Specifically, the idle control signal conversion unit 7032 can be implemented with the fourth resistor R4 and the fourth transistor T4. This can reduce the hardware cost of the level signal conversion circuit 700, which is equivalent to reducing the application cost of the level signal conversion circuit 700.

[0085] In addition, it should be noted that in the embodiment of the present disclosure, when the target power signal is not the power signal with the largest voltage standard among the N power signals, the target conversion module may include, in addition to the target level signal conversion unit, a target backflow prevention unit, and the input end of the target anti-backflow unit is connected to the output end of the target level signal conversion unit, and the output end of the target anti-backflow unit is connected to the signal output end, so as to prevent the backflow of the level signal from the target line. Here, the target line can be a line including the target power signal and the target level signal conversion unit, that is, the target anti-backflow unit can prevent the backflow of the level signal from the target line from the target power signal to the output end of the target level signal conversion unit, thereby improving the safety of the power module providing the target power signal.

[0086] In one example, the target backflow prevention unit may include a first diode, wherein the anode of the first diode serves as the input end of the target backflow prevention unit, and the cathode of the first diode serves as the output end of the target backflow prevention unit.

[0087] Similarly, when the idle power signal is not the power signal with the highest voltage standard among the N power signals, the idle conversion module may include, in addition to the idle level signal conversion unit, an idle backflow prevention unit, with the input of the idle backflow prevention unit connected to the output of the idle level signal conversion unit, and the output of the idle backflow prevention unit connected to the signal output terminal, to prevent backflow of level signals from the idle line. Here, the idle line is a line including the idle power signal and the idle level signal conversion unit. That is, the idle backflow prevention unit can prevent backflow of level signals from occurring on the idle line from the idle power signal to the output of the idle level signal conversion unit, thereby improving the safety of the power module providing the idle power signal.

[0088] In one example, the idle backflow prevention unit may include a second diode, wherein the anode of the second diode serves as the input terminal of the idle backflow prevention unit, and the cathode of the second diode serves as the output terminal of the idle backflow prevention unit.

[0089] Please combine the specific Figure 8 , exemplarily, the level signal conversion circuit 800 includes a controller 801 and two level signal conversion modules (ie, a target conversion module 802 and an idle conversion module 803). Among them, the target level signal conversion unit 8021 of the target conversion module 802 has Figure 7 The circuit structure shown (ie, including the first resistor R1 and the first transistor T1), the target control signal conversion unit 8022 has Figure 7 The circuit structure shown (ie, including the third resistor R2 and the third transistor T3); the idle level signal conversion unit 8031 ​​of the idle conversion module 803 has Figure 7 The circuit structure shown (ie, including the second resistor R2 and the second transistor T2), the idle control signal conversion unit 8032 has Figure 7The circuit structure shown (i.e., including the fourth resistor R4 and the fourth transistor T4) assumes that the target power signal VCC1 is the power signal with the highest voltage standard among the N power signals, for example, a 12V power signal, and the idle power signal VCC2 is not the power signal with the highest voltage standard among the N power signals, for example, a 5V power signal. In this case, the idle conversion module 803 may further include an idle backflow prevention unit 8033, namely, a second diode SD2, with the anode of the second diode SD2 connected to the output terminal of the idle level signal conversion unit 8031, and the cathode of the second diode SD2 connected to the signal output terminal Vout. The second diode SD2 is used to prevent the backflow of the level signal on the idle line from the idle power signal VCC2 to the output terminal of the idle level signal conversion unit 8031, thereby reducing the safety of the power module providing the idle power signal VCC2. For example, it can prevent the target high-level signal from flowing back through the idle level signal conversion unit 8031 ​​to the power module providing the idle power signal VCC2.

[0090] Through the above arrangement, in the embodiment of the present disclosure, when the target power signal VCC1 is not the power signal with the largest voltage standard among the N power signals, the backflow of the level signal on the target line from the target power signal VCC1 to the output end of the target level signal conversion unit 8021 can be prevented, thereby improving the safety of the power module providing the target power signal VCC1. In addition, when the idle power signal VCC2 is not the power signal with the largest voltage standard among the N power signals, the backflow of the level signal on the idle line from the idle power signal VCC2 to the output end of the idle level signal conversion unit 8031 ​​can be prevented, thereby improving the safety of the power module providing the idle power signal VCC2.

[0091] Please combine Figure 9 In the embodiment of the present disclosure, the level signal conversion circuit 900 includes, in addition to a controller 901 and N level signal conversion modules 902, a low-level output module 903 connected to the controller 901. The low-level output module 903 is connected to the third ground signal GND3 and the signal output terminal Vout, respectively. The low-level output module 903 can be a circuit module composed of at least one circuit unit and having a low-level signal output function.

[0092] Based on this, in the embodiment of the present disclosure, the controller 901 can also be used to output a low-level enable signal to the low-level output module 903, and the low-level output module 903 can be used to respond to the low-level enable signal, set the signal path between the third ground signal GND3 and the signal output terminal Vout to a connected state, and convert the third ground signal GND3 to obtain a target low-level signal, so as to switch the signal output terminal Vout from outputting a target high-level signal to outputting a target low-level signal, thereby switching the target device driven by the target high-level signal from a start-up state to a shutdown state. The signal properties of the low-level enable signal can be determined based on the circuit structure of the low-level output module 903. For example, the low-level enable signal can be a high-level signal, a low-level signal, or a high-impedance signal; the target low-level signal can be a level signal with a voltage standard of 0V.

[0093] Through the above settings, in the embodiment of the present disclosure, the controller 901 can output a low-level enable signal to the low-level output module 903, so that the low-level output module 903 responds to the low-level enable signal, sets the signal path between the third ground signal GND3 and the signal output terminal Vout to a connected state, and converts the third ground signal GND3 to obtain a target low-level signal, so as to switch the signal output terminal Vout from outputting a target high-level signal to outputting a target low-level signal, and then switches the target device driven by the target high-level signal from the startup state to the shutdown state, so as to achieve flexible control of the working state of the target device.

[0094] Please combine Figure 10 In some optional embodiments, the low-level output module 1004 of the level signal conversion circuit 1000 may include a low-level output unit 10041, wherein the control end of the low-level output unit 10041 is connected to the controller, the input end of the low-level output unit 10041 is connected to the third ground signal, and the output end of the low-level output unit 10041 is connected to the signal output end Vout. The low-level output unit 10041 may be a circuit unit having a low-level signal output function composed of at least one fifth electronic component. Here, the at least one fifth electronic component may include a switching element such as a transistor, a relay, or a photocoupler.

[0095] In the embodiment of the present disclosure, the control end of the low-level output unit 10041 can be used to respond to a low-level enable signal, so that the input end of the low-level output unit 10041 and the output end of the low-level output unit 10041 are in a connected state, so as to set the signal path between the third ground signal and the signal output end Vout to a connected state, and the input end of the low-level output unit 10041 can be used to receive the third ground signal, so that the low-level output unit 10041 converts the third ground signal to obtain a target low-level signal, and outputs the target low-level signal through the output end of the low-level output unit 10041 and the signal output end Vout in sequence.

[0096] Through the above arrangement, in the embodiment of the present disclosure, the control end of the low-level output unit 10041 is enabled in response to the low-level state, and the signal path between the third ground signal and the signal output end Vout is set to a connected state, so that the third ground signal can be accurately input into the low-level output unit 10041 for conversion, and the target low-level signal obtained by conversion can be smoothly output through its own output end and the signal output end Vout, thereby ensuring the reliability of the level signal conversion and output, and at the same time, improving the controllability of the level signal conversion circuit.

[0097] Please combine Figure 11 In some optional implementations, the low-level output unit 1100 may include a fifth resistor R5 and a fifth transistor T5. The fifth resistor R5 may be a resistor with a resistance value of 4.7KΩ, serving as a pull-down resistor; and the fifth transistor T5 may be a MOSFET, specifically an N-channel MOSFET.

[0098] Based on this, in the embodiments of the present disclosure, there may be:

[0099] A first end of the fifth resistor R5 is connected to the third ground signal GND3;

[0100] The S electrode of the fifth transistor T5 serves as the input terminal of the low level output unit 1100 and is connected to the third ground signal GND3;

[0101] The D electrode of the fifth transistor T5 serves as the output terminal of the low level output unit 1100 and is connected to the signal output terminal Vout;

[0102] The G electrode of the fifth transistor T5 serves as the control terminal of the low-level output unit 1100 and is connected to the controller (e.g., the I / O3 interface of the controller) and the second end of the fifth resistor R5, respectively, so as to be responsive to the low-level enable signal Vles (herein, specifically a high-level signal) to turn on the S electrode of the fifth transistor T5 and the D electrode of the fifth transistor T5, that is, to connect the input terminal of the low-level output unit 1100 to the output terminal of the low-level output unit 1100. The G electrode of the fifth transistor T5, as the control terminal of the low-level output unit 1100, can be directly connected to the controller to receive the low-level enable signal Vles.

[0103] Through the above configuration, in the embodiment of the present disclosure, the target low-level output unit 1100 can be realized by a simple circuit structure. Specifically, the low-level output unit 1100 can be realized by the fifth resistor R5 and the fifth transistor T5. In this way, the hardware cost of the low-level output unit 1100 can be reduced, which is equivalent to reducing the application cost of the level signal conversion circuit. In addition, Figure 11 As shown, in the embodiment of the present disclosure, when the low-level output unit 1100 is implemented by the fifth resistor R5 and the fifth transistor T5, a protection diode SD3 can also be added to the low-level output unit 1100 to clamp interference from high-level signals that may act on the fifth transistor T5, preventing the fifth transistor T5 from breaking down, thereby improving the reliability of the low-level output unit 1100 and further improving the reliability of the level signal conversion circuit. The anode of the protection diode SD3 is connected to the S electrode of the fifth transistor T5, and the cathode of the protection diode SD3 is connected to the D electrode of the fifth transistor T5.

[0104] based on Figure 9 、 Figure 10 and Figure 11 As shown in the setting, in the embodiment of the present disclosure, the level signal conversion circuit includes, in addition to a controller, N level signal conversion modules and a low-level output module, an anti-short-circuit module, and the input end of the anti-short-circuit module is respectively connected to the N level signal conversion modules, and the output end of the anti-short-circuit module is connected to the signal output end, so as to avoid each of the N power supply signals from being directly connected to the third ground signal. More specifically, it can be used to avoid the target power supply signal among the N power supply signals from being directly connected to the third ground signal, thereby further improving the reliability of the level signal conversion circuit.

[0105] In one example, the short-circuit prevention module may include a sixth resistor, wherein a first end of the sixth resistor serves as an input end of the short-circuit prevention module, and a second end of the sixth resistor serves as an output end of the short-circuit prevention module.

[0106] Please combine the specific Figure 12, exemplarily, the level signal conversion circuit 1200 includes a controller 1201, two level signal conversion modules (i.e., a target conversion module 1202 and an idle conversion module 1203), a low level output module 1204 and an anti-short circuit module 1205. Among them, the target conversion module 1202 has Figure 8 The circuit structure shown (ie, including a target level signal conversion unit 12021 composed of a first resistor R1 and a first transistor T1, and a target control signal conversion unit 12022 composed of a third resistor R2 and a third transistor T3); the idle conversion module has Figure 8 The circuit structure shown (i.e., including an idle level signal conversion unit 12031 composed of a second resistor R2 and a second transistor T2, an idle level signal conversion unit 12032 composed of a fourth resistor R4 and a fourth transistor T4, and a second diode SD2 as an idle backflow prevention unit 12033); the low level output module 1204 has Figure 10 and Figure 11 In the circuit structure shown (i.e., including the low-level output unit 12041, and the low-level output unit 12041 including the fifth resistor R5, the fifth transistor T5, and the protection diode SD3), when the short-circuit prevention module 1205 includes the sixth resistor R6, the first end of the sixth resistor R6 will serve as the input end of the short-circuit prevention module 1205, and will be connected to the target conversion module 1202 and the idle conversion module 1203 respectively (here, specifically, it can be connected to the output end of the target conversion module 1202 and the output end of the idle conversion module 1203 respectively). The second end of the sixth resistor R6 will serve as the output end of the short-circuit prevention module 1205, and will be connected to the signal output end Vout, so as to prevent each of the N power signals from being directly connected to the third ground signal GND3. More specifically, it can be used to prevent the target power signal VCC1 among the N power signals from being directly connected to the third ground signal GND3, thereby further improving the reliability of the level signal conversion circuit 1200.

[0107] In addition, it should be noted that, based on the setting of the low-level output module, in the embodiment of the present disclosure, when it is necessary to select a target conversion module from N level signal conversion modules through the controller, it is necessary to disable the low-level output module, that is, it is necessary for the controller to output a low-level disable signal to the low-level output module, so that the low-level output module responds to the low-level disable signal and sets the signal path between the third ground signal and the signal output end to a disconnected state. The low-level disable signal can determine its signal properties based on the circuit structure of the low-level output module. For example, when the low-level output circuit has Figure 11 and Figure 12 In the circuit structure shown, the low-level disable signal can be a low-level signal or a high-impedance signal.

[0108] Furthermore, please combine Figure 13 In the embodiment of the present disclosure, the level signal conversion circuit 1300 may further include a filtering module 1304 in addition to the controller 1301 and N level signal conversion modules 1302, and the input end of the filtering module 1304 is connected to the signal output end Vout, and the output end of the filtering module 1304 serves as the driving signal output end Vout', so as to filter the target high-level signal to obtain the filtered target high-level signal, and output the filtered target high-level signal through the driving signal output end Vout'; correspondingly, when the level signal conversion circuit 1300 further includes a low-level output module 1303, the filtering module 1304 may also be used to filter the target low-level signal output by the low-level output module 1303 through the signal output end Vout to obtain the filtered target low-level signal, and output the filtered target low-level signal through the driving signal output end Vout'.

[0109] In one example, the filtering module 1304 may include a seventh resistor, a capacitor, and an eighth resistor. The seventh resistor may be a resistor with a resistance value of 5.2KΩ; the capacitor may be a capacitor with a capacitance value of 100 nanofarads (NF); and the eighth resistor may be a resistor with a resistance value of 49.9KΩ.

[0110] Based on this, in the embodiments of the present disclosure, there may be:

[0111] The first end of is connected to the first end of the capacitor to serve as the input end of the filtering module 1304;

[0112] The second section of the capacitor is connected to the first end of the eighth resistor;

[0113] The second end of is connected to the second end of the eighth resistor to serve as the output end of the filtering module 1304.

[0114] Through the above configuration, in the disclosed embodiment, the filtering module 1304 can be used to filter the target high-level signal to obtain a filtered target high-level signal, and output the filtered target high-level signal through the drive signal output terminal Vout'. It can also be used to filter the target low-level signal output by the low-level output module 1303 through the signal output terminal Vout to obtain a filtered target low-level signal, and output the filtered target low-level signal through the drive signal output terminal Vout'. In this way, the quality of the target high-level signal and the target low-level signal can be improved.

[0115] The following will be combined Figure 14 The level signal conversion circuit 1400 shown in FIG. 1 illustrates a level signal conversion process implemented based on the level signal conversion circuit 1400 .

[0116] The level signal conversion circuit 1400 includes a controller 1401 , two level signal conversion modules (ie, a first level signal conversion module 1402 and a second level signal conversion module 1403 ), a low level output module 1404 , an anti-short circuit module 1405 and a filtering module 1406 .

[0117] Among them, the first level signal conversion module 1402 includes a first level signal conversion unit 14021 composed of a first resistor R1 and a first transistor T1, and a first control signal conversion unit 14022 composed of a third resistor R3 and a third transistor T3; the second level signal conversion module 1403 includes a second level signal conversion unit 14031 composed of a second resistor R2 and a second transistor T2, a second level signal conversion unit 14032 composed of a fourth resistor R4 and a fourth transistor T4, and a second diode SD2 serving as a second backflow prevention unit 14033; the low level output module 1404 includes a low level output unit 14041, and the low level output unit 14041 includes a fifth resistor R5, a fifth transistor T5 and a protection diode SD3; the short circuit prevention module 1405 includes a sixth resistor R6; and the filtering module 1406 includes a seventh resistor R7, a capacitor C1 and an eighth resistor R8. The first power signal VCC1 corresponding to the first level signal conversion module 1402 is a 12V power signal; the second power signal VCC2 corresponding to the second level signal conversion module 1403 is a 5V power signal.

[0118] Assume that, currently, it is necessary to use the level signal conversion circuit 1400 to drive a first target device, and the driving requirement of the first target device is to use a target high-level signal with a voltage standard of 12V as the driving signal. Then, the controller 1401 can select the first level signal conversion module 1402 from the first level signal conversion module 1402 and the second level signal conversion module 1403 as the target conversion module, so that the target conversion module converts the first power supply signal VCC1 (i.e., the target power supply signal) connected to the first level signal conversion module 1402 to obtain a target high-level signal, and outputs the target high-level signal through the signal output terminal Vout. The target high-level signal output through the signal output terminal Vout is filtered by the filtering module 1406 to obtain a filtered target high-level signal. The filtered target high-level signal is then output through the driving signal output terminal Vout′ to effectively drive the first target device.

[0119] The level signal conversion process involved in the above requirements is as follows:

[0120] (1) The controller 1401 outputs a low-level disable signal Vles, i.e., a low-level signal or a high-impedance signal, to the low-level output module 1404, so that the low-level output module 1404 sets the signal path between the third ground signal GND3 and the signal output terminal Vout to a disconnected state in response to the low-level disable signal Vles. For example, the controller 1401 outputs a low-level signal to the G electrode of the fifth transistor T5 in the low-level output module 1404 through the I / O3 port, so that the S electrode and the D electrode of the fifth transistor T5 are in a cut-off state.

[0121] (2) The controller 1401 outputs a first deactivation signal Vss, i.e., a low-level signal or a high-impedance signal, to the second-level signal conversion module 1403 to select the second-level signal conversion module 1403 as an idle conversion module. Specifically, the controller 1401 outputs a low-level signal to the G electrode of the fourth transistor T4 in the second-level signal conversion module 1403 through the I / O2 port, thereby turning off the S electrode and the D electrode of the fourth transistor T4.

[0122] (3) The controller 1401 outputs a first enable signal Ves, i.e., a high-level signal, to the first-level signal conversion module 1402 to select the first-level signal conversion module 1402 as the target conversion module. Specifically, the controller 1401 outputs a high-level signal to the G-pole of the second transistor T2 in the first-level signal conversion module 1402 through the I / O1 port, so that the S-pole of the second transistor T2 and the D-pole of the second transistor T2 are in a conductive state, so that the first ground signal is converted into a connection control signal Vccs, i.e., a low-level signal, through the second transistor T2. Then, the G-pole of the first transistor T1 responds to the low-level signal, so that the S-pole of the first transistor T1 and the D-pole of the first transistor T1 are in a conductive state. In this way, the S-pole of the first transistor T1 can receive the target power supply signal, so that after the target level signal is converted into a target high-level signal through the first transistor T1, the target high-level signal is outputted in sequence through the D-pole of the first transistor T1 and the signal output terminal.

[0123] Among them, the target high-level signal output through the signal output terminal Vout will be filtered through the filtering module 1406 to obtain a filtered target high-level signal, and the filtered target high-level signal will be output through the driving signal output terminal Vout' to effectively drive the first target device.

[0124] It is understandable that in the embodiment of the present disclosure, process (1), process (2) and process (3) can be executed simultaneously or sequentially, and the embodiment of the present disclosure does not limit this.

[0125] The present disclosure also provides a vehicle controller including a level signal conversion circuit. The vehicle controller may be one of a vehicle control unit (VCU), an electronic control unit (ECU), an automotive control unit (ACU), and a body domain control unit (BDCU) for commercial vehicles.

[0126] Please combine Figure 15 The embodiment of the present disclosure further provides a vehicle 1500, and the vehicle 1500 may include an onboard controller 1501. The vehicle 1500 may be an autonomous driving vehicle.

[0127] The present disclosure also provides a level signal conversion method, which is applied to the aforementioned level signal conversion circuit including a controller and N level signal conversion modules. The controller is connected to each of the N level signal conversion modules; the N level signal conversion modules are connected to N power supply signals with different voltage standards in a one-to-one correspondence and are connected to the same signal output terminal; N is an integer ≥ 2.

[0128] The following will be combined Figure 16 The flowchart shown in the figure illustrates the level signal conversion method provided by the embodiment of the present disclosure. It should be noted that although the logical order is shown in the flowchart, in some cases, the steps shown or described in the flowchart can also be performed in other orders.

[0129] In step S1601 , the controller selects a target conversion module from N level signal conversion modules.

[0130] Step S1602 : The target conversion module converts the target power signal to obtain a target high-level signal, and outputs the target high-level signal through the signal output terminal.

[0131] The target power signal is a power signal connected to the target conversion module among the N power signals.

[0132] In some optional implementations, the controller selecting a target conversion module from the N level signal conversion modules includes:

[0133] The controller outputs a first disable signal to N-1 level signal conversion modules among the N level signal conversion modules to select each of the N-1 level signal conversion modules as an idle conversion module, and outputs a first enable signal to the remaining conversion modules among the N level signal conversion modules except the idle conversion module to select the remaining conversion modules as target conversion modules;

[0134] The target conversion module converts the target power signal to obtain a target high-level signal, and outputs the target high-level signal through the signal output terminal, including:

[0135] The target conversion module, in response to the first enabling signal, sets the signal path between the target power signal and the signal output terminal to a connected state, converts the target power signal to obtain a target high-level signal, and outputs the target high-level signal through the signal output terminal;

[0136] The level signal conversion method also includes:

[0137] The idle conversion module sets the signal path between the idle power signal and the signal output end to a disconnected state in response to the first disable signal; wherein the idle power signal is a power signal connected to the idle conversion module among the N power signals.

[0138] In some optional embodiments, the target conversion module includes a target level signal conversion unit, and a control end of the target level signal conversion unit is connected to the controller, an input end of the target level signal conversion unit is connected to the target power signal, and an output end of the target level signal conversion unit is connected to the signal output end;

[0139] The target conversion module, in response to the first enable signal, sets the signal path between the target power signal and the signal output terminal to a connected state, converts the target power signal to obtain a target high-level signal, and outputs the target high-level signal through the signal output terminal, including:

[0140] The control end of the target level signal conversion unit connects the input end of the target level signal conversion unit and the output end of the target level signal conversion unit in response to the connection control signal obtained based on the first enable signal, so as to set the signal path between the target power signal and the signal output end to the connection state;

[0141] The input end of the target level signal conversion unit receives the target power signal, so that the target level signal conversion unit converts the target power signal to obtain a target high level signal, and outputs the target high level signal in sequence through the output end and the signal output end of the target level signal conversion unit.

[0142] In some optional embodiments, the target level signal conversion unit includes a first resistor and a first transistor;

[0143] A first end of the first resistor is connected to a target power signal;

[0144] The source of the first transistor serves as an input terminal of the target level signal conversion unit and is connected to the target power signal;

[0145] The drain of the first transistor serves as the output terminal of the target level signal conversion unit and is connected to the signal output terminal;

[0146] The gate of the first transistor serves as a control terminal of the target level signal conversion unit and is connected to the controller and the second terminal of the first resistor respectively;

[0147] The control end of the target level signal conversion unit is in response to a connection control signal obtained based on the first enable signal, so that the input end of the target level signal conversion unit and the output end of the target level signal conversion unit are in a connection state, including:

[0148] The gate of the first transistor connects the input terminal of the target level signal conversion unit and the output terminal of the target level signal conversion unit in response to the connection control signal obtained based on the first enable signal.

[0149] In some optional embodiments, the target conversion module further includes a target control signal conversion unit, and a control end of the target control signal conversion unit is connected to the controller, an input end of the target control signal conversion unit is connected to the first ground signal, and an output end of the target control signal conversion unit is connected to the control end of the target level signal conversion unit;

[0150] The target conversion module, in response to the first enable signal, sets the signal path between the target power signal and the signal output terminal to a connected state, converts the target power signal to obtain a target high-level signal, and outputs the target high-level signal through the signal output terminal, and further includes:

[0151] The control end of the target control signal conversion unit is used to connect the input end of the target control signal conversion unit with the output end of the target control signal conversion unit in response to the first enabling signal;

[0152] The input end of the target control signal conversion unit is used to receive the first ground signal, so that the target control signal conversion unit converts the first ground signal to obtain a connection control signal, and sends the connection control signal to the control end of the target level signal conversion unit through the output end of the target control signal conversion unit.

[0153] In some optional embodiments, the target control signal conversion unit includes a second resistor and a second transistor;

[0154] A first end of the second resistor is connected to the first ground signal;

[0155] The source of the second transistor serves as an input terminal of the target control signal conversion unit and is connected to the first ground signal;

[0156] The drain of the second transistor serves as the output terminal of the target control signal conversion unit and is connected to the control terminal of the target level signal conversion unit;

[0157] The gate of the second transistor serves as a control terminal of the target control signal conversion unit and is connected to the controller and the second terminal of the second resistor respectively;

[0158] The control end of the target control signal conversion unit is used to connect the input end of the target control signal conversion unit with the output end of the target control signal conversion unit in response to the first enabling signal, including:

[0159] The gate of the second transistor connects the input terminal of the target control signal conversion unit and the output terminal of the target control signal conversion unit in response to the first enabling signal.

[0160] In some optional embodiments, the idle conversion module includes an idle level signal conversion unit, wherein a control end of the idle level signal conversion unit is connected to the controller, an input end of the idle level signal conversion unit is connected to the idle power signal, and an output end of the idle level signal conversion unit is connected to the signal output end;

[0161] The idle conversion module sets the signal path between the idle power signal and the signal output terminal to a disconnected state in response to the first deactivation signal, including:

[0162] The control end of the idle level signal conversion unit responds to the disconnection control signal obtained based on the first disable signal, so that the input end of the idle level signal conversion unit and the output end of the idle level signal conversion unit are in a disconnected state, so as to set the signal path between the idle power signal and the signal output end to a disconnected state.

[0163] In some optional implementations, the idle level signal conversion unit includes a third resistor and a third transistor;

[0164] A first end of the third resistor is connected to the idle power signal;

[0165] The source of the third transistor serves as an input terminal of the idle level signal conversion unit and is connected to the idle power signal;

[0166] The drain of the third transistor serves as the output terminal of the idle level signal conversion unit and is connected to the signal output terminal;

[0167] The gate of the third transistor serves as a control terminal of the idle level signal conversion unit and is connected to the controller and the second terminal of the third resistor respectively;

[0168] The control end of the idle level signal conversion unit is responsive to a disconnection control signal obtained based on the first disable signal, so that the input end of the idle level signal conversion unit and the output end of the idle level signal conversion unit are in a disconnected state, comprising:

[0169] The gate of the third transistor disconnects the input terminal of the idle level signal conversion unit and the output terminal of the idle level signal conversion unit in response to the disconnection control signal obtained based on the first deactivation signal.

[0170] In some optional embodiments, the idle conversion module further includes an idle control signal conversion unit, wherein a control end of the idle control signal conversion unit is connected to the controller, an input end of the idle control signal conversion unit is connected to the second ground signal, and an output end of the idle control signal conversion unit is connected to the control end of the idle level signal conversion unit;

[0171] The idle conversion module sets the signal path between the idle power signal and the signal output terminal to a disconnected state in response to the first deactivation signal, and further includes:

[0172] The control end of the idle control signal conversion unit responds to the first disable signal to disconnect the input end of the idle control signal conversion unit and the output end of the idle control signal conversion unit, so that the control end of the idle level signal conversion unit uses the high level control signal obtained based on the idle power supply signal and the third resistor as the disconnection control signal.

[0173] In some optional implementations, the idle control signal conversion unit includes a fourth resistor and a fourth transistor;

[0174] A first end of the fourth resistor is connected to the second ground signal;

[0175] The source of the fourth transistor serves as an input terminal of the idle control signal conversion unit and is connected to the second ground signal;

[0176] The drain of the fourth transistor serves as the output terminal of the idle control signal conversion unit and is connected to the control terminal of the idle level signal conversion unit;

[0177] The gate of the fourth transistor serves as a control terminal of the idle control signal conversion unit and is connected to the controller and the second terminal of the fourth resistor respectively;

[0178] The control end of the idle control signal conversion unit is responsive to a first deactivation signal so as to disconnect the input end of the idle control signal conversion unit from the output end of the idle control signal conversion unit, comprising:

[0179] The gate of the fourth transistor disconnects the input terminal of the idle control signal conversion unit and the output terminal of the idle control signal conversion unit in response to the first deactivation signal.

[0180] In some optional embodiments, the level signal conversion circuit further includes a low-level output module connected to the controller; the low-level output module is respectively connected to the third ground signal and the signal output terminal; and the method further includes:

[0181] The controller also outputs a low-level enable signal to the low-level output module;

[0182] The low-level output module responds to the low-level enable signal, sets the signal path between the third ground signal and the signal output end to a connected state, and converts the third ground signal to obtain a target low-level signal, so as to switch the signal output end from outputting the target high-level signal to outputting the target low-level signal.

[0183] In some optional embodiments, the low-level output module includes a low-level output unit, wherein a control end of the low-level output unit is connected to the controller, an input end of the low-level output unit is connected to a third ground signal, and an output end of the low-level output unit is connected to the signal output end;

[0184] The low-level output module, in response to the low-level enable signal, sets the signal path between the third ground signal and the signal output terminal to a connected state, and converts the third ground signal to obtain a target low-level signal, so as to switch the signal output terminal from outputting the target high-level signal to outputting the target low-level signal, including:

[0185] The control terminal of the low-level output unit is responsive to the low-level enable signal, so that the input terminal of the low-level output unit and the output terminal of the low-level output unit are in a connected state, so as to set the signal path between the third ground signal and the signal output terminal to a connected state;

[0186] The input terminal of the low level output unit receives the third ground signal, so that the low level output unit converts the third ground signal to obtain a target low level signal, and outputs the target low level signal in sequence through the output terminal of the low level output unit and the signal output terminal.

[0187] In some optional implementations, the low-level output unit includes a fifth resistor and a fifth transistor;

[0188] A first end of the fifth resistor is connected to a third ground signal;

[0189] The source of the fifth transistor serves as the input terminal of the low level output unit and is connected to the third ground signal;

[0190] The drain of the fifth transistor serves as the output terminal of the low level output unit and is connected to the signal output terminal;

[0191] The gate of the fifth transistor serves as a control terminal of the low-level output unit and is connected to the controller and the second terminal of the fifth resistor respectively;

[0192] The control end of the low-level output unit responds to the low-level enable signal to connect the input end of the low-level output unit with the output end of the low-level output unit, including:

[0193] The gate of the fifth transistor connects the input terminal of the low-level output unit and the output terminal of the low-level output unit in response to the low-level enable signal.

[0194] In the embodiment of the present disclosure, the specific description and examples of the above steps can be found in the relevant description of the level signal conversion circuit embodiment, which will not be repeated here.

[0195] In addition, it should be noted that the acquisition, storage and application of user personal information involved in the technical solutions provided by the embodiments of the present disclosure comply with the provisions of relevant laws and regulations and do not violate public order and good morals.

[0196] Furthermore, an embodiment of the present disclosure also provides an electronic device.

[0197] Figure 17 A schematic block diagram of an example electronic device 1700 that can be used to implement embodiments of the present disclosure is shown. Electronic device 1700 is intended to represent various forms of digital computers, such as vehicle-mounted computing devices, laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. Electronic device 1700 can also represent various forms of mobile devices, such as personal digital assistants, cellular phones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are provided as examples only and are not intended to limit the implementation of the present disclosure described and / or claimed herein.

[0198] like Figure 17 As shown, the electronic device 1700 includes a computing unit 1701, which can perform various appropriate actions and processes according to a computer program stored in a read-only memory (ROM) 1702 or a computer program loaded from a storage unit 1708 into a random access memory (RAM) 1703. Various programs and data required for the operation of the electronic device 1700 can also be stored in the RAM 1703. The computing unit 1701, the ROM 1702, and the RAM 1703 are connected to each other via a bus 1704. An input / output (I / O) interface 1705 is also connected to the bus 1704.

[0199] Multiple components in the electronic device 1700 are connected to the I / O port 1705, including an input unit 1706, such as a keyboard, a mouse, etc.; an output unit 1707, such as various types of renderers, speakers, etc.; a storage unit 1708, such as a magnetic disk, an optical disk, etc.; and a communication unit 1709, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 1709 allows the electronic device 1700 to exchange information / data with other devices via a computer network such as the Internet and / or various telecommunication networks.

[0200] The computing unit 1701 can be a variety of general and / or specialized processing components with processing and computing capabilities. Some examples of the computing unit 1701 include, but are not limited to, a CPU, a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units that run machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The computing unit 1701 performs the various methods and processes described above, for example, at least some of the steps in the level signal conversion method. For example, in some embodiments, at least some of the steps in the level signal conversion method can be implemented as a computer software program, which is tangibly contained in a machine-readable medium, such as the storage unit 1708. In some embodiments, part or all of the computer program can be loaded and / or installed on the electronic device 1700 via the ROM 1702 and / or the communication unit 1709. When the computer program is loaded into the RAM 1703 and executed by the computing unit 1701, at least some of the steps in the level signal conversion method described above can be performed. Alternatively, in other embodiments, the calculation unit 1701 may be configured as at least part of the steps in the level signal conversion method in any other appropriate manner (for example, by means of firmware).

[0201] Various embodiments of the systems and techniques described herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), system on chips (SOCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system that includes at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0202] The program code for implementing the method of the present disclosure can be written in any combination of one or more programming languages. These program codes can be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data optimization device so that the program code, when executed by the processor or controller, implements the functions / operations specified in the flow chart and / or block diagram. The program code can be executed entirely on the machine, partially on the machine, as a stand-alone software package, partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0203] In the context of the present disclosure, a machine-readable medium can be a tangible medium that can contain or store a program for use by or in conjunction with an instruction execution system, device or equipment. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or equipment, or any suitable combination of the foregoing. A more specific example of a machine-readable storage medium can include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a RAM, a ROM, an erasable programmable read-only memory (EPROM) or flash memory, an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0204] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a rendering device (e.g., a cathode ray tube (CRT) renderer or a liquid crystal display (LCD)) for rendering information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the computer. Other types of devices are also used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).

[0205] The systems and techniques described herein can be implemented in a computing system that includes back-end components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes front-end components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such back-end components, middleware components, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network (LAN), a wide area network (WAN), and the Internet.

[0206] A computer system may include a client and a server. The client and server are generally remote from each other and typically interact via a communication network. The client-server relationship arises through computer programs running on the respective computers and establishing a client-server relationship. The server may be a cloud server, a server in a distributed system, or a server integrated with a blockchain.

[0207] An embodiment of the present disclosure further provides a non-transitory computer-readable storage medium storing computer instructions, wherein the computer instructions are used to enable a computer to execute the level signal conversion method.

[0208] An embodiment of the present disclosure further provides a computer program product, including a computer program, which implements the level signal conversion method when executed by a processor.

[0209] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps recorded in this disclosure can be executed in parallel, sequentially or in a different order, as long as the desired results of the technical solutions disclosed in this disclosure can be achieved, and this document does not limit this. In addition, in this disclosure, relational terms such as "first", "second", "third", etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. In addition, "multiple" in this disclosure can be understood as at least two.

[0210] The foregoing specific embodiments do not constitute a limitation on the scope of protection of this disclosure. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the principles of this disclosure are intended to be included within the scope of protection of this disclosure.

Claims

1. A level signal conversion circuit, comprising a controller and N level signal conversion modules; wherein, The controller is connected to the N level signal conversion modules respectively; the N level signal conversion modules are connected to the N power supply signals with different voltage standards in a one-to-one correspondence and are connected to the same signal output terminal; N ≥ 2 and is an integer; The controller is used to select a target conversion module from the N level signal conversion modules; The target conversion module is used to convert the target power signal to obtain a target high-level signal, and output the target high-level signal through the signal output end; wherein, the target power signal is the power signal connected to the target conversion module among the N power signals.

2. The level signal conversion circuit according to claim 1, wherein: The controller is specifically configured to output a first disable signal to N-1 level signal conversion modules among the N level signal conversion modules to select each level signal conversion module among the N-1 level signal conversion modules as an idle conversion module, and output a first enable signal to the remaining conversion modules among the N level signal conversion modules except the idle conversion modules to select the remaining conversion modules as the target conversion modules; The target conversion module is specifically configured to, in response to the first enable signal, set a signal path between the target power signal and the signal output terminal to a connected state, and convert the target power signal to obtain the target high-level signal, so as to output the target high-level signal through the signal output terminal; The idle conversion module is used to set the signal path between the idle power signal and the signal output end to a disconnected state in response to the first disable signal; wherein the idle power signal is a power signal connected to the idle conversion module among the N power signals.

3. The level signal conversion circuit according to claim 2, wherein: The target conversion module includes a target level signal conversion unit, wherein a control end of the target level signal conversion unit is connected to the controller, an input end of the target level signal conversion unit is connected to the target power signal, and an output end of the target level signal conversion unit is connected to the signal output end; The control end of the target level signal conversion unit is used to connect the input end of the target level signal conversion unit and the output end of the target level signal conversion unit in response to a connection control signal obtained based on the first enable signal, so as to set the signal path between the target power signal and the signal output end to a connection state; The input end of the target level signal conversion unit is used to receive the target power supply signal, so that the target level signal conversion unit converts the target power supply signal to obtain the target high level signal, and outputs the target high level signal in sequence through the output end of the target level signal conversion unit and the signal output end.

4. The level signal conversion circuit according to claim 3, wherein: The target level signal conversion unit includes a first resistor and a first transistor; The first end of the first resistor is connected to the target power signal; The source of the first transistor serves as an input terminal of the target level signal conversion unit and is connected to the target power supply signal; The drain of the first transistor serves as the output end of the target level signal conversion unit and is connected to the signal output end; The gate of the first transistor serves as a control end of the target level signal conversion unit and is connected to the controller and the second end of the first resistor respectively, so as to connect the input end of the target level signal conversion unit and the output end of the target level signal conversion unit in response to a connection control signal obtained based on the first enable signal.

5. The level signal conversion circuit according to claim 4, wherein: The target conversion module further includes a target control signal conversion unit, wherein a control end of the target control signal conversion unit is connected to the controller, an input end of the target control signal conversion unit is connected to a first ground signal, and an output end of the target control signal conversion unit is connected to the control end of the target level signal conversion unit; The control end of the target control signal conversion unit is used to connect the input end of the target control signal conversion unit with the output end of the target control signal conversion unit in response to the first enabling signal; The input end of the target control signal conversion unit is used to receive the first ground signal, so that the target control signal conversion unit converts the first ground signal to obtain the connectivity control signal, and sends the connectivity control signal to the control end of the target level signal conversion unit through the output end of the target control signal conversion unit.

6. The level signal conversion circuit according to claim 5, wherein: The target control signal conversion unit includes a second resistor and a second transistor; The first end of the second resistor is connected to the first ground signal; The source of the second transistor serves as an input terminal of the target control signal conversion unit and is connected to the first ground signal; The drain of the second transistor serves as the output terminal of the target control signal conversion unit and is connected to the control terminal of the target level signal conversion unit; The gate of the second transistor serves as the control end of the target control signal conversion unit and is connected to the controller and the second end of the second resistor respectively, so as to respond to the first enable signal and connect the input end of the target control signal conversion unit with the output end of the target control signal conversion unit.

7. The level signal conversion circuit according to claim 3, wherein: In a case where the target power signal is not the power signal with the largest voltage standard among the N power signals, the target conversion module further includes a target backflow prevention unit, and an input end of the target backflow prevention unit is connected to an output end of the target level signal conversion unit, and an output end of the target backflow prevention unit is connected to the signal output end; The target backflow prevention unit is used to prevent the target line from experiencing backflow of the level signal; wherein the target line is a line including the target power signal and the target level signal conversion unit.

8. The level signal conversion circuit according to claim 2, wherein: The idle conversion module includes an idle level signal conversion unit, wherein a control end of the idle level signal conversion unit is connected to the controller, an input end of the idle level signal conversion unit is connected to the idle power signal, and an output end of the idle level signal conversion unit is connected to the signal output end; The control end of the idle level signal conversion unit is used to respond to a disconnection control signal obtained based on the first disable signal, so that the input end of the idle level signal conversion unit and the output end of the idle level signal conversion unit are in a disconnected state, so as to set the signal path between the idle power signal and the signal output end to a disconnected state.

9. The level signal conversion circuit according to claim 8, wherein: The idle level signal conversion unit includes a third resistor and a third transistor; The first end of the third resistor is connected to the idle power signal; The source of the third transistor serves as an input terminal of the idle level signal conversion unit and is connected to the idle power signal; The drain of the third transistor serves as the output end of the idle level signal conversion unit and is connected to the signal output end; The gate of the third transistor serves as a control end of the idle level signal conversion unit and is connected to the controller and the second end of the third resistor, respectively, so as to disconnect the input end of the idle level signal conversion unit and the output end of the idle level signal conversion unit in response to a disconnection control signal obtained based on the first disable signal.

10. The level signal conversion circuit according to claim 9, wherein: The idle conversion module further includes an idle control signal conversion unit, wherein a control end of the idle control signal conversion unit is connected to the controller, an input end of the idle control signal conversion unit is connected to a second ground signal, and an output end of the idle control signal conversion unit is connected to the control end of the idle level signal conversion unit; The control end of the idle control signal conversion unit is used to disconnect the input end of the idle control signal conversion unit and the output end of the idle control signal conversion unit in response to the first disable signal, so that the control end of the idle level signal conversion unit uses the high-level control signal obtained based on the idle power supply signal and the third resistor as the disconnection control signal.

11. The level signal conversion circuit according to claim 10, wherein: The idle control signal conversion unit includes a fourth resistor and a fourth transistor; The first end of the fourth resistor is connected to the second ground signal; The source of the fourth transistor serves as the input terminal of the idle control signal conversion unit and is connected to the second ground signal; The drain of the fourth transistor serves as the output terminal of the idle control signal conversion unit and is connected to the control terminal of the idle level signal conversion unit; The gate of the fourth transistor serves as a control end of the idle control signal conversion unit and is connected to the controller and the second end of the fourth resistor, respectively, so as to disconnect the input end of the idle control signal conversion unit and the output end of the idle control signal conversion unit in response to the first deactivation signal.

12. The level signal conversion circuit according to claim 8, wherein: In a case where the idle power signal is not the power signal with the largest voltage standard among the N power signals, the idle conversion module further includes an idle backflow prevention unit, and an input end of the idle backflow prevention unit is connected to an output end of the idle level signal conversion unit, and an output end of the idle backflow prevention unit is connected to the signal output end; The idle anti-backflow unit is used to prevent the idle line from experiencing backflow of level signals; wherein the idle line is a line including the idle power supply signal and the idle level signal conversion unit.

13. The level signal conversion circuit according to any one of claims 1 to 12, further comprising a low-level output module connected to the controller; wherein The low level output module is connected to the third ground signal and the signal output terminal respectively; The controller is further configured to output a low-level enabling signal to the low-level output module; The low-level output module is used to set the signal path between the third ground signal and the signal output end to a connected state in response to the low-level enable signal, and convert the third ground signal to obtain a target low-level signal, so as to switch the signal output end from outputting the target high-level signal to outputting the target low-level signal.

14. The level signal conversion circuit according to claim 13, wherein: The low-level output module includes a low-level output unit, wherein a control end of the low-level output unit is connected to the controller, an input end of the low-level output unit is connected to the third ground signal, and an output end of the low-level output unit is connected to the signal output end; The control end of the low-level output unit is used to connect the input end of the low-level output unit with the output end of the low-level output unit in response to the low-level enable signal, so as to set the signal path between the third ground signal and the signal output end to be in a connected state; The input end of the low-level output unit is used to receive the third ground signal, so that the low-level output unit converts the third ground signal to obtain the target low-level signal, and outputs the target low-level signal through the output end of the low-level output unit and the signal output end in sequence.

15. The level signal conversion circuit according to claim 14, wherein: The low level output unit includes a fifth resistor and a fifth transistor; The first end of the fifth resistor is connected to the third ground signal; The source of the fifth transistor serves as the input terminal of the low level output unit and is connected to the third ground signal; The drain of the fifth transistor serves as the output end of the low level output unit and is connected to the signal output end; The gate of the fifth transistor serves as the control end of the low-level output unit and is connected to the controller and the second end of the fifth resistor respectively, so as to connect the input end of the low-level output unit and the output end of the low-level output unit in response to the low-level enable signal.

16. The level signal conversion circuit according to claim 13, further comprising an anti-short circuit module; wherein: The input end of the anti-short circuit module is connected to the N level signal conversion modules respectively, and the output end of the anti-short circuit module is connected to the signal output end; The anti-short circuit module is used to prevent each of the N power signals from being directly connected to the third ground signal.

17. The level signal conversion circuit according to claim 1, further comprising a filtering module; wherein: The input end of the filtering module is connected to the signal output end, and the output end of the filtering module serves as a driving signal output end; The filtering module is used to perform filtering processing on the target high-level signal to obtain a filtered target high-level signal, and output the filtered target high-level signal through the driving signal output end.

18. A level signal conversion method, applied to a level signal conversion circuit comprising a controller and N level signal conversion modules; wherein: The controller is connected to the N level signal conversion modules respectively; the N level signal conversion modules are connected to the N power supply signals with different voltage standards in a one-to-one correspondence and are connected to the same signal output terminal; N≥2 and is an integer; the method comprises: The controller selects a target conversion module from the N level signal conversion modules; The target conversion module converts the target power signal to obtain a target high-level signal, and outputs the target high-level signal through the signal output end; wherein, the target power signal is the power signal connected to the target conversion module among the N power signals.

19. The method according to claim 18, wherein The controller selects a target conversion module from the N level signal conversion modules, including: The controller outputs a first disable signal to N-1 level signal conversion modules among the N level signal conversion modules to select each level signal conversion module among the N-1 level signal conversion modules as an idle conversion module, and outputs a first enable signal to the remaining conversion modules among the N level signal conversion modules except the idle conversion modules to select the remaining conversion modules as the target conversion modules; The target conversion module converts the target power signal to obtain a target high-level signal, and outputs the target high-level signal through the signal output terminal, including: The target conversion module sets the signal path between the target power signal and the signal output terminal to a connected state in response to the first enable signal, and converts the target power signal to obtain the target high-level signal, so as to output the target high-level signal through the signal output terminal; The method further comprises: The idle conversion module sets the signal path between the idle power signal and the signal output end to a disconnected state in response to the first disable signal; wherein the idle power signal is the power signal connected to the idle conversion module among the N power signals.

20. The method according to claim 19, wherein The target conversion module includes a target level signal conversion unit, wherein a control end of the target level signal conversion unit is connected to the controller, an input end of the target level signal conversion unit is connected to the target power signal, and an output end of the target level signal conversion unit is connected to the signal output end; The target conversion module, in response to the first enable signal, sets the signal path between the target power signal and the signal output terminal to a connected state, converts the target power signal to obtain the target high-level signal, and outputs the target high-level signal through the signal output terminal, including: The control end of the target level signal conversion unit connects the input end of the target level signal conversion unit with the output end of the target level signal conversion unit in response to the connection control signal obtained based on the first enable signal, so as to set the signal path between the target power signal and the signal output end to be in a connection state; The input end of the target level signal conversion unit receives the target power supply signal, so that the target level signal conversion unit converts the target power supply signal to obtain the target high level signal, and outputs the target high level signal in sequence through the output end of the target level signal conversion unit and the signal output end.

21. The method according to claim 20, wherein The target level signal conversion unit includes a first resistor and a first transistor; The first end of the first resistor is connected to the target power signal; The source of the first transistor serves as an input terminal of the target level signal conversion unit and is connected to the target power supply signal; The drain of the first transistor serves as the output end of the target level signal conversion unit and is connected to the signal output end; The gate of the first transistor serves as a control terminal of the target level signal conversion unit and is connected to the controller and the second terminal of the first resistor respectively; The control end of the target level signal conversion unit connects the input end of the target level signal conversion unit with the output end of the target level signal conversion unit in response to the connection control signal obtained based on the first enable signal, comprising: The gate of the first transistor connects the input terminal of the target level signal conversion unit and the output terminal of the target level signal conversion unit in response to a connection control signal obtained based on the first enable signal.

22. The method according to claim 21, wherein The target conversion module further includes a target control signal conversion unit, wherein a control end of the target control signal conversion unit is connected to the controller, an input end of the target control signal conversion unit is connected to a first ground signal, and an output end of the target control signal conversion unit is connected to the control end of the target level signal conversion unit; The target conversion module, in response to the first enable signal, sets the signal path between the target power signal and the signal output terminal to a connected state, converts the target power signal to obtain the target high-level signal, and outputs the target high-level signal through the signal output terminal, further comprising: The control end of the target control signal conversion unit is used to connect the input end of the target control signal conversion unit with the output end of the target control signal conversion unit in response to the first enabling signal; The input end of the target control signal conversion unit is used to receive the first ground signal, so that the target control signal conversion unit converts the first ground signal to obtain the connectivity control signal, and sends the connectivity control signal to the control end of the target level signal conversion unit through the output end of the target control signal conversion unit.

23. The method according to claim 22, wherein The target control signal conversion unit includes a second resistor and a second transistor; The first end of the second resistor is connected to the first ground signal; The source of the second transistor serves as an input terminal of the target control signal conversion unit and is connected to the first ground signal; The drain of the second transistor serves as the output terminal of the target control signal conversion unit and is connected to the control terminal of the target level signal conversion unit; The gate of the second transistor serves as a control terminal of the target control signal conversion unit and is connected to the controller and the second terminal of the second resistor respectively; The control end of the target control signal conversion unit is used to connect the input end of the target control signal conversion unit with the output end of the target control signal conversion unit in response to the first enable signal, including: The gate of the second transistor connects the input terminal of the target control signal conversion unit and the output terminal of the target control signal conversion unit in response to the first enable signal.

24. The method according to claim 19, wherein The idle conversion module includes an idle level signal conversion unit, wherein a control end of the idle level signal conversion unit is connected to the controller, an input end of the idle level signal conversion unit is connected to the idle power signal, and an output end of the idle level signal conversion unit is connected to the signal output end; The idle conversion module sets the signal path between the idle power signal and the signal output terminal to a disconnected state in response to the first disable signal, including: The control end of the idle level signal conversion unit responds to the disconnection control signal obtained based on the first disable signal, so that the input end of the idle level signal conversion unit and the output end of the idle level signal conversion unit are in a disconnected state, so as to set the signal path between the idle power signal and the signal output end to a disconnected state.

25. The method according to claim 24, wherein The idle level signal conversion unit includes a third resistor and a third transistor; The first end of the third resistor is connected to the idle power signal; The source of the third transistor serves as an input terminal of the idle level signal conversion unit and is connected to the idle power signal; The drain of the third transistor serves as the output end of the idle level signal conversion unit and is connected to the signal output end; The gate of the third transistor serves as a control terminal of the idle level signal conversion unit and is connected to the controller and the second terminal of the third resistor respectively; The control end of the idle level signal conversion unit disconnects the input end of the idle level signal conversion unit and the output end of the idle level signal conversion unit in response to a disconnection control signal obtained based on the first disable signal, comprising: The gate of the third transistor disconnects the input terminal of the idle level signal conversion unit and the output terminal of the idle level signal conversion unit in response to a disconnection control signal obtained based on the first deactivation signal.

26. The method according to claim 25, wherein The idle conversion module further includes an idle control signal conversion unit, wherein a control end of the idle control signal conversion unit is connected to the controller, an input end of the idle control signal conversion unit is connected to a second ground signal, and an output end of the idle control signal conversion unit is connected to the control end of the idle level signal conversion unit; The idle conversion module sets the signal path between the idle power signal and the signal output terminal to a disconnected state in response to the first disable signal, and further includes: The control end of the idle control signal conversion unit causes the input end of the idle control signal conversion unit and the output end of the idle control signal conversion unit to be in a disconnected state in response to the first disable signal, so that the control end of the idle level signal conversion unit uses the high-level control signal obtained based on the idle power supply signal and the third resistor as the disconnection control signal.

27. The method according to claim 26, wherein The idle control signal conversion unit includes a fourth resistor and a fourth transistor; The first end of the fourth resistor is connected to the second ground signal; The source of the fourth transistor serves as the input terminal of the idle control signal conversion unit and is connected to the second ground signal; The drain of the fourth transistor serves as the output terminal of the idle control signal conversion unit and is connected to the control terminal of the idle level signal conversion unit; The gate of the fourth transistor serves as a control terminal of the idle control signal conversion unit and is connected to the controller and the second terminal of the fourth resistor respectively; The control end of the idle control signal conversion unit disconnects the input end of the idle control signal conversion unit and the output end of the idle control signal conversion unit in response to the first deactivation signal, comprising: The gate of the fourth transistor disconnects the input terminal of the idle control signal conversion unit and the output terminal of the idle control signal conversion unit in response to the first deactivation signal.

28. The method according to any one of claims 18 to 27, wherein The level signal conversion circuit further includes a low-level output module connected to the controller; the low-level output module is respectively connected to the third ground signal and the signal output terminal; the method further includes: The controller further outputs a low-level enable signal to the low-level output module; In response to the low-level enable signal, the low-level output module sets the signal path between the third ground signal and the signal output end to a connected state, and converts the third ground signal to obtain a target low-level signal, so as to switch the signal output end from outputting the target high-level signal to outputting the target low-level signal.

29. The method according to claim 28, wherein The low-level output module includes a low-level output unit, wherein a control end of the low-level output unit is connected to the controller, an input end of the low-level output unit is connected to the third ground signal, and an output end of the low-level output unit is connected to the signal output end; The low-level output module, in response to the low-level enable signal, sets a signal path between the third ground signal and the signal output terminal to a connected state, and converts the third ground signal to obtain a target low-level signal, so as to switch the signal output terminal from outputting the target high-level signal to outputting the target low-level signal, including: The control end of the low-level output unit connects the input end of the low-level output unit with the output end of the low-level output unit in response to the low-level enable signal, so as to set the signal path between the third ground signal and the signal output end to be in a connected state; The input end of the low level output unit receives the third ground signal, so that the low level output unit converts the third ground signal to obtain the target low level signal, and sequentially outputs the target low level signal through the output end of the low level output unit and the signal output end.

30. The method according to claim 29, wherein The low level output unit includes a fifth resistor and a fifth transistor; The first end of the fifth resistor is connected to the third ground signal; The source of the fifth transistor serves as the input terminal of the low level output unit and is connected to the third ground signal; The drain of the fifth transistor serves as the output end of the low level output unit and is connected to the signal output end; The gate of the fifth transistor serves as the control terminal of the low-level output unit and is connected to the controller and the second terminal of the fifth resistor respectively; The control end of the low-level output unit connects the input end of the low-level output unit with the output end of the low-level output unit in response to the low-level enable signal, comprising: The gate of the fifth transistor connects the input terminal of the low-level output unit and the output terminal of the low-level output unit in response to the low-level enable signal.

31. A vehicle-mounted controller comprising the level signal conversion circuit according to any one of claims 1 to 17.

32. A vehicle comprising the on-vehicle controller according to claim 31.

33. An electronic device comprising: at least one processor; a memory communicatively coupled to the at least one processor; The memory stores instructions that can be executed by the at least one processor. The instructions are executed by the at least one processor to enable the at least one processor to perform at least part of the steps in any one of claims 18 to 30.

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