A GaN integrated device for Micro LED and its fabrication method

Abstract

The application discloses a GaN integrated device of a Micro LED and a preparation method thereof. The device comprises a substrate, an HEMT epitaxial structure arranged on the substrate, a plurality of electrically connected HEMT devices, the plurality of HEMT devices comprising a driving HEMT DT1, a reference HEMT DT2, and four switching HEMTs TS1, TS2, TS3 and TS4, an LED epitaxial structure arranged on the HEMT epitaxial structure, an LED light-emitting unit, an n-electrode of the LED light-emitting unit being connected to a drain electrode of the switching HEMT TS3 and a source electrode of the switching HEMT TS4, and a storage capacitor Cst arranged on the HEMT epitaxial structure. The preparation method comprises sequentially manufacturing the HEMT epitaxial structure and the LED epitaxial structure on the same substrate, and manufacturing corresponding electrodes, groove capacitor structures, passivation layers and metal interconnection layers. The application realizes precise constant current driving, high-speed switching and low residual image display through integrated design, simplifies the structure, avoids interconnection loss, improves system response speed and energy efficiency, and reduces the size of the device.

Description

Technical Field

[0001] This invention relates to the field of semiconductor device manufacturing technology, and more specifically, to a GaN integrated device for Micro LED and its fabrication method. Background Technology

[0002] Micro LEDs, with their advantages of high brightness, low power consumption, long lifespan, and fast response time, have shown great application potential in display fields such as wearable devices, smartphones, and large-screen displays. However, Micro LEDs still face many challenges in practical applications, such as mass transfer accuracy and efficiency, red light loss, and chip efficiency droop effects. Furthermore, the design of Micro LED driving circuits is also a major challenge; traditional driving methods typically rely on external driving circuits, leading to high system complexity and increased costs.

[0003] Despite some progress in integrating Micro LEDs with driving devices, several challenges remain. For example, traditional pick-and-place or flip-chip bonding techniques suffer from low yields, high costs, and degraded optical performance during manufacturing. Furthermore, achieving efficient integration of Micro LEDs with driving devices without sacrificing optical performance remains a critical issue to be addressed.

[0004] Traditional LED driver circuits typically use silicon-based MOSFETs or bipolar transistors as driving elements. However, due to the low electron mobility of silicon, the switching speed is limited, making it difficult to meet the requirements of high-frequency PWM dimming and low ghosting displays. In addition, discrete driving solutions suffer from high circuit complexity and large parasitic parameters, affecting system integration and energy efficiency.

[0005] GaN-based high electron mobility transistors (HEMTs) possess high electron mobility, low on-resistance, and high voltage withstand characteristics, which can significantly improve the switching speed and energy efficiency of LED drivers. However, current technologies for integrating GaN HEMTs with LEDs typically employ external discrete device combinations, resulting in high interconnect losses and reduced response speed. Therefore, there is an urgent need for a monolithically integrated GaN HEMT-LED device to achieve a more compact and efficient driving solution. Summary of the Invention

[0006] To address the aforementioned problems in the prior art, this invention provides a GaN integrated device for Micro LEDs and its fabrication method. By integrating a HEMT driving circuit and an LED light-emitting unit on the same GaN substrate, high-precision constant current driving, high-speed switching, and low image retention are achieved.

[0007] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0008] A GaN integrated device for Micro LED, comprising:

[0009] A substrate;

[0010] The HEMT epitaxial structure disposed on the substrate forms a plurality of electrically connected HEMT devices, the plurality of HEMT devices including a driving HEMT DT1, a reference HEMT DT2, and four switching HEMTs TS1, TS2, TS3 and TS4;

[0011] An LED epitaxial structure disposed on the HEMT epitaxial structure constitutes an LED light-emitting unit, wherein the n-electrode of the LED light-emitting unit is connected to the drain of switch HEMT TS3 and the source of switch HEMT TS4.

[0012] And a storage capacitor Cst disposed on the HEMT epitaxial structure, the storage capacitor being a metal-insulator-metal capacitor having a groove structure.

[0013] Specifically, the driving HEMT DT1 controls the current of the LED light-emitting unit by adjusting the gate voltage Vg. The driving HEMT DT1 is connected in series with the LED light-emitting unit, and its gate is connected to the storage capacitor Cst, the gate of the reference HEMT DT2 and the source of the switch HEMT TS1; its drain is connected to the source of the switch HEMT TS3; and its source is grounded.

[0014] Specifically, the reference HEMT DT2 and the driving HEMT DT1 form a current mirror structure. The gate of the reference HEMT DT2 is connected to the storage capacitor Cst, the gate of the driving HEMT DT1, and the source of the switch HEMT TS1; its drain is connected to the source of the switch HEMT TS2; and its source is grounded.

[0015] Specifically, the switch HEMT TS3 serves as the main control switch of the LED light-emitting unit and is directly connected in series in the driving circuit of the LED light-emitting unit. When it is turned on, the driving HEMT DT1 outputs a constant current to light up the LED light-emitting unit according to Vg in the storage capacitor Cst; when it is turned off, it cuts off the current path of the LED light-emitting unit to achieve rapid extinguishing.

[0016] Specifically, the switch HEMT TS4 is turned on immediately during the off phase of the LED light-emitting unit, providing a low-impedance discharge path for the parasitic capacitance of the LED light-emitting unit and quickly dissipating residual charge.

[0017] Specifically, the gates of the switches HEMT TS1 and HEMT TS2 are interconnected to form a pre-charge path, which is synchronously turned on during the initialization phase to enhance the driving capability of the pre-charge current path and accelerate the stabilization process of the gate voltage Vg.

[0018] Specifically, the HEMT epitaxial structure includes a buffer layer, a high-resistivity layer, a channel layer, a barrier layer, a P-GaN layer, and a gate dielectric layer stacked sequentially, with source, drain, and gate electrodes configured accordingly.

[0019] Specifically, the LED epitaxial structure is located on the barrier layer of the HEMT epitaxial structure; the LED epitaxial structure includes a u-GaN layer, an n-GaN layer, a pre-strained layer, a multiple quantum well layer, an electron blocking layer and a p-GaN layer stacked sequentially, and an n electrode and a p electrode are respectively configured.

[0020] Specifically, the storage capacitor Cst has multiple groove regions, on which a first isolation layer, a first electrode, a second isolation layer, and a second electrode are stacked sequentially.

[0021] On the other hand, the present invention also provides a method for fabricating the GaN integrated device of the Micro LED, comprising the following steps:

[0022] Provide substrate;

[0023] A buffer layer, a high-resistivity layer, a channel layer, a barrier layer, a P-GaN layer, and a gate dielectric layer are sequentially fabricated on the substrate to form a HEMT epitaxial structure.

[0024] The gate dielectric layer and P-GaN layer are etched to expose the underlying barrier layer, leaving only the P-GaN layer and gate dielectric layer of the gate portion of each HEMT device.

[0025] Selectively epitaxially grow u-GaN layer, n-GaN layer, pre-strained layer, multiple quantum well layer, electron blocking layer and p-GaN layer on the barrier layer to form LED epitaxial structure;

[0026] Fabricate the source, drain, and gate of each HEMT device, and fabricate an n-electrode on the n-GaN layer of the LED epitaxial structure and a p-electrode on the p-GaN layer;

[0027] Multiple grooves are etched on the HEMT epitaxial structure, and a first isolation layer, a first electrode, a second isolation layer, and a second electrode are sequentially deposited on the sidewalls and bottom of the grooves to form a MIM capacitor with a groove structure.

[0028] Finally, multiple passivation layers are deposited sequentially and vias are etched, followed by the sequential deposition of multiple metal interconnect layers to achieve electrical connections.

[0029] A first passivation layer is deposited on the device, a first via is etched, and a first metal interconnect layer is deposited.

[0030] A second passivation layer is deposited on the first passivation layer, a second via is etched, and a second metal interconnect layer is deposited.

[0031] A third passivation layer is deposited on the second passivation layer, a third via is etched, and a third metal interconnect layer is deposited.

[0032] Compared with the prior art, the present invention has the following beneficial effects:

[0033] First, this invention, through an integrated current mirror drive architecture (DT1, DT2) combined with an optimized switch control network (TS1-TS4) and storage capacitors, provides precise constant current drive and fast dynamic response, while effectively eliminating LED ghosting. This ensures the stability of LED brightness and the sensitivity of adjustment, which is crucial for high-quality displays.

[0034] Secondly, the solution of this invention can effectively eliminate LED ghosting. This is mainly due to the special design of the TS4 switch, which immediately turns on after the LED light-emitting unit is turned off, providing a low-impedance discharge path for the parasitic capacitance of the LED light-emitting unit, thereby quickly dissipating residual charge and avoiding image trailing or ghosting effects. This active ghosting elimination mechanism plays a key role in improving display quality, especially in applications with high refresh rates or fast image switching.

[0035] Furthermore, this invention integrates the HEMT driving circuit, storage capacitor, and LED light-emitting unit onto a single GaN epitaxial structure, using electrodes and epitaxial layers for connection. This simplifies the overall structure and fundamentally avoids interconnection losses between discrete devices, directly improving system response speed and energy efficiency due to the shortened signal transmission path and reduced parasitic effects. In addition, monolithic integration significantly reduces the overall size of the device, which is particularly important for space-constrained portable devices and ultra-thin display applications. This shift from discrete to monolithic architecture represents not only a reduction in size but also a fundamental improvement in performance and efficiency, signifying an important development direction for Micro LED driving technology. Attached Figure Description

[0036] Figure 1This is a top view of the integrated device according to an embodiment of the present invention.

[0037] Figure 2 This is a circuit diagram of an integrated device according to an embodiment of the present invention.

[0038] Figure 3 for Figure 1 A schematic diagram of the structure of section c-c'.

[0039] Figure 4 for Figure 1 Schematic diagrams of the a-a' and b-b' sections.

[0040] Figure 5 for Figure 1 A schematic diagram of the structure of the d-d' section.

[0041] In the above figures, the component names corresponding to the reference numerals are as follows:

[0042] 1: Switch HEMT TS1; 2: Switch HEMT TS2; 3: Switch HEMT TS3; 4: Switch HEMT TS4; 5: Driver HEMT DT1; 6: Reference HEMT DT2; 7: LED light-emitting unit; 8: Storage capacitor; 9: Substrate; 10: HEMT epitaxial structure; 11: HEMT electrode structure; 12: First passivation layer; 13: Second passivation layer; 14: Third passivation layer; 15: First via; 16: First metal interconnect layer; 17: Second via; 18: Second metal interconnect layer; 19: Third via; 20: Third metal interconnect layer; 21: Gate lead; 22: Source lead;

[0043] 1001: Buffer layer; 1002: High-resistivity layer; 1003: Channel layer; 1004: Barrier layer; 1005: P-GaN layer; 1006: Gate dielectric layer;

[0044] 1101: Gate of the driving HEMT; 1102: Common source; 1103: Drain of the driving HEMT; 1104: Gate of the reference HEMT; 1105: Drain of the reference HEMT; 1106: Gate of the switching HEMT1; 1107: Source of the switching HEMT1; 1108: Drain of the switching HEMT1; 1109: Gate of the switching HEMT2; 1110: Source of the switching HEMT2; 1111: Drain of the switching HEMT2; 1112: Gate of the switching HEMT3; 1113: Source of the switching HEMT3; 1114: Drain of the switching HEMT3; 1115: Gate of the switching HEMT4; 1116: Source of the switching HEMT4; 1117: Drain of the switching HEMT4;

[0045] 701: u-GaN layer; 702: n-GaN layer; 703: pre-strained layer; 704: multiple quantum well layer; 705: electron blocking layer; 706: p-GaN layer; 707: n electrode; 708: p electrode;

[0046] 801: First isolation layer; 802: First electrode; 803: Second isolation layer; 804: Second electrode. Detailed Implementation

[0047] The present invention will be further described below with reference to the accompanying drawings and embodiments. The embodiments of the present invention include, but are not limited to, the following embodiments. Example

[0048] like Figure 1 As shown, the GaN integrated device of the Micro LED includes: an LED light-emitting unit 7 (represented as LED in the circuit diagram), switches HEMT1, HEMT2, HEMT3 and HEMT4 (represented as TS1, TS2, TS3 and TS4 in the circuit diagram) located to the left of the LED light-emitting unit 7, a driving HEMT5 and a reference HEMT6 (represented as DT1 and DT2 in the circuit diagram) located above the LED light-emitting unit 7, and a storage capacitor 8 (represented as Cst in the circuit diagram) located to the right of the LED light-emitting unit 7.

[0049] In terms of electrical connections, the reference HEMT6 and the driver HEMT5 share a common source. The n-electrode 707 of the LED light-emitting unit 7 is connected to the drain 1114 of the switch HEMT3 and the source 1116 of the switch HEMT4 through the first metal interconnect layer 16; the gate 1106 of the switch HEMT1 and the gate 1109 of the switch HEMT2 are connected through the first metal interconnect layer 16; the drain 1108 of the switch HEMT1 and the drain 1117 of the switch HEMT4 are connected through the second metal interconnect layer 18; the gate 1101 of the driver HEMT and the gate 1104 of the reference HEMT are connected through the gate lead 21. The drain 1103 of the driving HEMT and the source 1113 of the switching HEMT3 are connected through the third metal interconnect layer 20; the source 1107 and the gate lead 21 of the switching HEMT1 are connected through the second metal interconnect layer 18; the drain 1105 of the reference HEMT and the source 1110 of the switching HEMT2 are connected through the first metal interconnect layer 16; the first electrode 802 of the storage capacitor 8 is connected through the first metal interconnect layer 16 and the gate lead 21; the second electrode of the storage capacitor 8 is connected through the second metal interconnect layer 18 and the source lead 22.

[0050] The ratio of gate width W to gate length L for the driving HEMT5 and reference HEMT6 is 100. The ratio of gate width W to gate length L for the four switching HEMTs is 10.

[0051] In this embodiment, an integrated current mirror drive architecture (DT1, DT2) combined with an optimized switch control network (TS1-TS4) and storage capacitor provides precise constant current drive and fast dynamic response, while effectively eliminating LED ghosting. Furthermore, by monolithically integrating the HEMT drive circuit, storage capacitor, and LED light-emitting unit onto the same GaN epitaxial structure, it offers numerous advantages such as convenient connection, simple overall structure, avoidance of interconnection losses from discrete components, improved system response speed and energy efficiency, and reduced device size.

[0052] like Figure 2 The circuit diagram of this integrated device is shown. The switching of the LED is controlled by six HEMT devices, TS1-TS4, DT1 and DT2, and the storage capacitor Cst.

[0053] DT1 is responsible for providing constant current drive to the LED. By controlling the gate voltage Vg of DT1, the output current of DT1 is controlled, thereby controlling the brightness of the LED.

[0054] DT2 is a reference transistor, forming a current mirror structure with DT1. It is responsible for generating an accurate gate voltage Vg through a reference current Idrv. There is a proportional relationship between the W / L ratio of DT2 and DT1. Generally, the channel length (L) is set to be the same, and the device widths are proportional. If W2:W1 = 1:10, meaning a 1mA current flows through DT2, generating a corresponding gate voltage Vg, this Vg applied to DT1 will produce a 10mA current to drive the LED.

[0055] The storage capacitor Cst is responsible for storing the gate voltage Vg.

[0056] TS3 is an enable transistor that controls the LED to be turned on and off.

[0057] Devices TS1 and TS2 act as switches, responsible for setting the Vg voltage to the target value in advance.

[0058] TS4 sets the voltage before and after the LED is turned on. LEDs have parasitic capacitance, which is responsible for quickly discharging the LED charge after it is turned off, eliminating LED afterimages. Generally, TS1 and TS2 are turned on first to set the Vg voltage, and then TS3 is turned on to light the LED.

[0059] Figure 3 The diagram shows the integrated device in this embodiment relative to... Figure 1A schematic diagram of the c-c' cross-section is shown. HEMT epitaxial structure 10 and LED epitaxial structure are fabricated on the same substrate 9. The LED epitaxial structure constitutes the LED light-emitting unit 7 and is located on the HEMT epitaxial structure 10. The HEMT epitaxial structure 10 includes a buffer layer 1001, a high-resistivity layer 1002, a channel layer 1003, a barrier layer 1004, a P-GaN layer 1005, and a gate dielectric layer 1006, stacked sequentially.

[0060] Figure 3 The HEMT electrode structure 11 of the HEMT device formed on the HEMT epitaxial structure 10 is an electrode structure for driving HEMT5 and referencing HEMT6, including a common source 1102, a gate 1101 and drain 1103 for driving HEMT, and a gate 1104 and drain 1105 for referencing HEMT.

[0061] The LED light-emitting unit 7 is composed of a GaN-based multi-quantum-well structure, including a u-GaN layer 701, an n-GaN layer 702, a pre-strained layer 703, a multi-quantum-well layer 704, an electron blocking layer 705, a p-GaN layer 706, an n-electrode 707, and a p-electrode 708 stacked sequentially. The u-GaN layer 701 is located on the barrier layer 1004.

[0062] In this embodiment, substrate 9 is any one of sapphire substrate, Si substrate and SiC substrate.

[0063] The buffer layer 1001 is any one or a combination of AlN, AlGaN, InGaN and GaN, and the thickness of the buffer layer 1001 is 1000~4000nm.

[0064] The high-resistivity layer 1002 is a C or Mg-doped GaN layer with a thickness of 500~3000nm.

[0065] The channel layer 1003 is a GaN layer with a thickness of 100~300nm.

[0066] The barrier layer 1004 is an AlGaN layer with a thickness of 10~30nm.

[0067] The P-GaN layer 1005 is a P-GaN layer doped with any of Mg, Zn, or Ca.

[0068] The gate dielectric layer 1006 is one or a combination of AlN and Al2O3, and its thickness is 5~10nm.

[0069] The thickness of the u-GaN layer 701 is 1000~2000nm.

[0070] The n-GaN layer 702 is a Si-doped GaN layer with a Si doping concentration of 2.2 × 10⁻⁶. 19Its thickness is 1000~3000nm.

[0071] The pre-strained layer 703 is InGaN with an In composition of 10% and a thickness of 50 nm.

[0072] The multi-quantum well layer 704 is a periodically overlapping InGaN / GaN layer with a thickness of 70~80nm.

[0073] The electron blocking layer 705 is a p-type AlGaN electron blocking layer with a thickness of 10 nm.

[0074] The p-GaN layer 706 is a Mg-doped GaN layer with a thickness of 200~300nm.

[0075] The source and drain electrodes of the HEMT epitaxial structure region and the p-electrode 708 and n-electrode 707 of the LED epitaxial structure region are all ohmic contacts. The source and drain electrodes are made of an alloy composed of Ti, Al, Ni, and Au, while the p-electrode 708 and n-electrode 707 are made of an alloy composed of Cr, Al, Ti, Pt, and Au. The gate electrode of the HEMT epitaxial structure region is a Schottky contact electrode, and the gate electrode is made of an alloy composed of Ni and Au.

[0076] like Figure 4 The diagram shows the integrated device in this embodiment relative to... Figure 1 The diagram shows the structural layout of the a-a' and b-b' cross sections. The six HEMT devices are connected via vias and metal interconnect layers; the connection relationships are not repeated here.

[0077] The first passivation layer 12 can be composed of one or more materials selected from AlN, Al2O3, SiO2, Si3N4, AlON, and SiON, and its thickness is 100~300nm.

[0078] The second passivation layer 13 covers the first passivation layer 12 and can be composed of one or more materials selected from AlN, Al2O3, SiO2, Si3N4, AlON, and SiON, with a thickness of 100~300nm.

[0079] The third passivation layer 14 covers the second passivation layer 13 and can be composed of one or more materials selected from AlN, Al2O3, SiO2, Si3N4, AlON, and SiON, with a thickness of 100~300nm.

[0080] The first metal interconnect layer 16 is located on the first passivation layer 12 and can be one or more of Ti, Al, W and Au.

[0081] The second metal interconnect layer 18 is located on the second passivation layer 13 and can be one or more of Ti, Al, W and Au.

[0082] The third metal interconnect layer 20 is located on the third passivation layer 14 and can be one or more of Ti, Al, W and Au.

[0083] like Figure 5 The diagram shows the integrated device in this embodiment relative to... Figure 1 A schematic diagram of the d-d' cross-section is shown. The storage capacitor 8 is a metal-insulator-metal (MIM) capacitor with a groove structure. Compared to planar MIM capacitors, this reduces the integrated chip area and lowers chip integration costs.

[0084] Multiple grooves are fabricated on the HEMT epitaxial structure or passivation layer, and the grooves are etched down to the buffer layer 1001.

[0085] A first isolation layer 801, a first electrode 802, a second isolation layer 803, and a second electrode 804 are sequentially deposited on the inner wall and bottom surface of the groove and on part of the surface of the barrier layer 1004.

[0086] The first isolation layer 801 can be one or more of AlN, Al2O3, SiO2, and Si3N4, and its thickness is 10~1000nm.

[0087] The second isolation layer 803 can be one or more of AlN, Al2O3, SiO2, Si3N4, HfO2, and TiO2, and its thickness is 5~100nm.

[0088] The first electrode 802 can be one or more of TiN, TaN, and W.

[0089] The second electrode 804 can be one or more of Al, Cu, Au, TiN, and TaN.

[0090] The first electrode 802 is connected to the gate lead 21 that connects the gates of the driving HEMT5 and the reference HEMT6 through the first via 15 and the first metal interconnect layer 16.

[0091] The second electrode 804 is connected to the source lead 22 through the second through-hole 17 and the second metal interconnect layer 18.

[0092] Furthermore, based on the structure of the integrated device described above, this embodiment also provides a method for fabricating a GaN integrated device for Micro LEDs, comprising the following steps:

[0093] S11. Provide a substrate, which can be any one of sapphire substrate, Si substrate, or SiC substrate. Sapphire (Al2O3) is selected as the substrate here.

[0094] S12. Clean the sapphire substrate and grow an HEMT epitaxial structure on the substrate using MOCVD. The HEMT epitaxial structure includes, from bottom to top, a 2000 nm thick AlGaN buffer layer, a 2000 nm thick Mg-doped GaN high-resistivity layer, a 250 nm thick GaN channel layer, a 20 nm thick AlGaN barrier layer, a 50 nm thick P-GaN layer, and a 5 nm thick AlN gate dielectric layer.

[0095] S13. After homogenization, photolithography and development of negative photoresist on the surface of the epitaxial wafer, the AlN gate dielectric layer and P-GaN layer on the surface of the HEMT region are etched by ICP, leaving only the AlN layer and P-GaN layer of the gate portion. After etching, the photoresist is cleaned and removed.

[0096] S14. A 100nm thick SiO2 mask layer is deposited using PECVD. The pattern corresponding to the LED position is etched using BOE wet etching. Then, a secondary epitaxial growth of the LED epitaxial structure is performed. After removing the SiO2 mask layer, the LED epitaxial structure is formed. This LED epitaxial structure, from bottom to top, includes a 2000nm thick u-GaN layer, a 1000nm thick n-GaN layer, a 50nm thick InGaN pre-strained layer, an 80nm thick InGaN / GaN multiple quantum well layer, a 10nm thick p-type AlGaN electron blocking layer, and a 200nm thick p-GaN layer. The InGaN layer in the multiple quantum well layer is 2nm thick, and the GaN layer is 8nm thick. The multiple quantum well layer is a well and barrier structure composed of InGaN and GaN materials repeating for eight cycles.

[0097] S15. A transparent conductive layer ITO is deposited on the p-GaN layer in the LED area by magnetron sputtering and then rapidly annealed to form an ohmic contact between the ITO and the p-GaN layer. The annealing temperature is 500℃ and the time is 3min.

[0098] S16. Spin-coat positive photoresist onto the epitaxial wafer surface, perform photolithography and development, then use ICP etching to etch the ITO and GaN layers outside the mesa until the n-GaN layer is exposed. After etching, clean and remove the photoresist.

[0099] S17. After applying negative photoresist, photolithography, and development to the epitaxial wafer surface, metal evaporation is performed on the source and drain electrodes of the HEMT device. The electrode structure is Ti / Al / Ni / Au, and the electrode is rapidly annealed at 875℃ for 30s. Subsequently, after applying negative photoresist, photolithography, and development to the epitaxial wafer surface, metal evaporation is performed on the n electrode of the LED device. The electrode structure is Cr / Al / Ti / Pt / Au. Finally, after applying negative photoresist, photolithography, and development to the epitaxial wafer surface again, metal evaporation is performed on the gate electrode of the HEMT device. The gate structure is Ni and Au.

[0100] S18. After homogenizing, photolithography and development of positive photoresist on the surface of the epitaxial wafer, ICP is used to etch multiple groove structures in the capacitor area to the AlGaN buffer layer. After etching, the photoresist is removed by cleaning.

[0101] S19. A 100nm thick Si3N4 layer is deposited using PECVD. Then, a first electrode of the capacitor is deposited using a PECVD process involving spin coating with an adhesion promoter and photoresist, photolithography, and development. The metal used for the first electrode is TiN. Metal stripping is performed to remove metal outside the capacitor region. A 20nm thick Si3N4 layer is then deposited using PECVD. Finally, a second electrode is deposited using a PECVD process involving spin coating with an adhesion promoter and photoresist, photolithography, and development. The structure of the second electrode is a Ti / Au / Ti stack.

[0102] S20. A 100nm thick Si3N4 layer is deposited using PECVD to form the first passivation layer. After photoresist and adhesion promoter are used for homogenization, photolithography, and development, the first through-hole is formed by ICP etching. After cleaning and removing the photoresist, homogenization, photolithography, and development are performed again, and the first metal interconnect layer is deposited by vapor deposition.

[0103] S21. A 200nm thick Si3N4 layer is deposited using PECVD to form a second passivation layer. After photoresist and adhesion promoter are used for homogenization, photolithography, and development, ICP etching is used to form a second via. After cleaning and removing the photoresist, homogenization, photolithography, and development are performed again, and a second metal interconnect layer is deposited by vapor deposition.

[0104] S22. A 200nm thick Si3N4 layer is deposited using PECVD to form the third passivation layer. After photoresist and tackifier are used for homogenization, photolithography, and development, the third via is formed by ICP etching. After cleaning and removing the photoresist, homogenization, photolithography, and development are performed again, and the third metal interconnect layer is deposited by vapor deposition.

[0105] The above embodiments are merely preferred embodiments of the present invention and are not intended to limit the scope of protection of the present invention. Any changes made based on the design principles of the present invention, or any non-creative modifications made thereon, shall fall within the scope of protection of the present invention.

Claims

1. A GaN integrated device for Micro LED, characterized in that, include: A substrate; The HEMT epitaxial structure disposed on the substrate forms a plurality of electrically connected HEMT devices, the plurality of HEMT devices including a driving HEMT DT1, a reference HEMT DT2, and four switching HEMTs TS1, TS2, TS3 and TS4; An LED epitaxial structure disposed on the HEMT epitaxial structure constitutes an LED light-emitting unit, wherein the n-electrode of the LED light-emitting unit is connected to the drain of switch HEMT TS3 and the source of switch HEMT TS4. And a storage capacitor Cst disposed on the HEMT epitaxial structure, the storage capacitor being a metal-insulator-metal capacitor having a groove structure; The HEMT epitaxial structure comprises a buffer layer, a high-resistivity layer, a channel layer, a barrier layer, a P-GaN layer, and a gate dielectric layer stacked sequentially, with a source, drain, and gate correspondingly configured; the LED epitaxial structure is located on the barrier layer of the HEMT epitaxial structure. The driving HEMT DT1 controls the current of the LED light-emitting unit by adjusting the gate voltage Vg. The driving HEMT DT1 is connected in series with the LED light-emitting unit. Its gate is connected to the storage capacitor Cst, the gate of the reference HEMT DT2 and the source of the switch HEMTTS1; its drain is connected to the source of the switch HEMT TS3; and its source is grounded. The reference HEMT DT2 and the driving HEMT DT1 form a current mirror structure. The gate of the reference HEMT DT2 is connected to the storage capacitor Cst, the gate of the driving HEMT DT1, and the source of the switch HEMT TS1; its drain is connected to the source of the switch HEMT TS2; and its source is grounded. The switch HEMT TS3 serves as the main control switch for the LED light-emitting unit and is directly connected in series in the driving circuit of the LED light-emitting unit. When it is turned on, the driving HEMT DT1 outputs a constant current to light up the LED light-emitting unit according to Vg in the storage capacitor Cst; when it is turned off, it cuts off the current path of the LED light-emitting unit to achieve rapid extinguishing. The drain of switch HEMT TS4 is connected to the drain of switch HEMT TS1, and is immediately turned on during the off phase of the LED light-emitting unit, providing a low-impedance discharge path for the parasitic capacitance of the LED light-emitting unit and quickly dissipating residual charge. The gates of switch HEMT TS1 and switch HEMT TS2 are interconnected to form a pre-charge path. The source of switch HEMT TS2 is connected to the drain of reference HEMT DT2 and is synchronously turned on during the initialization phase to enhance the driving capability of the pre-charge current path and accelerate the stabilization process of regulating the gate voltage Vg. The ratio of the gate width to the gate length of the driving HEMT DT1 and the reference HEMT DT2 is 100, and the ratio of the gate width to the gate length of the four switches HEMT TS1, TS2, TS3 and TS4 is 10.

2. The GaN integrated device for Micro LED according to claim 1, characterized in that, The LED epitaxial structure comprises a u-GaN layer, an n-GaN layer, a pre-strained layer, a multiple quantum well layer, an electron blocking layer, and a p-GaN layer stacked sequentially, with n electrodes and p electrodes configured accordingly.

3. The GaN integrated device for Micro LED according to claim 2, characterized in that, The storage capacitor Cst has multiple groove regions, on which a first isolation layer, a first electrode, a second isolation layer, and a second electrode are stacked sequentially.

4. The method for fabricating a GaN integrated device for Micro LEDs as described in any one of claims 1-3, characterized in that, Includes the following steps: Provide substrate; A buffer layer, a high-resistivity layer, a channel layer, a barrier layer, a P-GaN layer, and a gate dielectric layer are sequentially fabricated on the substrate to form a HEMT epitaxial structure. The gate dielectric layer and P-GaN layer are etched to expose the underlying barrier layer, leaving only the P-GaN layer and gate dielectric layer of the gate portion of each HEMT device. Selectively epitaxially grow u-GaN layer, n-GaN layer, pre-strained layer, multiple quantum well layer, electron blocking layer and p-GaN layer on the barrier layer to form LED epitaxial structure; Fabricate the source, drain, and gate of each HEMT device, and fabricate an n-electrode on the n-GaN layer of the LED epitaxial structure and a p-electrode on the p-GaN layer; Multiple grooves are etched on the HEMT epitaxial structure, and a first isolation layer, a first electrode, a second isolation layer, and a second electrode are sequentially deposited on the sidewalls and bottom of the grooves to form a MIM capacitor with a groove structure. Finally, multiple passivation layers are deposited sequentially and vias are etched, followed by the deposition of multiple metal interconnect layers to achieve electrical connection.

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