A power interruption handling method, device, medium, and program product

Abstract

The application discloses a power interruption processing method and device, a medium and a program product, relates to the technical field of detection, and comprises the following steps: in response to the signal interruption time between a first controller and a power supply unit being greater than a first preset value, determining that a main circuit link is interrupted, outputting virtual state data of the power supply unit by a backup circuit, and detecting the heartbeat state of the backup circuit; determining a power interruption fault type according to the heartbeat state detection result of the backup circuit; in response to the link of the main circuit being recovered, comparing the virtual state data of the power supply unit output by the backup circuit last time with actual state data of the power supply unit output when the main circuit is normally working; and processing the power interruption fault according to the comparison result of the state data of the power supply unit. The application accurately distinguishes between permanent faults and instantaneous interruption faults of the power interruption through a double-path interruption processing mechanism, and shortens the time for processing the power interruption fault.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of detection, and in particular to a power interruption processing method, device, medium and program product. BACKGROUND

[0002] Currently, in the test of a server, a baseboard management controller (BMC) needs to communicate with a power supply unit (PSU) through an I2C relay circuit on a power board, but the link has a problem of loss of PSU state data caused by instantaneous link interruption:

[0003] When the power board is instantaneously hot-plugged, the I2C line is disturbed or has poor contact, the I2C main link may be instantaneously interrupted for milliseconds, at which time the baseboard management controller cannot read the PSU state data, that is, an alarm prompt (such as "PSU offline") is triggered, and the historical state data cached in the memory is emptied, thereby causing:

[0004] The main circuit continuity monitoring is interrupted, the key fault time point data is lost, the false alarm prompt causes the redundant power supply of the system to be misoperated, manual intervention is required for resetting, and the coherence of the automatic process of other parallel tests is reduced. Related solutions generally rely on the retry mechanism of the two-wire serial bus (I2C, Inter-Integrated Circuit) protocol, but cannot distinguish between permanent faults and instantaneous interruption faults, and cannot maintain the output of the effective state data of the PSU during the interruption of the link. SUMMARY

[0005] The present application provides a power interruption processing method, device, medium and program product, the method comprising detecting signals between a first controller and a power supply unit; in response to the interruption time of the signals between the first controller and the power supply unit being greater than a first preset value, determining that the main circuit link is interrupted, outputting virtual state data of the power supply unit through a backup circuit, and detecting the heartbeat state of the backup circuit; determining the power interruption fault type according to the heartbeat state detection result of the backup circuit; restoring the link of the main circuit; in response to the link of the main circuit being restored, comparing the virtual state data of the power supply unit output by the backup circuit last time during the interruption of the main circuit link with the actual state data of the power supply unit output when the main circuit is normally working; and processing the power interruption fault according to the comparison result of the state data of the power supply unit. The present application accurately distinguishes between permanent faults and instantaneous interruption faults of the power interruption through a double-path interruption processing mechanism, and shortens the time for processing the power interruption fault.

[0006] The application provides a power interruption processing method, which is applied to a power interruption processing system. The system comprises a main circuit and a backup circuit. The main circuit comprises a first controller, a first power panel and a power supply unit. The first controller is connected with the first power panel, and the first power panel is connected with the power supply unit. The backup circuit is connected between the first controller and the power supply unit. The method comprises the following steps:

[0007] detecting signals between the first controller and the power supply unit;

[0008] in response to the interruption time of the signals between the first controller and the power supply unit being greater than a first preset value, determining that the link of the main circuit is interrupted, outputting virtual state data of the power supply unit through the backup circuit, and detecting the heartbeat state of the backup circuit;

[0009] determining the power interruption fault type according to the heartbeat state detection result of the backup circuit;

[0010] recovering the link of the main circuit;

[0011] in response to the recovery of the link of the main circuit, comparing the virtual state data of the power supply unit output by the backup circuit for the last time during the interruption of the link of the main circuit with the actual state data of the power supply unit output when the main circuit is normally working;

[0012] processing the power interruption fault according to the comparison result of the state data of the power supply unit.

[0013] The application further provides a power interruption processing device, which comprises the following components:

[0014] a detection module, which is used for detecting signals between a first controller and a power supply unit;

[0015] a first processing module, which is used for, in response to the interruption time of the signals between the first controller and the power supply unit being greater than a first preset value, determining that the link of the main circuit is interrupted, outputting virtual state data of the power supply unit through the backup circuit, and detecting the heartbeat state of the backup circuit;

[0016] a determination module, which is used for determining the power interruption fault type according to the heartbeat state detection result of the backup circuit;

[0017] a recovery module, which is used for recovering the link of the main circuit;

[0018] a comparison module, which is used for, in response to the recovery of the link of the main circuit, comparing the virtual state data of the power supply unit output by the backup circuit for the last time during the interruption of the link of the main circuit with the actual state data of the power supply unit output when the main circuit is normally working;

[0019] The second processing module is configured to process the power interruption fault according to a comparison result of the power supply unit state data.

[0020] The present application also provides an electronic device, comprising a memory for storing a computer program, and a processor for executing the computer program to implement the steps of the power interruption processing method, which comprises:

[0021] detecting the signal between the first controller and the power supply unit;

[0022] in response to the signal interruption time between the first controller and the power supply unit being greater than a first preset value, determining that the main circuit link is interrupted, outputting the virtual state data of the power supply unit through the backup circuit, and detecting the heartbeat state of the backup circuit;

[0023] determining the power interruption fault type according to the heartbeat state detection result of the backup circuit;

[0024] recovering the link of the main circuit;

[0025] in response to the link recovery of the main circuit, comparing the virtual state data of the power supply unit output by the backup circuit during the last link interruption of the main circuit with the actual state data of the power supply unit output when the main circuit is normally working;

[0026] processing the power interruption fault according to a comparison result of the power supply unit state data.

[0027] The present application also provides a computer readable storage medium, which stores a computer program, wherein the computer program is executed by a processor to implement the steps of the power interruption processing method, which comprises:

[0028] detecting the signal between the first controller and the power supply unit;

[0029] in response to the signal interruption time between the first controller and the power supply unit being greater than a first preset value, determining that the main circuit link is interrupted, outputting the virtual state data of the power supply unit through the backup circuit, and detecting the heartbeat state of the backup circuit;

[0030] determining the power interruption fault type according to the heartbeat state detection result of the backup circuit;

[0031] recovering the link of the main circuit;

[0032] in response to the link recovery of the main circuit, comparing the virtual state data of the power supply unit output by the backup circuit during the last link interruption of the main circuit with the actual state data of the power supply unit output when the main circuit is normally working;

[0033] According to the comparison result of the power supply unit state data, the power interruption fault is processed.

[0034] The application further provides a computer program product comprising a computer program which, when executed by a processor, implements the steps of the power interruption processing method, the method comprising:

[0035] detecting the signal between the first controller and the power supply unit;

[0036] in response to the signal interruption time between the first controller and the power supply unit being greater than a first preset value, determining that the main circuit link is interrupted, outputting the virtual state data of the power supply unit through the backup circuit, and detecting the heartbeat state of the backup circuit;

[0037] determining the power interruption fault type according to the heartbeat state detection result of the backup circuit;

[0038] restoring the link of the main circuit;

[0039] in response to the link of the main circuit being restored, comparing the virtual state data of the power supply unit output by the backup circuit last time during the main circuit link interruption with the actual state data of the power supply unit output when the main circuit is normally working;

[0040] processing the power interruption fault according to the comparison result of the power supply unit state data.

[0041] According to the application, since the method comprises detecting the signal between the first controller and the power supply unit, in response to the signal interruption time between the first controller and the power supply unit being greater than a first preset value, determining that the main circuit link is interrupted, outputting the virtual state data of the power supply unit through the backup circuit, and detecting the heartbeat state of the backup circuit, determining the power interruption fault type according to the heartbeat state detection result of the backup circuit, restoring the link of the main circuit, in response to the link of the main circuit being restored, comparing the virtual state data of the power supply unit output by the backup circuit last time during the main circuit link interruption with the actual state data of the power supply unit output when the main circuit is normally working, and processing the power interruption fault according to the comparison result of the power supply unit state data. The application accurately distinguishes between permanent power interruption faults and transient interruption faults through a double-path interruption processing mechanism, shortens the power interruption fault processing time, and enhances the power fault diagnosis function.

[0042] The technical scheme of the application can solve the problem of power supply unit PSU state data loss, and the PSU state data can be continuously maintained during the main circuit transient interruption, so that the alarm rate is greatly reduced. BRIEF DESCRIPTION OF DRAWINGS

[0043] In order to more clearly illustrate the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments. Obviously, the drawings described below only illustrate some of the embodiments of the present application, and other drawings can be obtained by those skilled in the art without any creative effort based on these drawings.

[0044] Figure 1 The power interruption processing system architecture diagram provided for the embodiments of the present application;

[0045] Figure 2 The first flow chart of the power interruption processing method provided for the embodiments of the present application;

[0046] Figure 3 The second flow chart of the power interruption processing method provided for the embodiments of the present application;

[0047] Figure 4 The general input and output controller heartbeat detection flow chart provided for the embodiments of the present application;

[0048] Figure 5 The specific flow chart of the power interruption processing provided for the embodiments of the present application;

[0049] Figure 6 The overall flow chart of the power interruption processing method provided for the embodiments of the present application;

[0050] Figure 7 The structure diagram of the power interruption processing device provided for the embodiments of the present application;

[0051] Figure 8 The exemplary system which can be used to implement each of the embodiments of the present application is provided for the embodiments of the present application. DETAILED DESCRIPTION

[0052] The technical solutions in the embodiments of the present application will be described clearly and completely below with the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without any creative effort belong to the protection scope of the present application.

[0053] It should be noted that, in the description of the present application, the terms “include”, “contain” or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. The terms “first”, “second” and the like in the present application are used to distinguish similar objects, not to describe a specific order or sequence.

[0054] In order for those skilled in the art in this technical field to better understand the present application, the present application is further described in detail below in combination with the drawings and specific embodiments.

[0055] In combination with the specific application environment architecture or the specific hardware architecture on which the execution of the power interruption processing method depends, the specific application environment architecture or the specific hardware architecture is described herein.

[0056] For example, the comparison file CN107276832A adds the use of a general input / output (GPIO, General Purpose Input / Output) link, but the comparison file focuses on I2C communication link recovery: when the link is interrupted, the single-chip microcomputer is triggered to resend an activation pulse through the GPIO controller, and a single-chip microcomputer needs to be custom-installed in the power supply unit PSU, which has a high implementation cost.

[0057] The present application realizes business fault tolerance without awareness: maintaining continuous output of power supply unit state data during interruption, accurately isolating permanent faults, at this time, there is no need to modify the power supply unit, only the optical coupling isolation circuit needs to be added in the power board, which has a low implementation cost.

[0058] The comparison file CN111984106A interrupts the power supply unit in place, dynamically loads or unloads the drive and manages the hwmon interface, realizes the instant start and stop of the monitoring service; when the power supply unit PSU is completely inserted or pulled out, the monitoring state can be accurately switched, but in the I2C link transient interruption window caused by hot plug, due to the dependence on the physical in-place signal, it cannot be distinguished from the scene of physical in-place but communication interruption, and it will directly determine that the power supply unit PSU is pulled out and the drive is unloaded.

[0059] The present application realizes transient interruption shielding through hardware layer deployment, that is, the state data output can be maintained even if the I2C link is interrupted, so that the system is completely business unaware during hot plug.

[0060] Therefore, the related scheme is to use double I2C link full-time redundancy, and the baseboard management controller transmits data through two I2C links in parallel, which has the disadvantage that the double link continuously works at the same time, causing high power consumption and easy overheating; at the same time, the electromagnetic interference caused by the two I2C links during work easily increases the error rate.

[0061] Embodiments of the present application provide a power interruption processing method, such as Figure 1 , Figure 2As shown, the method is applied to a power interruption processing system, the system comprising a main circuit and a backup circuit, the main circuit comprising a first controller, a first power panel, and a power supply unit, the first controller being connected with the first power panel, the first power panel being connected with the power supply unit, the backup circuit being connected between the first controller and the power supply unit, the method comprising:

[0062] detecting a signal between the first controller and the power supply unit;

[0063] in response to the signal interruption time between the first controller and the power supply unit being greater than a first preset value, determining that the main circuit link is interrupted, outputting virtual state data of the power supply unit through the backup circuit, and detecting a heartbeat state of the backup circuit;

[0064] determining a power interruption fault type according to the heartbeat state detection result of the backup circuit;

[0065] recovering the link of the main circuit;

[0066] in response to the link recovery of the main circuit, comparing the virtual state data of the power supply unit output by the backup circuit last time during the main circuit link interruption with actual state data of the power supply unit output when the main circuit is normally working;

[0067] processing the power interruption fault according to the state data comparison result of the power supply unit.

[0068] It can be understood that the application proposes a link state caching and virtualization output scheme, which maintains the continuity of the output of the PSU state data during the I2C link interruption, and introduces a double-path redundancy check mechanism to improve the reliability of communication: when the I2C link is normal, the GPIO controller maintains a low-frequency heartbeat, and when the link is interrupted, the deep check is activated; the virtualization module maintains the output of the state data throughout the process; after the main link is recovered, the virtual value and the actual value of the state data are compared, when the difference is <5%, the historical data is automatically gradually compensated; when the difference is >5%, the alarm is given and the buffer area of the memory is frozen to avoid error propagation.

[0069] The technical problem mainly solved by the application is that when the power panel is replaced, the I2C link is physically disconnected, which causes the PSU monitoring data to be cleared and the false alarm prompt; the related scheme cannot distinguish between the millisecond-level transient interruption (such as noise interference) and the real hardware permanent fault of the I2C link.

[0070] Embodiments of the application provide a power interruption processing method, such as Figure 3As shown, the method is applied to a power interruption processing system, the system comprising a main circuit and a backup circuit, the main circuit comprising a first controller, a first power panel, a power supply unit (PSU), the first controller being connected with the first power panel, the first power panel being connected with the power supply unit, the backup circuit being connected between the first controller and the power supply unit, the backup circuit comprising a second controller, a second power panel, the first controller being connected with the second controller, the second controller being connected with the second power panel, the second power panel being connected with the power supply unit;

[0071] The first controller is a two-wire serial bus (I2C) controller, and the second controller is a general-purpose input / output (GPIO) controller.

[0072] The system comprises a third controller, the third controller comprising a memory, the third controller being connected with the first controller.

[0073] The system further comprises an opto-coupler isolation circuit and a watchdog integrated circuit, the opto-coupler isolation circuit being arranged on the second power panel, the opto-coupler isolation circuit being connected between the second controller and the power supply unit,

[0074] The opto-coupler isolation circuit is used for electrically isolating the main circuit or the backup circuit.

[0075] The watchdog integrated circuit is integrated on the third controller, and the watchdog integrated circuit is used for detecting a signal between the first controller and the power supply unit.

[0076] Here, the third controller is a baseboard management controller (BMC), which is responsible for monitoring the power state.

[0077] The application adopts a dual-engine architecture of “dynamic redundancy triggering + state virtualization”, and an opto-coupler isolation circuit is added on the power panel in parallel with the I2C main circuit link, and the method comprises:

[0078] Step S01, power-on initialization is performed on the main circuit.

[0079] The power-on initialization on the main circuit comprises:

[0080] Clock signal synchronization is performed on the first controller, the first power panel and the power supply unit.

[0081] Work parameters of the first controller are set, the work parameters comprising clock frequency and address.

[0082] A start command is sent to the first power panel through a two-wire serial bus link, voltage parameters and / or current parameters of the first power panel are configured, and the first power panel is powered.

[0083] Output parameters of the power supply unit are configured.

[0084] Turning on the monitoring function of the power supply unit, monitoring the working state of the power supply unit;

[0085] In response to any one component in the main circuit appearing initialization error, the component is re-powered and initialized, and an alarm is prompted.

[0086] Here, when the system is powered on, all hardware components (including BMC, I2C master, GPIO controller) will undergo a reset process and return to the initial state; Ensure that the clock signals of all components are synchronized.

[0087] BMC initialization:

[0088] The BMC first performs self-checking to ensure that its internal hardware and software are free of problems;

[0089] Load and run the BMC firmware from the memory;

[0090] Configure the I2C interface and other related interfaces of the BMC, making it ready for communication with other components.

[0091] I2C master initialization:

[0092] Set the working parameters of the I2C master, such as clock frequency, address, etc.;

[0093] Detect whether the I2C bus is working normally by sending test signals;

[0094] GPIO controller initialization:

[0095] Configure the direction (input / output), initial state, etc. of the GPIO pin according to system requirements;

[0096] Configure the GPIO interrupt to respond to external events.

[0097] Power board initialization:

[0098] Read the Present pin state on the power board through the GPIO link to confirm whether the power module has been correctly connected;

[0099] Send commands to the power board through the I2C link to configure the required voltage, current, etc. parameters;

[0100] Send commands to start the power module and start power supply.

[0101] I2C relay initialization:

[0102] Configure the I2C relay on the power board through the I2C bus to ensure that data can be forwarded correctly;

[0103] Send test data to verify whether the I2C relay works normally.

[0104] PSU initialization:

[0105] Read the status information of the PSU through the I2C link to confirm whether it works normally; configure the output parameters of the PSU; enable the monitoring function of the PSU to monitor its working state in real time.

[0106] Overall system verification:

[0107] During the entire initialization process, the status of each part is continuously detected to ensure that all components work normally; if an error is detected at any step, appropriate error handling measures such as reinitialization, alarm, etc. are taken immediately.

[0108] Step S02, detecting the signal between the first controller and the power supply unit.

[0109] Step S03, in response to the signal interruption time between the first controller and the power supply unit being greater than the first preset value, determining that the main circuit link is interrupted, outputting the virtual state data of the power supply unit through the backup circuit, and detecting the heartbeat state of the backup circuit.

[0110] Specifically, a hardware watchdog circuit is deployed to monitor the continuity of the I2C link SCL / SDA signal level; when the I2C link SCL / SDA signal level between the baseboard management controller BMC and the PSU is detected to be continuous, the BMC outputs the PSU real state data, i.e. the actual value of the cached PSU key state data is output; if the I2C link SCL / SDA signal level interruption time between the BMC and the PSU is detected to be >5ms, it is determined that the link is interrupted.

[0111] The first preset value is 5ms.

[0112] Step S031, the system includes a third controller, the third controller is connected with the first controller, in response to the signal interruption time between the first controller and the power supply unit being less than or equal to the first preset value, the power supply unit is checked through the general input and output link Heartbeat packet, the state data of the power supply unit is stored in the memory according to the first threshold interval time (≤100ms), and the state data is set as the actual state data of the power supply unit output when the main circuit works normally.

[0113] The heartbeat packet of the power supply unit is checked through the general input and output link, including:

[0114] The third controller sends an in-place query signal to the power supply unit according to a second threshold interval time (200 ms), and the power supply unit sends a response level signal to the third controller through a general input and output link in response to the in-place state of the power supply unit.

[0115] Specifically, the controller BMC caches the key state data (voltage, current, temperature, in-place state) of the power supply unit PSU to the non-volatile memory (NVRAM) at a period of ≤100 ms during normal communication, and marks the state data as actual state data.

[0116] When the I2C link between the controller BMC and the power supply unit PSU is in normal communication, the BMC sends a PSU in-place query pulse to the power supply unit through the GPIO link every 200 ms; the power supply unit PSU responds to the BMC with a hardware level signal through the GPIO link within 2 ms.

[0117] Step S032, setting a mirror cache in the third controller;

[0118] According to a third threshold interval time (50 ms ~ 100 ms), the state data of the power supply unit is stored in the mirror cache;

[0119] And the state data of the power supply unit is set as virtual state data of the power supply unit output by the standby circuit;

[0120] The state data of the power supply unit includes voltage data and / or current data and / or temperature data and / or in-place state data.

[0121] Specifically, during the interruption of the I2C master circuit, the BMC switches to the virtual state output mode, continuously outputs the last set of valid state data of the power supply unit in the mirror cache, and marks the "virtual state" flag bit to avoid state clearing, realizing fault switching without awareness of the business layer.

[0122] Step S04, determining the power interruption fault type according to the heartbeat state detection result of the standby circuit.

[0123] Step S041, as shown in the figure, detecting the heartbeat state of the second controller; Figure 4

[0124] Detecting the heartbeat state of the second controller includes:

[0125] Determining whether the heartbeat state of the second controller is normal;

[0126] If yes, the power interruption fault type is the transient interruption fault type, and the standby circuit is started; if no, the power interruption fault type is the permanent fault type, and an alarm information is output.​

[0127] Specifically, when the main circuit link is interrupted, a GPIO heartbeat status check is immediately sent, if the GPIO controller heartbeat is normal, it is determined as a transient interruption, and the virtual state output is enabled; if the GPIO heartbeat is also abnormal, i.e., no level signal is received within 2 ms, the system is determined as a permanent failure and an alarm information is output.

[0128] Step S05, the link of the main circuit is recovered.

[0129] Step S051, the link of the main circuit is soft recovered;

[0130] The soft recovery of the link of the main circuit includes:

[0131] The parameters and configuration addresses of the two-wire serial bus interface of the first controller, the first power board and the power supply unit are reset;

[0132] The first controller, the first power board and the power supply unit are soft recovered by a software reset instruction;

[0133] The link of the main circuit is hard recovered;

[0134] The hard recovery of the link of the main circuit includes:

[0135] The link of the main circuit is power cycled;

[0136] The connectors of the first controller, the first power board and the power supply unit are checked;

[0137] After the link of the main circuit is recovered, the access and data transmission state of all components of the main circuit are checked, and a recovery log is recorded.

[0138] Specifically, the link of the main circuit is soft recovered:

[0139] For some programmable I2C devices, a software reset command may be supported, and sending a reset instruction to these devices may solve the problem;

[0140] The I2C interface is reinitialized at the BMC or host end, including setting parameters, configuring addresses, etc.

[0141] A probe message (e.g., reading the status of a known slave device) is sent through the I2C bus to check whether normal communication can be restored.

[0142] The link of the main circuit is hard recovered:

[0143] If the soft recovery method is ineffective, consider performing a power cycle on the relevant I2C device, which involves controlling the GPIO pin to cut off and then provide power to the target device again;

[0144] Manually inspect physical components such as connectors, cables, and termination resistors to ensure they are not loose or damaged.

[0145] Once recovery measures are taken, perform a comprehensive health check to verify that the I2C link has returned to normal; this includes but is not limited to: confirming that all slave devices are accessible, data transmission is error-free, etc.

[0146] Detailed records of each step of the recovery process and its results are kept for future analysis and improvement.

[0147] Develop automated fault detection and recovery scripts to reduce the need for manual intervention;

[0148] Based on lessons learned, adjust system design and configuration to improve overall stability and anti-interference capability of the I2C link; such as adding better signal integrity protection measures, using higher quality connectors, etc.

[0149] Step S06, in response to the link recovery of the main circuit, compare the power supply unit virtual state data output by the backup circuit last time with the power supply unit actual state data output by the main circuit when it is working normally.

[0150] Step S07, according to the comparison result of the power supply unit state data, process the power interruption fault.

[0151] Step S071, as shown in Figure 5 , in response to the difference between the power supply unit virtual state data output by the backup circuit last time and the power supply unit actual state data output by the main circuit when it is working normally being less than the second preset value (5%), synchronize the power supply unit virtual state data and the power supply unit actual state data, and record the data synchronization log;

[0152] In response to the difference between the power supply unit virtual state data output by the backup circuit last time and the power supply unit actual state data output by the main circuit when it is working normally being greater than or equal to the second preset value, an alarm information is sent, the cache of the memory is frozen, the power supply unit state data abnormal problem snapshot is recorded, and the system is analyzed according to the power supply unit state data abnormal problem snapshot.

[0153] Specifically, after the main circuit link is recovered, the BMC compares the last PSU virtual output state data output during the interruption with the PSU actual state data: if the difference is < 5%, the data is automatically synchronized and an event log is recorded; if the difference is ≥ 5%, an alarm is triggered and the buffer is reset, and a snapshot of the abnormal problem is reserved for subsequent troubleshooting and analysis.

[0154] In step S0711, a timer is set to obtain the power supply unit actual state data at a fourth threshold interval time (100 ms ~ 200 ms), and the power supply unit actual state data is updated to the buffer of the power supply unit virtual state data through the two-wire serial bus link;

[0155] In response to the data synchronization time of the power supply unit virtual state data and the power supply unit actual state data being greater than a third preset value (100 ms), the data synchronization process of the power supply unit virtual state data and the actual state data is recovered;

[0156] The consistency of the power supply unit virtual state data and the power supply unit actual state data is verified;

[0157] The consistency of the power supply unit virtual state data and the power supply unit actual state data is verified, including:

[0158] The cyclic redundancy check value of the power supply unit virtual state data is calculated;

[0159] The cyclic redundancy check value of the power supply unit actual state data is calculated;

[0160] In response to the cyclic redundancy check value of the power supply unit virtual state data being consistent with the cyclic redundancy check value of the power supply unit actual state data, the data synchronization process ends;

[0161] In response to the cyclic redundancy check value of the power supply unit virtual state data being inconsistent with the cyclic redundancy check value of the power supply unit actual state data, the power supply unit virtual state data and the power supply unit actual state data are re-synchronized.

[0162] Specifically, in order to ensure that the virtual state data of the PSU (power supply unit) is synchronized with the actual state data, a series of measures can be taken to achieve efficient and accurate data synchronization:

[0163] A timer is set to periodically read the actual state data from the PSU and update it to the virtual state buffer; by listening to a specific event (such as a state change interruption), when a change in the state of the PSU is detected, a data synchronization operation is triggered immediately;

[0164] Add checksum or cyclic redundancy check (CRC) in the transmission data packet, so that the receiver can verify whether the received data is correct; add version number or timestamp to each set of state data, which is convenient for comparing data obtained at different time points, and ensures that the latest and most accurate state is used;

[0165] Set a reasonable timeout value. If the data synchronization cannot be completed within the specified time, it is considered a failure and triggers the corresponding recovery process;

[0166] Detailed records of each data synchronization process and results are helpful for troubleshooting and system optimization;

[0167] Build a simulation environment to test various possible situations and ensure that the data synchronization logic works properly under different conditions.

[0168] Step S0712, analyze and check the physical connection and software configuration program of the system according to the power supply unit state data abnormal problem snapshot;

[0169] According to the power supply unit state data abnormal problem snapshot, determine the difference parameters between the power supply unit virtual state data and the power supply unit actual state data, and analyze the system according to the difference parameters. The difference parameters include voltage parameters and current parameters;

[0170] Obtain system error logs and analyze the system according to the system error logs;

[0171] Reproduce the power supply unit state data abnormal problem, and detect the link abnormal response of the system after the power supply unit state data abnormal problem is reproduced.

[0172] Specifically, when the difference between the last output PSU virtual state data of the GPIO link and the PSU actual state data output by the I2C link when it is working normally is large, check the physical connection and optocoupler isolation circuit of the GPIO link; use a logic analyzer to check the signal waveform on the I2C bus; check the driver version and configuration of the related module; review the GPIO interrupt handling logic and data synchronization mechanism; compare the two sets of data in detail to find the difference; view system logs to find possible error information; try to reproduce the problem and observe the system response; record the solution and improve preventive measures.

[0173] Through the above steps, the PSU state data abnormal problem can be effectively investigated and analyzed, the root cause of the problem can be found, and corresponding solutions can be taken.

[0174] Step S08, clear the virtual flag of the power supply unit virtual state data;

[0175] According to the first threshold interval time, the current state data of the power supply unit is stored in the memory, and the cache of the memory is updated;

[0176] And the current state data of the power supply unit is set as the actual state data of the power supply unit output during normal operation of the main circuit.

[0177] As Figure 6 shown, the technical scheme of the present application adds an optocoupler isolation circuit (such as model TLP281-4) to the power panel, connecting the BMC_GPIO24 and the pin of PSU_PRESENT;

[0178] The BMC integrated hardware watchdog integrated circuit (such as MAX706) sets the SCL / SDA monitoring threshold to 5ms, that is, the timeout threshold of the I2C link level signal continuity is 5ms; if there is no continuous level output in the I2C link within 5ms, it is considered that the link is interrupted, and a GPIO heartbeat check signal is immediately sent to confirm: if the PSU response level signal is received within 2ms, the virtual status output state data is started; otherwise, it is considered that a permanent fault has occurred and an alarm is given;

[0179] If there is continuous level output in the I2C link within 5ms, the PSU state data is normally read and recorded as real state update to the memory cache.

[0180] The firmware logic code is as follows:

[0181] def psu_communication_handler():

[0182] if i2c_watchdog.timeout_detected(): # Detect I2C interruption

[0183] if gpio_heartbeat.check_active(): # GPIO path verifies that PSU is in place

[0184] output_virtual_status() # Enable virtual status output

[0185] log_event("I2C_Transient_Fault")

[0186] else:

[0187] trigger_alarm("PSU_Offline") # Both paths are determined to be permanently faulty and an alarm is given

[0188] else:

[0189] update_real_time_status() # Read and update the cache normally.

[0190] }

[0191] When the I2C link is restored after an interruption, that is, after the I2C bus level has been stably output for more than 5ms, the RST pin of the watchdog integrated circuit is automatically pulled high.

[0192] The BMC reads the actual PSU status data from the memory and compares it with the last virtual status data. If the difference is less than 5%, the data is automatically synchronized and the event log is recorded. If the difference is greater than or equal to 5%, an alarm is triggered, the buffer is reset, and a snapshot of the abnormal problem is retained for subsequent investigation and analysis.

[0193] def data_sync(actual, virtual):

[0194] if abs(actual - virtual) < 5%: # Threshold is configurable

[0195] merge_data() # Automatically synchronize data

[0196] log_event("Auto_Merge_Data")

[0197] else:

[0198] trigger_alarm("PSU_DATA_DRIFT") # Output alarm

[0199] save_snapshot(actual, virtual) # Save a snapshot

[0200] After the BMC comparison is completed, the virtual flag of the virtual state data is cleared, the current state data of the power supply unit is stored in the memory according to the first threshold interval, the cache of the memory is updated, and the current state data of the power supply unit is reset to the actual state data of the power supply unit output when the main circuit is working normally.

[0201] Furthermore, the method is applied to power interruption handling systems, and the method also includes:

[0202] Optimize the power interruption handling method;

[0203] Optimize the power interruption handling method, including:

[0204] By combining multi-dimensional data such as voltage, current, and temperature, the PSU status data can be judged through weighted averaging or machine learning models to improve the accuracy of data output.

[0205] Adaptively adjust alarm thresholds based on historical data to avoid false positives due to environmental changes;

[0206] Predict potential failure points based on real-time monitoring data and take proactive measures (such as load shedding, restart) to prevent outages from occurring again;

[0207] Develop fault diagnosis and recovery scripts that automatically perform operations such as reset, configuration recovery when detecting main circuit interruption anomalies;

[0208] Flexibly adjust interval output time according to different application scenarios to balance real-time performance and resource consumption;

[0209] Embed more information (such as interruption cause, duration) in PSU virtual state data to facilitate upper-level system analysis and decision-making.

[0210] Through comprehensive optimization of the hardware, software and architecture of the above power interruption handling system, its stability, reliability and ease of use can be significantly improved, including the following specific measures:

[0211] Hardware level: enhance link stability, improve GPIO controller reliability, improve power board design;

[0212] Software algorithm: introduce intelligent state judgment, fast recovery mechanism, optimize virtual state output;

[0213] System architecture: modular design, introduce redundancy mechanism, enhance scalability.

[0214] Optimization measures collectively build a more robust and efficient power management system, providing solid protection for critical applications such as data centers and servers.

[0215] The power interruption handling method provided by the embodiments of the present application can also be improved and optimized without departing from the technical solutions of the present application, and these improvements and optimizations should also be considered within the protection scope of the present application.

[0216] The technical solutions provided by the embodiments of the present application have the following beneficial effects:

[0217] The present application accurately distinguishes between permanent power interruption faults and transient interruption faults through a dual-path interruption handling mechanism, shortens the time for handling power interruption faults, and enhances the power fault diagnosis function.

[0218] The technical solutions of the present application can solve the problem of PSU state data loss, and the PSU state data can be continuously maintained during the transient interruption of the main circuit, which greatly reduces the alarm rate.

[0219] Through the description of the above embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be realized by means of software on a general hardware platform as necessary, and of course can also be realized by hardware, but in many cases the former is a better embodiment.

[0220] Embodiments of the present application also provide a power interruption processing device, as shown in the accompanying drawings, the device comprises an initialization module, a detection module, a first processing module, a determination module, a recovery module, a comparison module and a second processing module. Figure 7

[0221] In the embodiment, the detection module is configured to detect a signal between the first controller and the power supply unit.

[0222] The first processing module is configured to determine that the main circuit link is interrupted, output virtual state data of the power supply unit by the backup circuit, and detect a heartbeat state of the backup circuit, in response to the signal interruption time between the first controller and the power supply unit being greater than a first preset value.

[0223] The determination module is configured to determine a power interruption fault type according to the heartbeat state detection result of the backup circuit.

[0224] The recovery module is configured to recover the link of the main circuit.

[0225] The comparison module is configured to compare the virtual state data of the power supply unit output by the backup circuit last time during the interruption of the main circuit link with actual state data of the power supply unit output when the main circuit is working normally, in response to the recovery of the link of the main circuit.

[0226] The second processing module is configured to process the power interruption fault according to the comparison result of the state data of the power supply unit.

[0227] In the embodiment, the initialization module is configured to perform power-on initialization on the main circuit.

[0228] The power-on initialization on the main circuit comprises:

[0229] Synchronizing clock signals of the first controller, the first power board and the power supply unit;

[0230] Setting working parameters of the first controller, the working parameters comprising clock frequency and address;

[0231] Sending a start command to the first power board through a two-wire serial bus link, configuring voltage parameters and / or current parameters of the first power board, and supplying power to the first power board;

[0232] Configuring output parameters of the power supply unit. ​

[0233] starting the monitoring function of the power supply unit, and monitoring the working state of the power supply unit;

[0234] In response to an initialization error of any one component in the main circuit, the component is re-initialized, and an alarm is prompted.

[0235] In one embodiment, the first processing module is configured to, in response to a signal interruption time between the first controller and the power supply unit being less than or equal to a first preset value, perform heartbeat packet verification on the power supply unit through a general input-output link, store state data of the power supply unit in the memory according to a first threshold interval time, and set the state data as actual state data of the power supply unit output when the main circuit is working normally.

[0236] The heartbeat packet verification on the power supply unit through the general input-output link includes:

[0237] The third controller sends an in-place query signal to the power supply unit according to a second threshold interval time, and in response to the power supply unit being in place, the power supply unit sends a response level signal to the third controller through the general input-output link.

[0238] In one embodiment, the first processing module is configured to set a mirror cache in the third controller.

[0239] The state data of the power supply unit is stored in the mirror cache according to a third threshold interval time.

[0240] And the state data of the power supply unit is set as virtual state data of the power supply unit output by the standby circuit.

[0241] The state data of the power supply unit includes voltage data, current data, temperature data, and in-place state data.

[0242] In one embodiment, the determination module is configured to detect the heartbeat state of the second controller.

[0243] The detection of the heartbeat state of the second controller includes:

[0244] The heartbeat state of the second controller is determined.

[0245] If yes, the power interruption fault type is a transient interruption fault type, and the standby circuit is started; if no, the power interruption fault type is a permanent fault type, and an alarm information is output.

[0246] In one embodiment, the recovery module is configured to perform soft recovery on the link of the main circuit.

[0247] The soft recovery of the link of the main circuit comprises:

[0248] The parameters and configuration addresses of the two-wire serial bus interface of the first controller, the first power panel and the power supply unit are reset;

[0249] The first controller, the first power panel and the power supply unit are soft recovered by a software reset instruction;

[0250] The hard recovery of the link of the main circuit is performed;

[0251] The hard recovery of the link of the main circuit comprises:

[0252] The link of the main circuit is power cycled;

[0253] The connectors of the first controller, the first power panel and the power supply unit are checked;

[0254] After the recovery of the link of the main circuit, the access and data transmission state of all components of the main circuit are checked, and a recovery log is recorded.

[0255] In one embodiment, the second processing module is configured to, in response to a difference between the power supply unit virtual state data last output by the backup circuit and the power supply unit actual state data output by the main circuit when operating normally being less than a second preset value, synchronize the power supply unit virtual state data and the power supply unit actual state data, and record a data synchronization log;

[0256] In response to a difference between the power supply unit virtual state data last output by the backup circuit and the power supply unit actual state data output by the main circuit when operating normally being greater than or equal to the second preset value, an alarm information is sent, the cache of the memory is frozen, a power supply unit state data abnormality snapshot is recorded, and the system is analyzed according to the power supply unit state data abnormality snapshot.

[0257] In one embodiment, the second processing module is configured to set a timer, acquire the power supply unit actual state data at a fourth threshold interval time, and update the power supply unit actual state data to the cache of the power supply unit virtual state data through the two-wire serial bus link;

[0258] In response to a data synchronization time of the power supply unit virtual state data and the power supply unit actual state data being greater than a third preset value, a data synchronization process of the power supply unit virtual state data and the power supply unit actual state data is recovered;

[0259] The consistency of the power supply unit virtual state data and the power supply unit actual state data is checked;

[0260] checking consistency of the virtual state data of the power supply unit and the actual state data of the power supply unit, comprising:

[0261] calculating a cyclic redundancy check value of the virtual state data of the power supply unit;

[0262] calculating a cyclic redundancy check value of the actual state data of the power supply unit;

[0263] in response to the cyclic redundancy check value of the virtual state data of the power supply unit being consistent with the cyclic redundancy check value of the actual state data of the power supply unit, the data synchronization process ends;

[0264] in response to the cyclic redundancy check value of the virtual state data of the power supply unit being inconsistent with the cyclic redundancy check value of the actual state data of the power supply unit, the virtual state data of the power supply unit and the actual state data of the power supply unit are re-synchronized.

[0265] In one embodiment, the second processing module is configured to analyze and check the physical connection and software configuration procedure of the system according to the power supply unit state data abnormal problem snapshot;

[0266] According to the power supply unit state data abnormal problem snapshot, the difference parameters of the virtual state data of the power supply unit and the actual state data of the power supply unit are determined, and the system is analyzed according to the difference parameters. The difference parameters include voltage parameters and current parameters.

[0267] Obtain system error logs and analyze the system according to the system error logs;

[0268] Reproduce the power supply unit state data abnormal problem, and in response to the power supply unit state data abnormal problem being reproduced, detect the link abnormal response of the system.

[0269] In one embodiment, the second processing module is configured to clear the virtual flag of the virtual state data of the power supply unit;

[0270] According to the first threshold interval time, the current state data of the power supply unit is stored in the memory, and the cache of the memory is updated;

[0271] And the current state data of the power supply unit is re-set to the actual state data of the power supply unit output during normal operation of the main circuit.

[0272] Specifically, the key point of the application is that the continuity of the I2C link SCL / SDA signal is monitored by a dedicated watchdog integrated circuit (such as MAX706), the absence of a level of >5ms is set as the interrupt judgment time threshold, and the millisecond-level physical layer fault capture is realized.

[0273] The power supply fault is handled through the dual-path cooperative verification mechanism.

[0274] The main circuit: the I2C bus transmits full-amount PSU actual state data.

[0275] The standby circuit: GPIO link (BMC_GPIO24→TLP281-4→PSU_PRESENT#)

[0276] Verification logic: when the I2C bus is interrupted, the BMC sends a PSU in-bit query pulse through the GPIO controller, and the PSU responds to the level signal within 2ms to confirm the physical online.

[0277] The buffer of the system memory stores the PSU actual state data (voltage / current / temperature / in-bit); the last set of cached data is continuously output during the I2C bus interruption, and a virtual state flag bit is added; after the I2C bus link is restored, the BMC compares the last output PSU virtual state data during the interruption with the PSU actual state data, and if the difference value is <5%, the PSU state data is automatically synchronized and the event log is recorded.

[0278] The technical scheme provided by the embodiment of the application has the beneficial effects that:

[0279] The application accurately distinguishes between permanent power interruption faults and transient interruption faults through the dual-path interruption handling mechanism, shortens the power interruption fault handling time, and enhances the power fault diagnosis function.

[0280] The technical scheme of the application can solve the problem of PSU state data loss, and the PSU state data can be continuously maintained during the main circuit transient interruption, so that the alarm rate is greatly reduced.

[0281] The description of the features in the embodiment corresponding to the power interruption handling device can be referred to the related description of the embodiment corresponding to the power interruption handling method, which will not be repeated here.

[0282] The embodiment of the application also provides an electronic device, which includes a memory and a processor, the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in the power interruption handling method embodiment, and the method includes:

[0283] Detecting the signal between the first controller and the power supply unit.

[0284] In response to the signal interruption time between the first controller and the power supply unit being greater than a first preset value, it is determined that the main circuit link is interrupted, the virtual state data of the power supply unit is output through the backup circuit, and the heartbeat state of the backup circuit is detected;

[0285] The type of power interruption fault is determined according to the heartbeat state detection result of the backup circuit;

[0286] The link of the main circuit is recovered;

[0287] In response to the link recovery of the main circuit, the virtual state data of the power supply unit output by the backup circuit last time during the main circuit link interruption is compared with the actual state data of the power supply unit output when the main circuit is normally working;

[0288] The power interruption fault is processed according to the comparison result of the power supply unit state data.

[0289] As shown in Figure 8 The embodiment of the application also provides a computer readable storage medium, and the computer readable storage medium stores a computer program, wherein the computer program is set to execute the steps in the power interruption processing method embodiment when running, and the method comprises the following steps:

[0290] The signal between the first controller and the power supply unit is detected;

[0291] In response to the signal interruption time between the first controller and the power supply unit being greater than a first preset value, it is determined that the main circuit link is interrupted, the virtual state data of the power supply unit is output through the backup circuit, and the heartbeat state of the backup circuit is detected;

[0292] The type of power interruption fault is determined according to the heartbeat state detection result of the backup circuit;

[0293] The link of the main circuit is recovered;

[0294] In response to the link recovery of the main circuit, the virtual state data of the power supply unit output by the backup circuit last time during the main circuit link interruption is compared with the actual state data of the power supply unit output when the main circuit is normally working;

[0295] The power interruption fault is processed according to the comparison result of the power supply unit state data.

[0296] In an example embodiment, the computer readable storage medium described above can include, but is not limited to, a U disk, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, and various media that can store computer programs.

[0297] Embodiments of the present application also provide a computer program product, which comprises a computer program, and the computer program, when executed by a processor, implements the steps in the power interruption processing method embodiment, and the method comprises:

[0298] detecting a signal between the first controller and the power supply unit;

[0299] in response to the signal interruption time between the first controller and the power supply unit being greater than a first preset value, determining that the main circuit link is interrupted, outputting virtual state data of the power supply unit through the backup circuit, and detecting a heartbeat state of the backup circuit;

[0300] determining a power interruption fault type according to the heartbeat state detection result of the backup circuit;

[0301] recovering the link of the main circuit;

[0302] in response to the link of the main circuit being recovered, comparing the virtual state data of the power supply unit output by the backup circuit last time during the main circuit link interruption with actual state data of the power supply unit output when the main circuit is normally working;

[0303] processing the power interruption fault according to the comparison result of the power supply unit state data.

[0304] Embodiments of the present application also provide another computer program product, which comprises a non-volatile computer readable storage medium, and the non-volatile computer readable storage medium stores a computer program, and the computer program, when executed by a processor, implements the steps in the power interruption processing method embodiment, and the method comprises:

[0305] detecting a signal between the first controller and the power supply unit;

[0306] in response to the signal interruption time between the first controller and the power supply unit being greater than a first preset value, determining that the main circuit link is interrupted, outputting virtual state data of the power supply unit through the backup circuit, and detecting a heartbeat state of the backup circuit;

[0307] determining a power interruption fault type according to the heartbeat state detection result of the backup circuit;

[0308] recovering the link of the main circuit;

[0309] In response to the link recovery of the main circuit, the power supply unit virtual state data output by the backup circuit last time during the main circuit link interruption is compared with the power supply unit actual state data output by the main circuit during normal operation;

[0310] The power interruption fault is processed according to the comparison result of the power supply unit state data.

[0311] The application can accurately distinguish between permanent power interruption faults and transient interruption faults through the dual-path interruption processing mechanism, shorten the power interruption fault processing time, and enhance the power fault diagnosis function.

[0312] The technical scheme of the application can solve the problem of PSU state data loss. The PSU state data can be continuously maintained during the transient interruption of the main circuit, so that the alarm rate is greatly reduced.

[0313] Those skilled in the art will further appreciate that the units and algorithm steps of the examples described in connection with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or both, and that in the description of the present application is generally described in terms of functional operations to be performed by functional units. Whether such functions are implemented as hardware or software depends on the particular application and design constraints imposed on the overall system. Skilled artisans can use various methods to implement the described functions in terms of the techniques described herein, and the implementation of these functions should not be considered beyond the scope of the present application.

[0314] The above provides a detailed introduction to the power interruption processing method, device, medium and program product provided by the application. The principles and implementation modes of the application are described in this paper by applying specific examples. The above description of the embodiments is only applicable to help understand the method of the application and its core idea. It should be noted that for ordinary skilled persons in the technical field, some improvements and modifications can be made to the application without departing from the principles of the application. These improvements and modifications also fall within the protection scope of the application.

Claims

1. A power interruption handling method, characterized by, The method is applied to a power interruption processing system, the system comprising a main circuit and a backup circuit, the main circuit comprising a first controller, a first power panel, a power supply unit, the first controller being connected with the first power panel, the first power panel being connected with the power supply unit, the backup circuit being connected between the first controller and the power supply unit, the method comprising: detecting signals between the first controller and the power supply unit; in response to the signal interruption time between the first controller and the power supply unit being greater than a first preset value, determining that the main circuit link is interrupted, outputting virtual state data of the power supply unit through the backup circuit, and detecting the heartbeat state of the backup circuit; determining the power interruption fault type according to the heartbeat state detection result of the backup circuit; restoring the link of the main circuit; in response to the link of the main circuit being restored, comparing the virtual state data of the power supply unit output by the backup circuit during the main circuit link interruption with the actual state data of the power supply unit output when the main circuit is normally working; processing the power interruption fault according to the state data comparison result of the power supply unit; the backup circuit comprising a second controller, a second power panel, the first controller being connected with the second controller, the second controller being connected with the second power panel, and the second power panel being connected with the power supply unit; wherein the first controller is a two-wire serial bus controller, and the second controller is a general input / output controller; the method of determining the power interruption fault type according to the heartbeat state detection result of the backup circuit comprising: detecting the heartbeat state of the second controller; the method of detecting the heartbeat state of the second controller comprising: determining whether the heartbeat state of the second controller is normal; if yes, the power interruption fault type is a transient interruption fault type, and the backup circuit is started; if no, the power interruption fault type is a permanent fault type, and an alarm information is output.

2. The power interruption processing method according to claim 1, characterized by, before the method of detecting the signals between the first controller and the power supply unit, comprising: powering on and initializing the main circuit; the method of powering on and initializing the main circuit comprising: synchronizing clock signals of the first controller, the first power panel, and the power supply unit; setting working parameters of the first controller, the working parameters comprising clock frequency and address; sending a start command to the first power panel through a two-wire serial bus link, configuring voltage parameters and / or current parameters of the first power panel, and powering the first power panel; configuring output parameters of the power supply unit; starting the monitoring function of the power supply unit, and monitoring the working state of the power supply unit; in response to any one component in the main circuit having an initialization error, powering on and initializing the component again, and giving an alarm prompt.

3. The power interruption processing method according to claim 1, characterized by, The system comprises a third controller comprising a memory, the third controller being connected with the first controller, and the method comprises: in response to a signal interruption time between the first controller and the power supply unit being less than or equal to a first preset value, performing heartbeat packet verification on the power supply unit through a general input-output link, storing state data of the power supply unit in the memory according to a first threshold interval, and setting the state data as actual state data of the power supply unit output during normal operation of the main circuit; the heartbeat packet verification on the power supply unit through the general input-output link comprises: sending an in-place query signal to the power supply unit according to a second threshold interval through the third controller, and in response to the power supply unit being in place, the power supply unit sends a response level signal to the third controller through the general input-output link.

4. The power interruption processing method according to claim 3, characterized by, the output of the state data of the power supply unit through the standby circuit comprises: setting a mirror cache in the third controller; storing the state data of the power supply unit in the mirror cache according to a third threshold interval, wherein the state data of the power supply unit comprises voltage data and / or current data and / or temperature data and / or in-place state data; setting the state data of the power supply unit as virtual state data of the power supply unit output by the standby circuit.

5. The power interruption processing method according to claim 1, characterized by, the recovery of the link of the main circuit comprises: soft recovery of the link of the main circuit; the soft recovery of the link of the main circuit comprises: reconfiguring parameters and addresses of the two-wire serial bus interface of the first controller, the first power board and the power supply unit; soft recovery of the first controller, the first power board and the power supply unit through a software reset instruction; hard recovery of the link of the main circuit; the hard recovery of the link of the main circuit comprises: power cycle setting of the link of the main circuit; checking the connectors of the first controller, the first power board and the power supply unit; in response to the recovery of the link of the main circuit, checking the access and data transmission state of all components of the main circuit and recording a recovery log.

6. The power interruption handling method of claim 1, wherein, the processing of the power supply interruption fault according to the comparison result of the state data of the power supply unit comprises: in response to a difference between the virtual state data of the power supply unit output by the standby circuit last time and the actual state data of the power supply unit output during normal operation of the main circuit being less than a second preset value, synchronizing the virtual state data of the power supply unit with the actual state data of the power supply unit, and recording a data synchronization log; In response to the difference between the power supply unit virtual state data last output by the backup circuit and the power supply unit actual state data output when the main circuit is working normally being greater than or equal to a second preset value, an alarm information is sent, the cache of the memory is frozen, a power supply unit state data abnormal problem snapshot is recorded, and the system is analyzed according to the power supply unit state data abnormal problem snapshot.

7. The power interruption processing method according to claim 6, characterized by, The data synchronization of the power supply unit virtual state data and the power supply unit actual state data comprises: A timer is set, the power supply unit actual state data is acquired according to a fourth threshold interval time, and the power supply unit actual state data is updated to the cache of the power supply unit virtual state data through a two-wire serial bus link; In response to the data synchronization time of the power supply unit virtual state data and the power supply unit actual state data being greater than a third preset value, the data synchronization process of the power supply unit virtual state data and the actual state data is recovered; The consistency of the power supply unit virtual state data and the power supply unit actual state data is verified; The verification of the consistency of the power supply unit virtual state data and the power supply unit actual state data comprises: A cyclic redundancy check value of the power supply unit virtual state data is calculated; A cyclic redundancy check value of the power supply unit actual state data is calculated; In response to the cyclic redundancy check value of the power supply unit virtual state data being consistent with the cyclic redundancy check value of the power supply unit actual state data, the data synchronization process is ended; In response to the cyclic redundancy check value of the power supply unit virtual state data being inconsistent with the cyclic redundancy check value of the power supply unit actual state data, the data synchronization of the power supply unit virtual state data and the power supply unit actual state data is re-performed.

8. The power interruption processing method according to claim 6, characterized by, The analysis of the system according to the power supply unit state data abnormal problem snapshot comprises: The physical connection and software configuration program of the system are analyzed and checked according to the power supply unit state data abnormal problem snapshot; The difference parameters of the power supply unit virtual state data and the power supply unit actual state data are determined according to the power supply unit state data abnormal problem snapshot, the system is analyzed according to the difference parameters, and the difference parameters comprise voltage parameters and current parameters; System error logs are acquired, and the system is analyzed according to the system error logs; The power supply unit state data abnormal problem is reproduced, and in response to the power supply unit state data abnormal problem being reproduced, the link abnormal response of the system is detected.

9. The power interruption processing method according to claim 3, characterized by, After the power supply interruption fault is processed according to the comparison result of the power supply unit state data, the following steps are performed: The virtual flag of the power supply unit virtual state data is cleared; The current state data of the power supply unit is stored in the memory according to a first threshold interval time, and the cache of the memory is updated; The current state data of the power supply unit is reset to the actual state data of the power supply unit outputted when the main circuit is working normally.

10. The power interruption processing method according to claim 3, characterized by, The system further comprises an opto-coupler isolation circuit and a watchdog integrated circuit, the opto-coupler isolation circuit is arranged on the second power supply board, the opto-coupler isolation circuit is connected between the second controller and the power supply unit, The opto-coupler isolation circuit is used for electrically isolating the main circuit or the standby circuit; The watchdog integrated circuit is integrated on the third controller, and the watchdog integrated circuit is used for detecting signals between the first controller and the power supply unit.

11. An electronic device, comprising: Comprise: A memory for storing a computer program; A processor for executing the computer program to implement the steps of the power interruption processing method according to any one of claims 1 to 10.

12. A computer-readable storage medium, characterized in that, The computer readable storage medium stores a computer program, wherein the computer program is executed by the processor to implement the steps of the power interruption processing method according to any one of claims 1 to 10.

13. A computer program product comprising a computer program, characterized in that, The computer program is executed by the processor to implement the steps of the power interruption processing method according to any one of claims 1 to 10.

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