A power-on reset circuit with stable reset signal output

Abstract

The application discloses a power-on reset circuit with stable reset signal output, which comprises a reset detection circuit, an amplification circuit, an inverting circuit composed of at least three inverters and a positive feedback circuit; the output end of the reset detection circuit is electrically connected with the input end of the amplification circuit, the output end of the amplification circuit is electrically connected with the input end of the inverting circuit, and the output end of the inverting circuit outputs a reset signal; the positive feedback circuit adjusts the voltage output by the reset detection circuit through the output voltage of the inverters in the inverting circuit, and then adjusts the voltage output by the amplification circuit, so that the voltage output by the amplification circuit is far away from the flip threshold of the inverters in the inverting circuit, and the generation of a dithering signal by the reset signal is avoided; meanwhile, the cooperation of the MOS tubes in the reset detection circuit and the amplification circuit enables the power-on reset circuit to work normally under the condition that the power-on time of the VCC power supply is very fast or very slow, and the reset signal can be output.

Description

Technical Field

[0001] This invention relates to the field of electronic circuit technology, and in particular to a power-on reset circuit with stable reset signal output. Background Technology

[0002] Chip power-up times vary greatly; some chips power on very quickly, in the 10µs range, while others power on very slowly, in the seconds range. Current low-cost technologies cannot simultaneously meet the requirement of normal operation under all power-up conditions. Figure 1 As shown, this is a power-on reset circuit mainly composed of RC circuits. The basic principle of the circuit is that the voltage across a capacitor cannot change abruptly. If VCC rapidly increases from zero, the voltage at point D is initially 0, and the output RESET is also 0. Then, because the power supply VCC charges point D through resistor R, the voltage at point D increases, and the corresponding output RESET also increases, completing the power-on reset process. However, when the power supply VCC powers on very slowly (i.e., RC is much shorter than the power-on time of VCC), the voltage at point D remains approximately equal to the power supply voltage during the power-on process, and the output RESET remains high. Therefore, it cannot output a 0 reset signal during the power-on process, and this circuit fails when VCC powers on very slowly. Furthermore, when the voltage input to the inverter in the power-on reset circuit is too close to the inverter's flip-flop threshold, various noise interferences cause the output reset signal to jitter, affecting the stability of the reset signal output. Summary of the Invention

[0003] Purpose of the invention: In order to overcome the shortcomings of the prior art, the present invention provides a power-on reset circuit with stable reset signal output. By cooperating with the MOS transistor in the reset detection circuit and the amplification circuit, it can work normally even when the VCC power-on time is very fast or very slow; and a positive feedback circuit is introduced to avoid the jitter of the reset signal.

[0004] Technical Solution: To achieve the above objective, the present invention provides a power-on reset circuit with stable reset signal output, comprising a reset detection circuit, an amplifier circuit, an inverting circuit composed of at least three inverters, and a positive feedback circuit; the output terminal of the reset detection circuit is electrically connected to the input terminal of the amplifier circuit, the output terminal of the amplifier circuit is electrically connected to the input terminal of the inverting circuit, and the output terminal of the inverting circuit outputs a reset signal; the positive feedback circuit, by detecting the output voltage of the second inverter in the inverting circuit, adjusts the voltage output by the amplifier circuit to be far away from the flip-flop threshold of the first inverter in the inverting circuit, thereby preventing the reset signal from generating jitter.

[0005] The reset detection circuit includes transistors M3 and M1; the amplifier circuit includes transistor M2 and resistor R2, and the output terminal of the amplifier circuit serves as connection point B; when the voltage of the VCC power supply does not exceed the sum of the threshold voltages of transistors M3 and M1, the voltage of connection point B is equal to the voltage of the VCC power supply, transistors M3, M1, and M2 are in the off state, and the reset signal output by the inverting circuit is low.

[0006] When the voltage of the VCC power supply exceeds the sum of the threshold voltages of transistors M3 and M1, transistors M3 and M1 switch from the off state to the on state, causing transistor M2 to switch from the off state to the on state. Due to the conduction of transistor M2, and through the series connection of transistor M2 and resistor R2, the voltage at connection point B gradually decreases. When the voltage at connection point B is lower than the switching threshold of the first inverter in the inverting circuit, the second inverter in the inverting circuit outputs a low level. By turning off the MOS transistor in the positive feedback circuit, the voltage at connection point B is reduced again, causing the voltage output by the amplifier circuit to move away from the switching threshold of the first inverter in the inverting circuit. The reset signal output by the inverting circuit is then high.

[0007] Furthermore, the reset detection circuit also includes a resistor R1; the source of the M3 transistor is electrically connected to the output terminal of the VCC power supply, the gate and drain of the M3 transistor are electrically connected to one end of the resistor R1, the other end of the resistor R1 is electrically connected to the drain and gate of the M1 transistor, and the source of the M1 transistor is grounded; the drain and gate of the M1 transistor serve as connection point A.

[0008] Furthermore, one end of resistor R2 in the amplifier circuit is electrically connected to the output terminal of the VCC power supply, the other end of resistor R2 is electrically connected to the drain of transistor M2, the source of transistor M2 is grounded, and the other end of resistor R2 serves as the output terminal of the amplifier circuit and as connection point B.

[0009] Furthermore, the gate and drain of the M1 transistor are electrically connected to the gate of the M2 transistor.

[0010] Furthermore, the inverter circuit includes an INV1 inverter, an INV2 inverter, and an INV3 inverter; the input terminal of the INV1 inverter serves as the input terminal of the inverter circuit, the output terminal of the INV1 inverter is electrically connected to the input terminal of the INV2 inverter, the output terminal of the INV2 inverter is electrically connected to the input terminal of the INV3 inverter, and the output terminal of the INV3 inverter serves as the output terminal of the inverter circuit; the output terminal of the INV2 inverter serves as the C connection point.

[0011] Furthermore, the positive feedback circuit includes an M4 transistor; the gate of the M4 transistor is electrically connected to the output terminal of the INV2 inverter, the drain of the M4 transistor is electrically connected to the drain and gate of the M1 transistor, and the source of the M4 transistor is grounded.

[0012] Furthermore, the circuit structures of the INV1 inverter, INV2 inverter, and INV3 inverter are the same, all including an M5 transistor and an M6 transistor. The gates of the M5 transistor and the M6 ​​transistor are electrically connected and serve as the input terminals of the inverter, and the sources of the M5 transistor and the M6 ​​transistor are electrically connected and serve as the output terminals of the inverter.

[0013] Furthermore, it also includes a detection circuit and a function replacement circuit; the two detection terminals of the detection circuit are electrically connected to connection point B and connection point A respectively, for detecting the voltage of connection point B and the voltage of connection point A; the input terminal of the function replacement circuit is electrically connected to the source of transistor M3, the output terminal of the function replacement circuit is electrically connected to the drain of transistor M3, and the control terminal of the detection circuit is electrically connected to the control terminal of the function replacement circuit; when the voltage of connection point B exceeds the set voltage value V1 for a period of time exceeding the set time threshold T1, the detection circuit detects the voltage of connection point A; when the voltage of connection point A is lower than the set voltage value V2 for a period of time exceeding the set time threshold T2, the detection circuit controls the function replacement circuit to connect to the reset detection circuit to replace transistor M3.

[0014] Beneficial effects: The present invention provides a stable power-on reset circuit for resetting signal output. It generates the power-on reset signal through the cooperation of a reset detection circuit and an amplification circuit, without requiring a large capacitor, thus resulting in a small area and low cost. Simultaneously, the circuit has a fast response speed, functioning normally regardless of whether the power-on time is very fast or very slow. Furthermore, the cooperation between the MOSFET in the reset detection circuit and the amplification circuit ensures normal output of the RESET signal regardless of whether the VCC power-on time is very fast or very slow. Additionally, a positive feedback circuit is introduced in the inverting circuit, ensuring that the voltage input to the inverting circuit is much lower than the flip-flop threshold of the inverter in the inverting circuit, thus preventing jitter in the output RESET signal. Attached Figure Description

[0015] Figure 1 This is a traditional reset circuit diagram.

[0016] Figure 2 This is a block diagram of the power-on reset circuit.

[0017] Figure 3 This is the circuit structure diagram of the power-on reset circuit.

[0018] Figure 4 This is the circuit diagram of an inverter.

[0019] Figure 5 This is a schematic diagram of the VCC power supply voltage and reset signal.

[0020] Figure 6 This is a schematic diagram of the power-on reset circuit in Embodiment 2.

[0021] Figure 7 This is a structural diagram of a Schmitt inverter.

[0022] Figure 8 This is a schematic diagram of the power-on reset circuit in Embodiment 3.

[0023] In the diagram: 1-Reset detection circuit; 2-Amplification circuit; 3-Inverting circuit; 4-Positive feedback circuit; 5-Detection circuit; 11-M3 transistor; 12-M1 transistor; 21-M2 transistor; 31-INV1 inverter; 32-INV2 inverter; 33-INV3 inverter; 34-M5 transistor; 35-M6 transistor; 41-M4 transistor; A-Drain and gate of M1 transistor; B-Drain of M2 transistor; C-Output of INV2 inverter. Detailed Implementation

[0024] The invention will now be further described with reference to the accompanying drawings.

[0025] like Figure 2 As shown, a power-on reset circuit with stable reset signal output includes a reset detection circuit 1, an amplifier circuit 2, an inverting circuit 3 composed of at least three inverters, and a positive feedback circuit 4. The output terminal of the reset detection circuit 1 is electrically connected to the input terminal of the amplifier circuit 2, and the output terminal of the amplifier circuit 2 is electrically connected to the input terminal of the inverting circuit 3. The output terminal of the inverting circuit 3 outputs a reset signal. The positive feedback circuit 4 adjusts the voltage output of the reset detection circuit 1 by detecting the output voltage of the second inverter in the inverting circuit 3, thereby adjusting the voltage output of the amplifier circuit 2. Ultimately, the voltage output of the amplifier circuit 2 is adjusted to be far away from the flip-flop threshold of the first inverter in the inverting circuit 3, thus avoiding jitter in the reset signal. Jitter can cause increased power consumption, timing disorder, and false resets, which greatly affects the normal operation of subsequent circuits.

[0026] The reset detection circuit 1 includes transistors M3 11 and M1 12; the amplifier circuit 2 includes transistor M2 21 and resistor R2, and the output terminal of the amplifier circuit 2 serves as connection point B; when the voltage of the VCC power supply gradually increases from zero; when the voltage of the VCC power supply does not exceed the sum of the threshold voltages of transistors M3 11 and M1 12, because the voltage of connection point B is equal to the voltage of the VCC power supply, it can also be said that when the voltage of connection point B does not exceed the sum of the threshold voltages of transistors M3 11 and M1 12; transistors M3 11, M1 12 and M2 21 are in the off state, and the reset signal output by the inverter circuit 3 is low level.

[0027] When the voltage of the VCC power supply exceeds the sum of the threshold voltages of transistors M3 (11) and M1 (12), because the voltage at connection point B is equal to the voltage of the VCC power supply when transistors M3 (11), M1 (12), and M2 (21) are not conducting (this can also be described as when the voltage at connection point B exceeds the sum of the threshold voltages of transistors M3 (11) and M1 (12); transistors M3 (11) and M1 (12) switch from the off state to the on state, causing transistor M2 (21) to switch from the off state to the on state; due to the conduction of transistor M2 (21), and the... The series connection of transistor M221 and resistor R2 causes the voltage at connection point B to gradually decrease. When the voltage at connection point B is lower than the flip threshold of the first inverter in inverter circuit 3, the second inverter in inverter circuit 3 outputs a low level. By turning off the MOS transistor in positive feedback circuit 4, the output of the reset detection circuit is the voltage at connection point A, which increases. The voltage at connection point A increases, causing the voltage at connection point B to decrease again. This makes the voltage output of amplifier circuit 2 far away from the flip threshold of the first inverter in inverter circuit 3, and the reset signal output by inverter circuit 3 is stable at a high level.

[0028] like Figure 3 As shown, the reset detection circuit 1 also includes a resistor R1; the source of transistor M3 11 is electrically connected to the output terminal of the VCC power supply, the gate and drain of transistor M3 11 are electrically connected to one end of resistor R1, the other end of resistor R1 is electrically connected to the drain and gate of transistor M1 12, and the source of transistor M1 12 is grounded; the drain and gate of transistor M1 12 serve as connection point A.

[0029] like Figure 3 As shown, the threshold voltages of transistors M3 11 and M1 12 are Vth3 and Vth1, respectively; the equivalent resistances of transistors M3 11 and M1 12 can be 1 / gm3 and 1 / gm1, respectively. gm3 and gm1 are the transconductances of transistors M3 and M1, respectively; transistors M3 11 and M1 12 can be inverting transistors.

[0030] like Figure 3 As shown, one end of resistor R2 in amplifier circuit 2 is electrically connected to the output terminal of VCC power supply, and the other end of resistor R2 is electrically connected to the drain of transistor M2 21. The source of transistor M2 21 is grounded, and the other end of resistor R2 serves as the output terminal of amplifier circuit 2 and as connection point B. The series connection of transistor M2 and resistor R2 forms an amplifier circuit.

[0031] The gate and drain of transistor M1 12 are electrically connected to the gate of transistor M2 21; transistors M1 and M2 together form a current mirror with amplification function; transistor M1 is a diode connection, and resistor R1 is a current-limiting resistor. Current flows only in the branch containing resistors R1 and R2, and power consumption can be reduced by increasing the resistances of R1 and R2, resulting in lower power consumption in the power-on reset circuit. Resistors R1 and R2 can be set as adjustable resistors.

[0032] like Figure 3 As shown, the inverter circuit 3 includes an INV1 inverter 31, an INV2 inverter 32, and an INV3 inverter 33; the INV1 inverter 31, INV2 inverter 32, and INV3 inverter 33 are connected in series. The input terminal of the INV1 inverter 31 serves as the input terminal of the inverter circuit 3, the output terminal of the INV1 inverter 31 is electrically connected to the input terminal of the INV2 inverter 32, the output terminal of the INV2 inverter 32 is electrically connected to the input terminal of the INV3 inverter 33, and the output terminal of the INV3 inverter 33 serves as the output terminal of the inverter circuit 3; the output terminal of the INV2 inverter 32 serves as the C connection point. When the inverter circuit 3 includes INV1 inverter 31, INV2 inverter 32 and INV3 inverter 33, INV1 inverter 31 is the first inverter in the inverter circuit 3, INV2 inverter 32 is the second inverter in the inverter circuit 3, and INV3 inverter 33 is the third inverter in the inverter circuit 3, that is, the last inverter in the inverter circuit 3.

[0033] like Figure 3 As shown, the positive feedback circuit 4 includes an M4 transistor 41. The gate of the M4 transistor 41 is electrically connected to the output terminal of the INV2 inverter 32, the drain of the M4 transistor 41 is electrically connected to the drain and gate of the M1 transistor 12, and the source of the M4 transistor 41 is grounded. The M4 transistor 41 can also be an inverting transistor. When the M4 transistor is turned on, it is equivalent to a large resistor. Assuming the equivalent on-resistance of the M4 transistor is R4, the resistance of the on-resistance R4 is much greater than 1 / gm1, R4 >> 1 / gm1.

[0034] like Figure 4As shown, the circuit structures of inverters INV1 31, INV2 32, and INV3 33 are identical, each including transistor M5 34 and transistor M6 35. The gates of transistors M5 34 and M6 35 are electrically connected and serve as the input terminals of the inverters. The sources of transistors M5 34 and M6 35 are electrically connected and serve as the output terminals of the inverters. The source of transistor M5 34 is electrically connected to the output terminal of the VCC power supply, and the source of transistor M6 35 is grounded. Transistor M3 is a PMOS transistor, transistors M1, M2, and M4 are NMOS transistors; transistor M5 is a PMOS transistor, and transistor M6 is a NMOS transistor.

[0035] Transistors M1 (12) and M2 (21) can be considered as current amplifiers in the power-on reset circuit, with resistor R2 acting as the load for these amplifiers. Because the current amplifiers ensure that the current in the branch containing resistor R1 is significantly smaller than the current in the branch containing resistor R2, the overall power consumption of the power-on reset circuit is determined solely by the branch containing resistor R2, thus reducing the overall power consumption. Furthermore, resistor R2 can be set as an adjustable resistor. By changing the resistance of R2, the power consumption of the power-on reset circuit can be reduced. The resistance value of the adjustable resistor can be controlled by the detection circuit 5 to further reduce the power consumption of the power-on reset circuit.

[0036] like Figure 5 As shown, when the VCC power supply rises from 0 and the voltage of the VCC power supply does not exceed Vth3 + Vth1, transistors M1, M2, and M3 are all in the off state. The voltage at connection point B and the voltage at connection point C are equal to the current voltage of the VCC power supply. The voltage at connection point B and the voltage at connection point C follow the change of the VCC power supply voltage. The RESET voltage output by the power-on reset circuit is a low voltage. At this time, the subsequent circuit is in the reset state. Since no transistors are conducting at this time, the power-on reset circuit will not generate power consumption, which greatly reduces the power consumption of the power-on reset circuit.

[0037] When the voltage of the VCC power supply exceeds Vth3+Vth1, transistors M1, M2, and M3 change from the off state to the on state. The current at connection point A is (Vcc-Vth1-Vth3) / R1, where Vcc is the voltage output by the VCC power supply and R1 is the resistance value of resistor R1.

[0038] When transistor M2 is still in saturation, the current of transistor M2 is approximately:

[0039] .

[0040] In the formula, Vcc is the voltage output by the VCC power supply, R1 is the resistance value of R1 resistor; gm2 and gm1 are the transconductances of transistors M2 and M1, respectively.

[0041] Meanwhile, the voltage at connection point B in the circuit is approximately:

[0042] .

[0043] In the formula, Vcc is the voltage output by the VCC power supply, R1 is the resistance value of resistor R1; gm2 and gm1 are the transconductances of transistors M2 and M1, respectively, and R2 is the resistance value of resistor R2. From the above formula, it can be seen that when the voltage at connection point A increases, the voltage at connection point B decreases. At this time, the RESET voltage output by the power-on reset circuit is a high voltage, and the subsequent circuit changes from the reset state to the normal operating state.

[0044] like Figure 5 As shown, as the voltage Vcc of the VCC power supply increases, the current flowing through transistor M2 gradually increases, and the voltage drop across resistor R2 also gradually increases, leading to a decrease in the voltage at connection point B. When the voltage at connection point B drops below the toggle threshold of inverter INV1, the output of inverter INV1 becomes high, and the output RESET becomes high, completing the reset release. Simultaneously, the voltage at connection point C becomes low, causing transistor M4, which acts as a large resistor when on, to turn off, entering the cutoff region. At this time, connection point A loses the path of transistor M4, causing its voltage to rise. The voltage at connection point B decreases due to the higher voltage at connection point A. This makes the voltage at connection point B further away from the toggle threshold of inverter INV1, preventing the RESET signal from fluctuating between high and low voltages when connection point B is near the toggle threshold of inverter INV1 due to various noises. A relatively weak positive feedback is used to prevent oscillation at the zero point.

[0045] like Figure 6As shown, it also includes a detection circuit 5 and a function replacement circuit; the two detection terminals of the detection circuit 5 are electrically connected to connection point B and connection point A respectively, for detecting the voltage of connection point B and connection point A; the input terminal of the function replacement circuit is electrically connected to the source of transistor M3 11, the output terminal of the function replacement circuit is electrically connected to the drain of transistor M3 11, and the control terminal of the detection circuit 5 is electrically connected to the control terminal of the function replacement circuit; when the voltage of connection point B exceeds the set voltage value V1 for a period of time exceeding the set time threshold T1, the detection circuit 5 detects the voltage of connection point A; when the voltage of connection point A is lower than the set voltage value V2 for a period of time exceeding the set time threshold T2, the detection circuit 5 controls the function replacement circuit to connect to the reset detection circuit 1 to replace transistor M3 11; so that the power-on reset circuit can operate normally.

[0046] Meanwhile, resistor R2 can be set as an adjustable resistor. According to the voltage calculation formula of connection point B, the voltage of connection point B can be reduced by increasing the resistance value of resistor R2. The detection circuit 5 can be used to control the increase of the resistance value of R2 to reduce the voltage of connection point B. When the detection circuit 5 detects that the voltage of connection point B needs to be reduced, the resistance value of resistor R2 can be increased by the detection circuit 5.

[0047] Example 1

[0048] like Figure 7As shown, the INV1 inverter can be a Schmitt trigger inverter, which includes transistors M7, M8, M9, M10, M11, and M12. The gates of transistors M7, M8, M9, and M10 are electrically connected to each other and serve as the input terminals of the inverter. The source of transistor M7 is electrically connected to the output terminal of the VCC power supply, and the drain of transistor M7 is electrically connected to the source of transistor M8. The drain of transistor M8 is electrically connected to... The drain and source of transistor M9 are electrically connected to the drain of transistor M10, and the source of transistor M10 is grounded. The source of transistor M11 is electrically connected to the drain of transistor M7, and the drain of transistor M11 is grounded. The source of transistor M12 is electrically connected to the source of transistor M9, and the drain of transistor M12 is the output terminal of the VCC power supply. The gates of transistors M11 and M12 are both electrically connected to the drains of transistors MP8 and M9, respectively, and serve as the output terminals of the inverter. Furthermore, using a Schmitt trigger inverter for INV1 avoids oscillations near the flip threshold. Because the downward flip threshold voltage of the Schmitt trigger inverter is higher than the upward flip threshold voltage, and there is a certain distance between the two, this avoids the Schmitt trigger inverter outputting high and low values ​​intermittently, thus preventing jitter in the RESET signal. The M7, M8, and M11 transistors are PMOS transistors, and the M9, M10, and M12 transistors are NMOS transistors.

[0049] Example 2

[0050] like Figure 6 As shown, a power-on reset circuit with stable reset signal output includes a reset detection circuit 1, an amplifier circuit 2, an inverting circuit 3 composed of three inverters, and a positive feedback circuit 4; it also includes a detection circuit 5 and a functional substitution circuit. The two detection terminals of the detection circuit 5 are electrically connected to connection points B and A, respectively, for detecting the voltage at connection points B and A. The input terminal of the functional substitution circuit is electrically connected to the source of transistor M3 11, and the output terminal is electrically connected to the drain of transistor M3 11. The control terminal of the detection circuit 5 is electrically connected to the control terminal of the functional substitution circuit. The functional substitution circuit includes transistors M31 and M32; the source of transistor M32 is electrically connected to the source of transistor M3, the drain of transistor M32 is electrically connected to the source of transistor M31, and the gate and drain of transistor M31 are electrically connected to the drain of transistor M3. The control terminal of the detection circuit 5 is electrically connected to the gate of transistor M32.

[0051] The power-on reset circuit consists of multiple transistors and other components. Although the VCC power supply can output normally under normal use, special situations may inevitably occur, which may damage the transistors. When the VCC power supply output is unstable and suddenly increases, transistors M3 and M2 are most likely to be damaged due to the sudden voltage increase. Furthermore, if either transistor M3 or M2 fails, the entire circuit will not output a reset signal. Transistor M3 plays the most crucial role; if it fails, the entire power-on reset circuit will completely cease to function. This makes transistor M3 particularly important. Therefore, a functional replacement circuit is provided to replace transistor M3 when it fails, ensuring the normal operation of the power-on reset circuit. The protection circuit can output a reset signal normally during use.

[0052] A power-on reset circuit with stable reset signal output: Upon initial power-on, as the VCC power supply voltage rises, the detection circuit 5 inputs the current VCC power supply voltage to the gate of transistor M32, causing transistor M32 to be turned off. The detection circuit 5 only starts operating when the VCC power supply voltage exceeds the sum of the threshold voltages of transistors M3 and M1, and begins detecting the voltage at connection point B. If the voltage at connection point B exceeds the set voltage value V1 for a period not exceeding the set time threshold T1, it indicates that the transistors or circuitry in the power-on reset circuit are not damaged. Therefore, the gate of transistor M32 is continuously input with a high level equal to the VCC power supply voltage, keeping transistor M32 off and preventing transistor M31 from being connected to the reset detection circuit. The circuit then operates normally and outputs the reset signal RESET.

[0053] A power-on reset circuit with stable reset signal output: Upon initial power-on, as the VCC power supply voltage rises, the detection circuit 5 inputs the current VCC power supply voltage to the gate of transistor M32, causing transistor M32 to be turned off. The detection circuit 5 only starts operating when the VCC power supply voltage exceeds the sum of the threshold voltages of transistors M3 and M1, and begins detecting the voltage at connection point B. If the voltage at connection point B exceeds a set voltage value V1 for a period exceeding a set time threshold T1, it indicates damage to the transistors or circuitry in the power-on reset circuit. The detection circuit 5 then detects the voltage at connection point A. If the voltage at connection point A falls below a set voltage value V2 for a period exceeding a set time threshold T2, it indicates a fault in transistor M3, causing damage to transistor M3. At this point, the detection circuit 5 inputs a high level, the same as the VCC power supply voltage, to the gate of transistor M32. The detection circuit 5 then changes this high level to a low level, turning on transistor M32. Transistor M31 is then connected to the reset detection circuit, replacing the function of transistor M3. Then the detection circuit checks the voltage at connection point B again. When the voltage at connection point B gradually decreases until it is lower than the set voltage value V1, it indicates that the entire power-on reset circuit is operating normally and outputs a reset signal RESET. However, when the voltage at connection point B does not decrease and still exceeds the set voltage value V1, the voltage at connection point A is checked. When the voltage at connection point A is not lower than the set voltage value V2, it indicates that other transistors are still damaged and further testing is required.

[0054] When detection circuit 5 detects that the voltage at connection point B exceeds the set voltage value V1 for a period exceeding a set time threshold T1, and the voltage at connection point A is lower than the set voltage value V2 for a period exceeding a set time threshold T2, detection circuit 5 changes the high level input to the gate of transistor M32 to a low level, turning on transistor M32. During this power-on process, detection circuit 5 maintains a low level output to the gate of transistor M32 until the power-on process ends, ensuring transistor M32 remains on. This prevents detection circuit 5 from stopping the low voltage output to the gate of transistor M32 after detecting a voltage drop at connection point B, thus avoiding a return to the faulty state. Therefore, when detection circuit 5 detects a fault in a transistor in the power-on reset circuit, it outputs a corresponding control signal and maintains this output until the power-on process ends. In other words, when detection circuit 5 detects and determines that transistor M32 is damaged, it continuously outputs a low level to the gate of transistor M32 until the power-on process ends.

[0055] Since transistors M1, M2, and M3 are all in the off state when the VCC power supply voltage does not exceed Vth3 + Vth1, the voltage at connection point B increases with the increase of the VCC power supply voltage and eventually equals the VCC power supply voltage. When the VCC power supply voltage exceeds Vth3 + Vth1, transistors M1, M2, and M3 transition from the off state to the on state, and the voltage at connection point B decreases until it falls below the switching threshold of inverter INV1. Therefore, when the VCC power supply voltage exceeds Vth3 + Vth1, i.e., when the voltage at connection point B just exceeds Vth3 + Vth1, transistors M1, M2, and M3 turn on, and the voltage at connection point B gradually decreases, ensuring that the voltage at connection point B does not exceed the sum of the threshold voltages of transistors M3 and M1 in their on state for an extended period. Therefore, the set voltage value V1 is the sum of the threshold voltages of transistors M3 and M1 when they are turned on; the set voltage value V2 is a very small voltage value, which can be the minimum voltage to control transistor M2 to turn on. When the voltage at connection point A is lower than the set voltage value V2, transistor M2 is turned off. When the voltage of the VCC power supply does not exceed the sum of the threshold voltages of transistors M3 and M1, the detection circuit 5 only inputs a high level to transistor M32, the same as the voltage of the VCC power supply, so that transistor M32 is turned off and no other action is performed; the detection circuit 5 only starts to work when the voltage of the VCC power supply exceeds the sum of the threshold voltages of transistors M3 and M1. When the detection circuit 5 is working, it detects the voltage at connection point B to protect the normal operation of the power-on reset circuit.

[0056] Example 3

[0057] like Figure 8 As shown, in another scenario, the circuit structure of Embodiment 2 incorporates an M33 transistor and two resistors. The source of transistor M1 is grounded through resistor R3, and the source of transistor M2 is grounded through resistor R4. Point B is electrically connected to the drain of transistor M33, and the source of transistor M33 is grounded. The control terminal of detection circuit 5 is electrically connected to the gate of transistor M33, outputting a control signal to control the turn-off and turn-on of transistor M33. The other detection terminal of detection circuit 5 is electrically connected to the source of transistor M2, detecting the voltage at the source of transistor M2. Resistors R3 and R4 are very small resistors. The source of transistor M1 is grounded through resistor R3, and the source of transistor M2 is grounded through resistor R4 to ensure that transistors M1 and M2 form a current mirror.

[0058] A power-on reset circuit with stable reset signal output: When initially powered on, as the voltage of the VCC power supply rises, the detection circuit 5 inputs the current voltage of the VCC power supply to the gate of transistor M32, causing transistor M32 to be turned off and transistor M33 to be turned off. When the voltage of the VCC power supply exceeds the sum of the threshold voltages of transistors M3 and M1, the detection circuit 5 starts to work and begins to detect the voltage at connection point B. When the voltage at connection point B exceeds the set voltage value V1 for a period of time exceeding the set time threshold T1, it indicates that the transistor or circuit in the power-on reset circuit is damaged. At this time, detection circuit 5 detects the voltage at connection point A. When the voltage at connection point A is not lower than the set voltage value V2, it indicates that transistor M3 is not damaged and is in normal condition. At this time, detection circuit 5 detects the source voltage of transistor M2. When the source voltage of transistor M2 is lower than the set voltage value V3 for a period of time exceeding the set time threshold T3, it indicates that transistor M2 has malfunctioned and is damaged. The control terminal of detection circuit 5 outputs a high-level control signal to control transistor M33 to conduct, which reduces the voltage at connection point B. Then, detection circuit 5 detects the voltage at connection point B. When it detects that the voltage at connection point B gradually decreases until it is lower than the set voltage value V1, it indicates that the power-on reset circuit is operating normally, and the inverting circuit outputs a reset signal RESET. The M33 transistor only conducts when certain conditions are met, and is turned off when the conditions are not met. The M33 transistor is a supplementary circuit and is only used when the M2 transistor is detected to be damaged; it is not used under normal circumstances.

[0059] A power-on reset circuit with stable reset signal output: Upon initial power-on, as the VCC power supply voltage rises, the detection circuit 5 inputs the current VCC power supply voltage to the gate of transistor M32, causing transistor M32 to be turned off. The detection circuit 5 only starts operating when the VCC power supply voltage exceeds the sum of the threshold voltages of transistors M3 and M1, and begins detecting the voltage at connection point B. If the voltage at connection point B exceeds the set voltage value V1 for a period not exceeding the set time threshold T1, it indicates that the transistors or circuitry in the power-on reset circuit are not damaged. Therefore, the gate of transistor M32 is continuously input with a high level equal to the VCC power supply voltage, keeping transistor M32 off and preventing transistor M31 from being connected to the reset detection circuit. Furthermore, transistor M33 is also off, and the power-on reset circuit operates normally, outputting the reset signal RESET.

[0060] The detection circuit 5 detects that when the voltage at connection point B exceeds the set voltage value V1 for a period exceeding a set time threshold T1, when the voltage at connection point A does not fall below the set voltage value V2, and when the source voltage of transistor M2 falls below the set voltage value V3 for a period exceeding a set time threshold T3, the control terminal of the detection circuit 5 outputs a high-level control signal to control transistor M33 to conduct. This conduction of transistor M33 causes the voltage at connection point B to decrease. During this power-on process, the detection circuit 5 continuously outputs a low-level signal to the gate of transistor M33 until the power-on process ends, ensuring that transistor M33 remains on. This prevents the detection circuit 5 from stopping the low-level signal output to the gate of transistor M32 after detecting a decrease in the voltage at connection point B, thus avoiding a return to the faulty state. Therefore, when the detection circuit 5 detects a fault in a transistor in the power-on reset circuit, it outputs a corresponding control signal, which it continues to output until the power-on process ends. To avoid a cycle where the detection circuit 5 detects an abnormal voltage at connection point B, then operates normally and outputs a corresponding control signal, causing the voltage at connection point B to return to normal, and then the detection circuit detects the voltage at connection point B to be normal again but does not output a corresponding control signal, thus causing the voltage at connection point B to become abnormal again.

[0061] The above description is merely a preferred embodiment of the present invention. Those skilled in the art can make several modifications and optimizations based on the above disclosure without departing from the basic principles described above. These modifications and optimizations should be considered within the scope of protection as understood by the present invention.

Claims

1. A power-on reset circuit with stable reset signal output, characterized in that: The system includes a reset detection circuit (1), an amplifier circuit (2), an inverter circuit (3) consisting of at least three inverters, and a positive feedback circuit (4). The output of the reset detection circuit (1) is electrically connected to the input of the amplifier circuit (2), the output of the amplifier circuit (2) is electrically connected to the input of the inverter circuit (3), and the output of the inverter circuit (3) outputs a reset signal. The positive feedback circuit (4) detects the output voltage of the second inverter in the inverter circuit (3) and adjusts the voltage output of the amplifier circuit (2) to be far away from the flip threshold of the first inverter in the inverter circuit (3), thereby preventing the reset signal from generating a jitter signal. The reset detection circuit (1) includes transistor M3 (11) and transistor M1 (12); the amplifier circuit (2) includes transistor M2 (21) and resistor R2. The output terminal of the amplifier circuit (2) serves as connection point B. When the voltage of the VCC power supply does not exceed the sum of the threshold voltages of transistor M3 (11) and transistor M1 (12), the voltage of connection point B is equal to the voltage of the VCC power supply. Transistors M3 (11), M1 (12) and M2 (21) are in the off state, and the reset signal output by the inverter circuit (3) is low level. When the voltage of the VCC power supply exceeds the sum of the threshold voltages of transistors M3 (11) and M1 (12), transistors M3 (11) and M1 (12) switch from the cutoff state to the conduction state, causing transistor M2 (21) to switch from the cutoff state to the conduction state. Due to the conduction of transistor M2 (21), the voltage at connection point B gradually decreases through the series connection of transistor M2 (21) and resistor R2. When the voltage at connection point B is lower than the flip threshold of the first inverter in the inverter circuit (3), the second inverter in the inverter circuit (3) outputs a low level. By turning off the MOS transistor in the positive feedback circuit (4), the voltage at connection point B is reduced again, causing the voltage output by the amplifier circuit (2) to move away from the flip threshold of the first inverter in the inverter circuit (3). The reset signal output by the inverter circuit (3) is high.

2. The power-on reset circuit with stable reset signal output according to claim 1, characterized in that: The reset detection circuit (1) also includes resistor R1; the source of transistor M3 (11) is electrically connected to the output terminal of VCC power supply, the gate and drain of transistor M3 (11) are electrically connected to one end of resistor R1, the other end of resistor R1 is electrically connected to the drain and gate of transistor M1 (12), and the source of transistor M1 (12) is grounded; the drain and gate of transistor M1 (12) serve as connection point A.

3. The power-on reset circuit with stable reset signal output according to claim 2, characterized in that: In the amplifier circuit (2), one end of resistor R2 is electrically connected to the output terminal of VCC power supply, the other end of resistor R2 is electrically connected to the drain of transistor M2 (21), the source of transistor M2 (21) is grounded, and the other end of resistor R2 serves as the output terminal of amplifier circuit (2) and as connection point B.

4. The power-on reset circuit with stable reset signal output according to claim 3, characterized in that: The gate and drain of transistor M1 (12) are electrically connected to the gate of transistor M2 (21).

5. The power-on reset circuit with stable reset signal output according to claim 1, characterized in that: The inverter circuit (3) includes an INV1 inverter (31), an INV2 inverter (32), and an INV3 inverter (33); the input terminal of the INV1 inverter (31) serves as the input terminal of the inverter circuit (3), the output terminal of the INV1 inverter (31) is electrically connected to the input terminal of the INV2 inverter (32), the output terminal of the INV2 inverter (32) is electrically connected to the input terminal of the INV3 inverter (33), the output terminal of the INV3 inverter (33) serves as the output terminal of the inverter circuit (3), and the output terminal of the INV2 inverter (32) serves as the C connection point.

6. The power-on reset circuit with stable reset signal output according to claim 1, characterized in that: The positive feedback circuit (4) includes an M4 transistor (41); the gate of the M4 transistor (41) is electrically connected to the output terminal of the INV2 inverter (32), the drain of the M4 transistor (41) is electrically connected to the drain and gate of the M1 transistor (12), and the source of the M4 transistor (41) is grounded.

7. A power-on reset circuit with stable reset signal output according to claim 5, characterized in that: The circuit structures of the INV1 inverter (31), INV2 inverter (32) and INV3 inverter (33) are the same, all including M5 transistor (34) and M6 transistor (35). The gate of M5 transistor (34) and the gate of M6 transistor (35) are electrically connected and serve as the input terminal of the inverter. The source of M5 transistor (34) and M6 transistor (35) are electrically connected and serve as the output terminal of the inverter.

8. A power-on reset circuit with stable reset signal output according to claim 2, characterized in that: It also includes a detection circuit (5) and a function replacement circuit; the two detection terminals of the detection circuit (5) are electrically connected to connection point B and connection point A respectively, and are used to detect the voltage of connection point B and the voltage of connection point A; the input terminal of the function replacement circuit is electrically connected to the source of transistor M3 (11), the output terminal of the function replacement circuit is electrically connected to the drain of transistor M3 (11), and the control terminal of the detection circuit (5) is electrically connected to the control terminal of the function replacement circuit; when the voltage of connection point B exceeds the set voltage value V1 for a time exceeding the set time threshold T1, the detection circuit (5) detects the voltage of connection point A; when the voltage of connection point A is lower than the set voltage value V2 for a time exceeding the set time threshold T2, the detection circuit (5) controls the function replacement circuit to connect to the reset detection circuit (1) to replace transistor M3 (11).

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