Task scheduling system and method

Abstract

The application discloses a task scheduling system and method, relates to the technical field of task scheduling processing, and comprises the following steps: a task scheduler performs dynamic load detection, and acquires load information corresponding to a to-be-processed task; according to basic window traffic data, current window traffic data and a predetermined historical traffic data attenuation coefficient, future window traffic data corresponding to each time point in a preset time period from a current time point to a future preset time point is predicted; when the future window traffic data corresponding to each time point in the preset time period is all lower than a preset traffic data threshold value, tasks from the current time point to the future preset time point are scheduled to a hardware acceleration device; and the hardware acceleration device executes the tasks from the current time point to the future preset time point. According to the method, a future low-load period can be accurately predicted, network tasks can be unloaded from an ARM core to a dedicated hardware acceleration device for execution in the window period, and deep energy saving is realized.

Description

Technical Field

[0001] This application relates to the field of task scheduling and processing technology, and in particular to task scheduling systems and methods. Background Technology

[0002] With the rapid iteration of internet data centers, a large number of high-data-volume, high-power network interface cards (NICs) have appeared on the market, consuming a significant amount of energy. Energy conservation and emission reduction are currently major challenges. Given the global emphasis on energy conservation, energy efficiency has become a key focus in the electronics industry. Traditional NIC designs currently rely primarily on the following methods: low-power idle state, dynamic frequency and voltage adjustment, and packet merging.

[0003] However, low-power, dynamic frequency and voltage regulation, and packet merging methods all have certain drawbacks. For example, low-power methods require the processor core to be frequently woken up, resulting in data transmission delays and additional power consumption; dynamic frequency and voltage regulation has the problem of insufficient response capability to burst traffic; and packet merging requires setting a fixed threshold for the number of packets to be merged, but a fixed threshold is difficult to adapt to dynamic traffic. Summary of the Invention

[0004] This application provides a task scheduling system and method to at least solve the problem of high power consumption of network cards in related technologies, which makes it impossible to achieve energy conservation and emission reduction.

[0005] This application provides a task scheduling system, which includes a task scheduler and a hardware acceleration device;

[0006] The task scheduler performs dynamic load detection to obtain load information corresponding to the tasks to be processed. The load information includes basic window traffic data and current window traffic data. Based on the basic window traffic data, current window traffic data, and a predetermined historical traffic data attenuation coefficient, it predicts the future window traffic data corresponding to each moment within a preset time period from the current moment to a future preset moment. When the future window traffic data corresponding to each moment within the preset time period is lower than the preset traffic data threshold, the tasks from the current moment to the future preset moment are scheduled to the hardware acceleration device.

[0007] Hardware acceleration devices are used to execute tasks from the current moment to a preset future moment.

[0008] This application also provides a task scheduling method applied to a task scheduling system, the task scheduling system including a task scheduler and a hardware acceleration device, the method being executed by the task scheduler, including:

[0009] Perform dynamic load detection to obtain load information corresponding to the task to be processed. The load information includes basic window traffic data and current window traffic data.

[0010] Based on the basic window traffic data, the current window traffic data, and the predetermined historical traffic data attenuation coefficient, predict the future window traffic data corresponding to each moment in the preset time period from the current moment to the future preset moment.

[0011] When the future window traffic data corresponding to each moment within a preset time period is lower than the preset traffic data threshold, tasks from the current moment to the preset future moment will be scheduled to the hardware acceleration device for execution.

[0012] This application also provides a computer-readable storage medium storing a computer program, wherein the computer program, when executed by a processor, implements the steps of the above-described task scheduling method.

[0013] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the above-described task scheduling method.

[0014] This application enables a task scheduler to dynamically perform load detection and predict window traffic data for each moment in the future based on the base window traffic and current window traffic data in the load information, as well as the historical traffic data attenuation coefficient. If the window traffic data for all moments within the preset future time period does not exceed the preset traffic data threshold, all tasks corresponding to this time period from the current moment to the preset future moment can be directly scheduled to be executed on the hardware acceleration device. This method accurately predicts future low-load periods and intelligently offloads network tasks from the ARM core to a dedicated hardware acceleration device during this window, thereby achieving deep energy saving. This solution predicts a continuous and stable low-traffic time window and completely hands over tasks to the hardware acceleration device during this period. The ARM core can enter a deeper and longer low-power state (or even sleep) during this period without being frequently woken up. This significantly reduces the additional power consumption caused by state switching, achieving true deep energy saving. Moreover, the decision-making in this application is predictive rather than reactive. Before making scheduling decisions, it predicts that the traffic will be "continuously below the threshold" for an entire future period. This means that the possibility of sudden high traffic can be largely ruled out during this preset time period. Therefore, there is no need to worry about being unable to respond in time to sudden traffic surges. This application transforms the unpredictable risk of "sudden traffic" into a manageable "deterministic low traffic" window through prediction. Moreover, because this application uses dynamic prediction, it does not rely on any fixed threshold as the criterion for action (although there is a preset traffic threshold, it is used for comparison with the dynamically predicted value, not as a fixed threshold for the amount of accumulated packets). The system continuously performs dynamic calculations based on "base window traffic," "current window traffic," and "historical attenuation coefficient" to predict the traffic at every future moment. This method is adaptive and intelligent, capable of flexibly responding to dynamic changes in network traffic, thereby maximizing the energy-saving window and achieving the best balance between energy efficiency and performance while ensuring no latency risk. Attached Figure Description

[0015] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 This application provides a schematic diagram of a task scheduling system structure.

[0017] Figure 2 This is a schematic diagram of another task scheduling system structure provided in an embodiment of this application;

[0018] Figure 3 This is a schematic diagram of the overall structure of the task scheduling system provided in the embodiments of this application;

[0019] Figure 4 A simplified topology decomposition logic diagram illustrating the specific implementation principle of the task scheduling system provided in this application embodiment;

[0020] Figure 5 This is a schematic flowchart of a task scheduling method provided in an embodiment of this application. Detailed Implementation

[0021] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0022] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0023] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0024] With the rapid iteration of internet data centers, a large number of high-data-volume, high-power network interface cards (NICs) have appeared on the market, consuming a significant amount of energy. Energy conservation and emission reduction are currently major challenges. Given the global emphasis on energy conservation, energy efficiency has become a key focus in the electronics industry. Traditional NIC designs currently rely primarily on the following methods: low-power idle state, dynamic frequency and voltage adjustment, and packet merging.

[0025] 1. Low-power idle state

[0026] The low-power state of Peripheral Component Interconnect Express (PCIe) devices requires the system driver to explicitly place the device into a low-power state, allowing the PCIe link to sequentially transition to a low-power state. The PCIe specification allows a PCIe link to enter a low-power state without a system driver. This feature is known as active state power management. Generally, both system driver hardware and device hardware can detect idle time on the PCIe link and then initiate a power state transition.

[0027] The low-power idle state has the following drawbacks: when there is no data transmission, the processor core enters a sleep state, and when data transmission occurs, it needs to be woken up. This frequent waking up leads to data transmission latency and additional power consumption.

[0028] 2. Dynamic frequency and voltage regulation

[0029] Dynamic voltage regulation is a flexible and efficient power management technology that balances performance and power consumption by dynamically adjusting voltage and frequency. It can provide optimal operating parameters based on different application scenarios and chip states, thereby minimizing power consumption while ensuring performance.

[0030] While dynamic frequency and voltage regulation can adjust the network card frequency and voltage according to the load, it is not capable of responding to sudden traffic surges.

[0031] 3. Data packet merging

[0032] Packet merging is a complex networking technique designed to optimize network data transmission efficiency by combining multiple smaller data packets into a larger one before transmission or reception. This method significantly improves network performance, reduces processing overhead at network interfaces, lowers energy consumption, and contributes to building more environmentally friendly and cost-effective network environments. The core function of packet merging is to aggregate smaller data packets into larger ones, thereby reducing the total number of packets that need to be transmitted or processed. This process is crucial for optimizing data flow in a network, especially in situations involving large-volume data transmission. By reducing the number of packets, packet merging greatly reduces the computational workload and energy consumption of network interfaces, thus improving network efficiency.

[0033] Packet merging can be achieved by buffering a small number of packets and then processing them all at once. However, packet merging requires setting a fixed threshold, which is difficult to adapt to dynamic traffic.

[0034] To address the aforementioned problems, embodiments of this application provide a task scheduling system, as detailed below. Figure 1As shown, the system includes a task scheduler 101 and a hardware acceleration device 102.

[0035] The task scheduler 101 is used to perform dynamic load detection and obtain load information corresponding to the tasks to be processed. The load information includes basic window traffic data and current window traffic data. Based on the basic window traffic data, current window traffic data, and a predetermined historical traffic data attenuation coefficient, it predicts the future window traffic data corresponding to each moment in a preset time period from the current moment to a future preset moment. When the future window traffic data corresponding to each moment in the preset time period is lower than the preset traffic data threshold, the tasks from the current moment to the future preset moment are scheduled to the hardware acceleration device 102.

[0036] The hardware acceleration device 102 is used to execute tasks from the current moment to a preset future moment.

[0037] Specifically, the task scheduler 101 can perform dynamic load detection periodically or in real time to obtain load information corresponding to the tasks to be processed. In a specific example, the load information may include at least basic window traffic data and current window traffic data.

[0038] The task scheduler 101 can predict the future window traffic data for each moment within a preset time period from the current moment to a preset future moment, based on the basic window traffic data, the current window traffic data, and a predetermined historical traffic data attenuation coefficient. The historical traffic data attenuation coefficient is obtained through training and statistical analysis of historical traffic data or through statistical analysis of a large amount of experimental data; details will not be elaborated here. However, it should be noted that the historical traffic data attenuation coefficient changes according to variations in historical data.

[0039] When it is predicted that the future window traffic data corresponding to each future preset time is lower than the preset traffic data threshold, the tasks from the current time to the future preset time can be directly scheduled to the hardware acceleration device 102. In an optional example, the hardware acceleration device 102 is, for example, a hardware acceleration module engine (Hardware OffloadEngine, or HOE for short), without going through the processor core (ARM core) in the network card.

[0040] HOE executes all tasks from the current moment to a preset future moment. During this period, it's equivalent to embedding the network tasks processed by the ARM core into dedicated hardware for execution. The ARM core is kept in a deep sleep state during this time to reduce resource consumption.

[0041] In an optional example, the preset time period may actually only include one moment, such as predicting the next moment from the current moment. If the traffic at the next moment is lower than a preset traffic threshold, then tasks from the current moment to the next moment can be directly scheduled to the hardware acceleration device 102. Of course, if the current moment is the first moment, it is also necessary to consider whether the tasks at the current moment can be directly scheduled to the hardware acceleration device 102.

[0042] Of course, the preset time period can also be a time period consisting of several future moments. For example, 10 minutes, 20 minutes, one hour, etc. The specific setting depends on the actual situation, and there are no restrictions here.

[0043] This application provides a task scheduling system in which the task scheduler dynamically performs load detection and predicts the window traffic data for each moment in the future based on the basic window traffic and current window traffic data in the load information, as well as the historical traffic data attenuation coefficient. If the window traffic data at any moment in the future preset time period will not exceed the preset traffic data threshold, all tasks corresponding to this time period from the current moment to the future preset time period can be directly scheduled to be executed on the hardware acceleration device. In this way, the system accurately predicts future low-load periods and intelligently offloads network tasks from the ARM core to a dedicated hardware acceleration device during this window period, thereby achieving deep energy saving. This solution predicts a continuous and stable low-traffic time window and completely hands over tasks to the hardware acceleration device during this period. The ARM core can enter a deeper and longer low-power state (or even sleep) during this period without being frequently woken up. This greatly reduces the additional power consumption caused by state switching and achieves true deep energy saving. Moreover, the decision-making of this application is predictive rather than reactive. Before making a scheduling decision, it has already predicted that the traffic will be "continuously below the threshold" for a whole period of time in the future. This means that the possibility of sudden high traffic can be basically ruled out during this preset time period. Therefore, there is no need to worry about being unable to respond in time to sudden traffic surges. This application transforms the unpredictable risk of "sudden traffic" into a manageable "deterministic low traffic" window through prediction. Moreover, because this application uses dynamic prediction, it does not rely on any fixed threshold as the criterion for action (although there is a preset traffic threshold, it is used for comparison with the dynamically predicted value, not as a fixed threshold for the amount of accumulated packets). The system continuously performs dynamic calculations based on "base window traffic," "current window traffic," and "historical attenuation coefficient" to predict the traffic at every future moment. This method is adaptive and intelligent, capable of flexibly responding to dynamic changes in network traffic, thereby maximizing the energy-saving window and achieving the best balance between energy efficiency and performance while ensuring no latency risk.

[0044] In an optional embodiment, the task scheduler 101 is specifically used to predict the future window traffic data corresponding to each moment within a preset time period from the current moment to a future preset moment using the following expression:

[0045]

[0046] in, This refers to the future window traffic data corresponding to the i-th time point within a preset time period. Based on the basic window flow data, Here, L is the historical traffic data attenuation coefficient, and L is the ratio between the current window traffic data and the base window traffic data. This represents the time difference between the current time and the i-th time, and it is a constant value representing the difference. The i-th time is any time within a preset time period, and the basic window traffic data is based on the Quality of Service (QoS) settings.

[0047] In a specific example, if the base window traffic data Wbase = 100 Mbps and the current window traffic data is 150 Mbps, then L = 1.5 and β = 0.2.

[0048] In an optional example, the time units for the current moment and future moment can be minutes, hours, or other units. However, in the calculation formula of this application, because... Only the constant of the time difference is taken, so No unit of business.

[0049] In a specific example, suppose ,So:

[0050] .

[0051] In another specific example, suppose ,So:

[0052] .

[0053] In yet another specific example, suppose ,So:

[0054] .

[0055] In another specific example, suppose ,So:

[0056] .

[0057] The above example is merely to illustrate how this formula can predict the future window traffic data corresponding to each moment within a preset time period. The specific budgeting process can be set according to the actual situation, and no further restrictions are imposed here.

[0058] In an optional example, considering that in practical applications, there may be a moment when the window traffic exceeds the preset traffic data threshold, the task scheduling system in this application also includes processor core 103, as detailed in [link to relevant documentation]. Figure 2 As shown, Figure 2 Another task scheduling system provided in this application embodiment, in which the task scheduler 101 is further configured to:

[0059] When there is a future window traffic data corresponding to at least one moment within a preset time period that is greater than or equal to a preset traffic data threshold, determine whether the future window traffic data corresponding to at least one moment is greater than the basic window traffic data.

[0060] When it is determined that the future window traffic data corresponding to at least one time point is less than or equal to the basic window traffic data, the tasks from the current time point to the preset future time point are directly assigned to processor core 103 for processing.

[0061] Specifically, if the future window traffic data at at least one moment within a preset time period is greater than or equal to a preset traffic data threshold, directly having HOE process all tasks may result in task processing delays. Therefore, it is necessary to wake up processor core 103 for processing. However, to reduce resource consumption to a certain extent, a balance must be struck between reducing business processing delays and other factors. It is also necessary to determine whether the future window traffic data at at least one moment is greater than the base window traffic data.

[0062] In a specific example, if it is determined that the future window traffic data corresponding to at least one time point is less than or equal to the base window traffic data, then the tasks from the current time point to the preset future time point are directly assigned to processor core 103 for processing.

[0063] In other words, processor core 103 can directly process tasks from the current moment to a preset future moment. This achieves a fine balance between energy saving and performance.

[0064] Specifically, when a heavier but still manageable load is anticipated, processor core 103 is allowed to operate normally. This saves energy compared to enabling HOE itself, without excessively sacrificing potential performance risks, thus achieving more refined energy efficiency management and enhancing system robustness and reliability. This method significantly reduces performance risks caused by minor deviations in the prediction model. It provides a safety buffer for the system. A safe state is considered achieved as long as the increased traffic does not exceed a known, manageable baseline. This makes the entire scheduling system more robust and reliable in the face of network traffic uncertainty. By introducing more granular judgment conditions, it ensures that the system makes the most reasonable and safest decisions in any traffic prediction scenario, thereby achieving the overall goal of "energy saving and emission reduction" more effectively.

[0065] Further optionally, in practical applications, in addition to the situations mentioned above, other situations are also included, such as at least one moment when the future window traffic data is greater than the base window traffic data. When such a situation exists, the task scheduler 101 is also used to:

[0066] Determine the target time closest to the current time from the times when the future window flow data is greater than the base window flow data;

[0067] Tasks from the current time to the target time are assigned to processor core 103 for execution, and tasks from the target time to a future preset time are assigned to processor core 103 and hardware acceleration device 102 for joint execution.

[0068] Specifically, this involves considering that the preset time period itself is a time period. Within this time period, there may be a time interval between the current time and some intermediate time where the future window traffic data is less than the basic window traffic data, while the traffic data at subsequent times may be greater than the basic window traffic data. Therefore, the target time closest to the current time can be determined from the times when the future window traffic data is greater than the basic window traffic data. Then, tasks from the current time to the target time are assigned to processor core 103 for execution, and tasks from the target time to the preset future time are assigned to both processor core 103 and hardware acceleration device 102 for joint execution.

[0069] In other words, if the processor core 103 can handle the task itself, then the processor core 103 will handle it directly. If there may be a task processing delay when the processor core 103 handles the task, then some tasks can be assigned to the hardware acceleration device 102 for execution.

[0070] Specifically, the hardware acceleration device 102 may perform tasks that exceed the basic window traffic data.

[0071] This embodiment achieves lossless handling and performance assurance for burst traffic, ensuring that system performance does not degrade when facing predicted high loads. By allowing hardware acceleration devices to intervene in advance and share the load, system throughput is maintained, and data processing latency is strictly controlled, completely resolving the paradox of traditional energy-saving technologies where "energy saving leads to performance degradation." Furthermore, this solution optimizes resource utilization, ensuring no waste of hardware acceleration resources before the target time; and allowing processor cores and hardware acceleration devices to work collaboratively after the target time, maximizing their respective efficiency. This allows for seamless and full utilization of both processor cores and hardware acceleration devices based on load changes, avoiding idleness or overload on either side, resulting in maximum overall efficiency. Moreover, by finding a precise target time as the switching point, the transition from "processor core working alone" to "processor cores and hardware acceleration devices working collaboratively" is smooth and timely. This avoids performance fluctuations or inconsistencies that may occur during gradual increases in traffic, providing users with a more stable service experience. It ensures worry-free system performance while guaranteeing extreme energy efficiency.

[0072] In addition to the above situations, this application embodiment also includes another situation, that is, when it is determined that the future window traffic data corresponding to each moment within the preset time period is greater than or equal to the preset traffic data threshold, the task scheduler 101 is also used to allocate the tasks corresponding to the basic window traffic data at each moment within the preset time period to the processor core 103 for execution, and to allocate the tasks exceeding the basic window traffic data at each moment within the preset time period to the hardware acceleration device 102 for execution.

[0073] The specific task allocation principle is similar to that described above, so it will not be elaborated on further here.

[0074] In an optional embodiment, the load information further includes task attribute information corresponding to the task to be processed; the hardware acceleration device 102 includes a protocol processing module, a packet filtering module, and a direct memory access (DMA) optimization module; the task scheduler 101 is also used for:

[0075] Based on the task attribute information, the tasks executed by the hardware acceleration device 102 are classified.

[0076] The categorized tasks are then sequentially assigned to one or more of the following modules for execution: the protocol processing module, the packet filtering module, and the direct memory access optimization module.

[0077] Specifically, because the hardware acceleration device 102 includes multiple modules, such as a protocol processing module, a packet filtering module, and a direct memory access module, when the task scheduler 101 assigns some or all of the tasks within a preset time period to the hardware acceleration device 102 for execution, it is also necessary to classify the tasks according to the task attribute information to determine which module to assign them to.

[0078] In a specific example, task attribute information includes: the protocol type followed by the data packet to be transmitted and the size of the data packet to be transmitted. Therefore, task scheduler 101 is specifically used for:

[0079] Identify the protocol type followed by the data packets to be transmitted for the target task. The target task is any task from the current time to a preset future time.

[0080] When the protocol type is the first target protocol type, the target task will be assigned to the direct memory access optimization module for execution.

[0081] Alternatively, when the protocol type is the second target protocol type, the target task is assigned to the protocol processing module for execution.

[0082] Alternatively, when the identified protocol type is any protocol type other than the first target protocol type and the second target protocol type, the task scheduler 101 is also used to:

[0083] Based on the size of the data packet to be transmitted, determine whether the number of bytes occupied by the target data packet to be transmitted corresponding to the target task is greater than or equal to the preset target number of bytes;

[0084] When it is determined that the number of bytes occupied by the target data packet to be transmitted is greater than or equal to the preset target number of bytes, the target task will be assigned to the data packet filtering module for processing.

[0085] Alternatively, when it is determined that the number of bytes occupied by the target data packet to be transmitted is greater than or equal to the preset target number of bytes, the target task is assigned to the protocol processing module for execution.

[0086] Specifically, the first target protocol type is, for example, User Datagram Protocol (UDP), and the second target protocol type is, for example, Transmission Control Protocol (TCP). The default target byte size is, for example, 64 bits.

[0087] By precisely routing tasks to the most specialized hardware modules, the performance waste of "using a general-purpose processor to handle all tasks" or "using a single acceleration module to handle tasks it is not good at" is avoided. In the embodiments of this application, each module can achieve its maximum efficiency, thereby significantly reducing task processing latency and improving overall throughput.

[0088] Furthermore, different hardware modules consume different amounts of power. This solution allows simple tasks to be handled by smaller, more energy-efficient modules, while complex tasks are handled by high-performance modules. For example, it avoids the energy waste of having a large protocol processing module perform a simple DMA task, thus achieving a precise match between energy consumption and computational demands. Moreover, hardware resources such as protocol processing, filtering, and DMA can be utilized in parallel and in a balanced manner, improving the overall system resource utilization.

[0089] Furthermore, this scheme can also achieve performance optimization based on data characteristics, adopting an efficient strategy of "large packets using the fast channel and small packets using the general channel." For large packets, they are quickly forwarded through an optimized packet filtering module to maximize bandwidth utilization. For small packets, they are processed by a more powerful protocol processing module to handle the complex processing logic they may require, optimizing packet processing speed. This secondary scheduling based on data characteristics ensures that the system maintains high performance even when handling unknown protocols. When encountering other types of protocols, the system will not crash or simply drop packets, but will activate a backup, still efficient scheduling strategy. This ensures the robustness and engineering practicality of the system. In an optional embodiment, in addition to classifying tasks and assigning them to different processing modules in the HOE based on the aforementioned rules, the task scheduler 101 can also classify tasks based on the performance of each module. Specifically, the protocol processing module can parse / encapsulate the TCP / IP / UDP protocol stack and support checksum hardware calculation. Checksum is a data digest value that is automatically and efficiently calculated by dedicated hardware circuitry. Its core purpose is to detect whether errors have occurred in the data during transmission or storage.

[0090] The packet filtering module can implement Virtual Local Area Network (VLAN) / QoS classification and traffic shaping based on programmable matching logic.

[0091] The purpose of VLAN / QoS classification is to provide a basis for subsequent network processing (such as queuing, forwarding, and dropping). After assigning a priority tag, the device knows how to handle the data packet. Traffic shaping is a mechanism for controlling the output data flow, aiming to match the traffic with the data requirements of the upstream link or contract, thereby avoiding congestion and packet loss.

[0092] The packet filtering module, after classifying packets, assigns them to different priority queues (high, medium, and low). Packets are then selectively retrieved from these queues and sent out according to priority. For example, for high-priority queues, it allows data to be sent as quickly as possible. For low-priority queues, it may restrict data transmission or temporarily hold them in case of network congestion, prioritizing higher-priority packets.

[0093] Direct Memory Access (DMA) is a mechanism that allows computer hardware devices (such as network interface cards, hard disk controllers, sound cards, and graphics processors) to directly read and write data to main memory without the continuous involvement of the central processing unit (CPU). In this embodiment, DMA can be used to directly transfer data from a device (such as a network interface card) to the memory space of the application that ultimately needs it, or vice versa, completely avoiding unnecessary copying between kernel buffers and user buffers. This significantly reduces memory bandwidth usage, lowers transmission latency, and further improves data transfer efficiency. It also reduces ARM core interrupt triggering.

[0094] In a specific example, the task attribute information may also include the data packet type. The task scheduler 101, in addition to classifying tasks based on the protocol type followed by the data packet to be transmitted and the size of the data packet, can also consider the data packet type and the capability attributes of each module, and based on these parameters, select one module from the protocol processing module, the data packet filtering module, and the direct memory access optimization module to execute the corresponding task, or have multiple modules collaboratively execute the task.

[0095] For example, when a data packet belongs to a large data packet of the first preset type. The first preset type is a transport type data packet, such as one greater than or equal to 1000 bytes, even if the data packet belongs to a TCP data packet. During the classification process of the task scheduler 101, the data packet can also be assigned to the protocol processing module and DMA for collaborative processing.

[0096] See the following examples for specific examples:

[0097] Case 1: Large TCP packets (e.g., file downloads, video streams);

[0098] Packet size: Large (e.g., 1500-byte MTU);

[0099] Protocol type: TCP;

[0100] Traffic data: consistently stable;

[0101] Protocol type identification: It is identified as TCP. TCP requires complex state tracking (such as sequence number, acknowledgment, retransmission), but its checksum calculation and large amount of data transfer are very regular.

[0102] Packet Size Analysis: This is a large data packet, primarily intended for data payload transmission rather than control signaling. The focus is on efficiently moving the data, not complex analysis. Therefore, the protocol processing unit only needs to handle the TCP header information (connection establishment, acknowledgments, etc.), while the massive data body is handled efficiently by the DMA hardware. Specifically, the DMA optimization module excels at "zero-copy" large-volume, continuous data transfer. It can directly move data from the network card to the application's memory space, minimizing processor core 103 intervention and memory copy overhead.

[0103] In another specific example, Case 2: small UDP packets (such as DNS queries, VoIP voice packets).

[0104] Packet size: small (e.g., tens to hundreds of bytes);

[0105] Protocol type: UDP;

[0106] Traffic data: sudden and sporadic;

[0107] Scheduler decision-making process:

[0108] Protocol analysis: Identified as UDP. UDP is connectionless, and its processing logic is relatively simple, without a complex state machine.

[0109] Packet size analysis: The packets are very small, and the focus of processing is on rapid identification, classification and forwarding, rather than data handling efficiency.

[0110] Decision: Prioritize assigning such packets to the packet filtering module for processing.

[0111] The specific principle is as follows: the "programmable matching logic" of the packet filtering module can perform deep inspection of packets with hardware acceleration. It can extract the target IP and port at extremely fast speed (for example, determine that this is a DNS query sent to port 53).

[0112] Based on preset rules, the packet filtering module can immediately decide whether to drop, forward to a specific queue, or add a QoS tag. For these small packets that require quick decisions, processing them with the packet filtering module is much faster and has lower latency than handing them over to a more general protocol processing module.

[0113] Case 3:

[0114] Protocol interaction control packets (such as TCP synchronization (SYN) / finish packets, Internet Control Message Protocol (ICMP) packets);

[0115] Packet size: Very small (usually only has a header, no data payload);

[0116] Protocol type: TCP (control flags) or ICMP;

[0117] Traffic data: Irregular;

[0118] Scheduler decision-making process:

[0119] Protocol analysis: Identified as a TCP SYN packet (request to establish a connection) or an ICMP echo request (ping request). These packets are control signaling of the network protocol and require complex responses based on the protocol stack state.

[0120] Packet size analysis: The packet is very small, with almost no data payload. The focus of processing is on logical judgment rather than data movement.

[0121] Decision: Assign this type of data packet to the protocol processing module for processing.

[0122] The specific principle is as follows: Establishing a TCP connection requires maintaining a connection table, allocating resources, generating sequence numbers, etc. These operations involve complex and variable state management, which are best handled by the general computing power of the protocol processing unit.

[0123] By considering packet type, the scheduler can make more refined decisions. For example, even with the TCP protocol, TCP control packets (such as SYN and ACK) can be assigned to the fast channel to reduce latency, while TCP data packets can be assigned to the high-bandwidth channel. For video streams, I-frames and P / B frames can also employ different processing strategies. The task scheduler can also allocate tasks based on the capabilities of each module, ensuring that each task is handled by the module best suited for it, thereby fully utilizing the potential of each hardware module and avoiding resource misallocation. Multiple modules working together enable pipelined parallelism within the hardware, handling complex tasks that a single module cannot complete, significantly improving the processing capacity and throughput for complex workloads. Precisely assigning tasks to the most efficient modules avoids the extra power consumption caused by overloading or over-utilizing resources. Tasks are completed with optimal energy consumption, further deepening the goals of energy conservation and emission reduction.

[0124] Figure 3 The diagram below illustrates the overall structure of the task scheduling system in this application. The system is illustrated using a network interface card (NIC) as an example. See below for details.Figure 3 As shown, in addition to the task scheduler, hardware acceleration device, and ARM core mentioned above, this network card also includes peripheral processing logic. This includes, for example, a System Control Processor (SCP), an Inertial Measurement Unit (IMU), a Complex Programmable Logic Device (CPLD), a Peripheral Component Interconnect Express Interface (PCIe Interface), Double Data Rate 5 Synchronous Dynamic Random-Access Memory (DDR5), and a serializer / deserializer (SerDes).

[0125] The functions performed by other peripheral components are not the focus of this application and will not be described in detail here.

[0126] In this schematic diagram, some tasks of the processor cores are allocated to hardware acceleration devices by the task scheduler. Compared to traditional technologies where all processor cores are involved—for example, processing high-speed network cards with traffic exceeding 400G requires all ARM cores to operate, with all processing logic concentrated on them, maximizing clock speed and power consumption to meet current product standard performance evaluations (SPEC), inevitably leading to high power consumption. This is especially true in scenarios where servers typically have 8 network cards and 8 GPUs, where network card consumption is more pronounced. In this application, not all tasks are executed by the ARM cores, thus significantly reducing power consumption on the ARM cores. This effect is even more pronounced when the number of network cards is particularly large.

[0127] Figure 4 The diagram above illustrates a simplified topological decomposition logic diagram illustrating the specific implementation principle of the aforementioned system in this application. See also: Figure 4 As shown, it includes:

[0128] The hardware acceleration device includes a protocol processing module, a packet filtering module, and a direct memory access optimization module. The task scheduler (e.g., an Intelligent Task Dispatcher (ITD)) deploys the intelligent traffic prediction algorithm mentioned in this application, which predicts the future window traffic data for each moment within a preset time period from the current moment to a future preset moment; that is, the formula mentioned above.

[0129] This intelligent prediction algorithm determines whether the ARM core can enter a deep sleep state or be woken up based on the predicted traffic.

[0130] The entire process has been described in detail above, so it will not be repeated here.

[0131] The embodiments of this application provide a task scheduling method, see details below. Figure 5 As shown, this method is applied to a task scheduling system, which includes a task scheduler and a hardware acceleration device. The method is executed by the task scheduler and specifically includes the following steps:

[0132] Step S501: Perform dynamic load detection to obtain load information corresponding to the task to be processed.

[0133] The load information includes basic window traffic data and current window traffic data.

[0134] Step S502: Based on the basic window traffic data, the current window traffic data, and the predetermined historical traffic data attenuation coefficient, predict the future window traffic data corresponding to each moment within the preset time period from the current moment to the future preset moment.

[0135] Step S503: When the future window traffic data corresponding to each moment within the preset time period is lower than the preset traffic data threshold, the tasks from the current moment to the preset future moment will be scheduled to the hardware acceleration device for the hardware acceleration device to execute the tasks from the current moment to the preset future moment.

[0136] In an optional embodiment, the task scheduling system further includes a processor core; when there is a future window traffic data corresponding to at least one moment within a preset time period that is greater than or equal to a preset traffic data threshold, the method further includes:

[0137] Determine whether the future window flow data corresponding to at least one time point is greater than the base window flow data;

[0138] When it is determined that the future window traffic data corresponding to at least one time point is less than or equal to the basic window traffic data, the tasks from the current time point to the preset future time point are directly assigned to the processor core for processing.

[0139] In an optional embodiment, based on the basic window traffic data, the current window traffic data, and a predetermined historical traffic data attenuation coefficient, the future window traffic data corresponding to each moment within a preset time period from the current moment to a future preset moment is predicted, specifically expressed by the following expression:

[0140]

[0141] in, This refers to the future window traffic data corresponding to the i-th time point within a preset time period. Based on the basic window flow data, Here, L is the historical traffic data attenuation coefficient, and L is the ratio between the current window traffic data and the base window traffic data. It represents the time difference between the current time and the i-th time, where the i-th time is any time within a preset time period.

[0142] In an optional embodiment, when it is determined that there is a time at least one moment in which future window traffic data is greater than basic window traffic data, the method further includes:

[0143] Determine the target time closest to the current time from the times when the future window flow data is greater than the base window flow data;

[0144] Tasks from the current time to the target time are assigned to processor cores for execution, and tasks from the target time to a future preset time are assigned to processor cores and hardware acceleration devices for joint execution.

[0145] In an optional embodiment, when it is determined that the future window traffic data corresponding to each moment within a preset time period is greater than or equal to a preset traffic data threshold, the method further includes:

[0146] Tasks corresponding to the basic window traffic data at each moment within a preset time period are assigned to the processor core for execution, and tasks exceeding the basic window traffic data at each moment within a preset time period are assigned to the hardware acceleration device for execution.

[0147] In an optional embodiment, the load information further includes task attribute information corresponding to the task to be processed; the hardware acceleration device includes a protocol processing module, a packet filtering module, and a direct memory access optimization module; when the future window traffic data corresponding to each moment within a preset time period is lower than a preset traffic data threshold, tasks from the current moment to the future preset moment are scheduled to the hardware acceleration device, specifically including:

[0148] Based on the task attribute information, the tasks executed by the hardware acceleration device are classified.

[0149] The categorized tasks are then sequentially assigned to one or more of the following modules for execution: the protocol processing module, the packet filtering module, and the direct memory access optimization module.

[0150] In an optional embodiment, the task attribute information includes: the protocol type followed by the data packet to be transmitted and the size of the data packet to be transmitted; based on the task attribute information, the tasks to be performed by the hardware acceleration device are classified, specifically including:

[0151] Identify the protocol type followed by the data packets to be transmitted for the target task. The target task is any task from the current time to a preset future time.

[0152] When the protocol type is the first target protocol type, the target task will be assigned to the direct memory access optimization module for execution.

[0153] Alternatively, when the protocol type is the second target protocol type, the target task is assigned to the protocol processing module for execution.

[0154] In an optional embodiment, when the identified protocol type is any protocol type other than the first target protocol type and the second target protocol type, the method further includes:

[0155] Based on the size of the data packet to be transmitted, determine whether the number of bytes occupied by the target data packet to be transmitted corresponding to the target task is greater than or equal to the preset target number of bytes;

[0156] When it is determined that the number of bytes occupied by the target data packet to be transmitted is greater than or equal to the preset target number of bytes, the target task will be assigned to the data packet filtering module for processing.

[0157] Alternatively, when it is determined that the number of bytes occupied by the target data packet to be transmitted is greater than or equal to the preset target number of bytes, the target task is assigned to the protocol processing module for execution.

[0158] The specific implementation process of the task scheduling method provided in this application has been described in detail in the foregoing embodiments, so it will not be repeated here.

[0159] This application provides a task scheduling method in which the task scheduler dynamically performs load detection and predicts the window traffic data for each moment in the future based on the basic window traffic and current window traffic data in the load information, as well as the historical traffic data attenuation coefficient. If the window traffic data at any moment in the future preset time period will not exceed the preset traffic data threshold, then all tasks corresponding to this time period from the current moment to the future preset time period can be directly scheduled to be executed on the hardware acceleration device. In this way, the low-load period in the future is accurately predicted, and network tasks are intelligently offloaded from the ARM core to a dedicated hardware acceleration device during this window period, thereby achieving deep energy saving. This solution predicts a continuous and stable low-traffic time window and completely hands over the tasks to the hardware acceleration device during this period. The ARM core can enter a deeper and longer low-power state (or even sleep) during this period without being frequently woken up. This greatly reduces the additional power consumption caused by state switching and achieves true deep energy saving. Moreover, the decision of this application is predictive rather than reactive. Before making the scheduling decision, it has already predicted that the traffic will be "continuously below the threshold" for a whole period of time in the future. This means that the possibility of sudden high traffic can be basically ruled out during this preset time period. Therefore, there is no need to worry about being unable to respond in time to sudden traffic surges. This application transforms the unpredictable risk of "sudden traffic" into a manageable "deterministic low traffic" window through prediction. Moreover, because this application uses dynamic prediction, it does not rely on any fixed threshold as the criterion for action (although there is a preset traffic threshold, it is used for comparison with the dynamically predicted value, not as a fixed threshold for the amount of accumulated packets). The system continuously performs dynamic calculations based on "base window traffic," "current window traffic," and "historical attenuation coefficient" to predict the traffic at every future moment. This method is adaptive and intelligent, capable of flexibly responding to dynamic changes in network traffic, thereby maximizing the energy-saving window and achieving the best balance between energy efficiency and performance while ensuring no latency risk.

[0160] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above-described task scheduling method embodiments at runtime.

[0161] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0162] Embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above-described task scheduling method embodiments.

[0163] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0164] The task scheduling system and method provided in this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only intended to help understand the method and core ideas of this application. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A task scheduling system, characterized in that, The task scheduling system includes: a task scheduler and a hardware acceleration device; The task scheduler is used to perform dynamic load detection and obtain load information corresponding to the tasks to be processed. The load information includes basic window traffic data and current window traffic data. Based on the basic window traffic data, the current window traffic data, and a predetermined historical traffic data attenuation coefficient, the scheduler predicts the future window traffic data corresponding to each moment within a preset time period from the current moment to a future preset moment. When the future window traffic data corresponding to each moment within the preset time period is lower than a preset traffic data threshold, the task from the current moment to the future preset moment is scheduled to the hardware acceleration device. The hardware acceleration device is used to execute tasks from the current time to the future preset time. The load information also includes task attribute information corresponding to the tasks to be processed; the hardware acceleration device includes a protocol processing module, a data packet filtering module, and a direct memory access optimization module; the task scheduler is also used for: Based on the task attribute information, the tasks executed by the hardware acceleration device are classified. The categorized tasks are then sequentially assigned to one or more of the following modules for execution: the protocol processing module, the packet filtering module, and the direct memory access optimization module.

2. The system according to claim 1, characterized in that, The task scheduler is specifically used to predict the future window traffic data corresponding to each moment within a preset time period from the current moment to a preset future moment using the following expression: in, This refers to the future window traffic data corresponding to the i-th time point within the preset time period. For the aforementioned basic window traffic data, Where L is the historical traffic data attenuation coefficient, and L is the ratio between the current window traffic data and the base window traffic data. The time difference is the time difference between the current time and the i-th time, where the i-th time is any time within the preset time period.

3. The system according to claim 1, characterized in that, The task scheduling system further includes a processor core, and the task scheduler is further used for: When there is a future window traffic data corresponding to at least one moment within the preset time period that is greater than or equal to the preset traffic data threshold, determine whether the future window traffic data corresponding to at least one moment is greater than the basic window traffic data. When it is determined that the future window traffic data corresponding to at least one time point is less than or equal to the basic window traffic data, the tasks from the current time point to the future preset time point are directly assigned to the processor core for processing.

4. The system according to claim 3, characterized in that, The task scheduler is also used for: When it is determined that there is a time when the future window traffic data is greater than the basic window traffic data, the target time closest to the current time is determined from the time when the future window traffic data is greater than the basic window traffic data; The tasks from the current time to the target time are assigned to the processor core for execution, and the tasks from the target time to the future preset time are assigned to the processor core and the hardware acceleration device for joint execution.

5. The system according to claim 3 or 4, characterized in that, The task scheduler is also used for: When it is determined that the future window traffic data corresponding to each moment within the preset time period is greater than or equal to the preset traffic data threshold, the task corresponding to the basic window traffic data at each moment within the preset time period is assigned to the processor core for execution, and the task exceeding the basic window traffic data at each moment within the preset time period is assigned to the hardware acceleration device for execution.

6. The system according to claim 5, characterized in that, The task attribute information includes: the protocol type followed by the data packet to be transmitted and the size of the data packet to be transmitted; the task scheduler is specifically used for: Identify the protocol type followed by the data packet to be transmitted for the target task, wherein the target task is any task from the current time to the future preset time. When the protocol type is the first target protocol type, it is determined that the target task will be assigned to the direct memory access optimization module for execution; Alternatively, when the protocol type is the second target protocol type, the target task is determined to be assigned to the protocol processing module for execution.

7. The system according to claim 6, characterized in that, The task scheduler is also used for: When the protocol type is identified as any protocol type other than the first target protocol type and the second target protocol type, the number of bytes occupied by the target data packet to be transmitted corresponding to the target task is determined to be greater than or equal to the preset target number of bytes based on the size of the data packet to be transmitted. When it is determined that the number of bytes occupied by the target data packet to be transmitted is greater than or equal to the preset target number of bytes, it is determined that the target task will be assigned to the data packet filtering module for processing; Alternatively, when it is determined that the number of bytes occupied by the target data packet to be transmitted is greater than or equal to the preset target number of bytes, it is determined that the target task will be assigned to the protocol processing module for execution.

8. A task scheduling method, characterized in that, The method is applied to a task scheduling system, the task scheduling system including a task scheduler and a hardware acceleration device, the method being executed by the task scheduler, and the method comprising: Perform dynamic load detection to obtain load information corresponding to the task to be processed, wherein the load information includes basic window traffic data and current window traffic data; Based on the basic window traffic data, the current window traffic data, and the predetermined historical traffic data attenuation coefficient, predict the future window traffic data corresponding to each moment within a preset time period from the current moment to a future preset moment. When the future window traffic data corresponding to each moment within the preset time period is lower than the preset traffic data threshold, the tasks from the current moment to the future preset time period will be scheduled to the hardware acceleration device so that the hardware acceleration device can execute the tasks from the current moment to the future preset time period. The load information further includes task attribute information corresponding to the tasks to be processed; the hardware acceleration device includes a protocol processing module, a data packet filtering module, and a direct memory access optimization module; when the future window traffic data corresponding to each moment within the preset time period is lower than the preset traffic data threshold, tasks from the current moment to the future preset moment are scheduled to the hardware acceleration device, specifically including: Based on the task attribute information, the tasks executed by the hardware acceleration device are classified. The categorized tasks are then sequentially assigned to one or more of the following modules for execution: the protocol processing module, the packet filtering module, and the direct memory access optimization module.

9. The method according to claim 8, characterized in that, The task scheduling system further includes a processor core; the method further includes: when there is a future window traffic data corresponding to at least one moment within the preset time period that is greater than or equal to the preset traffic data threshold. Determine whether the future window flow data corresponding to at least one time point is greater than the base window flow data; When it is determined that the future window traffic data corresponding to at least one time point is less than or equal to the basic window traffic data, the tasks from the current time point to the future preset time point are directly assigned to the processor core for processing.

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