Communication agent transfer module, bandwidth enhancement processing method and device, chip, equipment, medium and program

Abstract

The embodiment of the invention discloses a communication agent transfer module, a bandwidth enhancement processing method and device, a chip, equipment, a medium and a program. The communication agent transfer module is configured in a target chip, and a first input port of the communication agent transfer module is in communication connection with a data input channel of a first binding port of the target chip; the second input port is in communication connection with a data input channel of a second binding port of the target chip, and the output port is in communication connection with a data output channel of the second binding port, and is used for receiving transfer communication data sent by the first binding port through the data input channel and sending the transfer communication data to the data output channel of the second binding port, transmitting the transfer communication data to a non-communication group chip bound by the second binding port; and the transfer communication data is sent to the first binding port by the non-communication group chip bound by the first binding port. According to the technical scheme provided by the embodiment of the invention, the communication bandwidth utilization rate and the communication efficiency among the multi-processor chips can be improved.

Description

Technical Field

[0001] Embodiments of the present invention relate to the fields of chips, communications, and artificial intelligence technologies, and in particular to a communication proxy transfer module, a bandwidth enhancement processing method, apparatus, chip, device, medium, and program. Background Art

[0002] In current AI servers, a full mesh approach is often used for scale-up interconnection (vertical expansion) between processor chips such as GPUs (Graphics Processing Units) or DPUs (Deep Learning Processing Units). A full mesh is a network connection topology in which all nodes are directly connected. Scale-up interconnection is a technical approach that achieves system expansion by improving the performance of individual computing nodes. Its core goal is to improve overall performance by optimizing hardware configurations or upgrading existing equipment.

[0003] Figure 1 This is a schematic diagram of the effect of scale-up interconnection of processor chips in artificial intelligence servers in the prior art. In a specific example, Figure 1 As shown in the figure, the current mainstream application of artificial intelligence servers often adopts an 8-card GPU configuration, and each GPU uses 7 communication links to directly connect with other GPUs point-to-point. Figure 1 Each line between the GPUs in the figure represents a communication link. Assuming the bandwidth of each communication link is Bw, the total bandwidth of each GPU in the FULL MESH state is 7*Bw.

[0004] In the process of realizing the present invention, the inventors found that the existing technology has the following defects: although the use of the FULL MESH method to layout the communication links between the processor chips in the artificial intelligence server is simple, direct and easy to implement, it cannot fully utilize the communication link resources between the communication groups. Only when the communication group is all computing cards, that is, when all computing cards are a whole communication group, can the processor bandwidth be fully utilized. For small-scale communication group applications, such as Figure 1 In the application scenario, when the communication group consists of two computing cards, the communication link across the communication group cannot be used, resulting in the communication bandwidth of the GPU in the communication group being only Bw. This is also a common problem in the current artificial intelligence field using the FULL MESH method to achieve scale-up interconnection. Summary of the Invention

[0005] The embodiments of the present invention provide a communication proxy transfer module, a bandwidth enhancement processing method, an apparatus, a chip, a device, a medium and a program, which can improve the communication bandwidth utilization and communication efficiency between multiple processor chips.

[0006] According to a first aspect of the present invention, a communication agent relay module is provided. The communication agent relay module is configured inside a target chip; a first input port of the communication agent relay module is communicatively connected to a data input channel of a first binding port of the target chip, a second input port of the communication agent relay module is communicatively connected to a data input channel of a second binding port of the target chip, and an output port of the communication agent relay module is communicatively connected to a data output channel of the second binding port; the first binding port and the second binding port are communication ports of the chip; and the communication agent relay module is configured to:

[0007] receiving transit communication data sent by the first binding port through a data input channel; wherein the transit communication data is sent to the first binding port by a non-communication group chip bound to the first binding port;

[0008] The transit communication data is sent to the data output channel of the second binding port through the output port, so as to send the transit communication data to the non-communication group chip bound to the second binding port through the data output channel of the second binding port.

[0009] According to a second aspect of the present invention, a bandwidth enhancement processing method is provided, which is applied to a communication agent transfer module, wherein the communication agent transfer module is configured inside a target chip; a first input port of the communication agent transfer module is communicatively connected to a data input channel of a first binding port of the target chip, a second input port of the communication agent transfer module is communicatively connected to a data input channel of a second binding port of the target chip, and an output port of the communication agent transfer module is communicatively connected to a data output channel of the second binding port; the first binding port and the second binding port are communication ports of the chip; the method comprises:

[0010] receiving transit communication data sent by the first binding port through a data input channel; wherein the transit communication data is sent to the first binding port by a non-communication group chip bound to the first binding port;

[0011] The transit communication data is sent to the data output channel of the second binding port through the output port, so as to send the transit communication data to the non-communication group chip bound to the second binding port through the data output channel of the second binding port.

[0012] According to a third aspect of the present invention, a bandwidth enhancement processing device is provided, which is configured in a communication agent transfer module, and the communication agent transfer module is configured inside a target chip; a first input port of the communication agent transfer module is communicatively connected to a data input channel of a first binding port of the target chip, a second input port of the communication agent transfer module is communicatively connected to a data input channel of a second binding port of the target chip, and an output port of the communication agent transfer module is communicatively connected to a data output channel of the second binding port; the first binding port and the second binding port are communication ports of the chip; the device comprises:

[0013] a transit communication data receiving module, configured to receive transit communication data sent by the first binding port through a data input channel; wherein the transit communication data is sent to the first binding port by a chip corresponding to the port identification number of the first binding port;

[0014] The transit communication data sending module is used to send the transit communication data to the data output channel of the second binding port through the output port, so as to send the transit communication data to the chip corresponding to the port identification number of the second binding port through the data output channel of the second binding port.

[0015] According to a fourth aspect of the present invention, a chip is provided, comprising the communication agent transfer module according to the first aspect.

[0016] According to a fifth aspect of the present invention, an electronic device is provided, comprising the chip according to the fourth aspect.

[0017] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the bandwidth enhancement processing method according to any embodiment of the present invention when executed.

[0018] According to another aspect of the present invention, a computer program product is provided, comprising a computer program. When the computer program is executed by a processor, the bandwidth enhancement processing method according to any embodiment of the present invention is implemented.

[0019] An embodiment of the present invention provides a communication agent transfer module, which can be configured inside a target chip. The first input port of the communication agent transfer module is communicatively connected to the data input channel of the first binding port of the target chip, the second input port of the communication agent transfer module is communicatively connected to the data input channel of the second binding port of the target chip, and the output port of the communication agent transfer module is communicatively connected to the data output channel of the second binding port. The first binding port and the second binding port are communication ports of the chip. Accordingly, a bandwidth enhancement processing method can be implemented based on the communication agent transfer module, which receives transit communication data sent by the first binding port through the data input channel, and then sends the transit communication data to the data output channel of the second binding port through the output port, so as to send the transit communication data to the non-communication group chip bound to the second binding port through the data output channel of the second binding port, wherein the transit communication data is sent from the non-communication group chip bound to the first binding port to the first binding port. The above technical solution configures a communication agent transit module in the chip, which can fully utilize the link connection between the communication groups composed of chips to realize bandwidth enhancement processing between communication groups, solve the problem of low communication bandwidth utilization between communication groups composed of existing chips, and improve the communication bandwidth utilization and communication efficiency between multi-processor chips.

[0020] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present invention, nor is it intended to limit the scope of the present invention. Other features of the present invention will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0022] Figure 1 This is a schematic diagram of the effect of scale-up interconnection of processor chips in artificial intelligence servers in the prior art;

[0023] Figure 2 This is a schematic diagram of the effect of effective interconnection under a 2-card GPU communication group under FULL MESH interconnection in the prior art;

[0024] Figure 3 This is another schematic diagram of the effective interconnection of a 2-card GPU communication group under FULL MESH interconnection in the prior art;

[0025] Figure 4It is a schematic diagram of the internal port structure of a chip in the prior art;

[0026] Figure 5 This is a schematic diagram of the structure of a communication agent transfer module inside a target chip provided by the first embodiment of the present invention;

[0027] Figure 6 This is a schematic diagram showing the effect of a communication method of a two-card communication group under FULL MESH interconnection provided by the first embodiment of the present invention;

[0028] Figure 7 This is a schematic diagram of a configuration method of a communication proxy transfer module within a chip of a two-card communication group provided by the first embodiment of the present invention;

[0029] Figure 8 This is a schematic diagram showing the effect of a communication method of a 4-card communication group under FULL MESH interconnection provided by the first embodiment of the present invention;

[0030] Figure 9 This is a schematic diagram of a configuration method of a communication proxy transfer module within a chip of a 4-card communication group provided by the first embodiment of the present invention;

[0031] Figure 10 This is a flowchart of a bandwidth enhancement processing method provided by Embodiment 1 of the present invention;

[0032] Figure 11 This is a schematic diagram of an operation process for processing requests, responses, data transmission, and release based on an improved network protocol, provided in a second embodiment of the present invention;

[0033] Figure 12 This is a schematic diagram of a protocol structure of an improved network protocol provided in the second embodiment of the present invention;

[0034] Figure 13 is a schematic diagram of a bandwidth enhancement processing device provided by Embodiment 3 of the present invention;

[0035] Figure 14 This is a schematic structural diagram of a chip provided by the fourth embodiment of the present invention;

[0036] Figure 15 This is a structural diagram of an electronic device provided in Example 4 of the present invention. DETAILED DESCRIPTION

[0037] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0038] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0039] Figure 2 This is a schematic diagram of the effective interconnection effect of a 2-card GPU communication group under FULL MESH interconnection in the existing technology. Figure 3 This is another schematic diagram of the effect of the effective interconnection of 2 GPU communication groups under FULL MESHF interconnection in the prior art. In a specific example, Figure 2 As shown, when the communication group used includes 2 computing cards (computing cards are also chips), there are a total of 4 communication groups in the server, namely GPU0 and GPU1, GPU2 and GPU3, GPU4 and GPU5, and GPU6 and GPU7. Figure 2 The solid line connection between each communication group in the figure represents the communication link that can be directly used within the communication group, and the dotted line connection between communication groups represents the communication link that cannot be directly used because it crosses the communication group. Figure 3 As shown, the communication link between each compute card can be displayed using two lines. This is because each communication link is physically bidirectional and is actually composed of two independent channels running in opposite directions, generally called the RX channel (Receive Channel) and the TX channel (Transmit Channel). In current common scenarios, the RX channel and TX channel of a communication link always appear in pairs and are used uniformly. They are logically paired.

[0040] like Figure 3As shown in the figure, the dotted communication links between different communication groups are link resources that cannot be used due to cross-group communication. The cross-group communication resources are completely unusable and wasted. In addition, the logic corresponding to the communication link inside the chip is generally designed as follows Figure 4 The structure shown.

[0041] Figure 4 is a schematic diagram of the internal port structure of a chip in the prior art. In a specific example, Figure 4 As shown, RX stands for receive, and its function is to receive electrical signals and decode them into internal chip data; TX stands for transmit, and its function is to convert internal chip data into electrical signals for output. Generally, RX and TX are used together. That is, the RX channel of port 0 can receive data sent by other chips through the TX channel of port 0, and transmit communication data to the RX channel of port 0 of other chips through the TX channel of port 0.

[0042] Example 1

[0043] Figure 5 FIG. 1 is a schematic diagram of the structure of a communication agent transfer module inside a target chip provided by the first embodiment of the present invention. Figure 5 As shown, the communication agent transfer module A is configured inside the target chip; the first input port of the communication agent transfer module A is communicatively connected to the data input channel of the first binding port of the target chip, the second input port of the communication agent transfer module A is communicatively connected to the data input channel of the second binding port of the target chip, and the output port of the communication agent transfer module A is communicatively connected to the data output channel of the second binding port; the first binding port and the second binding port are communication ports of the chip.

[0044] The communication proxy relay module can be used to provide cross-communication group "proxy relay" communication functionality between chips in the same communication group. This cross-communication group "proxy relay" communication functionality can be understood as chips within one communication group communicating with other chips within the same communication group using the communication ports of chips in other communication groups. The target chip can be a chip equipped with the communication proxy relay module. Exemplary chip types include, but are not limited to, various high-performance processor chips such as SoCs (System on a Chip), Tensor Processing Units (TPUs), Dedicated Processing Units (DPUs), Neural Network Processing Units (NPUs), GPUs, and Central Processing Units (CPUs). The present embodiment does not limit the chip type. The first input port and the second input port can be two data input ports of the communication proxy relay module. The output port can be a port used by the communication proxy relay module to send data to other chip ports. The first binding port and the second binding port can be two ports of the target chip where the communication proxy relay module is located. The data input channel can be the RX channel of a chip port. The data output channel can be the TX channel of a chip port.

[0045] Optionally, the communication proxy transit module may be a hardware module suitable for the internal logic design of the chip, as long as it can synthesize the multiple input signals received by the port into one output inside the chip. The embodiment of the present invention does not limit the specific internal structure of the communication proxy transit module.

[0046] The embodiment of the present invention configures a communication proxy transit module for the chip, thereby establishing a "proxy transit" communication link across communication groups through the communication proxy transit module, so that the RX channel and TX channel of the chip can be used independently, and the logical pairing relationship between the RX channel and the TX channel is released.

[0047] Correspondingly, the communication agent transit module A is specifically used to: receive the transit communication data sent by the first binding port through the data input channel; wherein the transit communication data is sent by the non-communication group chip bound to the first binding port to the first binding port; send the transit communication data to the data output channel of the second binding port through the output port, so as to send the transit communication data to the non-communication group chip bound to the second binding port through the data output channel of the second binding port.

[0048] The transferred communication data may be communication data sent by a chip in a non-communication group and received by the communication agent transfer module from the first binding port. The chip in the non-communication group may be a chip in a communication group other than the communication group where the target chip is located.

[0049] In an embodiment of the present invention, the first binding port and the second binding port can respectively establish binding relationships with different non-communication group chips. Accordingly, during the communication process, the non-communication group chip bound to the first binding port can send transit communication data to the data input channel of the first binding port of the target chip through the data output channel of the chip internal port. Accordingly, after the data input channel of the first binding port of the target chip receives the transit communication data, the transit communication data is sent to the data output channel through the output port, and further the data output channel of the communication agent transit module sends the transit communication data to the non-communication group chip bound to the second binding port through the data output channel of the second binding port bound to the target chip.

[0050] It can be seen that configuring a communication proxy transit module in the chip can add a new communication working mode for the chip port, so that the chip port can work in the "proxy transit" mode, thereby making full use of the physical communication link across the communication group, increasing the communication bandwidth within the communication group, and thus improving the effective communication bandwidth of the chip.

[0051] Figure 6 This is a schematic diagram showing the effect of a communication method of a 2-card communication group under FULL MESH interconnection provided by the first embodiment of the present invention. In a specific example, Figure 6 As shown in the figure, in the application scenario where 2 cards form a communication group, every two chips can serve as a communication group. There are directly available communication links within the communication group. For example, GPU0 and GPU1 form a communication group, and there is an intra-group communication link between GPU0 and GPU1 for direct communication; GPU2 and GPU3 form a communication group, and there is an intra-group communication link between GPU2 and GPU3 for direct communication; GPU4 and GPU5 form a communication group, and there is an intra-group communication link between GPU4 and GPU5; GPU6 and GPU7 form a communication group, and there is an intra-group communication link between GPU6 and GPU7. Figure 6The figure shows the communication method of two card communication groups in a full mesh interconnect, using GPU0 and GPU1 as an example. In addition to the communication link within the communication group between GPU0 and GPU1, the other double solid lines represent proxy relay communication links between GPU0 and GPU1 across communication groups, established through the communication proxy relay module. The double dashed lines represent communication links unrelated to the communication group between GPU0 and GPU1. The proxy relay communication links can be cross-communication group communication links established through the communication proxy relay module, enabling indirect communication between chips within the group across different communication groups.

[0052] Figure 7 This is a schematic diagram of a configuration method of a communication proxy transfer module in a 2-card communication group chip provided by the first embodiment of the present invention. In a specific example, Figure 6 and Figure 7 As shown, assuming that GPU0 and GPU1 are the target communication groups that need to be processed for bandwidth enhancement, GPU0 and GPU1 can be processed for bandwidth enhancement respectively through other communication groups. For the convenience of explanation, the port number of each chip is used to connect to the target chip with the same port number. For example, port 1 of GPUX is used to connect to GPU1, and port 7 of GPUX is used to connect to GPU7. Accordingly, port 0 and port 1 of GPU2 and GPU3 can establish a proxy transit communication link between GPU0 and GPU1 through the communication proxy transit module; port 0 and port 1 of GPU4 and GPU5 can establish a proxy transit communication link between GPU0 and GPU1 through the communication proxy transit module; port 0 and port 1 of GPU6 and GPU7 can establish a proxy transit communication link between GPU0 and GPU1 through the communication proxy transit module.

[0053] For example, GPU6 and GPU7 are used as examples. Figure 7As shown in sub-figures (1) and (2), the data output channel TX of port 1 of GPU7 can be configured with a communication proxy relay module, the first input port of which is communicatively connected to the data input channel of port 0, the first binding port of GPU7, the second input port of which is communicatively connected to the data input channel of port 1, the second binding port of GPU7, and the output port of which is communicatively connected to the data output channel of port 1 of GPU7. Similarly, the data output channel TX of port 0 of GPU6 can be configured with a communication proxy relay module, the first input port of which is communicatively connected to the data input channel of port 1, the first binding port of GPU6, the second input port of which is communicatively connected to the data input channel of port 0, the second binding port of GPU6, and the output port of which is communicatively connected to the data output channel of port 0 of GPU6. On this basis, when GPU0 needs to send communication data to GPU1, GPU0 can send communication data to GPU1 based on the intra-group communication link between GPU0 and GPU1, such as GPU0 sending communication data to GPU1 through Port 1. GPU0 can also send communication data to the RX channel of GPU7's Port 0. Accordingly, the communication proxy relay module of GPU7's Port 1 obtains the communication data sent by GPU0 from the RX channel of GPU7's Port 0 and sends the communication data sent by GPU0 to GPU1 through GPU7's Port 1.

[0054] like Figure 6 The communication mode of the 2-card communication group under the FULL MESH interconnection shown in the figure, the double solid lines of equal thickness represent the directly available bidirectional communication links between the chips in the communication group; in the double solid line bidirectional communication link composed of a thick solid line and a thin solid line, the thick solid line represents the proxy relay communication link, and the thin solid line represents the communication link not used by the relay. Figure 6 In the figure, among the double solid lines of different thicknesses marked with "0-1", the thick solid line represents the proxy relay communication link for transmitting communication data from GPU0 to GPU1; among the double solid lines of different thicknesses marked with "1-0", the thick solid line represents the proxy relay communication link for transmitting communication data from GPU1 to GPU0. Specifically, GPU0 can send communication data to port 0 of GPU7, and the communication proxy relay module of GPU7 can receive the data sent by GPU0 from port 0, and send the received data to GPU1 through port 1 of GPU7. Similarly, GPU1 can send communication data to port 1 of GPU6, and the communication proxy relay module of GPU6 can receive the data sent by GPU1 from port 1, and send the received data to GPU0 through port 0 of GPU6.

[0055] It can be seen that port 0 and port 1 of GPU7 are used as "communication relay agents" from GPU0 to GPU1, and port 1 and port 0 of GPU6 are used as "communication relay agents" from GPU1 to GPU0. Similarly, port 0 and port 1 of GPU5 can be used as "communication relay agents" from GPU0 to GPU1, and port 1 and port 0 of GPU4 can be used as "communication relay agents" from GPU1 to GPU0; port 0 and port 1 of GPU3 can be used as "communication relay agents" from GPU0 to GPU1, and port 1 and port 0 of GPU2 can be used as "communication relay agents" from GPU1 to GPU0. Therefore, by Figure 6 and Figure 7 It can be seen that after the communication proxy transit module establishes a cross-communication group communication link between chips within the communication group, the effective bandwidth between chips within the communication group, such as GPU0 and GPU1, will increase from Bw to 4*Bw, greatly improving the effective bandwidth between GPU0 and GPU1.

[0056] Similarly, the communication group of GPU2 and GPU3 can also use ports 2 and 3 of GPU5 and the corresponding communication proxy relay module to create a "communication relay proxy" from GPU2 to GPU3, and can also use ports 3 and 2 of GPU4 and the corresponding communication proxy relay module to create a "communication relay proxy" from GPU3 to GPU2. The communication group of GPU4 and GPU5 can also use ports 4 and 5 of GPU7 and the corresponding communication proxy relay module to create a "communication relay proxy" from GPU4 to GPU5, and can also use ports 5 and 4 of GPU6 and the corresponding communication proxy relay module to create a "communication relay proxy" from GPU5 to GPU4. These are not listed here one by one.

[0057] certainly, Figure 6 and Figure 7 Only a two-card communication group is used as an example to more clearly illustrate the technical solution. In actual deployment, all chips can be used and assigned to different communication groups. For example, when the number of chips is 8, the chip communication group size can be 2 or 4. That is, when the number of chips is 8, a chip communication group can include 2 chips, in which case there are 4 communication groups; or, a chip communication group can include 4 chips, in which case there are 2 communication groups. It should also be noted that the above example establishes a mapping relationship between port identification numbers and the same chip identification number, but in actual practice, the mapping relationship between port numbers and chips can be configured as needed. For example, ports 2 and 3 of GPU7 are used as a "communication relay agent" from GPU0 to GPU1, and ports 3 and 2 of GPU6 are used as a "communication relay agent" from GPU1 to GPU0, and so on. This embodiment of the present invention does not limit this.

[0058] In an optional embodiment of the present invention, the number of the communication agent transit modules in each chip can be determined by: determining the chip communication group size; determining the transit communication link between each chip based on the chip communication group size and the total number of chips; and determining the number of the communication agent transit modules in each chip based on the transit communication link between each chip.

[0059] The chip communication group size may be the number of chips included in a chip communication group, for example, a 2-card communication group includes 2 chips, and a 4-card communication group includes 4 chips.

[0060] In the embodiment of the present invention, when configuring the communication proxy transfer module for the chip, the chip communication group size can be determined first, and then the transfer communication link between each chip can be determined based on the chip communication group size and the total number of chips. The transfer communication link can be configured by selecting the port across the communication group as needed. Figure 6 and Figure 7 As shown, the transit communication link "GPU0-GPU7's port 0-GPU7's port 1-GPU1" can be used as a "communication transit agent" link from GPU0 to GPU1. Alternatively, the transit communication link "GPU0-GPU7's port 3-GPU7's port 5-GPU1" can also be used as a "communication transit agent" link from GPU0 to GPU1. After determining the transit communication links between each chip, corresponding communication proxy transit modules can be configured between the TX channels and RX channels of different ports of the chip based on the data flow direction of the transit communication links between each chip. After the communication proxy transit modules of all chips are configured, the total number of communication proxy transit modules configured for each chip can be determined.

[0061] refer to Figure 6 and Figure 7 It can be understood that in a communication group of 2 cards, each chip can select 6 ports to configure communication proxy relay modules, and each port can be configured with 1 communication proxy relay module. Therefore, in a communication group of 2 cards, each chip can be configured with a total of 6 communication proxy relay modules. Taking GPU7 as an example, except for the intra-group communication link of GPU6 and GPU7 occupying port 6 and port 7, each port of port 0 to port 5 of GPU7 can be configured with a communication proxy relay module in the TX channel direction. Similarly, taking GPU1 as an example, except for the intra-group communication link of GPU0 and GPU1 occupying port 0 and port 1, each port of port 2 to port 7 of GPU1 can be configured with a communication proxy relay module in the TX channel direction.

[0062] Figure 8This is a schematic diagram showing the effect of a communication method of a 4-card communication group under FULL MESH interconnection provided by the first embodiment of the present invention. In a specific example, Figure 8 As shown in the figure, in an application scenario where 4 cards form a communication group, every 4 chips can be used as a communication group. There are directly available communication links within the communication group. For example, if GPU0, GPU1, GPU2, and GPU3 form a communication group, there are direct communication links between GPU0 and GPU1, GPU0 and GPU2, GPU0 and GPU3, GPU1 and GPU2, GPU1 and GPU3, and GPU2 and GPU3. Figure 8 The communication mode of the four-card communication group in the full mesh interconnection is shown. The double solid lines of equal thickness represent the directly available bidirectional communication links between each chip in the communication group. In the double solid bidirectional communication link composed of a thick solid line and a thin solid line, the thick solid line represents the proxy transit communication link in one direction, and the thin solid line represents the proxy transit communication link in the other direction. Figure 8 In the figure, the communication link marked with "0 / 1" can represent a proxy transit communication link for transmitting communication data from GPU0 to GPU1, or can represent a proxy transit communication link for transmitting communication data from GPU1 to GPU0. For example, in the bidirectional link composed of the thick solid line and the thin solid line marked with "0 / 1", the thick solid line represents the proxy transit communication link for transmitting communication data from GPU0 to GPU1, and the thin solid line represents the proxy transit communication link for transmitting communication data from GPU1 to GPU0. Similarly, the communication link marked with "0 / 2" can represent a proxy transit communication link for transmitting communication data from GPU0 to GPU2, or a proxy transit communication link for transmitting communication data from GPU2 to GPU0; the communication link marked with "0 / 3" can represent a proxy transit communication link for transmitting communication data from GPU0 to GPU3, or a proxy transit communication link for transmitting communication data from GPU3 to GPU0; the communication link marked with "1 / 2" can represent a proxy transit communication link for transmitting communication data from GPU1 to GPU2, or a proxy transit communication link for transmitting communication data from GPU2 to GPU1; the communication link marked with "1 / 3" can represent a proxy transit communication link for transmitting communication data from GPU1 to GPU3, or a proxy transit communication link for transmitting communication data from GPU3 to GPU1; the communication link marked with "2 / 3" can represent a proxy transit communication link for transmitting communication data from GPU2 to GPU3, or a proxy transit communication link for transmitting communication data from GPU3 to GPU2.

[0063] Figure 9 This is a schematic diagram of the configuration of a communication proxy transfer module within a 4-card communication group chip provided by the first embodiment of the present invention. In a specific example, Figure 8and Figure 9 As shown, assuming that GPU0, GPU1, GPU2 and GPU3 are the target communication groups that need to be processed for bandwidth enhancement, GPU0, GPU1, GPU2 and GPU3 can be processed for bandwidth enhancement respectively through other communication groups. For the convenience of explanation, the port number of each chip is used to connect to the target chip with the same port number. For example, port 1 of GPUX is used to connect to GPU1, and port 7 of GPUX is used to connect to GPU7. Accordingly, port 0 and port 1 of GPU2 and GPU3 can establish a proxy transit communication link between GPU0 and GPU1 through the communication proxy transit module; port 0 and port 1 of GPU4 and GPU5 can establish a proxy transit communication link between GPU0 and GPU1 through the communication proxy transit module; port 0 and port 1 of GPU6 and GPU7 can establish a proxy transit communication link between GPU0 and GPU1 through the communication proxy transit module, etc.

[0064] For example, GPU5 and GPU7 are used as examples. Figure 9 As shown in sub-figures (1) and (2), the data output channel TX of port 1 of GPU7 can be configured with a communication proxy relay module, the first input port of which is in communication connection with the data input channel of port 0, the first binding port of GPU7, the second input port of which is in communication connection with the data input channel of port 1, the second binding port of GPU7, and the output port of which is in communication connection with the data output channel of port 1 of GPU7. Similarly, the data output channel TX of port 0 of GPU7 can be configured with a communication proxy relay module, the first input port of which is in communication connection with the data input channel of port 1, the first binding port of GPU7, the second input port of which is in communication connection with the data input channel of port 0, the second binding port of GPU7, and the output port of which is in communication connection with the data output channel of port 0 of GPU7. That is, port 0 and port 1 of GPU7 can establish a bidirectional proxy relay communication link between GPU0 and GPU1. Similarly, ports 2 and 3 of GPU5 can establish a bidirectional proxy relay communication link between GPU0 and GPU1.

[0065] On this basis, when GPU0 needs to send communication data to GPU1, GPU0 can not only send communication data to GPU1 based on the intra-group communication link between GPU0 and GPU1, such as GPU0 sending communication data to GPU1 through port 1, but also send communication data to GPU1 through GPU7's communication proxy relay module via GPU7's port 1. Specifically, GPU0 can send communication data to the RX channel of GPU7's port 0. Correspondingly, the communication proxy relay module of GPU7's port 1 obtains the communication data sent by GPU0 from the RX channel of GPU7's port 0 and sends the communication data sent by GPU0 to GPU1 through GPU7's port 1. Similarly, when GPU2 needs to send communication data to GPU3, GPU2 can not only send communication data to GPU3 based on the intra-group communication link between GPU2 and GPU3, such as GPU2 sending communication data to GPU3 through port 3, but also send communication data to GPU3 through GPU5's communication proxy relay module via GPU5's port 3. Specifically, GPU2 can send communication data to the RX channel of GPU5's port 2. Correspondingly, the communication proxy relay module of port 3 of GPU5 obtains the communication data sent by GPU2 from the RX channel of port 3 of GPU5, and sends the communication data sent by GPU2 to GPU3 through port 3 of GPU5. When GPU3 needs to send communication data to GPU2, in addition to being able to send communication data to GPU2 based on the intra-group communication link between GPU3 and GPU2, such as GPU3 sending communication data to GPU2 through port 2, GPU3 can also send communication data to GPU2 through the communication proxy relay module of GPU5 with the help of port 2 of GPU5. Specifically, GPU3 can send communication data to the RX channel of port 3 of GPU5. Correspondingly, the communication proxy relay module of port 2 of GPU5 obtains the communication data sent by GPU3 from the RX channel of port 3 of GPU5, and sends the communication data sent by GPU3 to GPU2 through port 2 of GPU5.

[0066] Similarly, if Figure 8 and Figure 9 As shown in sub-graphs (3) and (4), in the application scenario of a 4-card communication group, both GPU4 and GPU6 can be Figure 8 The proxy relay communication link set up as shown is configured with a corresponding communication proxy relay module at the corresponding port, which will not be repeated here.

[0067] It is understandable that in a 4-card communication group, the number of communication agent transfer modules that can be configured for each chip is different. In a specific example, refer to Figure 8 and Figure 9The configuration of the proxy relay communication link shown in the figure shows that for GPU7, the intra-group communication link between GPU4 and GPU7 occupies ports 4 to 7. Ports 0 and 1 of GPU7 can be configured with a communication proxy relay module in the TX channel direction, while ports 2 and 3 of GPU7 do not need to be configured with a communication proxy relay module. For GPU6, the intra-group communication link between GPU4 and GPU7 occupies ports 4 to 7. Ports 0, 1, 2, and 3 of GPU6 all need to be configured with a communication proxy relay module in the TX channel direction. For GPU5, the intra-group communication link between GPU4 and GPU7 occupies ports 4 to 7. Ports 2 and 3 of GPU5 need to be configured with a communication proxy relay module in the TX channel direction, while ports 0 and 1 of GPU5 do not need to be configured with a communication proxy relay module. For GPU4, the intra-group communication link between GPU4 and GPU7 occupies ports 4 to 7. Ports 0, 1, 2, and 3 of GPU4 all need to be configured with a communication proxy relay module in the TX channel direction.

[0068] It should also be noted that in a 4-card communication group, the total number of chips is 8, so only one communication group can expand the communication bandwidth from 3*Bw to 6*Bw, such as Figure 8 As shown, after the communication bandwidth of the communication group of GPU0-GPU3 is enhanced, only four cross-group communication links are left in the entire communication network, and the remaining cross-group communication links cannot be used to enhance the communication bandwidth of the communication group of GPU4-GPU7.

[0069] An embodiment of the present invention provides a communication agent transfer module, which can be configured inside a target chip. The first input port of the communication agent transfer module is communicatively connected to the data input channel of the first binding port of the target chip, the second input port of the communication agent transfer module is communicatively connected to the data input channel of the second binding port of the target chip, and the output port of the communication agent transfer module is communicatively connected to the data output channel of the second binding port. The first binding port and the second binding port are communication ports of the chip. Accordingly, a bandwidth enhancement processing method can be implemented based on the communication agent transfer module, which receives transit communication data sent by the first binding port through the data input channel, and then sends the transit communication data to the data output channel of the second binding port through the output port, so as to send the transit communication data to the non-communication group chip bound to the second binding port through the data output channel of the second binding port, wherein the transit communication data is sent from the non-communication group chip bound to the first binding port to the first binding port. The above technical solution configures a communication agent transit module in the chip, which can fully utilize the link connection between the communication groups composed of chips to realize bandwidth enhancement processing between communication groups, solve the problem of low communication bandwidth utilization between communication groups composed of existing chips, and improve the communication bandwidth utilization and communication efficiency between multi-processor chips.

[0070] Example 2

[0071] Figure 10 This is a flowchart of a bandwidth enhancement processing method provided by the first embodiment of the present invention. This embodiment is applicable to the case where communications between different ports of chip communication groups are transferred through a communication agent transfer module. The method can be executed by a bandwidth enhancement processing device, which can be implemented by software and / or hardware and can generally be integrated into a chip, wherein the chip can be further integrated into an electronic device, which can be a terminal device or a server device. The embodiment of the present invention does not limit the specific device type of the electronic device. Accordingly, if Figure 10 As shown, the method includes the following operations:

[0072] S110: Receive transit communication data sent by the first binding port through a data input channel; wherein the transit communication data is sent to the first binding port by a non-communication group chip bound to the first binding port.

[0073] S120: Send the transit communication data to the data output channel of the second binding port through the output port, so as to send the transit communication data to the non-communication group chip bound to the second binding port through the data output channel of the second binding port.

[0074] In an embodiment of the present invention, a communication agent relay module is configured inside a target chip; a first input port of the communication agent relay module is communicatively connected to a data input channel of a first binding port of the target chip, a second input port of the communication agent relay module is communicatively connected to a data input channel of a second binding port of the target chip, and an output port of the communication agent relay module is communicatively connected to a data output channel of the second binding port; the first binding port and the second binding port are communication ports of the chip.

[0075] In an optional embodiment of the present invention, the target chip is further used to: receive a port binding request initiated by the requesting chip through the improved network protocol; and in response to the port binding request, establish a binding relationship between the communication agent transit module and the data input channel and data output channel of the target chip; the target chip is further used to: receive a port unbinding request initiated by the requesting chip through the improved network protocol; and in response to the port unbinding request, release the binding relationship between the communication agent transit module and the data input channel and data output channel of the target chip.

[0076] Among them, the requesting chip can be a chip that requests to establish a binding relationship between the communication proxy transfer module and the data input channel and data output channel of the target chip. Optionally, the requesting chip can be the target chip itself or another chip. The improved network protocol can be a protocol that can configure the communication proxy transfer module for the chip and implement the proxy transfer process of communication based on the communication proxy transfer module. The port binding request can be a request for establishing a binding relationship between the communication proxy transfer module and the port of the target chip. The port unbinding request can be a request for unbinding the binding relationship between the communication proxy transfer module and the port of the target chip.

[0077] Figure 11 This is a schematic diagram of an operation flow based on an improved network protocol for processing requests, responses, data transmission, and releases provided by the second embodiment of the present invention. In a specific example, Figure 11As shown, the requesting chip can act as a requester and initiate a port binding request via the improved network protocol. The target chip can act as a relay to receive the port binding request initiated by the requesting chip and, in response to the port binding request, parse the port binding request. Based on the parsed result of the port binding request, the target chip determines the communication proxy relay module and the corresponding port identifier that the requesting chip requires the target chip to bind. Based on the parsed communication proxy relay module and the corresponding port identifier, the target chip then establishes a binding relationship between the communication proxy relay module in the target chip and the data input channel and data output channel of the corresponding port. After the target chip successfully establishes the binding relationship between the communication proxy relay module and the corresponding data input channel and data output channel according to the port binding request, it can respond to the requesting chip with the result of the binding relationship establishment based on the improved network protocol. Furthermore, after the target chip successfully configures the communication proxy relay module, it can begin data transmission with the requesting chip based on the configured communication proxy relay module, thereby implementing the function of providing the target chip with a communication proxy relay service for the requesting chip.

[0078] Similarly, the requesting chip can initiate a port unbinding request as a requesting party through the improved network protocol. The target chip can receive the port unbinding request initiated by the requesting chip as a transfer party, and parse the port unbinding request in response to the port unbinding request. According to the parsed result of the port unbinding request, the communication agent transfer module and the corresponding port identifier that the requesting chip requires to be unbound from the target chip are determined, thereby releasing the binding relationship between the communication agent transfer module in the target chip and the data input channel and data output channel of the corresponding port based on the parsed communication agent transfer module and the corresponding port identifier. After the target chip successfully releases the binding relationship between the communication agent transfer module and the corresponding data input channel and data output channel according to the port unbinding request, it can feedback the release result of the binding relationship to the requesting chip as a response based on the improved network protocol.

[0079] The above technical solution can realize that each chip can apply to any other chip for a communication transfer port for binding, thereby making full use of the interconnection communication resources between chips.

[0080] In an optional embodiment of the present invention, the improved network protocol may include an original network protocol field and an extended field; the extended field may include an identifier field, an operator field and a message field; wherein: the identifier field is used to identify the port transit forwarding function of the data packet; the operator field is used to identify the operation type of the data packet; the message field is used to establish or release the binding relationship between the communication agent transit module and the target chip data input channel and data output channel.

[0081] The original network protocol field may be a field in the original network protocol. The original network protocol may be the network protocol originally used for inter-chip communication, that is, the underlying protocol originally supported by the chip port. For example, the original network protocol may be an Ethernet protocol, etc., as long as it can be used for inter-chip communication. The embodiments of the present invention do not limit the specific protocol type of the original network protocol.

[0082] Figure 12 This is a schematic diagram of the protocol structure of an improved network protocol provided by the second embodiment of the present invention. In a specific example, Figure 12 As shown, the improved network protocol can be improved upon the original network protocol by adding an extension field. Specifically, the improved network protocol can consist of the original network protocol fields and the extension fields. The extension fields can include an identifier field, an operator field, and a message field. Specifically, the identifier field can be used to identify the port forwarding function of a data packet, indicating that the data packet is used for port communication forwarding negotiation, rather than a standard communication data packet. The operator field is used to identify the operation type of the data packet, which may include but is not limited to establishing a binding and unbinding. The message field can include specific message content for establishing or unbinding the binding relationship between the communication proxy relay module and the target chip's data input and output channels, thereby establishing or unbinding the binding relationship between the communication proxy relay module and the target chip's data input and output channels. Exemplarily, the message field can include specific control information, such as forwarding configuration or network address-to-port mapping. The Padding field and FCS (Frame Check Sequence) field in the improved network protocol are the same fields as in the original network protocol. The Padding field may be redundant bytes filled to meet the message length; the FCS field may be the checksum content of the data message.

[0083] Accordingly, during the communication interaction process of the chips, when a chip uses a proxy to relay the communication link to implement the communication process across communication groups, a message in a corresponding format can be sent to the corresponding chip port based on the above-mentioned improved network protocol.

[0084] An embodiment of the present invention provides a communication agent transfer module, which can be configured inside a target chip. The first input port of the communication agent transfer module is communicatively connected to the data input channel of the first binding port of the target chip, the second input port of the communication agent transfer module is communicatively connected to the data input channel of the second binding port of the target chip, and the output port of the communication agent transfer module is communicatively connected to the data output channel of the second binding port. The first binding port and the second binding port are communication ports of the chip. Accordingly, a bandwidth enhancement processing method can be implemented based on the communication agent transfer module, which receives transit communication data sent by the first binding port through the data input channel, and then sends the transit communication data to the data output channel of the second binding port through the output port, so as to send the transit communication data to the non-communication group chip bound to the second binding port through the data output channel of the second binding port, wherein the transit communication data is sent from the non-communication group chip bound to the first binding port to the first binding port. The above technical solution configures a communication agent transit module in the chip, which can fully utilize the link connection between the communication groups composed of chips to realize bandwidth enhancement processing between communication groups, solve the problem of low communication bandwidth utilization between communication groups composed of existing chips, and improve the communication bandwidth utilization and communication efficiency between multi-processor chips.

[0085] It should be noted that the relevant information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for display, data for analysis, etc.) involved in this disclosure are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data comply with the relevant laws, regulations and standards of the relevant regions.

[0086] It should be noted that any arrangement and combination of the technical features in the above embodiments also falls within the protection scope of the present invention.

[0087] Example 3

[0088] Figure 13 This is a schematic diagram of a bandwidth enhancement processing device provided in Example 3 of the present invention. The bandwidth enhancement processing device is configured in a communication agent transfer module, and the communication agent transfer module is configured inside a target chip; a first input port of the communication agent transfer module is communicatively connected to a data input channel of a first binding port of the target chip, a second input port of the communication agent transfer module is communicatively connected to a data input channel of a second binding port of the target chip, and an output port of the communication agent transfer module is communicatively connected to a data output channel of the second binding port; the first binding port and the second binding port are communication ports of the chip.

[0089] Correspondingly, such as Figure 13As shown, the bandwidth enhancement processing device includes: a transit communication data receiving module 310 and a transit communication data sending module 320, wherein:

[0090] The transit communication data receiving module 310 is configured to receive the transit communication data sent by the first binding port through the data input channel; wherein the transit communication data is sent to the first binding port by the chip corresponding to the port identification number of the first binding port;

[0091] The transit communication data sending module 320 is used to send the transit communication data to the data output channel of the second binding port through the output port, so as to send the transit communication data to the chip corresponding to the port identification number of the second binding port through the data output channel of the second binding port.

[0092] An embodiment of the present invention provides a communication proxy relay module that can be configured within a target chip. A first input port of the communication proxy relay module is communicatively connected to a data input channel of a first bound port of the target chip, a second input port of the communication proxy relay module is communicatively connected to a data input channel of a second bound port of the target chip, and an output port of the communication proxy relay module is communicatively connected to a data output channel of a second bound port. The first bound port and the second bound port are communication ports of the chip. Accordingly, a bandwidth enhancement processing method can be implemented based on the communication proxy relay module. The method receives transit communication data sent by the first bound port through the data input channel, then sends the transit communication data to the data output channel of the second bound port through the output port, so as to send the transit communication data to a non-communication group chip bound to the second bound port through the data output channel of the second bound port, and to a chip corresponding to the port identification number of the second bound port through the data output channel of the second bound port. The transit communication data is sent from the non-communication group chip bound to the first bound port to the first bound port, and the transit communication data is sent from the chip corresponding to the port identification number of the first bound port to the first bound port. The above technical solution configures a communication agent transit module in the chip, which can fully utilize the link connection between the communication groups composed of chips to realize bandwidth enhancement processing between communication groups, solve the problem of low communication bandwidth utilization between communication groups composed of existing chips, and improve the communication bandwidth utilization and communication efficiency between multi-processor chips.

[0093] Optionally, the target chip is also used to: receive a port binding request initiated by the requesting chip through the improved network protocol; in response to the port binding request, establish a binding relationship between the communication agent transit module and the data input channel and data output channel of the target chip; the target chip is also used to: receive a port unbinding request initiated by the requesting chip through the improved network protocol; in response to the port unbinding request, release the binding relationship between the communication agent transit module and the data input channel and data output channel of the target chip.

[0094] Optionally, the improved network protocol includes an original network protocol field and an extended field; the extended field includes an identifier field, an operator field and a message field; wherein: the identifier field is used to identify the port transit forwarding function of the data packet; the operator field is used to identify the operation type of the data packet; the message field is used to establish or release the binding relationship between the communication agent transit module and the data input channel and data output channel of the target chip.

[0095] The bandwidth enhancement processing device can execute the bandwidth enhancement processing method provided by any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method. For technical details not fully described in this embodiment, please refer to the bandwidth enhancement processing method provided by any embodiment of the present invention.

[0096] Since the bandwidth enhancement processing device described above is a device capable of executing the bandwidth enhancement processing method in the embodiments of the present invention, those skilled in the art will be able to understand the specific implementation and various variations of the bandwidth enhancement processing device in this embodiment based on the bandwidth enhancement processing method described in the embodiments of the present invention. Therefore, how the bandwidth enhancement processing device implements the bandwidth enhancement processing method in the embodiments of the present invention will not be described in detail here. As long as those skilled in the art can implement the device used in the bandwidth enhancement processing method in the embodiments of the present invention, it falls within the scope of protection of this application.

[0097] Example 4

[0098] An embodiment of the present invention further provides a chip, Figure 14 FIG. 1 is a schematic diagram of the structure of a chip provided by the fourth embodiment of the present invention. Figure 14 As shown, the chip may include the communication proxy transfer module described in any embodiment of the present invention. Optionally, one or more ports of the chip may be configured with a communication proxy transfer module. In other words, a chip may include one or more communication proxy transfer modules.

[0099] An embodiment of the present invention further provides an electronic device. Figure 15A schematic diagram of an electronic device 10 that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital assistants, cellular phones, smartphones, wearable devices (such as helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or claimed herein.

[0100] like Figure 15 As shown, electronic device 10 includes at least one processor 11 and memory, such as read-only memory (ROM) 12 and random access memory (RAM) 13, communicatively connected to the at least one processor 11. The memory stores computer programs executable by the at least one processor. Processor 11 can be a chip that can include the communication proxy relay module described in any embodiment of the present invention. Processor 11 can perform various appropriate actions and processes based on the computer program stored in read-only memory (ROM) 12 or loaded from storage unit 18 into random access memory (RAM) 13. RAM 13 can also store various programs and data required for the operation of electronic device 10. Processor 11, ROM 12, and RAM 13 are interconnected via bus 14. An input / output (I / O) interface 15 is also connected to bus 14.

[0101] Multiple components in the electronic device 10 are connected to the I / O interface 15, including an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a magnetic disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices via a computer network such as the Internet and / or various telecommunication networks.

[0102] Processor 11 can be any general-purpose and / or specialized processing component with processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various specialized artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any other suitable processor, controller, microcontroller, etc. Processor 11 executes the various methods and processes described above, such as the bandwidth enhancement processing method.

[0103] Optionally, the bandwidth enhancement processing method is applied to a communication agent transit module within the chip, and the communication agent transit module is configured inside the target chip; the first input port of the communication agent transit module is communicatively connected to the data input channel of the first binding port of the target chip, the second input port of the communication agent transit module is communicatively connected to the data input channel of the second binding port of the target chip, and the output port of the communication agent transit module is communicatively connected to the data output channel of the second binding port; the first binding port and the second binding port are communication ports of the chip; the bandwidth enhancement processing method may include: receiving transit communication data sent by the first binding port through the data input channel; wherein the transit communication data is sent by the non-communication group chip bound to the first binding port to the first binding port; sending the transit communication data to the data output channel of the second binding port through the output port, so as to send the transit communication data to the non-communication group chip bound to the second binding port through the data output channel of the second binding port.

[0104] In some embodiments, the bandwidth enhancement processing method may be implemented as a computer program tangibly embodied in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on electronic device 10 via ROM 12 and / or communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the bandwidth enhancement processing method described above may be performed. Alternatively, in other embodiments, processor 11 may be configured to perform the bandwidth enhancement processing method in any other suitable manner (e.g., via firmware).

[0105] Various embodiments of the systems and techniques described above can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), system-on-chip systems (SOCs), programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include being implemented in one or more computer programs that are executable and / or interpreted on a programmable system that includes at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0106] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when the computer program is executed by the processor, the functions / operations specified in the flowcharts and / or block diagrams are implemented. The computer program may be executed entirely on the machine, partially on the machine, as a stand-alone software package, partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0107] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, device, or apparatus. A computer-readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or apparatus, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media may include an electrical connection based on one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0108] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device that has: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).

[0109] The systems and techniques described herein can be implemented in a computing system that includes back-end components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes front-end components (e.g., a user computer with a graphical user interface or web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such back-end components, middleware components, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0110] A computing system may include clients and servers. The clients and servers are typically remote from each other and typically interact via a communication network. This client-server relationship arises through computer programs running on the respective computers, creating a client-server relationship. The server may be a cloud server, also known as a cloud computing server or cloud host. This server is a hosting product within the cloud computing service ecosystem that addresses the management difficulties and limited scalability of traditional physical hosting and VPS services.

[0111] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in this disclosure can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solutions disclosed in this disclosure can be achieved. This is not a limitation herein.

[0112] The above specific embodiments do not constitute a limitation on the scope of protection of this disclosure. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this disclosure shall be included within the scope of protection of this disclosure.

Claims

1. A communication agent transfer module, characterized in that: The communication agent transfer module is configured inside the target chip; a first input port of the communication agent transfer module is communicatively connected to a data input channel of a first binding port of the target chip, a second input port of the communication agent transfer module is communicatively connected to a data input channel of a second binding port of the target chip, and an output port of the communication agent transfer module is communicatively connected to a data output channel of the second binding port; the first binding port and the second binding port are communication ports of the chip; the communication agent transfer module is used to: receiving transit communication data sent by the first binding port through a data input channel; wherein the transit communication data is sent to the first binding port by a non-communication group chip bound to the first binding port; The transit communication data is sent to the data output channel of the second binding port through the output port, so as to send the transit communication data to the non-communication group chip bound to the second binding port through the data output channel of the second binding port.

2. The communication agent transfer module according to claim 1, characterized in that: The number of communication agent transfer modules in each chip is determined by the following method: Determine the size of the chip communication group; Determine the transit communication link between each chip according to the chip communication group size and the total number of chips; The number of the communication agent transfer modules in each chip is determined according to the transfer communication links between the chips.

3. The communication agent transfer module according to claim 2, characterized in that: The number of the chips is 8, and the size of the chip communication group is 2 or 4.

4. A bandwidth enhancement processing method, characterized in that: Applied to a communication agent transfer module, the communication agent transfer module is configured inside a target chip; a first input port of the communication agent transfer module is communicatively connected to a data input channel of a first binding port of the target chip, a second input port of the communication agent transfer module is communicatively connected to a data input channel of a second binding port of the target chip, and an output port of the communication agent transfer module is communicatively connected to a data output channel of the second binding port; The first binding port and the second binding port are communication ports of the chip; the method includes: receiving transit communication data sent by the first binding port through a data input channel; wherein the transit communication data is sent to the first binding port by a non-communication group chip bound to the first binding port; The transit communication data is sent to the data output channel of the second binding port through the output port, so as to send the transit communication data to the non-communication group chip bound to the second binding port through the data output channel of the second binding port.

5. The method according to claim 4, characterized in that The target chip is also used for: receiving a port binding request initiated by the requesting chip through an improved network protocol; In response to the port binding request, establishing a binding relationship between the communication agent transit module and the data input channel and the data output channel of the target chip; The target chip is also used for: receiving a port unbinding request initiated by the requesting chip through the improved network protocol; In response to the port unbinding request, the binding relationship between the communication agent transit module and the data input channel and the data output channel of the target chip is released.

6. The method according to claim 5, characterized in that The improved network protocol includes an original network protocol field and an extension field; the extension field includes an identifier field, an operator field, and a message field; wherein: The identifier field is used to identify the port forwarding function of the data message; The operator field is used to identify the operation type of the data message; The message field is used to establish or release the binding relationship between the communication agent transfer module and the data input channel and data output channel of the target chip.

7. A bandwidth enhancement processing device, characterized in that: The communication agent transfer module is configured in a communication agent transfer module, and the communication agent transfer module is configured inside the target chip; the first input port of the communication agent transfer module is communicatively connected to the data input channel of the first binding port of the target chip, the second input port of the communication agent transfer module is communicatively connected to the data input channel of the second binding port of the target chip, and the output port of the communication agent transfer module is communicatively connected to the data output channel of the second binding port; The first binding port and the second binding port are communication ports of the chip; the device includes: a transit communication data receiving module, configured to receive transit communication data sent by the first binding port through a data input channel; wherein the transit communication data is sent to the first binding port by a chip corresponding to the port identification number of the first binding port; The transit communication data sending module is used to send the transit communication data to the data output channel of the second binding port through the output port, so as to send the transit communication data to the chip corresponding to the port identification number of the second binding port through the data output channel of the second binding port.

8. A chip, characterized in that: The chip includes the communication agent transfer module described in any one of claims 1-3.

9. An electronic device, characterized in that: The electronic device comprises the chip according to claim 8.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the bandwidth enhancement processing method according to any one of claims 4 to 6 when executed.

11. A computer program product comprising a computer program / instructions, wherein: When the computer program / instructions are executed by a processor, the bandwidth enhancement processing method according to any one of claims 4 to 6 is implemented.

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