Preparation method of circuit board and circuit board

Abstract

The invention provides a preparation method of a circuit board and the circuit board, and the method comprises the steps: obtaining a substrate with anti-plating ink; forming crossed blind slotted holes in the substrate, and forming through holes in the crossed positions of the blind slotted holes; performing copper deposition treatment on the substrate so as to form a copper layer on the substrate; removing the plating-resistant ink and the copper layer on the surface of the plating-resistant ink; insulating layers are arranged in the blind slotted holes and the through holes to form a whole board, and a conductive layer is formed on the surface of the whole board; and etching the conductive layer on the whole board to form a plurality of wiring holes connected with the copper layer. Through the mode, the exchange rate of the liquid medicine can be effectively improved, the situation of poor contact caused by insufficient exchange of the liquid medicine is avoided, the reliability of the circuit board is ensured, and the density of the wiring holes in the circuit board is improved.

Description

Technical Field

[0001] The present application is applied to the technical field of copper clad laminates, and in particular relates to a method for preparing a circuit board and a circuit board. Background Art

[0002] With the advent of the high-speed interconnection era, traditional circuit boards have been developing towards higher and higher layers. The design of printed circuit boards is becoming more and more densely wired, with more and more vias, and the rest of the board space is becoming more and more crowded. At the same time, with the increasing demand for signal integrity, the proportion of high-order blind vias is also increasing.

[0003] However, in the existing PCB industry, when depositing copper in blind slots or through slots, the commonly used method is direct copper deposition. However, when faced with small-aperture slots, the exchange rate of direct copper deposition solution is low, the exchange effect is poor, and the via setting density is also relatively low. Summary of the Invention

[0004] The present application provides a method for preparing a circuit board to solve the problems of poor copper deposition effect and low via density in existing circuit boards.

[0005] In order to solve the above technical problems, the present application provides, on the one hand, a method for preparing a circuit board, including: obtaining a substrate with anti-plating ink; opening cross-shaped blind slots on the substrate, and opening through holes at the intersection of the blind slots; performing copper plating on the substrate to form a copper layer on the substrate; removing the anti-plating ink and the copper layer on the surface of the anti-plating ink; setting an insulating layer in the blind slots and the through holes to form a whole board, and forming a conductive layer on the surface of the whole board; etching the conductive layer on the whole board to form a plurality of wiring holes connected to the copper layer.

[0006] Among them, the steps of obtaining a substrate with anti-plating ink include: obtaining a core board and a connecting layer, and patterning the core board to form a circuit layer on the core board; opening holes in the core board and the connecting layer to open through grooves at positions corresponding to the core board and the connecting layer; laminating the core board and the connecting layer to form a substrate, and stuffing the anti-plating ink into the through grooves.

[0007] Among them, the step of performing copper plating treatment on the substrate to form a copper layer on the substrate includes: performing surface treatment on the blind slot hole to remove the connection layer on the bottom end surface of the blind slot hole to expose the circuit layer; performing copper plating treatment on the substrate to form a copper layer on the substrate, the through hole and the inner wall of the blind slot hole.

[0008] The step of removing the resist ink and the copper layer on the surface of the resist ink includes: electroplating the substrate to thicken the copper layer.

[0009] The step of etching the conductive layer on the entire board to form a plurality of wiring holes connected to the copper layer includes: forming a solder resist layer on the entire board, wherein the wiring holes are exposed to the solder resist layer.

[0010] The blind slot hole is formed by the intersection of two long strip blind holes, and the diameter of the through hole is greater than the width of the blind slot hole.

[0011] The diameter of the through hole is greater than 4 times the width of the blind slot, and the projection of the through hole on the substrate at least partially overlaps with the projection of the anti-plating ink on the substrate, and the blind slot and the anti-plating ink are arranged crosswise.

[0012] The wiring holes at least include a grounding hole and a signal hole. The signal hole is connected to the copper layer on the inner wall of the blind slot hole, and the grounding hole is connected to the copper layer on the inner wall of the through hole.

[0013] The through slot arrays are arranged on the substrate and are disposed opposite to each other.

[0014] In order to solve the above technical problems, the present application also provides a circuit board, wherein the circuit board is prepared by any of the above circuit board preparation methods.

[0015] The beneficial effects of the present application are as follows: Unlike the prior art, the present application provides a plating-resistant ink on the substrate, provides cross-shaped blind slots on the substrate, and provides through holes at the intersections of the blind slots. This effectively improves the exchange rate of the solution when copper is deposited in the blind slots to form a copper layer, avoids insufficient solution exchange, and thus prevents poor contact, thereby ensuring the reliability of the circuit board. Furthermore, by providing cross-shaped blind slots, when providing wiring holes on the substrate, multiple wiring holes can be provided on the entire surface of the board, thereby increasing the density of the wiring holes on the circuit board. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 This is a flow chart of an embodiment of a method for preparing a circuit board of the present application;

[0017] Figure 2 yes Figure 1 S11 is a flow chart of an embodiment;

[0018] Figure 3 yes Figure 1 A schematic diagram of a flow chart of an embodiment of S13;

[0019] Figure 4 yes Figure 2 Schematic diagram of the cross-sectional structure of the substrate after step S112 is completed;

[0020] Figure 5 yes Figure 1 Schematic diagram of the cross-sectional structure of the substrate after step S11 is completed;

[0021] Figure 6 It is a schematic structural diagram of a top view of a substrate with a resist ink in this application;

[0022] Figure 7 This is a schematic top view of the structure of a cross-shaped blind slot formed on the end surface of the substrate of the present application;

[0023] Figure 8 yes Figure 1 A schematic diagram of the top view of the substrate after step S12 is completed;

[0024] Figure 9 yes Figure 1 Schematic diagram of the cross-sectional structure of the substrate after step S12 is completed;

[0025] Figure 10 yes Figure 2 Schematic diagram of the cross-sectional structure of the substrate after step S131 is completed;

[0026] Figure 11 yes Figure 2 Schematic diagram of the cross-sectional structure of the substrate after step S132 is completed;

[0027] Figure 12 yes Figure 1 Schematic diagram of the cross-sectional structure of the substrate after step S14 is completed;

[0028] Figure 13 yes Figure 1 A schematic diagram of the top view of the substrate after step S14 is completed;

[0029] Figure 14 This is a schematic top view of the structure in which an insulating layer is formed between blind slots and through holes in the present application;

[0030] Figure 15 This is a schematic diagram of the cross-sectional structure of the insulating layer formed between the blind slot and the through hole in the present application;

[0031] Figure 16 yes Figure 1 A schematic diagram of the top view of the substrate after step S15 is completed;

[0032] Figure 17 yes Figure 1 Schematic diagram of the cross-sectional structure of the substrate after step S16 is completed;

[0033] Figure 18 This is a schematic top view of the structure of forming wiring holes on the entire board in this application. DETAILED DESCRIPTION

[0034] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0035] It should be noted that if the embodiments of the present application involve directional indications (such as up, down, left, right, front, back, etc.), the directional indications are only used to explain the relative position relationship, movement status, etc. between the various components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indications will also change accordingly.

[0036] In addition, if there are descriptions involving "first", "second", etc. in the embodiments of the present application, the descriptions of "first", "second", etc. are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of such features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the fact that they can be implemented by ordinary technicians in this field. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by this application.

[0037] See also Figure 1 , Figure 1 It is a flow chart of an embodiment of the method for preparing a circuit board provided by the present application. It should be noted that if there is substantially the same result, the method of the present invention is not limited to Figure 1 The process sequence shown is limited. Figure 1 As shown, the method includes the following steps:

[0038] S11: Obtaining a substrate 10 with a plating resist ink 13 .

[0039] like Figure 5 and Figure 6 As shown, Figure 5 yes Figure 1 Schematic diagram of the cross-sectional structure of the substrate after step S11 is completed, Figure 6 Schematic diagram of a top view of a substrate with a resist ink in this application. In an optional embodiment, a substrate 10 is obtained. Substrate 10 is a basic material for manufacturing a circuit board. The general structure is "copper-substrate-copper." The substrate can be configured as a prepreg material. The copper layer 31 and the substrate are sequentially laminated to form substrate 10, i.e., substrate 10 is a multilayer board.

[0040] In this embodiment, the plating resist ink 13 is applied to the substrate 10 by slotting the laminated substrate 10 to form slots, and then inserting the plating resist ink 13 into the slots. The plating resist ink 13 can be applied along the length and width of the substrate 10. Specifically, two plating resist inks 13 can be provided opposite each other along the length of the substrate 10 and two can be provided along the width of the substrate 10.

[0041] S12 : forming cross-shaped blind slots 21 on the substrate 10 , and forming through holes 22 at the intersections of the blind slots 21 .

[0042] like Figure 7 As shown, Figure 7 The figure is a top view of the structure of the present invention forming a cross-shaped blind slot on the end surface of the substrate. Specifically, after the substrate 10 is laminated and the plating resist ink 13 is disposed within the substrate 10, a blind slot 21 is formed on one end surface of the substrate 10 by slotting. The blind slots 21 are cross-shaped, i.e., two blind slots 21 are provided. When the blind slots 21 are formed, two blind slots 21 can be formed on one side surface of the substrate 10 along the length and width directions of the substrate 10. When the blind slots 21 are formed, the blind slots 21 can partially penetrate the plating resist ink 13.

[0043] In some embodiments, the plating resist ink 13 disposed along the width of the substrate 10 is disposed perpendicularly to the blind slots 21 disposed along the length of the substrate 10. Furthermore, the plating resist ink 13 disposed along the length of the substrate 10 is disposed perpendicularly to the blind slots 21 disposed along the width of the substrate 10. In other words, the plating resist ink 13 disposed along the length of the substrate 10 is disposed perpendicularly to the plating resist ink 13 disposed along the width of the substrate 10. When forming the blind slots 21 along the length and width of the substrate 10, portions of the substrate 10 and portions of the plating resist ink 13 need to be removed to form the cross-shaped blind slots 21.

[0044] like Figure 8 and Figure 9 As shown, Figure 8 yes Figure 1 A schematic diagram of the top view of the substrate after step S12 is completed; Figure 9 yes Figure 1 Schematic diagram of the cross-sectional structure of the substrate after step S12 is completed. Furthermore, after forming cross-shaped blind slots 21 on one end surface of the substrate 10, drilling is performed at the intersection of the blind slots 21, thereby forming through holes 22 at the intersection of the blind slots 21. The diameter of the through holes 22 is greater than the width of the blind slots 21.

[0045] In some embodiments, the blind slot hole 21 is formed by the intersection of two elongated blind holes, and the diameter of the through hole 22 is greater than four times the width of the blind slot hole 21. That is, when the through hole 22 is formed, a portion of the plating resist ink 13 is removed. The method of removing the portion of the plating resist ink 13 is represented by the through hole 22 on the substrate 10 also at least partially overlapping with the projection of the plating resist ink 13 on the substrate 10. That is, by providing the through hole 22 at the intersection of the blind slot holes 21 and the diameter of the through hole 22 being greater than four times the width of the blind slot hole 21, the exchange efficiency of the chemical solution can be effectively improved during the subsequent copper plating process, avoiding the situation where the copper plating effect in the blind slot hole 21 is not ideal and thus causes poor contact.

[0046] The slotting or drilling process may include laser ablation, laser cutting, ion cutting or water jet cutting.

[0047] S13 : performing copper deposition processing on the substrate 10 to form a copper layer 31 on the substrate 10 .

[0048] In this embodiment, if Figure 10 and Figure 11 As shown, after the blind slot holes 21 and the through holes 22 are formed on the substrate 10, the substrate 10 can be subjected to a copper deposition process to form a copper layer 31 on the inner sidewalls of the through holes 22 and the blind slot holes 21, as well as on the surface of the substrate 10. In other words, the copper layer 31 is formed inside the through holes 22 and the blind slot holes 21, thereby imparting electrical conductivity to the through holes 22 and the blind slot holes 21 on the substrate 10.

[0049] The copper layer 31 can be formed on the substrate 10 by chemical deposition or evaporation. By controlling the processing parameters of the chemical deposition or evaporation process, the thickness of the copper layer 31 formed on the substrate 10 can be controlled. Furthermore, since the resist ink 13 is formed within the substrate 10, during the copper deposition process on the substrate 10, the copper layer 31 will adhere to the surface of the resist ink 13, thereby preventing the copper layer 31 from forming in areas of the through-hole 22 where electroplating is not required.

[0050] In some embodiments, since a cross-shaped blind slot hole 21 is formed on the substrate 10 and a through hole 22 is formed at the center of the blind slot hole 21, when the substrate 10 is subjected to copper plating, the through hole 22 increases the aperture of the blind slot hole 21, thereby effectively improving the exchange rate of copper solution within the through hole 22 and the blind slot hole 21. This avoids the occurrence of poor copper plating in the blind slot hole 21 and the occurrence of open blind holes, thereby ensuring product reliability.

[0051] In this embodiment, when copper plating is performed on the substrate 10, the substrate 10 can be first placed in a water washing tank for high-pressure water washing to remove the residues in the blind slot holes 21 and the through holes 22 of the substrate 10, and then the substrate 10 can be placed in a copper plating tank to perform copper plating on the blind slot holes 21 and the through holes 22 in the substrate 10. The copper plating tank can also contain copper plating solution or not, and this application does not limit this.

[0052] S14: removing the plating resist ink 13 and the copper layer 31 on the surface of the plating resist ink 13.

[0053] like Figure 12 and Figure 13 As shown, Figure 12 yes Figure 1 Schematic diagram of the cross-sectional structure of the substrate after step S14 is completed; Figure 13 yes Figure 1 Schematic diagram of the substrate structure after step S14 is completed. In some embodiments, after the copper layer 31 is formed on the surface of the substrate 10 and the inner sidewalls of the through-hole 22 and the blind slot hole 21, since the copper layer 31 does not need to be arranged on some areas of the blind slot hole 21 or the through-hole 22, the plating resist 13 in the substrate 10 is removed. When the plating resist 13 is removed, the copper layer 31 on the surface of the plating resist 13 can be removed simultaneously.

[0054] Among them, after removing the anti-plating ink 13 and the copper layer 31 on the surface of the anti-plating ink 13, the copper layer 31 on the inner wall of the through hole 22 can be disconnected from the copper layer 31 in the blind slot 21, thereby facilitating the subsequent preparation of the wiring hole 50 on the substrate 10.

[0055] S15 : an insulating layer 32 is provided in the blind slots 21 and the through holes 22 to form the entire board 20 , and a conductive layer 41 is formed on the surface of the entire board 20 .

[0056] like Figure 14-16 As shown, Figure 14 This is a schematic top view of the structure in which an insulating layer is formed between blind slots and through holes in the present application; Figure 15 This is a schematic top view of the structure in which an insulating layer is formed between blind slots and through holes in the present application; Figure 16 yes Figure 1 Schematic diagram of the substrate structure after step S15 is completed. In some embodiments, an insulating layer 32 is inserted into the through-hole 22 and the blind slot 21 to fill the through-hole 22 and the blind slot 21. After the insulating layer 32 is inserted into the through-hole 22 and the blind slot 21, the insulating layer 32 on the surface of the substrate 10 is scraped to remove excess insulating layer 32, making the surface of the substrate 10 smooth and facilitating subsequent processing of the substrate 10.

[0057] The material of the insulating layer 32 may include but is not limited to epoxy resin, phenolic resin, polyimide, BT, ABF, and ceramic-based materials, and can be specifically set according to needs, which is not limited in this application.

[0058] In this embodiment, an insulating layer 32 is disposed within the blind slots 21 and through-holes 22 to form a complete board 20. This means that the end surfaces of the substrate 10 are flush, and the end surfaces of the insulating layer 32 are flush with the end surfaces of the substrate 10. After the complete board 20 is formed, a conductive layer 41 can be disposed on the end surfaces of the complete board 20. Specifically, after the complete board 20 is formed, the complete board 20 can be subjected to copper electroplating to form the conductive layer 41 on the end surfaces of the substrate 10.

[0059] S16 : Etching the conductive layer 41 on the entire board 20 to form a plurality of connection holes 50 connected to the copper layer 31 .

[0060] like Figure 17 and Figure 18 As shown, Figure 17 yes Figure 1 Schematic diagram of the cross-sectional structure of the substrate after step S16 is completed; Figure 18 It is a schematic diagram of the top view of the structure for forming wiring holes on the whole board in the present application. In an optional embodiment, after obtaining the whole board 20 with the conductive layer 41, the conductive layer 41 on the surface of the whole board 20 is etched, thereby etching away the conductive layer 41 in a partial area of ​​the surface of the whole board 20 to disconnect the copper layer 31 on the inner wall of the through hole 22 and the copper layer 31 on the inner wall of the blind slot 21, thereby facilitating the provision of wiring holes 50 connected to the inner wall of the through hole 22 and the wiring holes 50 connected to the inner wall of the blind slot 21 on the whole board 20. Among them, the copper layer 31 on the inner wall of the through hole 22 is connected to the conductive layer 41 on the end faces of both sides of the whole board 20. Among them, the wiring holes 50 may include a plurality of grounding holes 52 and signal holes 51, which are used for grounding and external components, respectively.

[0061] Please refer to Figure 2 , Figure 2 yes Figure 1 Specifically, the above S11 may further include the following steps:

[0062] S111 : Obtain a core substrate 11 and a connection layer 12 , and perform patterning on the core substrate 11 to form a circuit layer on the core substrate 11 .

[0063] In this embodiment, a core board 11 and a connecting layer 12 are obtained. The core board 11 can be any metal conductive layer 41 such as a copper layer 31, and the connecting layer 12 is a base material of the substrate 10, which can be used to connect multiple core boards 11 during subsequent lamination and support the substrate 10. This application does not make specific limitations here.

[0064] Furthermore, after obtaining the core board 11 , the core board 11 is patterned to form a conductive pattern on the core board 11 , so that when the wiring hole 50 is subsequently prepared, the wiring hole 50 is connected to the conductive pattern of the inner core board 11 .

[0065] When patterning the core board 11, etching or other methods may be used to form conductive circuits on the core board 11. The connecting layer 12 may be a semi-cured material. When laminating to form the substrate 10, multiple core boards 11 may be connected by the semi-cured material. After the substrate 10 cools, multiple core boards 11 may be connected by the semi-cured material. In other embodiments, the connecting layer 12 may also be made of other materials, which are not specifically limited in this application.

[0066] S112 : drilling holes in the core plate 11 and the connection layer 12 to form through grooves at corresponding positions of the core plate 11 and the connection layer 12 .

[0067] like Figure 4 As shown, Figure 4 yes Figure 2 Schematic diagram of the cross-sectional structure of the substrate 10 after step S112 is completed. In this embodiment, after obtaining the connecting layer 12 and the patterned core board 11, drilling can be performed at positions corresponding to the core board 11 and the connecting layer 12. During the drilling process, the connecting layer 12 and the core board 11 can be penetrated, thereby forming through grooves on the core board 11 and the connecting layer 12. The through grooves on the connecting layer 12 and the core board 11 are the same in size and position, so as to avoid the occurrence of different through groove sizes when the connecting layer 12 and the core board 11 are subsequently laminated, which would affect the subsequent setting of the anti-plating ink 13 in the through grooves.

[0068] S113: Laminating the core board 11 and the connection layer 12 to form the substrate 10, and filling the through grooves with plating resist ink 13.

[0069] like Figure 5 As shown, in this embodiment, after the core board 11 and the connecting layer 12 are drilled, the core board 11 and the connecting layer 12 can be laminated. Specifically, when laminating the core board 11 and the connecting layer 12, the core board 11 and the connecting layer 12 can be laminated in sequence to form a substrate 10. The structure of the substrate 10 is expressed as: "core board 11-connecting layer 12-core board 11" structure. The substrate 10 can be formed by laminating multiple layers of core boards 11 and banding sheets. Among them, the core boards 11 are on the end faces of both sides of the substrate 10, that is, the conductive metal layer, and the core boards 11 on the end faces of both sides of the substrate 10 may not be patterned. Specifically, this application does not limit this.

[0070] When laminating the core substrate 11 and the connecting layer 12 in sequence, the through-grooves on the core substrate 11 need to be aligned with the through-grooves on the substrate 10 so that the inner sidewalls of the through-grooves on the substrate 10 are continuous after lamination to form the substrate 10. In other words, after the through-grooves are formed on the substrate 10, the inner sidewalls of the through-grooves are smooth and continuous, making it easier to insert the plating resist ink 13 into the through-grooves.

[0071] Before the plating-resistant ink 13 is inserted into the through groove, the through groove may be cleaned to remove impurities inside the through groove to prevent the continuity of the plating-resistant ink 13 from being affected, thereby affecting the performance of the circuit board.

[0072] Please refer to Figure 3 , Figure 3 yes Figure 1 Specifically, the above S13 may further include the following steps.

[0073] S131 : performing surface treatment on the blind slot hole 21 to remove the connection layer 12 on the bottom end surface of the blind slot hole 21 to expose the circuit layer.

[0074] like Figure 10 As shown, Figure 10 yes Figure 2 Schematic diagram of the cross-sectional structure of the substrate 1 after the completion of step S131. In this embodiment, when the substrate 10 is subjected to copper plating treatment, that is, when the copper layer 31 is formed on the inner wall of the substrate 10, the through hole 22 and the blind slot hole 21, the blind slot hole 21 needs to be surface treated. Specifically, when the substrate 10 is grooved as described above, that is, when the cross-shaped blind slot hole 21 is formed on the substrate 10, the bottom of the blind slot hole 21 is the connecting layer 12, that is, the end of the blind slot hole 21 away from the surface of the substrate 10 is the connecting layer 12. When the substrate 10 is subjected to copper plating treatment, in order to ensure the connectivity between the copper layer 31 and the core board 11, that is, to avoid the copper layer 31 plated on the bottom of the blind slot hole 21 being on the connecting layer 12. Therefore, when the substrate 10 is subjected to copper plating treatment, the blind slot hole 21 needs to be surface treated.

[0075] Specifically, the semi-cured layer at the bottom of the blind slot 21 can be removed by laser drilling, thereby exposing the circuit layer formed by the core board 11, thereby effectively ensuring the connection performance between the circuit layer and the copper layer 31 during the subsequent copper plating process.

[0076] S132 : performing copper deposition processing on the substrate 10 to form a copper layer 31 on the substrate 10 , the through hole 22 and the inner wall of the blind slot 21 .

[0077] like Figure 11 As shown, Figure 11 yes Figure 2Schematic diagram of the cross-sectional structure of the substrate after step S132 is completed. In some embodiments, after surface treatment of the blind slot 21, the substrate 10 can be placed in a copper solution to form a copper layer 31 on the surface of the substrate 10, the blind slot 21, and the inner sidewalls of the through-hole 22. This ensures that the copper layer 31 on the inner sidewall of the blind slot 21 is connected to the circuit layer, facilitating the subsequent preparation of the wiring hole 50 on the substrate 10.

[0078] In some embodiments, the removal of the resist ink 13 and the copper layer 31 on the surface of the resist ink 13 may further include the following steps:

[0079] S141 : electroplating the substrate 10 to thicken the copper layer 31 .

[0080] After removing the resist ink 13 and the copper layer 31 on the surface of the resist ink 13, that is, removing the resist ink 13 and the copper layer 31 on the surface of the resist ink 13 by washing, it may cause poor connection of some copper layers 31, and may cause the copper layer 31 on the inner wall of the blind slot hole 21 and the through hole 22 to become thinner. Therefore, in this embodiment, after removing the resist ink 13 and the copper layer 31 on the surface of the resist ink 13, it is necessary to thicken the copper layer 31 in the blind slot hole 21 and the through hole 22 to improve the structural strength of the copper layer 31 and avoid poor contact. Specifically, when thickening the copper layer 31, electroplating can be used to plate another layer of copper layer 31 on the existing copper layer 31 on the substrate 10, the blind slot hole 21 and the through hole 22, so as to achieve the preset thickness of the copper layer 31.

[0081] In some embodiments, after etching the conductive layer 41 on the entire board 20 to form a plurality of connection holes 50 connected to the copper layer 31 , the method further includes:

[0082] S17 : forming a solder resist layer on the entire board 20 , wherein the wiring holes 50 are exposed to the solder resist layer.

[0083] In this embodiment, after etching a plurality of connection holes 50 connected to the copper layer 31 on the entire board 20, a solder mask layer (not shown) is printed on the area outside the connection holes 50 to protect the entire board 20. This protects the area that does not require soldering.

[0084] like Figure 18As shown, in some embodiments, the wiring holes 50 etched on the entire board 20 may include grounding holes 52 and signal holes 51. The signal holes 51 are connected to the copper layer 31 on the inner sidewall of the blind slot hole 21, and the grounding holes 52 are connected to the copper layer 31 on the inner sidewall of the through hole 22. There may be four signal holes 51, that is, signal holes 51 are provided at the ends of the cross-shaped blind slot holes 21. The signal holes 51 are located at the ends of the blind slot holes 21 away from the through hole 22. By providing the cross-shaped blind slot holes 21 and connecting the signal holes 51 with the copper layer 31 on the inner sidewall of the blind slot holes 21 at the ends of the blind slot holes 21, the density of the signal holes 51 provided on the substrate 10 can be effectively increased.

[0085] Furthermore, the through slots are arranged in an array on the substrate 10, and are arranged in pairs opposite to each other, that is, two through slots are provided along the length and width directions of the substrate 10. Therefore, the cross-shaped blind slot holes 21 all pass through the anti-plating ink 13 in the through slots. After the anti-plating ink 13 is subsequently removed, the copper layer 31 on the inner wall of the through hole 22 is divided into four equal parts. Also, the copper layer 31 in the through hole 22 is not provided along the length direction of the blind slot hole 21, so that the copper layer 31 on the inner wall of the through hole 22 is evenly arranged in the through hole 22 and isolated from the copper layer 31 on the inner wall of the blind slot hole 21. On the one hand, mutual interference between the wiring holes 50 can be avoided. On the other hand, by dividing the copper layer 31 on the inner wall of the through hole 22 into four equal parts, four grounding holes 52 connected to the inner wall of the through hole 22 can be provided on the end face of the entire board 20, thereby further improving the density of the wiring holes 50 of the circuit board. Since the through hole 22 passes through the entire substrate 10 , the copper layer 31 on the inner side wall of the through hole 22 can connect to the conductive metal layers on both side end surfaces of the entire board 20 , thereby facilitating the grounding of the circuit board.

[0086] Based on the general inventive concept, the present application also provides a circuit board, wherein the circuit board is obtained by the circuit board preparation method as described in any one of the above items.

[0087] Unlike the prior art, the preparation of the circuit board in this application: by providing a plating-resistant ink 13 on the substrate 10, providing cross-shaped blind slots 21 on the substrate 10, and providing through holes 22 at the intersections of the blind slots 21, it is possible to effectively increase the exchange rate of the solution when copper is deposited in the blind slots 21 to form the copper layer 31, and avoid insufficient solution exchange, which would lead to poor contact, thereby ensuring the reliability of the circuit board. Furthermore, by providing cross-shaped blind slots 21, when providing wiring holes 50 on the substrate 10, multiple wiring holes 50 can be provided on the surface of the entire board 20, thereby increasing the density of the wiring holes 50 on the circuit board.

[0088] The above description is only an implementation method of the present application and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the description and drawings of this application, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A method for preparing a circuit board, characterized in that: The method for preparing the circuit board includes: obtaining a substrate with a plating resist ink; A cross-shaped blind slot is formed on the substrate, and a through hole is formed at the intersection of the blind slot; performing copper deposition on the substrate to form a copper layer on the substrate; removing the resist ink and the copper layer on the surface of the resist ink; An insulating layer is provided in the blind slots and the through holes to form a whole board, and a conductive layer is formed on the surface of the whole board; The conductive layer on the entire board is etched to form a plurality of connection holes connected to the copper layer.

2. The method for preparing a circuit board according to claim 1, wherein: The step of obtaining a substrate with a plating resist ink comprises: Obtaining a core board and a connection layer, and patterning the core board to form a circuit layer on the core board; The core plate and the connection layer are opened to form through grooves at positions corresponding to the core plate and the connection layer; The core board and the connection layer are laminated to form the substrate, and the plating resist ink is filled into the through groove.

3. The method for preparing a circuit board according to claim 2, wherein: The step of performing copper deposition on the substrate to form a copper layer on the substrate includes: Performing surface treatment on the blind slot to remove the connection layer on the bottom end surface of the blind slot to expose the circuit layer; The substrate is subjected to copper deposition processing to form the copper layer on the substrate, the through hole and the inner wall of the blind slot.

4. The method for preparing a circuit board according to claim 1, wherein: After the step of removing the resist ink and the copper layer on the surface of the resist ink, the following steps are included: The substrate is electroplated to thicken the copper layer.

5. The method for preparing a circuit board according to claim 1, wherein: After the step of etching the conductive layer on the entire board to form a plurality of wiring holes connected to the copper layer, the following steps are included: A solder resist layer is formed on the entire board, wherein the wiring holes are exposed in the solder resist layer.

6. The method for preparing a circuit board according to claim 1, wherein: The blind slot hole is formed by crossing two long strip blind holes, and the diameter of the through hole is greater than the width of the blind slot hole.

7. The method for preparing a circuit board according to claim 1, wherein: The diameter of the through hole is greater than 4 times the width of the blind slot hole, and the projection of the through hole on the substrate at least partially overlaps with the projection of the anti-plating ink on the substrate, and the blind slot hole and the anti-plating ink are arranged crosswise.

8. The method for preparing a circuit board according to claim 1, wherein: The wiring holes at least include a grounding hole and a signal hole. The signal hole is connected to the copper layer on the inner side wall of the blind slot hole, and the grounding hole is connected to the copper layer on the inner side wall of the through hole.

9. The method for preparing a circuit board according to claim 2, wherein: The through slot arrays are arranged on the substrate and are disposed opposite to each other in pairs.

10. A circuit board, characterized in that: The circuit board is prepared by the method for preparing a circuit board according to any one of claims 1 to 9.

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