Driving backboard and manufacturing method thereof, display panel and electronic equipment
By setting a step structure at the edge of the drive backplane and alleviating the step difference of the film layer, the problems of bubbles and glue overflow caused by the large step difference of the film layer at the edge of the drive backplane are solved, and the sealing and resistance to water vapor wear are improved.
Patent Information
- Application Number
- CN202410361720.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-27
- Publication Date
- 2025-10-03
AI Technical Summary
During the manufacturing process of Mini LED or Micro-LED display panels, the film layer step difference at the edge of the driver backplane is large, which makes it easy to form bubble cavities when the protective film layer is set, affecting the sealing effect and the risk of glue overflow in subsequent processes.
A step structure is set at the edge of the driving backplane. By forming a step structure in the first and second planarization layers and the side routing layer, the step difference change of the film layer is alleviated and the risk of bubbles when the protective film material layer is set is reduced.
The sealing between the protective film layer and the substrate is improved, the risk of cavity bubbles and glue overflow is reduced, and the resistance of the driver backplane to water vapor and wear is improved.
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Figure CN120751765A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of display technology, and in particular to a driving backplane and a manufacturing method thereof, a display panel and an electronic device. Background Art
[0002] With the development of display device manufacturing technology, mini light-emitting diodes (Mini LED) and micro light-emitting diodes (Micro-LED) are widely used because of their greater advantages in excellent brightness, resolution, contrast, energy consumption, service life, response speed and thermal stability.
[0003] During the manufacturing process of Mini LED or Micro-LED display panels, a driver backplane needs to be manufactured, and then multiple LED chips are transferred to the driver backplane for bonding. In particular, during the manufacturing process of the driver backplane, in order to improve the driver backplane's ability to resist moisture and wear, it is necessary to use a protective film layer to cover the surface of the driver backplane by molding. However, at the edges of the driver backplane (especially at the four corners of the driver backplane), a large height difference is formed between the multiple film layers stacked on the substrate and the substrate, affecting the sealing effect after the protective film layer is set. Summary of the Invention
[0004] In order to overcome the above-mentioned deficiencies in the prior art, the present application aims to provide a driving backplane, the driving backplane comprising:
[0005] substrate;
[0006] a first planarization layer located on one side of the substrate;
[0007] a second planarization layer located on a side of the first planarization layer away from the substrate, the first planarization layer including a first exposed area at least partially uncovered by the second planarization layer, and an end of the second planarization layer adjacent to the first exposed area forming a first stepped structure with the first exposed area;
[0008] A protective film layer is located on a side of the second planarization layer away from the substrate, and the protective film layer covers the first step structure.
[0009] In some possible implementations, the driving backplane further includes a side routing layer located on a side of the second planarization layer away from the substrate, the second planarization layer includes a second exposed area at least partially uncovered by the side routing layer, and an end of the side routing layer close to the second exposed area forms a second step structure with the second exposed area;
[0010] The protective film layer is located on a side of the side wiring layer away from the substrate, and the protective film layer covers the second step structure;
[0011] Preferably, the first exposed area is located at the edge of the driving back plate;
[0012] Preferably, the second exposed area is located at an edge of the driving backplate.
[0013] In some possible implementations, the first exposed area of the first planarization layer includes a first sub-area and a second sub-area located in the first sub-area away from the center of the driving backplate, the thickness of the first sub-area is greater than the thickness of the second sub-area, and the first sub-area and the second sub-area form a third step structure; the protective film layer covers the third step structure;
[0014] Preferably, in a direction away from the center of the driving backplate, the width of the second sub-region is 0.7 microns to 1.4 microns;
[0015] Preferably, in a direction away from the center position of the driving backplate, the width of the first sub-region is greater than or equal to 3 micrometers.
[0016] In some possible implementations, the second exposed area of the second planarization layer includes a third sub-area and a fourth sub-area located away from the center of the driving backplate within the third sub-area, the thickness of the third sub-area is greater than the thickness of the fourth sub-area, and the third sub-area and the fourth sub-area form a fourth step structure; the protective film layer covers the fourth step structure;
[0017] Preferably, in a direction away from the center of the driving backplate, the width of the fourth sub-region is 0.7 microns to 1.4 microns;
[0018] Preferably, in a direction away from the center position of the driving backplate, the width of the third sub-region is greater than or equal to 3 micrometers.
[0019] In some possible implementations, the driving backplate includes a bonding surface provided with bonding electrodes and a back surface opposite to the bonding surface, and the driving backplate further includes a first side surface, a second side surface, a third side surface, and a fourth side surface connecting the bonding surface and the back surface, wherein the first side surface and the second side surface are opposite to each other, and the third side surface and the fourth side surface are opposite to each other;
[0020] The side routing layer includes a first side routing layer and a second side routing layer;
[0021] The first side routing layer is located at one end of the bonding surface close to the first side surface and extends through the first side surface to the back surface;
[0022] The second side routing layer is located at one end of the bonding surface close to the second side surface and extends to the back surface through the second side surface;
[0023] Preferably, the first step structure and the second step structure are located at an end of the bonding surface close to the third side surface, and / or the first step structure and the second step structure are located at an end of the bonding surface close to the fourth side surface.
[0024] In some possible implementations, the driving backplane further includes at least two array routing layers located on a side of the first planarization layer away from the substrate, and at least a portion of the second planarization layer is located between the at least two array routing layers.
[0025] Another object of the present application is to provide a method for manufacturing a driving backplane, the method comprising:
[0026] providing a substrate;
[0027] Disposing a first planarization layer on one side of the substrate;
[0028] a second planarization layer is provided on a side of the first planarization layer away from the substrate, the first planarization layer includes a first exposed area that is at least partially uncovered by the second planarization layer, and an end of the second planarization layer close to the first exposed area forms a first step structure with the first exposed area;
[0029] A protective film layer is disposed on a side of the second planarization layer away from the substrate, and the protective film layer covers the first step structure.
[0030] In some possible implementations, the method further includes:
[0031] etching the first planarization layer through a half-tone mask to form a third step structure;
[0032] And / or, the second planarization layer is etched through a half-tone mask to form a fourth step structure.
[0033] Another object of the present application is to provide a display panel, which includes the driving backplane provided in the present application and a light-emitting unit located on one side of the driving backplane.
[0034] Another object of the present application is to provide an electronic device, which includes the display panel provided in the present application.
[0035] Compared with the prior art, this application has the following beneficial effects:
[0036] The driving backplane and its manufacturing method, display panel and electronic device provided in the present application can alleviate the step change of the film layer structure at the edge of the driving backplane by forming a step structure in part of the film layer structure located at the edge of the driving backplane, thereby reducing the risk of cavity bubbles generated when setting the protective film material layer, improving the sealing between the protective film material layer and the substrate, and reducing the risk of glue overflow in subsequent processes. BRIEF DESCRIPTION OF THE DRAWINGS
[0037] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.
[0038] Figure 1 It is a cross-sectional schematic diagram of an existing driver backplane;
[0039] Figure 2 This is a schematic cross-sectional view of a driver backplane provided in this embodiment;
[0040] Figure 3 The second cross-sectional schematic diagram of the driving backplane provided in this embodiment;
[0041] Figure 4 The third cross-sectional schematic diagram of the driver backplane provided in this embodiment;
[0042] Figure 5 This is a fourth cross-sectional schematic diagram of the driver backplane provided in this embodiment;
[0043] Figure 6 A schematic diagram of the bonding surface of the driver backplane provided in this embodiment;
[0044] Figure 7 The fifth cross-sectional schematic diagram of the driving backplane provided in this embodiment;
[0045] Figure 8 The sixth cross-sectional schematic diagram of the driving backplane provided in this embodiment;
[0046] Figure 9 The seventh cross-sectional schematic diagram of the driver backplane provided in this embodiment;
[0047] Figure 10 The eighth cross-sectional schematic diagram of the driving backplane provided in this embodiment;
[0048] Figure 11 A schematic flow chart of the steps of the manufacturing method of the driving backplane provided in this embodiment;
[0049] Figure 12This is a schematic diagram of a process of manufacturing a driver backplane provided in this embodiment;
[0050] Figure 13 This is the second process diagram of the method for manufacturing the driver backplane provided in this embodiment.
[0051] Icon: 110-substrate; 120-first planarization layer; 130-first array routing layer; 140-second planarization layer; 150-second array routing layer; 160-side routing layer; 170-protective film material layer; 200-bubble cavity; 121-first exposed area; 141-second exposed area; 1211-first sub-area; 1212-second sub-area; 1411-third sub-area; 1412-fourth sub-area; 401-first side surface; 402-second side surface; 403-third side surface; 404-fourth side surface; 161-first side routing layer; 162-second side routing layer; 400-photoresist; 401-first etch stop portion; 402-second etch stop portion. DETAILED DESCRIPTION
[0052] To make the objectives, technical solutions, and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Generally, the components of the embodiments of the present application described and shown in the drawings herein can be arranged and designed in various different configurations.
[0053] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for protection, but merely represents selected embodiments of the present application. All other embodiments obtained by persons of ordinary skill in the art based on the embodiments in the present application without making any creative efforts shall fall within the scope of protection of the present application.
[0054] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not require further definition or explanation in subsequent drawings.
[0055] In the description of this application, it should be noted that the terms "center," "upper," "lower," "vertical," "horizontal," "inner," "outer," etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, or are the orientations or positional relationships in which the inventive product is typically placed when in use. These terms are intended solely to facilitate the description of this application and simplify the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," "third," etc., are used solely to distinguish descriptions and should not be construed as indicating or implying relative importance.
[0056] It should be noted that, in the absence of conflict, different features in the embodiments of the present application can be combined with each other.
[0057] See Figure 1 In some display panel driver backplanes, the edge of the driver backplane includes a substrate 110' and multiple film layers disposed on the substrate 110', such as a planarization layer (e.g., a first planarization layer 120' and a second planarization layer 140'), an array trace layer (e.g., a first array trace layer 130' and a second array trace layer 150'), and a side trace layer 160'. Furthermore, to enhance the driver backplane's resistance to moisture and wear, a protective film layer 170' is also provided.
[0058] However, since there are many film layers stacked on the substrate 110', there is a large step difference between these film layers and the substrate 110'. When the protective film layer 170' is attached by molding, bubble cavities 200' are easily formed in the protective film layer 170' at the position with the large step difference, causing the colloid used in other subsequent manufacturing processes to easily enter the cavity, affecting the packaging effect of the protective film layer 170'.
[0059] In view of this, this embodiment provides a driving backplane, please refer to Figure 2 and Figure 3 The driving backplane may include a substrate 110 , a first planarization layer 120 , a second planarization layer 140 and a protective film layer 170 .
[0060] In this embodiment, the substrate 110 may be a flexible substrate 110 or a rigid substrate 110. In some possible implementations, the substrate 110 may be made of glass.
[0061] The first planarization layer 120 is located on one side of the substrate 110. In some possible implementations, at the edge of the driver backplane, the first planarization layer 120 can be formed directly on the substrate 110 and in contact with the substrate 110. At the center of the driver backplane, multiple other film layer structures may be included between the first planarization layer 120 and the substrate 110, such as a buffer layer, a semiconductor layer, multiple insulating layers, and multiple array wiring layers.
[0062] The second planarization layer 140 is located on a side of the first planarization layer 120 away from the substrate 110. In some possible implementations, at the center of the driver backplane, multiple other film layer structures may be included between the second planarization layer 140 and the first planarization layer 120. For example, multiple routing layers, multiple insulation layers, or multiple other planarization layers may also be included. Near the edge of the driver backplane, at least a portion of the second planarization layer 140 may be formed directly on and in contact with the first planarization layer 120.
[0063] The first planarization layer 120 includes a first exposed region 121 that is at least partially uncovered by the second planarization layer 140 . The first exposed region 121 and an end of the second planarization layer 140 close to the first exposed region 121 form a first stepped structure.
[0064] Please refer to Figure 3 The protective film layer 170 is located on a side of the second planarization layer 140 away from the substrate 110 , and the protective film layer 170 covers the first step structure.
[0065] Based on the above design, the second planarization layer 140 exposes at least a portion of the first planarization layer 120 to form the first step structure, thereby alleviating the change in height from the side of the second planarization layer 140 away from the substrate 110 to the substrate 110, thereby reducing the risk of generating cavity bubbles when setting the protective film material layer 170.
[0066] For some possible implementations, see Figure 4 The driving backplane may further include a side routing layer 160 located on a side of the second planarization layer 140 away from the substrate 110. The second planarization layer 140 includes a second exposed area 141 that is at least partially uncovered by the side routing layer 160. The second exposed area 141 and an end of the side routing layer 160 adjacent to the second exposed area 141 form a second step structure. Optionally, the side routing layer 160 includes a silver paste routing layer and a light shielding layer (e.g., an ink layer) located on a side of the silver paste routing layer away from the substrate 110.
[0067] Optionally, the first exposed area 121 may be located at an edge of the driving backplane.
[0068] Further, optionally, the second exposed area 141 may be located at an edge of the driving backplane.
[0069] That is, at the edge of the driving backplane, where each film layer ends and extends, the first planarization layer 120 and the second planarization layer 140 can form a first step structure, or the second planarization layer 140 and the side wiring layer 160 can form a second step structure, thereby reducing the step difference formed by the end of each film layer at the edge of the array substrate, thereby reducing the risk of cavity bubbles generated at this position when the protective film material layer 170 is set. Please refer to Figure 5 The protective film layer 170 is located on a side of the side wiring layer 160 away from the substrate 110 , and the protective film layer 170 covers the second step structure.
[0070] Based on the above design, in this embodiment, the side routing layer 160 exposes at least a portion of the second planarization layer 140 to form a second step structure, which can alleviate the step change from the side of the side routing layer 160 away from the substrate 110 to the substrate 110, thereby further reducing the risk of cavity bubbles when setting the protective film material layer 170.
[0071] In some possible implementations, the driving back plate includes a bonding surface provided with bonding electrodes and a back surface provided opposite to the bonding surface. Figure 6 , Figure 6 This is a schematic diagram of the bonding surface of the driving backplane. The driving backplane also includes a first side surface 401, a second side surface 402, a third side surface 403 and a fourth side surface 404 connecting the bonding surface and the back surface. The first side surface 401 and the second side surface 402 are arranged opposite to each other, and the third side surface 403 and the fourth side surface 404 are arranged opposite to each other.
[0072] The side routing layer 160 includes a first side routing layer 161 and a second side routing layer 162. The first side routing layer 161 is located on an end of the bonding surface close to the first side surface 401 and extends through the first side surface 401 to the back surface. The second side routing layer 162 is located on an end of the bonding surface close to the second side surface 402 and extends through the second side surface 402 to the back surface.
[0073] On this basis, the first step structure and the second step structure are located at an end of the bonding surface close to the third side surface 403, and / or the first step structure and the second step structure are located at an end of the bonding surface close to the fourth side surface 404. For example, in this embodiment, Figures 2 to 5 Can be Figure 6 Schematic cross-sectional view of the AA position shown.
[0074] For some possible implementations, see Figure 7 The first exposed area 121 of the first planarization layer 120 includes a first sub-area 1211 and a second sub-area 1212 located away from the center of the driving backplane in the first sub-area 1211. The thickness H1 of the first sub-area 1211 is greater than the thickness H2 of the second sub-area 1212. The first sub-area 1211 and the second sub-area 1212 form a third step structure.
[0075] Please refer to Figure 8 The protective film layer 170 covers the third stepped structure. Optionally, in this embodiment, a half-tone mask can be used to etch the first planarization layer 120 to form the third stepped structure. This can further mitigate the film layer step difference, thereby further reducing the risk of cavity bubbles generated when installing the protective film layer 170.
[0076] Alternatively, see Figure 9 In the direction away from the center position of the driving backplate, the width D2 of the second sub-region 1212 is 0.7 microns to 1.4 microns.
[0077] Optionally, in a direction away from the center of the driving backplate, a width D1 of the first sub-region 1211 is greater than or equal to 3 micrometers.
[0078] For some possible implementations, please refer again to Figure 7 The second exposed area 141 of the second planarization layer 140 includes a third sub-area 1411 and a fourth sub-area 1412 located away from the center of the driving backplane in the third sub-area 1411. The thickness H3 of the third sub-area 1411 is greater than the thickness H4 of the fourth sub-area 1412. The third sub-area 1411 and the fourth sub-area 1412 form a fourth step structure.
[0079] Please refer again Figure 8The protective film layer 170 covers the fourth step structure. Optionally, in this embodiment, a half-tone mask can be used to etch the second planarization layer 140 to form the fourth step structure. This can further mitigate the step difference between the film layers, thereby further reducing the risk of cavity bubbles when installing the protective film layer 170.
[0080] Optionally, refer again to Figure 9 In the direction away from the center of the driving backplate, the width D4 of the fourth sub-region 1412 is 0.7 microns to 1.4 microns.
[0081] Optionally, in a direction away from the center of the driving backplate, a width D3 of the third sub-region 1411 is greater than or equal to 3 micrometers.
[0082] For some possible implementations, see Figure 10 The driving backplane further includes at least two array wiring layers located on a side of the first planarization layer 120 away from the substrate 110 , and at least a portion of the second planarization layer 140 is located between the at least two array wiring layers.
[0083] For example, the first array routing layer 130 may be located on a side of the first planarization layer 120 away from the substrate 110. The second planarization layer 140 may be located on a side of the first array routing layer 130 away from the substrate 110, and the second array routing layer 150 may be located on a side of the second planarization layer 140 away from the substrate 110. Optionally, the side routing layer 160 may be located on a side of the second array routing layer 150 away from the substrate 110.
[0084] See Figure 11 This embodiment also provides a method for manufacturing a display panel, which may include the following steps.
[0085] In step S110 , a substrate 110 is provided.
[0086] In step S120 , a first planarization layer 120 is provided on one side of the substrate 110 .
[0087] In step S130, a second planarization layer 140 is provided on a side of the first planarization layer 120 away from the substrate 110, wherein the first planarization layer 120 includes a first exposed area 121 that is at least partially not covered by the second planarization layer 140, and an end of the second planarization layer 140 close to the first exposed area 121 forms a first step structure with the first exposed area 121.
[0088] In step S140 , a protective film layer 170 is disposed on a side of the second planarization layer 140 away from the substrate 110 , and the protective film layer 170 covers the first step structure.
[0089] Optionally, in step S120 , the first planarization layer 120 may be etched using a half-tone mask to form a third stepped structure.
[0090] Alternatively, in step S130 , the second planarization layer 140 may be etched through a half-tone mask to form a fourth step structure.
[0091] For example, taking the first planarization layer 120 as an example, please refer to Figure 12 In this embodiment, the first planarization layer 120 covering the substrate 110 can be first formed, and a photoresist layer 400 can be formed on the side of the first planarization layer 120 away from the substrate 110. The photoresist layer 400 is then exposed and developed using a half-tone mask to form a first etch stop 401 with a larger thickness and a second etch stop 402 with a smaller thickness. Then, under the protection of the first etch stop 401 and the second etch stop 402, the first planarization layer 120 is etched for the first time, thereby removing the portion of the first planarization layer 120 covering the substrate 110.
[0092] Please refer to Figure 13 , the first etch stopper 401 and the second etch stopper 402 can then be uniformly etched and thinned until the second etch stopper 402 is removed. Then, under the protection of the first etch stopper 401, the first planarization layer 120 is etched a second time. During this process, by controlling the etching time and / or etching rate, only the portion of the first planarization layer 120 not covered by the first etch stopper 401 can be etched away, ultimately forming the third stepped structure.
[0093] Accordingly, the process of etching the second planarization layer 140 using a half-tone mask to form the fourth stepped structure is not further described in this embodiment.
[0094] The present application also provides a display panel, comprising the driving backplane provided herein and a light-emitting unit located on one side of the driving backplane. The bonding surface of the driving backplane may be provided with a plurality of bonding electrodes, and the plurality of light-emitting units may be bonded to the plurality of bonding electrodes, respectively. The driving backplane may provide driving power to the light-emitting units via the bonding electrodes to drive the light-emitting units to emit light.
[0095] The present application also provides an electronic device, comprising the display panel provided in the present application. The electronic device may include a device with a display function, such as a television, a monitor, a spliced display screen, a mobile phone, and a tablet computer.
[0096] In summary, the driving backplane and its manufacturing method, display panel and electronic device provided by the present application can alleviate the step change of the film layer structure at the edge of the driving backplane by forming a step structure in part of the film layer structure located at the edge of the driving backplane, thereby reducing the risk of cavity bubbles generated when setting the protective film material layer, improving the sealing between the protective film material layer and the substrate, and reducing the risk of glue overflow in subsequent processes.
[0097] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0098] The above-described embodiments merely illustrate several implementations of the present invention, and while their descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent. It should be noted that a person skilled in the art would be able to make numerous variations and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the patent for this invention shall be determined by the appended claims.
Claims
1. A driving backplane, characterized in that: The driving backplane includes: substrate; a first planarization layer located on one side of the substrate; a second planarization layer located on a side of the first planarization layer away from the substrate, the first planarization layer including a first exposed area at least partially uncovered by the second planarization layer, and an end of the second planarization layer adjacent to the first exposed area forming a first stepped structure with the first exposed area; A protective film layer is located on a side of the second planarization layer away from the substrate, and the protective film layer covers the first step structure.
2. The driving backplane according to claim 1, characterized in that: The driving backplane further comprises a side routing layer located on a side of the second planarization layer away from the substrate, the second planarization layer comprising a second exposed area at least partially uncovered by the side routing layer, and an end of the side routing layer close to the second exposed area forms a second step structure with the second exposed area; The protective film layer is located on a side of the side wiring layer away from the substrate, and the protective film layer covers the second step structure; Preferably, the first exposed area is located at the edge of the driving back plate; Preferably, the second exposed area is located at an edge of the driving backplate.
3. The driving backplane according to claim 1, characterized in that: The first exposed area of the first planarization layer includes a first sub-area and a second sub-area located in the first sub-area away from the center of the driving backplane, the thickness of the first sub-area is greater than the thickness of the second sub-area, and the first sub-area and the second sub-area form a third step structure; the protective film layer covers the third step structure; Preferably, in a direction away from the center of the driving backplate, the width of the second sub-region is 0.7 microns to 1.4 microns; Preferably, in a direction away from the center position of the driving backplate, the width of the first sub-region is greater than or equal to 3 micrometers.
4. The driving backplane according to claim 2, characterized in that: The second exposed area of the second planarization layer includes a third sub-area and a fourth sub-area located away from the center of the driving backplate within the third sub-area, wherein the thickness of the third sub-area is greater than the thickness of the fourth sub-area, and the third sub-area and the fourth sub-area form a fourth step structure; the protective film layer covers the fourth step structure; Preferably, in a direction away from the center of the driving backplate, the width of the fourth sub-region is 0.7 microns to 1.4 microns; Preferably, in a direction away from the center position of the driving backplate, the width of the third sub-region is greater than or equal to 3 micrometers.
5. The driving backplane according to claim 2, characterized in that: The driving back plate includes a bonding surface provided with bonding electrodes and a back surface opposite to the bonding surface, the driving back plate also includes a first side surface, a second side surface, a third side surface and a fourth side surface connecting the bonding surface and the back surface, the first side surface and the second side surface are opposite to each other, and the third side surface and the fourth side surface are opposite to each other; The side routing layer includes a first side routing layer and a second side routing layer; The first side routing layer is located at one end of the bonding surface close to the first side surface and extends through the first side surface to the back surface; The second side routing layer is located at one end of the bonding surface close to the second side surface and extends to the back surface through the second side surface; Preferably, the first step structure and the second step structure are located at an end of the bonding surface close to the third side surface, and / or the first step structure and the second step structure are located at an end of the bonding surface close to the fourth side surface.
6. The driving backplane according to claim 1, characterized in that: The driving backplane further includes at least two array wiring layers located on a side of the first planarization layer away from the substrate, and at least a portion of the second planarization layer is located between the at least two array wiring layers.
7. A method for manufacturing a driving backplane, characterized in that: The method comprises: providing a substrate; Disposing a first planarization layer on one side of the substrate; a second planarization layer is provided on a side of the first planarization layer away from the substrate, the first planarization layer includes a first exposed area that is at least partially uncovered by the second planarization layer, and an end of the second planarization layer close to the first exposed area forms a first step structure with the first exposed area; A protective film layer is disposed on a side of the second planarization layer away from the substrate, and the protective film layer covers the first step structure.
8. The method according to claim 7, characterized in that The method further comprises: etching the first planarization layer through a half-tone mask to form a third step structure; And / or, the second planarization layer is etched through a half-tone mask to form a fourth step structure.
9. A display panel, characterized in that: The display panel includes the driving backplane according to any one of claims 1 to 7 and a light-emitting unit located on one side of the driving backplane.
10. An electronic device, characterized in that: The electronic device includes the display panel according to claim 9.