TBC solar cell introduced with perforated structure and preparation method of TBC solar cell

Abstract

The invention discloses a TBC solar cell introduced with a perforated structure and a preparation method, and belongs to the technical field of solar cells, the TBC solar cell comprises a silicon substrate, the back surface of the silicon substrate is provided with a plurality of first areas and second areas, and non-electrode areas of the first areas are provided with first perforated areas; the first through hole area is composed of a plurality of first suede through holes penetrating through the first tunneling passivation layer, the first doping layer and the first antireflection layer, a plurality of second suede through holes penetrating through the second tunneling passivation layer, the second doping layer and the second antireflection layer are formed in the non-electrode area of the second area, and the second suede through holes are in an inverted pyramid shape. The first perforation area and the second suede perforation are arranged in an equidistant array on the two sides of the metal electrode. A first suede perforated hole array is arranged in a non-electrode region of a P-type region, and inverted pyramid-shaped second suede perforated holes are formed in a non-electrode region of an N-type region, so that a carrier transmission path and a light management mechanism are cooperatively reconstructed, the light capturing capability of the back surface is optimized, and a double-sided factor is improved.

Description

Technical Field

[0001] The present invention relates to a solar cell, and in particular to a TBC solar cell with a perforated structure and a preparation method thereof. Background Art

[0002] Back-contact solar cells (such as IBCs) are among the most efficient crystalline silicon solar cells on the market. They place both positive and negative metal electrodes on the back of the cell, completely eliminating front-side gridline shading losses. Optimizing the back-side electrode design reduces series resistance and improves fill factor. However, this structure is limited by recombination losses and surface passivation at the metal-semiconductor contact region, hindering further efficiency gains.

[0003] TOPCon solar cells utilize a passivated contact structure composed of a tunneling silicon oxide layer (SiOx) and a heavily doped polysilicon layer (polySi) on the back of the cell, significantly reducing surface and metal contact recombination, thereby improving open-circuit voltage and conversion efficiency. While TOPCon technology has achieved high efficiency, the significant parasitic absorption of long-wavelength light (>1000nm) by the polysilicon layer makes it difficult to apply to the front surface of the cell, limiting continued efficiency improvements.

[0004] TBC solar cells combine the advantages of a back-contact structure and TOPCon passivation contact technology, sequentially constructing an ultra-thin tunneling passivation layer and a doped polysilicon layer on the back of a silicon substrate. By combining the back-contact solar cell and the passivation contact technology of TOPCon cells, TBC solar cells can further improve solar energy conversion efficiency. TBC solar cells primarily add an ultra-thin tunneling passivation layer between the back of the silicon substrate and the doped layer, and then deposit a doped polysilicon layer on top of the tunneling passivation layer. Most existing research and applications of doped polysilicon layers in TBC solar cells are based on TOPCon cells. These cells utilize the passivation contact structure consisting of an ultra-thin tunneling passivation layer (SiOx) and a heavily doped silicon thin film layer (polySi) to promote carrier transport. However, this is extremely sensitive to the heavily doped silicon thin film (polySi) and has very high thickness requirements. The heavily doped silicon thin film (polySi) generally needs to be at least 120nm to achieve a good passivation effect. Once the threshold is exceeded, the conversion efficiency will drop rapidly. An excessively thick poly passivation layer will extend the carrier transmission path and increase parasitic absorption in the long-wave band, reducing the short-circuit current density. An excessively thin poly passivation layer will weaken the passivation effect and increase the risk of burn-through. Summary of the Invention

[0005] To overcome the problems in the prior art where an excessively thick poly passivation layer prolongs the carrier transmission path and increases parasitic absorption in the long-wave band, thereby reducing the short-circuit current density, while an excessively thin poly passivation layer weakens the passivation effect and increases burn-through, the present invention provides a TBC solar cell with a perforated structure and a method for preparing the same, as follows:

[0006] A TBC solar cell with a perforated structure includes a silicon substrate, wherein a plurality of first and second regions are provided on the back side of the silicon substrate. The first and second regions have opposite polarities and are arranged alternately in the transverse direction. A third region for isolation is provided at each junction. The first, second, and third regions on the back side of the silicon substrate all extend outward. The first region includes a first tunneling passivation layer, a first doped layer, and a first anti-reflection layer stacked in sequence on the back side of the silicon substrate. The second region includes a second tunneling passivation layer, a second doped layer, and a second anti-reflection layer stacked in sequence on the back side of the silicon substrate. Metal electrodes are provided in the middle of each of the first and second anti-reflection layers. The thickness of each of the first and second doped layers is 150 to 300 nm.

[0007] A first perforated area is provided in the non-electrode area of ​​the first region, and the first perforated area is composed of a plurality of first suede perforations penetrating the first tunnel passivation layer, the first doped layer and the first anti-reflection layer. A plurality of second suede perforations penetrating the second tunnel passivation layer, the second doped layer and the second anti-reflection layer are provided in the non-electrode area of ​​the second region, and the second suede perforations are in an inverted pyramid shape. The first perforated area and the second suede perforations are arranged in an equidistant array on both sides of the metal electrode.

[0008] Furthermore, the density of the arrays of the first perforated area and the second suede perforations is 8.2×10 4 ~3×10 5 Pieces / cm².

[0009] Furthermore, the diameters of the first perforated region and the second suede perforations are 0.5-5 μm, and the areas of the first perforated region and the second suede perforations account for 5-20% of the total area of ​​the non-electrode region.

[0010] Furthermore, the inner walls of the first suede perforations and the second suede perforations both have a submicron suede structure, and the submicron suede structure increases the reflectivity of long-wave light in the 1100-1200 nm band by 15%.

[0011] Furthermore, the density ratio of the first suede perforations to the second suede perforations is (1.5-2.0):1.

[0012] Furthermore, the inner wall roughness of the first suede perforation and the second suede perforation is 0.5-2 μm.

[0013] The present application also provides a method for preparing the TBC solar cell as described above, comprising the following steps:

[0014] Step 1: Select a silicon substrate and place it in a tank-type alkaline solution for polishing;

[0015] Step 2: depositing a first passivation layer and a first doping layer in sequence on the back side of the silicon substrate;

[0016] Step 3: depositing a BSG layer on the back side of the silicon substrate;

[0017] Step 4: ablating the back surface of the silicon substrate with a laser beam, and etching the silicon substrate with an alkaline solution to form a first unablated area, a second area exposing the silicon substrate, and a third area exposing the silicon substrate;

[0018] Step 5: depositing a second passivation layer, a second doping layer and a PSG layer on the back side of the silicon substrate in sequence;

[0019] Step 6: ablating the PSG layer in the first and third regions using a pulsed laser, and etching the front and side surfaces of the silicon substrate using an acid solution to expose the front and side surfaces of the silicon substrate and the silicon substrate in the third region, respectively;

[0020] Step 7: ablating the PSG layer in the second area on the back side of the silicon substrate using a laser beam;

[0021] Step 8: Clean the surface of the first area with an alkaline solution and the surface of the third area with an acid solution; chemically etch the overlapping area of ​​the light spots formed in step 6 in the first area to form a through structure and simultaneously perform texturing to obtain a first velvet perforation with a submicron velvet surface on the inner wall; chemically etch the laser ablation point in step 7 in the second area to form an inverted pyramid-shaped second velvet perforation and simultaneously perform texturing; texturing the exposed silicon surface of the front side of the silicon substrate and the third area;

[0022] Step 9: depositing a passivation layer and an anti-reflection layer on the front and back sides of the silicon substrate;

[0023] Step 10: Perform slurry printing and metal sintering.

[0024] Furthermore, the wavelength of the laser in step 4 and step 6 is 355nm or 532nm, the pulse width is 5-30ps, the spot size is 150-300μm, and the energy density is 4×10³~1.2×10 4 J / m², the spot overlap rate is 0~80%.

[0025] Furthermore, the wavelength of the laser in step 7 is 355nm or 532nm, the pulse width is 5-30ps, the spot size is 0.5-5μm, and the energy density is 4×10³~1.2×104 J / m², the spot overlap rate is 0~80%.

[0026] Furthermore, in step eight, etching is performed using a 1-5 wt % alkaline solution at 60-80° C. for 300-600 seconds to form a submicron textured structure.

[0027] The beneficial effects produced by the technical solution of the present invention are as follows:

[0028] (1) The present invention sets a first velvet perforation array in the non-electrode area of ​​the P-type region and sets an inverted pyramid-shaped second velvet perforation in the non-electrode area of ​​the N-type region, thereby synergistically reconstructing the carrier transmission path and the light management mechanism. The perforation structure directly reduces the material volume of the thickened polysilicon layer, breaks its optical barrier to long-wavelength light, and reduces the parasitic absorption loss of long-wavelength light; the submicron-level velvet structure formed by chemical etching on the inner wall of the perforation significantly enhances the light scattering ability, improves the long-wavelength reflectivity, optimizes the back light capture ability and improves the double-sided factor.

[0029] (2) The holes penetrate the polysilicon layer directly to the silicon substrate, providing a vertical short-path channel for carriers, shortening the transmission distance and significantly reducing the probability of body recombination; the polysilicon layer is thickened to completely avoid the risk of burn-through, ensure the stability of the passivation contact, and increase the open circuit voltage.

[0030] (3) Laser engraving technology precisely controls the perforation morphology. Through the partitioning strategy of large spot overlap-induced etching (P-type area) and small spot direct ablation (N-type area), the simultaneous preparation of perforations with different morphologies is achieved. This process is highly compatible with the existing TOPCon production line and can improve the conversion efficiency without adding complex equipment. It breaks through the thickness sensitive range limitation of the polysilicon layer and enables the coordinated optimization of passivation reliability and optoelectronic performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0032] Figure 1 This is a cross-sectional structural diagram of a TBC solar cell of the present invention;

[0033] Figure 2 This is a schematic diagram of the carrier transmission path of the TBC battery of the present invention;

[0034] Figure 3 is a 3D schematic diagram of the first suede perforation of the present invention;

[0035] Figure 4 is a 3D schematic diagram of the second suede perforation of the present invention;

[0036] Among them, 1. silicon substrate; 2. first region; 3. second region; 4. third region; 5. first tunnel passivation layer; 6. first doping layer; 7. first anti-reflection layer; 8. second tunnel passivation layer; 9. second doping layer; 10. second anti-reflection layer; 11. metal electrode; 12. perforated region; 13. first suede perforation; 14. second suede perforation. DETAILED DESCRIPTION

[0037] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in combination with the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0038] This embodiment effectively eliminates the optical barrier of the thickened polysilicon layer by introducing a first perforated area and a second velvet perforated area in the non-electrode area, directly reducing the volume of the polysilicon material and significantly reducing the parasitic absorption loss of long-wavelength light. The submicron-scale velvet structure formed on the inner walls of the first and second velvet perforated areas enhances light scattering and improves back reflectivity. At the same time, the velvet perforated areas optimize light capture and carrier collection, significantly improving the two-sidedness factor. Specific implementation methods are as follows:

[0039] Reference Figures 1 to 4 As shown, a TBC solar cell with a perforated structure includes a silicon substrate 1. The back side of the silicon substrate 1 is provided with a plurality of first regions 2 and a plurality of second regions 3. The first regions 2 and the second regions 3 have opposite polarities and are arranged alternately in the transverse direction. A third region 4 for isolation is provided at the connection points. The first regions 2, the second regions 3, and the third regions 4 on the back side of the silicon substrate 1 all extend outward. The first region 2 includes a first tunneling passivation layer 5, a first doping layer 6, and a first anti-reflection layer 7 stacked in sequence on the back side of the silicon substrate 1. The second region 3 includes a second tunneling passivation layer 8, a second doping layer 9, and a second anti-reflection layer 10 stacked in sequence on the back side of the silicon substrate 1. A metal electrode 11 is provided in the middle of the first anti-reflection layer 7 and the second anti-reflection layer 10. The thickness of the first doping layer 6 and the second doping layer 9 is 150-300 nm.

[0040] A first perforated region 12 is provided in the non-electrode area of ​​the first region 2, and the first perforated region 12 is composed of a plurality of first suede perforations 13 penetrating the first tunnel passivation layer 5, the first doping layer 6 and the first anti-reflection layer 7. A plurality of second suede perforations 14 penetrating the second tunnel passivation layer 8, the second doping layer 9 and the second anti-reflection layer 10 are provided in the non-electrode area of ​​the second region 3, and the second suede perforations 14 are in an inverted pyramid shape. The first perforated region 12 and the second suede perforations 14 are arranged in an equidistant array on both sides of the metal electrode 11.

[0041] Here, the non-electrode area refers to the back surface area not covered by the metal electrode 11; the first area 2 refers to, for example, a P-type doped area (corresponding to B doping), and the second area 3 refers to, for example, an N-type doped area (corresponding to P doping).

[0042] As a preferred embodiment, the density of the arrays of the first perforated area 12 and the second suede perforations 14 is 8.2×10 4 ~3×10 5 Pieces / cm².

[0043] Here, when the thickness of the first doping layer 6 or the second doping layer 9 is 180 nm, the density of the first perforated region 12 and the second textured perforations 14 is 250,000-270,000 per cm².

[0044] As a preferred embodiment, the diameters of the first perforated region 12 and the second suede perforations 14 are 0.5-5 μm, and the total area of ​​the first perforated region 12 and the second suede perforations 14 accounts for 5-20% of the total area of ​​the non-electrode region.

[0045] The diameters of the first perforated area 12 and the second suede perforations 14 are set within a narrow range of 0.6-5 μm to maintain laser processing accuracy, avoiding either too small a diameter causing processing difficulties or too large a diameter weakening mechanical strength. This ensures that the suede holes evenly cover the non-electrode area. The diameter, spacing, and area ratio together form a triangular constraint for optical, electrical, and mechanical stability.

[0046] As a preferred embodiment, the inner walls of the first suede perforations 13 and the second suede perforations 14 both have a submicron suede structure, which increases the reflectivity of long-wave light in the 1100-1200 nm band by 15%.

[0047] Here, chemical etching forms a velvet surface, which upgrades the first velvet surface perforation 13 and the second velvet surface perforation 14 from passive openings to active reflective structures, directionally improving the reflectivity in the 1100~1200nm long-wave band, compensating for the optical loss caused by the thickening of the polysilicon layer, and significantly improving the back light capture.

[0048] As a preferred embodiment, the density ratio of the first suede perforations 13 to the second suede perforations 14 is (1.5-2.0):1.

[0049] As a preferred embodiment, the inner wall roughness of the first suede perforation 13 and the second suede perforation 14 is 0.5-2 μm.

[0050] This embodiment also provides a method for preparing the above TBC solar cell, comprising the following steps:

[0051] Step 1: Select a silicon substrate 1 and place it in a tank-type alkaline solution for polishing;

[0052] Step 2: depositing a first passivation layer and a first doping layer 6 on the back side of the silicon substrate 1 in sequence;

[0053] Step 3: depositing a BSG layer on the back side of the silicon substrate 1;

[0054] Step 4: ablating the back surface of the silicon substrate 1 with a laser beam, and etching the silicon substrate 1 with an alkaline solution to form an unablated first area 2, a second area 3 exposing the silicon substrate 1, and a third area 4 exposing the silicon substrate 1;

[0055] Step 5: depositing a second passivation layer, a second doping layer 9 and a PSG layer in sequence on the back side of the silicon substrate 1;

[0056] Step 6: ablating the PSG layer in the first region 2 and the third region 4 with a pulsed laser, and etching the front and side surfaces of the silicon substrate 1 with an acid solution to expose the front and side surfaces of the silicon substrate 1 and the silicon substrate 1 in the third region 4, respectively;

[0057] Step 7: ablating the PSG layer in the second region 3 on the back side of the silicon substrate 1 using a laser beam;

[0058] Step 8: Clean the surface of the first region 2 with an alkaline solution and the surface of the third region 4 with an acid solution; chemically etch the overlapping area of ​​the light spot formed in step 6 in the first region 2 to form a through structure and simultaneously perform texturing to obtain a first textured perforation 13 with a submicron textured inner wall; chemically etch the laser ablation point in step 7 in the second region 3 to form an inverted pyramid-shaped second textured perforation 14 and simultaneously perform texturing; texturing the exposed silicon surface of the front surface of the silicon substrate 1 and the third region 4;

[0059] Step 9: depositing a passivation layer and an anti-reflection layer on the front and back surfaces of the silicon substrate 1;

[0060] Step 10: Perform slurry printing and metal sintering.

[0061] Here, the first region (P-type region) 2 is perforated by ablating the PSG layer with a large overlapping laser beam in step 6 (with a spot overlap ratio of 10% to 50%), so that the overlapping region is preferentially penetrated in the chemical etching in step 8, thereby forming a first textured perforation 13. The second region (N-type region) 3 is perforated by directly ablating the PSG layer with a small laser beam in step 7 (with a spot size of 0.5 to 5 μm), which is then expanded into a second textured perforation 14 in the chemical etching in step 8.

[0062] As a preferred embodiment, the wavelength of the laser in step 4 and step 6 is 355nm or 532nm, the pulse width is 5-30ps, the spot size is 150-300μm, and the energy density is 4×10³~1.2×10 4 J / m², spot overlap rate 0~80%.

[0063] As a preferred embodiment, the laser wavelength in step seven is 355nm or 532nm, the pulse width is 5-30ps, the spot size is 0.5-5μm, and the energy density is 4×10³~1.2×10 4 J / m², spot overlap rate 0~80%.

[0064] Here, different perforation formation strategies are adopted in the P-type region and the N-type region (large spot overlapping to induce etching, small spot direct ablation guidance), which is the key to achieving perforations in different regions and different morphologies.

[0065] As a preferred embodiment, in step eight, etching is performed using a 1-5 wt % alkaline solution at 60-80° C. for 300-600 seconds to form a submicron textured structure.

[0066] Example 1

[0067] A method for preparing a TBC solar cell comprises the following steps:

[0068] Step 1: Select a single crystal silicon wafer with a resistivity of 30Ω·cm and place it in a bath of NaOH alkaline solution for polishing;

[0069] Step 2: Deposit a 5nm first passivation layer and a 180nm first doping layer 6 on the entire back side of the single crystal silicon wafer in sequence. The doping element is B and the doping concentration is 7E19cm -3 ;

[0070] Step 3: Deposit a 50nm thick BSG layer on the back of the single crystal silicon wafer;

[0071] Step 4: Use a laser beam to ablate the BSG layer of the N-type region (second region) doped with B element on the back of the single crystal silicon wafer and the third region (isolation region) 4 of the textured silicon substrate 1 that isolates the N-type region and the P-type region (first region) doped with B element. The laser beam uses a pulsed laser with a pulse width of 5ps, a wavelength of 532nm, a spot size of 200μm, and an energy density of 6×10 3 J / m 2 , the overlap rate is 30%; NaOH is used to etch the single crystal silicon wafer. A 20nm BSG layer still exists on the surface of the P-type region. The P-type region and the third region 4 expose the single crystal silicon wafer, and the surface height of the P-type region is 2μm higher than the surface height of the N-type region.

[0072] Step 5: Deposit a 5nm second passivation layer and a 180nm second doping layer 9 on the entire back side of the single crystal silicon wafer in sequence. The doping element is P element with a doping concentration of 1E21cm -3 , and a PSG layer having a thickness of 50 nm;

[0073] Step 6: Use a laser beam to ablate the PSG layer of the P-type region and the third region 4 on the back side of the single crystal silicon wafer. The laser beam uses a pulsed laser with a pulse width of 5ps, a wavelength of 532nm, a spot size of 200μm, and an energy density of 4×10 3 J / m 2 The spot overlap rate is 10%. At this time, the spot overlap rate is 10%. Due to the multiple laser exposures in the overlapping areas, a perforation effect will appear in the overlapping areas of the P-type region during subsequent alkaline corrosion. HF and HNO3 are used to etch the front and side surfaces of the single-crystal silicon wafer, respectively exposing the front and side surfaces of the single-crystal silicon wafer.

[0074] Step 7: Laser ablation is performed on the PSG in the N-type region. The laser beam adopts a pulsed laser with a pulse width of 5 ps, a wavelength of 532 nm, a spot size of 0.5 μm, and an energy density of 4×10 3 J / m 2 , the spot overlap rate is 10%;

[0075] Step 8: Use alkali solution and strong acid to clean the front side of the single crystal silicon wafer, the third area 4, the spot overlap area of ​​the P-type region, and the laser active area of ​​the N-type region, and then perform texturing to form the first textured perforations 13 and the second textured perforations 14. After texturing, the textured reflectivity of the front side of the silicon substrate 1 is 8%, the density of the first textured perforation area 12 of the P-type region, and the density of the second textured perforations 14 in the laser active area of ​​the N-type region are approximately 8.2×10 4 / cm², the surface heights of the P-type region and the N-type region are 2μm higher than the surface height of the third region 4.

[0076] Step 9: Using ALD process, a front passivation layer and a back passivation layer with a thickness of 5 nm are deposited on the front and back of the single crystal silicon wafer respectively;

[0077] Step 10: Using a PECVD process, a front anti-reflection layer and a back anti-reflection layer with a thickness of 70 nm are deposited on the front and back sides of the single crystal silicon wafer respectively;

[0078] Step 11: Print slurry and perform metal sintering on the single crystal silicon wafer.

[0079] Example 2

[0080] A method for preparing a TBC solar cell comprises the following steps:

[0081] Step 1: Select a single crystal silicon wafer with a resistivity of 30Ω·cm and place it in a bath of NaOH alkaline solution for polishing;

[0082] Step 2: Deposit a 5nm first passivation layer and a 180nm first doping layer 6 on the entire back side of the single crystal silicon wafer in sequence. The doping element is B and the doping concentration is 7E19cm -3 ;

[0083] Step 3: Deposit a 50nm thick BSG layer on the back of the single crystal silicon wafer;

[0084] Step 4: Use a laser beam to ablate the BSG layer of the third region 4 of the textured silicon substrate 1 that isolates the N-type region and the P-type region doped with B on the back of the single crystal silicon wafer. The laser beam uses a pulsed laser with a pulse width of 5 ps, a wavelength of 532 nm, a spot size of 200 μm, and an energy density of 6×10 3 J / m 2 , the spot overlap rate is 50%; NaOH is used to etch the single crystal silicon wafer. A 20nm BSG layer still exists on the surface of the P-type region. The N-type region and the third region 4 expose the single crystal silicon wafer, and the surface height of the P-type region is 2μm higher than that of the N-type region.

[0085] Step 5: Deposit a 5nm second passivation layer and a 180nm second doping layer 9 on the entire back side of the single crystal silicon wafer in sequence. The doping element is P element with a doping concentration of 1E21cm -3 , and a PSG layer having a thickness of 50 nm;

[0086] Step 6: Use a laser beam to ablate the PSG layer of the P-type region and the third region 4 on the back side of the single crystal silicon wafer. The laser beam uses a pulsed laser with a pulse width of 5ps, a wavelength of 532nm, a spot size of 200μm, and an energy density of 4×10 3 J / m 2The spot overlap rate is 30%. At this time, due to the multiple laser beams acting on the overlapping areas, a perforation effect will appear in the overlapping areas of the P-type region during subsequent alkaline etching. HF and HNO3 are used to etch the front and side surfaces of the single-crystal silicon wafer, respectively exposing the single-crystal silicon wafer on the front and side surfaces.

[0087] Step 7: Laser ablation of PSG in the N-type region is performed. The laser beam adopts a pulsed laser with a pulse width of 5ps, a wavelength of 532nm, a spot size of 0.5μm, and an energy density of 4×10 3 J / m 2 , the spot overlap rate is 20%;

[0088] Step 8: Use alkali solution and strong acid to clean the front side of the single crystal silicon wafer, the third area 4, the spot overlap area of ​​the P-type area, and the laser action area of ​​the N-type area in turn, and perform texturing to form the first textured surface perforation 13 and the second textured surface perforation 14. After texturing, the textured surface reflectivity of the front side of the silicon substrate 1 is 8%, the density of the first textured surface perforation area 12 of the P-type area, and the density of the second textured surface perforation 14 of the laser action area of ​​the N-type area are about 2.6×10 5 / cm². The surface height of the P-type region and the N-type region is 2μm higher than the surface height of the third region 4;

[0089] Step 9: Using ALD process, a front passivation layer and a back passivation layer with a thickness of 5 nm are deposited on the front and back of the single crystal silicon wafer respectively;

[0090] Step 10: Using a PECVD process, a front anti-reflection layer and a back anti-reflection layer with a thickness of 70 nm are deposited on the front and back sides of the single crystal silicon wafer respectively;

[0091] Step 11: Print slurry and perform metal sintering on the single crystal silicon wafer.

[0092] Example 3

[0093] A method for preparing a TBC solar cell comprises the following steps:

[0094] Step 1: Select a single crystal silicon wafer with a resistivity of 30Ω·cm and place it in a bath of NaOH alkaline solution for polishing;

[0095] Step 2: Deposit a 5nm first passivation layer and a 180nm first doping layer 6 on the entire back side of the single crystal silicon wafer in sequence. The doping element is B and the doping concentration is 7E19cm -3 ;

[0096] Step 3: Deposit a 50nm thick BSG layer on the back of the single crystal silicon wafer;

[0097] Step 4: Use a laser beam to ablate the BSG layer of the third region 4 of the textured silicon substrate 1 that isolates the N-type region and the P-type region doped with B on the back of the single crystal silicon wafer. The laser beam uses a pulsed laser with a pulse width of 5 ps, a wavelength of 532 nm, a spot size of 200 μm, and an energy density of 6×10 3 J / m 2 , the spot overlap rate is 50%; NaOH is used to etch the single crystal silicon wafer. A 20nm BSG layer still exists on the surface of the P-type region. The N-type region and the third region 4 expose the single crystal silicon wafer, and the surface height of the P-type region is 2μm higher than that of the N-type region.

[0098] Step 5: Deposit a 5nm second passivation layer and a 180nm second doping layer 9 on the entire back side of the single crystal silicon wafer in sequence. The doping element is P element with a doping concentration of 1E21cm -3 , and a PSG layer having a thickness of 50 nm;

[0099] Step 6: Use a laser beam to ablate the PSG layer of the P-type region and the third region 4 on the back side of the single crystal silicon wafer. The laser beam uses a pulsed laser with a pulse width of 5ps, a wavelength of 532nm, a spot size of 200μm, and an energy density of 4×10 3 J / m 2 The spot overlap rate is 50%. Since the spot overlap rate is 50% at this time, the spot overlap area will have a perforation effect in the P-type area due to multiple laser exposures during subsequent alkaline corrosion. HF and HNO3 are used to etch the front and side surfaces of the single-crystal silicon wafer, respectively exposing the single-crystal silicon wafer on the front and side surfaces.

[0100] Step 7: Laser ablation of PSG in the N-type region is performed. The laser beam adopts a pulsed laser with a pulse width of 5ps, a wavelength of 532nm, a spot size of 5μm, and an energy density of 4×10 3 J / m 2 , the spot overlap rate is 30%;

[0101] Step 8: Use alkali solution and strong acid to clean the front side of the single crystal silicon wafer, the third area 4, the overlapping area of ​​the light spot in the P-type region in step 6, and the laser active area in the N-type region in step 7, and then perform texturing to form the first textured perforation 13 and the second textured perforation 14. After texturing, the textured reflectivity of the front side of the silicon substrate 1 is 8%, the density of the first textured perforation area 12 overlapping the light spot in the P-type region and the density of the second textured perforation 14 in the laser active area in the N-type region are approximately 3.0×10 5 / cm². The surface height of the P-type region and the N-type region is 2μm higher than the surface height of the third region 4;

[0102] Step 9: Using the ALD process, a front passivation layer and a back passivation layer with a thickness of 5 nm are deposited on the front and back of the single crystal silicon wafer respectively;

[0103] Step 10: Using a PECVD process, a front anti-reflection layer and a back anti-reflection layer with a thickness of 70 nm are deposited on the front and back sides of the single crystal silicon wafer respectively;

[0104] Step 11: Print slurry and perform metal sintering on the single crystal silicon wafer.

[0105] Comparative Example 1

[0106] A method for preparing a TBC solar cell comprises the following steps:

[0107] Step 1: Select a single crystal silicon wafer with a resistivity of 30Ω·cm and place it in a bath of NaOH alkaline solution for polishing;

[0108] Step 2: Deposit a 5nm first passivation layer and a 100nm first doping layer 6 on the entire back side of the single crystal silicon wafer in sequence. The doping element is B and the doping concentration is 7E19cm -3 ;

[0109] Step 3: Deposit a 50nm thick BSG layer on the back of the single crystal silicon wafer;

[0110] Step 4: Use a laser beam to ablate the BSG layer of the third region 4 of the textured silicon substrate 1 that isolates the N-type region and the P-type region doped with B on the back of the single crystal silicon wafer. The laser beam uses a pulsed laser with a pulse width of 5 ps, a wavelength of 532 nm, a spot size of 200 μm, and an energy density of 6×10 3 J / m2, with a spot overlap rate of 50%. A single-crystal silicon wafer was etched using NaOH. A 20nm BSG layer still existed on the surface of the P-type region, while the N-type region and the third region 4 exposed the single-crystal silicon wafer. The surface height of the P-type region was 2μm higher than that of the N-type region.

[0111] Step 5: Deposit a 5nm second passivation layer and a 100nm second doping layer 9 on the entire back side of the single crystal silicon wafer in sequence. The doping element is P element with a doping concentration of 1E21cm -3 , and a PSG layer having a thickness of 50 nm;

[0112] Step 6: Use a laser beam to ablate the PSG layer of the P-type region and the third region 4 on the back side of the single crystal silicon wafer. The laser beam uses a pulsed laser with a pulse width of 5ps, a wavelength of 532nm, a spot size of 200μm, and an energy density of 4×10 3 J / m 2, the spot overlap rate is 0%. Since the spot overlap rate is 0% at this time, no perforation effect will occur in the first area 2 during subsequent alkaline etching; HF and HNO3 are used to etch the front and side surfaces of the single crystal silicon wafer, respectively exposing the single crystal silicon wafer on the front and side surfaces;

[0113] Step 7: Use alkaline solution and strong acid to clean and texture the front surface of the single crystal silicon wafer and the third region 4 in sequence. After texturing, the texture reflectivity of the front surface of the silicon substrate 1 is 8%, and the surface height of the N-type region is 2 μm higher than the surface height of the third region 4.

[0114] Step 8: Using ALD process, a front passivation layer and a back passivation layer with a thickness of 5 nm are deposited on the front and back of the single crystal silicon wafer respectively;

[0115] Step 9: Using PECVD process, a front anti-reflection layer and a back anti-reflection layer with a thickness of 70 nm are deposited on the front and back of the single crystal silicon wafer respectively;

[0116] Step 10: Print slurry and perform metal sintering on the single crystal silicon wafer.

[0117] Comparative Example 2

[0118] A method for preparing a TBC solar cell comprises the following steps:

[0119] Step 1: Select a single crystal silicon wafer with a resistivity of 30Ω·cm and place it in a bath of NaOH alkaline solution for polishing;

[0120] Step 2: Deposit a 5nm first passivation layer and a 180nm first doping layer 6 on the entire back side of the single crystal silicon wafer in sequence. The doping element is B and the doping concentration is 7E19cm -3 ;

[0121] Step 3: Deposit a 50nm thick BSG layer on the back of the single crystal silicon wafer;

[0122] Step 4: Use a laser beam to ablate the BSG layer of the third region 4 of the textured silicon substrate 1 that isolates the N-type region and the P-type region doped with B on the back of the single crystal silicon wafer. The laser beam uses a pulsed laser with a pulse width of 5 ps, a wavelength of 532 nm, a spot size of 200 μm, and an energy density of 6×10 3 J / m 2 , the spot overlap rate is 50%; NaOH is used to etch the single crystal silicon wafer. A 20nm BSG layer still exists on the surface of the P-type region. The N-type region and the third region 4 expose the single crystal silicon wafer, and the surface height of the P-type region is 2μm higher than that of the N-type region.

[0123] Step 5: Deposit a 5nm second passivation layer and a 180nm second doping layer 9 on the entire back side of the single crystal silicon wafer in sequence. The doping element is P element with a doping concentration of 1E21cm -3 , and a PSG layer having a thickness of 50 nm;

[0124] Step 6: Use a laser beam to ablate the PSG layer of the P-type region and the third region 4 on the back side of the single crystal silicon wafer. The laser beam uses a pulsed laser with a pulse width of 5ps, a wavelength of 532nm, a spot size of 200μm, and an energy density of 4×10 3 J / m 2 , the spot overlap rate is 0%, and HF and HNO3 are used to etch the front and side surfaces of the single crystal silicon wafer, respectively exposing the single crystal silicon wafer on the front and side surfaces, as well as the single crystal silicon wafer in the third region 4;

[0125] Step seven: Use alkaline solution and strong acid to clean and texture the front side of the single crystal silicon wafer and the third region 4 in turn. After texture, the texture reflectivity of the front side of the silicon substrate 1 is 8%, the surface height of the N-type region is 2μm higher than the surface height of the third region 4, the overlap rate of the light spot is 0%, and there will be no perforation effect in the P-type region during alkaline corrosion.

[0126] Step 8: Using ALD process, a front passivation layer and a back passivation layer with a thickness of 5 nm are deposited on the front and back of the single crystal silicon wafer respectively;

[0127] Step 9: Using PECVD process, a front anti-reflection layer and a back anti-reflection layer with a thickness of 70 nm are deposited on the front and back of the single crystal silicon wafer respectively;

[0128] Step 10: Print slurry and perform metal sintering on the single crystal silicon wafer.

[0129] The performance of the TBC solar cells prepared in Examples 1 to 3 and Comparative Examples 1 to 2 is tested below. The test data are shown in Table 1:

[0130] Table 1. Performance data of TBC solar cells in Examples and Comparative Examples

[0131] Test items Example 1 Example 2 Example 3 Comparative Example 1 Comparative Example 2 Density of perforations in the first perforated area and the second suede surface (perforations / cm²) <![CDATA[8.2×10 4 ]]> <![CDATA[2.6×10 5 ]]> <![CDATA[3.0×10 5 ]]> 0 0 Polysilicon thickness (nm) 180 180 180 100 180 Carrier transport path (μm) 100-130 100-130 100-130 120-150 120-150 Parasitic absorption rate (%) 6.20 4.50 3.60 8.20 12.50 Double-sided rate (%) 73.40 75.80 76.10 68.50 60.80 Passivation layer burn-through rate (%) 0.10 0.10 0.10 2.20 0.10 Conversion efficiency (%) 26.75 26.88 26.82 26.63 26.53 Open circuit voltage Voc (mV) 746 745 742 745 749 Current density Jsc (mA / cm²) 41.9 42.06 42.08 41.82 41.68 Filling factor FF (%) 85.60 85.80 85.90 85.50 85.00

[0132] It can be seen from Table 1 that when the first textured surface perforation structure and the second textured surface perforation structure are not introduced, increasing the thickness of the doping layer is beneficial to improving the passivation effect, but it will bring additional parasitic absorption, resulting in a decrease in overall efficiency.

[0133] When the first suede perforation and the second suede perforation structure are introduced, the density of the first perforation area and the second suede perforation is 2.6×10 5 / cm², the efficiency is increased by 0.25%, the overall performance is optimal, and the density is increased to 3.0×10 5When the number of nanoparticles / cm² is increased, the optical performance is enhanced, but the passivation performance shows a large downward trend, resulting in no efficiency advantage.

[0134] Among them, the parasitic absorption rate of comparative example 2 (polysilicon thickness 180nm + no perforation) is as high as 12.50%, proving that thickening the polysilicon layer requires relying on the perforation structure to offset the optical loss; the perforation density of Example 2 is 2.6×10 5 The efficiency is optimal (26.88%) when the number of particles / cm² is less than 100 nm.

[0135] The present invention is further described above with the aid of specific embodiments. However, it should be understood that the specific description herein should not be construed as limiting the essence and scope of the present invention. Various modifications made to the above embodiments by ordinary technicians in this field after reading this specification are all within the scope of protection of the present invention.

Claims

1. A TBC solar cell with a perforated structure, comprising a silicon substrate, wherein a plurality of first and second regions are provided on the back of the silicon substrate, wherein the first and second regions have opposite polarities and are arranged alternately in the transverse direction, and a third region is provided at each junction for isolation, wherein the first, second, and third regions on the back of the silicon substrate all extend outward, characterized in that: The first region includes a first tunneling passivation layer, a first doped layer, and a first anti-reflection layer sequentially stacked on the back of the silicon substrate; the second region includes a second tunneling passivation layer, a second doped layer, and a second anti-reflection layer sequentially stacked on the back of the silicon substrate; a metal electrode is provided in the middle of the first anti-reflection layer and the second anti-reflection layer; and the thickness of the first doped layer and the second doped layer are both 150 to 300 nm; A first perforated area is provided in the non-electrode area of ​​the first region, and the first perforated area is composed of a plurality of first suede perforations penetrating the first tunnel passivation layer, the first doped layer and the first anti-reflection layer. A plurality of second suede perforations penetrating the second tunnel passivation layer, the second doped layer and the second anti-reflection layer are provided in the non-electrode area of ​​the second region, and the second suede perforations are in an inverted pyramid shape. The first perforated area and the second suede perforations are arranged in an equidistant array on both sides of the metal electrode.

2. The TBC solar cell according to claim 1, characterized in that: The density of the arrays of the first perforated area and the second suede perforations is 8.2×10 4 ~3×10 5 Pieces / cm².

3. The TBC solar cell according to claim 1, characterized in that: The diameters of the first perforated region and the second suede perforations are 0.5-5 μm, and the areas of the first perforated region and the second suede perforations account for 5-20% of the total area of ​​the non-electrode region.

4. The TBC solar cell according to claim 1, characterized in that: The inner walls of the first suede perforations and the second suede perforations both have a submicron suede structure, and the submicron suede structure increases the reflectivity of long-wave light in the 1100-1200 nm band by 15%.

5. The TBC solar cell according to claim 4, characterized in that: The density ratio of the first suede perforations to the second suede perforations is (1.5-2.0):

1.

6. The TBC solar cell according to claim 4, characterized in that: The inner wall roughness of the first suede perforation and the second suede perforation is 0.5-2 μm.

7. A method for preparing the TBC solar cell according to any one of claims 1 to 6, characterized in that: The following steps are involved: Step 1: Select a silicon substrate and place it in a tank-type alkaline solution for polishing; Step 2: depositing a first passivation layer and a first doping layer in sequence on the back side of the silicon substrate; Step 3: depositing a BSG layer on the back side of the silicon substrate; Step 4: using a laser beam to perform interval ablation on the back side of the silicon substrate, and using an alkaline solution to etch the silicon substrate to form a first unablated area, a second area exposing the silicon substrate, and a third area exposing the silicon substrate; Step 5: depositing a second passivation layer, a second doping layer and a PSG layer on the back side of the silicon substrate in sequence; Step 6: ablating the PSG layer in the first and third regions using a pulsed laser, and etching the front and side surfaces of the silicon substrate using an acid solution to expose the front and side surfaces of the silicon substrate and the silicon substrate in the third region, respectively; Step 7: ablating the PSG layer in the second area on the back side of the silicon substrate using a laser beam; Step 8: Clean the surface of the first area with an alkaline solution and the surface of the third area with an acid solution; chemically etch the overlapping area of ​​the light spots formed in step 6 in the first area to form a through structure and simultaneously perform texturing to obtain a first velvet perforation with a submicron velvet surface on the inner wall; chemically etch the laser ablation point in step 7 in the second area to form an inverted pyramid-shaped second velvet perforation and simultaneously perform texturing; texturing the exposed silicon surface of the front side of the silicon substrate and the third area; Step 9: depositing a passivation layer and an anti-reflection layer on the front and back sides of the silicon substrate; Step 10: Perform slurry printing and metal sintering.

8. The method for preparing a TBC solar cell according to claim 7, characterized in that: The wavelength of the laser in step 4 and step 6 is 355nm or 532nm, the pulse width is 5~30ps, the spot size is 150~300μm, and the energy density is 4×10³~1.2×10 4 J / m², the spot overlap rate is 0~80%.

9. The method for preparing a TBC solar cell according to claim 7, characterized in that: The wavelength of the laser in step 7 is 355nm or 532nm, the pulse width is 5~30ps, the spot size is 0.5~5μm, and the energy density is 4×10³~1.2×10 4 J / m², the spot overlap rate is 0~80%.

10. The method for preparing a TBC solar cell according to claim 7, characterized in that: In step eight, a 1-5 wt % alkaline solution is used for etching at 60-80° C. for 300-600 seconds to form a submicron textured structure.

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