Image sensing device

Abstract

An image sensing apparatus is disclosed. The image sensing device includes: a first pixel configured to overlap with a first filter transmitting light of a first color; a second pixel configured to overlap with a second filter transmitting light of a second color different from the first color while being spaced apart from the first pixel in the first direction; a first pixel isolation structure configured to receive a first bias voltage while surrounding the first pixel; and a second pixel isolation structure configured to receive a second bias voltage different from the first bias voltage while surrounding the second pixel.

Description

Technical Field

[0001] Technologies and embodiments disclosed in this patent document generally relate to image sensing devices, and more particularly, to image sensing devices including a structure capable of reducing noise of pixels. Background Art

[0002] An image sensing device is a device for capturing at least one image using the properties of a semiconductor that reacts to incident light to produce an image. In recent years, with the growing development of the information technology (IT) industry and related technologies, the demand for high-quality and high-performance image sensing devices has rapidly increased in various electronic devices such as smartphones and digital cameras.

[0003] Image sensing devices can be broadly classified into CCD (Charge Coupled Device)-based image sensing devices and CMOS (Complementary Metal Oxide Semiconductor)-based image sensing devices. Unlike in the past, CMOS image sensing devices have been intensively researched and rapidly entered widespread use. Summary of the Invention

[0004] According to an embodiment of the disclosed technology, an image sensing device may include: a first pixel configured to overlap with a first filter that transmits light of a first color; a second pixel configured to overlap with a second filter that transmits light of a second color different from the first color, while being spaced apart from the first pixel in a first direction; a first pixel isolation structure configured to receive a first bias voltage while surrounding the first pixel; and a second pixel isolation structure configured to receive a second bias voltage different from the first bias voltage while surrounding the second pixel.

[0005] In some implementations, the image sensing device may further include: a first bias contact configured to transfer a first bias voltage to the first pixel isolation structure; and a second bias contact configured to transfer a second bias voltage to the second pixel isolation structure.

[0006] In some implementations, the image sensing device may further include: a third pixel configured to have a third filter that transmits light of a third color that is different from each of the first color and the second color, while being spaced apart from the first pixel in a second direction that is different from the first direction; and a third pixel isolation structure configured to receive a third bias voltage while surrounding the third pixel, wherein the third bias voltage is different from each of the first bias voltage and the second bias voltage.

[0007] In some implementations, the image sensing device may further include: a third bias contact configured to transfer a third bias voltage to the third pixel isolation structure.

[0008] In some implementations, the first color can be green, the second color can be red, and the third color can be blue.

[0009] In some implementations, the image sensing device may further include: a pixel isolation structure disposed between the first pixel isolation structure and the second pixel isolation structure and configured to electrically isolate the first pixel isolation structure and the second pixel isolation structure from each other.

[0010] In some implementations, when the dark current of the first pixel is greater than the dark current of the second pixel, the magnitude of the first bias voltage may be greater than the magnitude of the second bias voltage.

[0011] In some implementations, when the temperature of the first pixel is higher than the temperature of the second pixel, the magnitude of the first bias voltage can be smaller than the magnitude of the second bias voltage.

[0012] In some implementations, the image sensing device may further include: a third pixel configured to overlap with a third filter that transmits light of a first color while being spaced apart from the first pixel in a second direction different from the first direction; a fourth pixel configured to overlap with a fourth filter that transmits light of a second color while being spaced apart from the second pixel in the second direction; a third pixel isolation structure configured to receive a first bias voltage while surrounding the third pixel; and a fourth pixel isolation structure configured to receive a second bias voltage while surrounding the fourth pixel.

[0013] In some implementations, the first pixel isolation structure and the third pixel isolation structure can be included in the first pixel group isolation structure while being in contact with each other; and the second pixel isolation structure and the fourth pixel isolation structure can be included in the second pixel group isolation structure while being in contact with each other.

[0014] In some implementations, the image sensing device may further include: a pixel isolation structure disposed between the first pixel group isolation structure and the second pixel group isolation structure to electrically isolate the first pixel group isolation structure and the second pixel group isolation structure from each other.

[0015] In some implementations, the first pixel and the third pixel can be read out within a first time period, and the second pixel and the fourth pixel can be read out within a second time period; and a first bias voltage can be applied to the first pixel group isolation structure during the first time period, and a second bias voltage can be applied to the second pixel group isolation structure during the second time period, wherein the end point of the first time period is earlier than the starting point of the second time period.

[0016] In some implementations, a first bias voltage can be applied to the first pixel isolation structure while readout of the first pixel is ongoing; and a second bias voltage can be applied to the second pixel isolation structure while readout of the second pixel is ongoing.

[0017] According to another embodiment of the disclosed technology, an image sensing device may include: a first photoelectric conversion element, which is arranged in a semiconductor substrate and is configured to generate photocharges in response to incident light; a second photoelectric conversion element, which is spaced apart from the first photoelectric conversion element in the semiconductor substrate in a first direction and is configured to generate photocharges in response to the incident light; a first filter, which is arranged on the back surface of the semiconductor substrate on which the incident light is incident, and is configured to transmit light of a first color among the incident light while overlapping with the first photoelectric conversion element; a second filter, which is arranged on the back surface of the semiconductor substrate and is configured to transmit light of a second color different from the first color among the incident light while overlapping with the second photoelectric conversion element; a first pixel isolation structure, which is recessed into the semiconductor substrate while surrounding the first photoelectric conversion element; and a second pixel isolation structure, which is recessed into the semiconductor substrate while surrounding the second photoelectric conversion element, wherein the first pixel isolation structure is configured to receive a first bias voltage; and the second pixel isolation structure is configured to receive a second bias voltage different from the first bias voltage.

[0018] In some embodiments, the image sensing device may further include: a third photoelectric conversion element, which is spaced apart from the first photoelectric conversion element within the semiconductor substrate in a second direction different from the first direction and is configured to generate photocharges in response to incident light; and a third filter, which is disposed on the back surface of the semiconductor substrate and is configured to transmit light of a third color in the incident light that is different from each of the first color and the second color while overlapping with the third photoelectric conversion element.

[0019] In some implementations, the first color can be green, the second color can be red, and the third color can be blue.

[0020] In some embodiments, the image sensing device may further include: a third pixel isolation structure, which is recessed into the semiconductor substrate while surrounding the third photoelectric conversion element and is spaced apart from the first pixel isolation structure in the second direction, wherein the third pixel isolation structure is configured to receive a third bias voltage that is different from each of the first bias voltage and the second bias voltage.

[0021] In some implementations, the image sensing device may further include: a pixel isolation structure disposed between the first pixel isolation structure and the second pixel isolation structure to electrically isolate the first pixel isolation structure and the second pixel isolation structure from each other.

[0022] According to another embodiment of the disclosed technology, an image sensing device may include: a first pixel, which is configured to generate an electrical signal in response to light of a first color; a second pixel, which is spaced apart from the first pixel and is configured to generate an electrical signal in response to light of a second color; a first pixel isolation structure, which is configured to receive a first bias voltage while surrounding the first pixel; and a second pixel isolation structure, which is spaced apart from the first pixel isolation structure and is configured to receive a second bias voltage while surrounding the second pixel.

[0023] According to another embodiment of the disclosed technology, an image sensing device may include: a first pixel group, which includes a plurality of first pixels, each of the plurality of first pixels generates an electrical signal in response to light of a first color; a second pixel group, which includes a plurality of second pixels, each of the plurality of second pixels generates an electrical signal in response to light of a second color; a first pixel group isolation structure, which is configured to receive a first bias voltage while surrounding the plurality of first pixels; and a second pixel group isolation structure, which is spaced apart from the first pixel group isolation structure and is configured to receive a second bias voltage while surrounding the plurality of second pixels. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The foregoing and other features and advantageous aspects of the disclosed technology will become apparent with reference to the following detailed description when considered in conjunction with the accompanying drawings.

[0025] Figure 1 is a block diagram illustrating an example of an image sensing device according to an embodiment of the disclosed technology.

[0026] Figure 2 is a diagram showing an embodiment according to the disclosed technology Figure 1 Schematic diagram of an example of a pixel array shown in .

[0027] Figure 3 This is a diagram showing a first embodiment of the disclosed technology. Figure 2 Schematic diagram of an example of a pixel group shown in .

[0028] Figure 4 This is a diagram showing a second embodiment of the disclosed technology. Figure 2 Schematic diagram of an example of a pixel group shown in .

[0029] Figure 5A is a diagram showing that a bias voltage is applied to an embodiment of the disclosed technology. Figure 3 Schematic diagram of an example of a first pixel group shown in .

[0030] Figure 5Bis a diagram showing that a bias voltage is applied to an embodiment of the disclosed technology. Figure 4 Schematic diagram of an example of a second pixel group shown in .

[0031] Figure 6 is a diagram showing an embodiment of the disclosed technology. Figure 3 1 is a cross-sectional view of an example of a pixel group taken along line AA′.

[0032] Figure 7 is a diagram showing an embodiment of the disclosed technology. Figure 3 A cross-sectional view of another example of a pixel group taken along line AA′.

[0033] Figure 8 is a diagram showing an embodiment of the disclosed technology. Figure 4 A cross-sectional view of an example of a pixel group taken along line BB'.

[0034] Figure 9 is a diagram showing an embodiment of the disclosed technology. Figure 4 A cross-sectional view of another example of a pixel group taken along line BB'.

[0035] Figure 10 is a diagram showing an embodiment of the disclosed technology configured to Figure 2 An example circuit diagram of the circuit for modeling each pixel is shown in FIG.

[0036] Figure 11A is a diagram showing an embodiment of the disclosed technology applied to Figure 5A 1 is a timing diagram of example levels of the first bias signal to the fourth bias signal of the first pixel isolation structure to the fourth pixel isolation structure shown in FIG.

[0037] Figure 11B is a diagram showing an embodiment of the disclosed technology applied to Figure 5B 1 is a timing diagram of example levels of the first bias signal to the fourth bias signal of the first pixel group isolation structure to the fourth pixel group isolation structure shown in FIG. DETAILED DESCRIPTION

[0038] This patent document provides embodiments and examples of image sensing devices that include structures capable of reducing the noise of pixels. The disclosed features of such image sensing devices can be implemented in various configurations to substantially solve one or more technical or engineering problems and alleviate limitations or shortcomings encountered in some image sensing devices in the art. Some embodiments of the disclosed technology relate to image sensing devices with improved image quality by uniformly correcting different noise components of each pixel according to the wavelength range (or color) of the incident light. In identifying the problems in the art, image sensing devices based on some embodiments of the disclosed technology can reduce the noise of pixels and can reduce noise deviations that may occur between pixels that transmit light of different wavelengths. In addition, the disclosed technology can provide an image sensing device that reduces power consumption by designing timing points at which different bias voltages are applied to pixels that respectively transmit light beams of different wavelengths.

[0039] Reference will now be made in detail to embodiments of the disclosed technology, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals will be used throughout the drawings to refer to the same or similar parts. Although the present disclosure is susceptible to various modifications and alternative forms, specific embodiments thereof are illustrated by way of example in the accompanying drawings. However, the present disclosure should not be construed as being limited to the embodiments set forth herein.

[0040] Various embodiments will be described below with reference to the accompanying drawings. However, it should be understood that the disclosed technology is not limited to the specific embodiments or examples described, but rather that various modifications, equivalents, and / or substitutions of the described embodiments may be made based on the disclosure of this patent document. Embodiments of the disclosed technology can be used in various ways to directly or indirectly provide various effects.

[0041] Various embodiments of the disclosed technology relate to an image sensing device having improved image quality by uniformly correcting different noise components of each pixel according to a wavelength range (or color) of incident light.

[0042] It is to be understood that both the foregoing general description and the following detailed description of the disclosed technology are exemplary and explanatory and are intended to provide further explanation of the disclosure as claimed.

[0043] Figure 1 is a block diagram illustrating an example of an image sensing device 100 according to an embodiment of the disclosed technology.

[0044] Reference Figure 1The image sensing device 100 based on some implementations of the disclosed technology may include a timing generator 110, a row driver 120, a bias voltage generator 300, a pixel array 200, a correlated double sampler (CDS) 130, an analog-to-digital converter (ADC) 140, an output buffer 150, and a column driver 160. This is discussed only by way of example. Figure 1 The invention relates to components of an image sensing device as shown in the drawings, and this patent document covers many other variations, substitutions, variations, alterations, and modifications. In this patent document, the word "pixel" may be used to refer to an image sensing pixel that is configured to detect incident light to generate an electrical signal that carries an image in the incident light.

[0045] The timing generator 110 may provide timing signals and control signals to at least one of the row driver 120, the correlated double sampler (CDS) 130, the ADC 140, the output buffer 150, and the column driver 160. In some implementations, the timing generator 110 may also provide timing signals and control signals to the bias voltage generator 300.

[0046] The row driver 120 may activate the pixel array 200 based on the timing and control signals received from the timing generator 110 to perform a specific operation on the pixels included in the corresponding row.

[0047] In some implementations, the row driver 120 may select at least one pixel arranged in at least one row of the pixel array 200 and may provide a control signal to the selected pixel to perform a specific operation. The row driver 120 may generate a row select signal to select at least one row from a plurality of rows. When the row driver 120 selects a specific row from a plurality of rows to perform a specific operation, the row driver 120 may not perform the specific operation on rows adjacent to the selected specific row.

[0048] The pixels of the row selected by the row driver 120 may sequentially transmit an analog reference signal and an image signal to the correlated double sampler (CDS) 130. The reference signal may be an electrical signal provided to the CDS 130 when the floating diffusion region of each pixel is reset to the power supply voltage VDD. The image signal may be an electrical signal provided to the CDS 130 when photocharge generated by each pixel is accumulated in the floating diffusion region (FD).

[0049] The reference signal may be a signal indicating unique pixel noise of each pixel, and the reference signal and the image signal may be collectively referred to as a pixel signal as needed.

[0050] The pixel array 200 may include a plurality of pixels arranged in a plurality of rows and a plurality of columns. The plurality of pixels may be connected to the row driver 120 via a plurality of row lines extending in the row direction. The plurality of pixels may be connected to the CDS 130 via a plurality of column lines extending in the column direction. The pixel array 200 may include at least one pixel arranged in both the row direction and the column direction. For example, the pixel array 200 may be arranged in a two-dimensional (2D) pixel array in which a plurality of unit pixels are arranged in rows and columns.

[0051] The plurality of unit pixels included in pixel array 200 may convert optical signals into electrical signals and may be connected to specific internal pixel circuits. Each of the plurality of unit pixels may be surrounded by a pixel isolation structure. The pixel isolation structure may optically isolate adjacent pixels from each other and may reduce noise in each pixel when receiving a predetermined bias voltage.

[0052] In various implementations, each pixel can be configured to include a filter that transmits light of a first color and a photoelectric conversion element that is configured to receive light of the first color from the filter and is configured to generate photocharge in response to the received light of the first color. Specifically, each of the multiple unit pixels included in the pixel array 200 can include at least one photoelectric conversion element or photodetector for detecting incident light, and a filter disposed in the path of the incident light to filter the incident light to be received by the photoelectric conversion element, so that light passing through the filter is incident on and detected by the photoelectric conversion element, and each filter can transmit light of a specific wavelength range or a specific color. For example, a filter configured to transmit green light can transmit a larger amount of light than a filter configured to transmit red light, and a filter configured to transmit red light can transmit a larger amount of light than a filter configured to transmit blue light. Light beams having different wavelength ranges can have different penetration depths into the semiconductor substrate that can form a portion of the pixel array 200. For example, the penetration depth of green light may be greater than that of blue light, and the penetration depth of green light may be less than that of red light. In conjunction with the above penetration depths, the depths at which the light beams of each color converge may be different from one another. The amount of light incident on the photoelectric conversion element may vary with the penetration depth.

[0053] The pixel array 200 may receive pixel control signals including a row selection signal, a pixel reset signal, a row transfer signal, etc. from the row driver 120. At least one pixel included in a row selected by the row driver 120 according to the pixel control signal may perform a specific operation in response to the row selection signal, the pixel reset signal, and the row transfer signal.

[0054] The bias voltage generator 300 can apply a bias voltage (e.g., a negative (-) bias voltage) to each of a plurality of pixel isolation structures that may be included in the pixel array 200. The bias voltage generator 300 can determine at least one of the magnitude of the bias voltage and the timing at which the bias voltage is applied to each pixel isolation structure. For example, the bias voltage generator 300 can determine that the bias voltage applied to pixel isolation structures surrounding pixels having a higher temperature than adjacent pixels is lower than the bias voltage applied to pixel isolation structures surrounding peripheral pixels. For example, the temperature of the pixel can be experimentally measured in advance for each pixel position. For example, a pixel with a relatively large amount of incident light can generate significantly more photocharge than a pixel with a relatively small amount of incident light. Due to the heat generated by the photocharge generation reaction, a pixel with a relatively large amount of incident light can have a higher temperature than an adjacent pixel with a relatively small amount of incident light. For example, a pixel including a filter configured to transmit red light can have a lower temperature than a pixel including a filter configured to transmit green light. For example, a pixel including a filter configured to transmit red light may have a higher temperature than a pixel including a filter configured to transmit blue light. The temperature difference between the filters depending on the color of the light beam passing through the filters can be experimentally determined, and the magnitude of the bias voltage applied to each pixel isolation structure by the bias voltage generator 300 can be determined based on the experimental results.

[0055] In addition to temperature, there may be other factors that affect the magnitude of the bias voltage applied by the bias voltage generator 300. For example, the degree of noise generation in different pixels that generate electrical signals by sensing light beams of different colors may vary with temperature and other factors (e.g., the height, thickness, width, and material properties of the filter). Therefore, the magnitude of the bias voltage applied by the bias voltage generator 300 may vary depending on the implementation.

[0056] The CDS 130 can receive a reference signal and an image signal, each corresponding to a column of the pixel array 200, and can sample the levels of the reference signal and the image signal. In an image sensing device designed using CMOS, the CDS 130 can sample the pixel signal twice to remove the difference between the two samples, and can perform correlated double sampling to remove undesirable pixel offset values, such as fixed noise. For example, the CDS 130 can compare the pixel output voltage obtained before and after the photocharge generated by incident light is accumulated in the floating diffusion region to remove the undesirable offset value, thereby measuring the pixel output voltage based on the incident light.

[0057] The CDS 130 may transmit the reference signal and the image signal, which are generated column by column based on the timing signal and the control signal of the timing generator 110 , to the ADC 140 as CDS signals.

[0058] The ADC 140 may convert the analog CDS signal received from the CDS 130 into a digital signal and may output the resulting digital signal.

[0059] The output buffer 150 may temporarily hold and output the digital signal provided from the ADC 140 .

[0060] The column driver 160 may select a column from the output buffer 150 based on the timing signal of the timing generator 110 and the control signal, and may control the temporarily held digital signal to be output according to the selection order.

[0061] Figure 2 is a diagram showing an embodiment according to the disclosed technology Figure 1 A schematic diagram of an example of a pixel array 200 is shown.

[0062] Reference Figure 2 , the pixel array 200 may include a plurality of pixels (PX). For example, the pixel array 200 may refer to an array having (M×N) pixels, wherein the pixels (PX) are arranged in an (M×N) matrix structure (wherein "M" is an integer of 2 or greater and "N" is an integer of 2 or greater). Here, M may represent the number of pixels (PX) arranged in the second direction (D2), and N may represent the number of pixels (PX) arranged in the first direction (D1).

[0063] The following will use pixel group 200G as a reference Figure 3 The following figures give a more detailed structure of each pixel (PX). Figure 2 In the example shown, 16 pixels (PX) are arranged in a (4×4) matrix structure. The number of pixels included in the pixel group and the (4×4) matrix structure are merely examples, and other implementations are also possible.

[0064] Figure 3 Some implementations based on the disclosed technology are shown Figure 2 Schematic diagram of a first example 200G1 of a pixel group 200G is shown in FIG.

[0065] Reference Figure 3 , the pixel group 200G1 (hereinafter referred to as "the first pixel group 200G1") can be Figure 2An example of a pixel group 200G is shown (hereinafter referred to as the first embodiment). The first pixel group 200G1 may include first to sixteenth pixels (PX1-PX16), first to fourth pixel isolation structures (321-324) surrounding their respective pixels (PX1-PX16), and a pixel insulation structure 310 disposed between different pixels (PX1-PX16) (and their pixel isolation structures (321-324)).

[0066] Each of the first to sixteenth pixels (PX1-PX16) can be a minimum unit that generates an electrical signal in response to incident light. The first to sixteenth pixels (PX1-PX16) can be arranged in a (4×4) matrix structure. For example, the first pixel, the second pixel, the fifth pixel, and the sixth pixel (PX1, PX2, PX5, PX6) can be arranged along the first direction D1. In addition, the first pixel, the third pixel, the ninth pixel, and the eleventh pixel (PX1, PX3, PX9, PX11) can be arranged along the second direction D2. Each of the first to sixteenth pixels (PX1-PX16) can include at least one photoelectric conversion element (not shown) and at least one filter (not shown). For example, the photoelectric conversion element can be implemented by a light sensing device or circuit including a photodiode, a phototransistor, a photogate, or other photosensitive circuits capable of converting light into a pixel signal (e.g., charge, voltage, or current).

[0067] Each of the first, fifth, ninth, and thirteenth pixels (PX1, PX5, PX9, and PX13) may include a filter (not shown) configured to transmit light of a first color. A first pixel isolation structure 321 may surround each of the first, fifth, ninth, and thirteenth pixels (PX1, PX5, PX9, and PX13).

[0068] Each of the second, sixth, tenth, and fourteenth pixels (PX2, PX6, PX10, PX14) may include a filter (not shown) that transmits light of a second color. The second color may be different from the first color. A second pixel isolation structure 322 may surround each of the second, sixth, tenth, and fourteenth pixels (PX2, PX6, PX10, PX14).

[0069] Each of the third, seventh, eleventh, and fifteenth pixels (PX3, PX7, PX11, and PX15) may include a filter (not shown) configured to transmit light of a third color. The third color may be different from the first and second colors. A third pixel isolation structure 323 may surround each of the third, seventh, eleventh, and fifteenth pixels (PX3, PX7, PX11, and PX15).

[0070] Each of the fourth, eighth, twelfth, and sixteenth pixels (PX4, PX8, PX12, and PX16) may include a filter (not shown) configured to transmit light of a fourth color. The fourth color may be different from the second and third colors. The fourth color may be the same as the first color, but is not limited thereto. A fourth pixel isolation structure 324 may surround each of the fourth, eighth, twelfth, and sixteenth pixels (PX4, PX8, PX12, and PX16).

[0071] In some implementations, the first color may be green, the second color may be red, the third color may be blue, and the fourth color may be green or white. In some other implementations, the first color may be magenta, the second color may be cyan, the third color may be yellow, and the fourth color may be white. The first to fourth colors described above are merely examples, and other implementations are also possible.

[0072] Each of the first to fourth pixel isolation structures (321-324) may have the same first width W1 within an error range. Each of the first to fourth pixel isolation structures (321-324) may be formed in a square shape, but is not limited thereto. For example, the first to fourth pixel isolation structures (321-324) may have any closed curve shape, such as a circle, a rounded square, or an octagon. The error range may refer to a range of errors that may occur in a manufacturing process in which, for example, the target width of each of the first to fourth pixel isolation structures (321-324) is set to the first width (W1).

[0073] The first to fourth pixel isolation structures (321 to 324) may be spaced apart from each other. The pixel insulation structure 310 may be disposed between adjacent pixel isolation structures among the first to fourth pixel isolation structures (321 to 324). The pixel insulation structure 310 may also be disposed along the inner walls of the first to fourth pixel isolation structures (321 to 324). The inner wall of any one of the first to fourth pixel isolation structures (321 to 324) may refer to the side wall of the corresponding pixel isolation structure facing the pixel surrounded by the corresponding pixel isolation structure. The pixel insulation structure 310 may be formed integrally with the first to fourth pixel isolation structures (321 to 324) while surrounding each of the first to fourth pixel isolation structures (321 to 324). In Figure 3, portions of the pixel isolation structure 310 further disposed along the inner walls of the first to fourth pixel isolation structures ( 321 ˜ 324 ) are not shown to prevent congestion in the drawing. The pixel isolation structure 310 may have a second width W2 greater than the first width W1 .

[0074] Figure 4 Some implementations based on the disclosed technology are shown Figure 2 Schematic diagram of a second example 200G2 of a pixel group 200G is shown in FIG.

[0075] In the following, we will focus on Figure 3 and Figure 4 Describe the difference between Figure 4 structure to avoid redundant explanations.

[0076] Reference Figure 4 , the pixel group 200G2 (hereinafter referred to as "the second pixel group 200G2") may be Figure 2 Another example of a pixel group 200G (hereinafter referred to as a second embodiment) is shown. The pixel group 200G2 may include first to sixteenth pixels (PX1-PX16), first to fourth pixel group isolation structures (341-344), and a pixel insulation structure 330.

[0077] The first pixel group isolation structure 341 of the second pixel group 200G2 may have a structure in which first to fourth pixel isolation structures respectively surrounding the first to fourth pixels ( PX1 ˜ PX4 ) are integrally formed while being in contact with each other.

[0078] The second pixel group isolation structure 342 of the second pixel group 200G2 may have a structure in which first to fourth pixel isolation structures respectively surrounding the fifth to eighth pixels ( PX5 ˜ PX8 ) are integrally formed while being in contact with each other.

[0079] The third pixel group isolation structure 343 of the second pixel group 200G2 may have a structure in which first to fourth pixel isolation structures respectively surrounding the ninth to twelfth pixels ( PX9 ˜ PX12 ) are integrally formed while being in contact with each other.

[0080] The fourth pixel group isolation structure 344 of the second pixel group 200G2 may have a structure in which first to fourth pixel isolation structures respectively surrounding the thirteenth to sixteenth pixels ( PX13 ˜ PX16 ) are integrally formed while being in contact with each other.

[0081] Although in this embodiment, the first to fourth pixel group isolation structures (341-344) are described as structures in which the first to fourth pixel isolation structures respectively surrounding the four pixels are in contact with each other and are integrally formed, the number of pixel isolation structures forming the group isolation structure is not limited to four. For example, if two or more pixels are configured to have a structure in which the pixel isolation structures respectively surrounding the two or more pixels are in contact with each other and are integrally formed, then such a structure can also be regarded as the pixel group isolation structure of the disclosed technology.

[0082] Each of the first to fourth pixels (PX1-PX4) may include a filter (not shown) that transmits light of the first color. A first pixel group isolation structure 341 may surround each of the first to fourth pixels (PX1-PX4). The first to fourth pixels (PX1-PX4) may be arranged in a (2×2) matrix structure. The first pixel group isolation structure 341 may be arranged in a mesh structure.

[0083] Each of the fifth to eighth pixels (PX5-PX8) may include a filter (not shown) that transmits light of a second color. The second color may be different from the first color. A second pixel group isolation structure 342 may surround each of the fifth to eighth pixels (PX5-PX8). The fifth to eighth pixels (PX5-PX8) may be arranged in a (2×2) matrix structure. The second pixel group isolation structure 342 may be arranged in a mesh structure.

[0084] Each of the ninth to twelfth pixels (PX9-PX12) may include a filter (not shown) that transmits light of a third color. The third color may be different from the first and second colors. A third pixel group isolation structure 343 may surround each of the ninth to twelfth pixels (PX9-PX12). The ninth to twelfth pixels (PX9-PX12) may be arranged in a (2×2) matrix structure while being spaced apart from each other. The third pixel group isolation structure 343 may be arranged in a mesh structure.

[0085] Each of the thirteenth to sixteenth pixels (PX13-PX16) may include a filter (not shown) that transmits light of a fourth color. The fourth color may be different from the second color and the third color. The fourth color may be the same color as the first color, but is not limited thereto. A fourth pixel group isolation structure 344 may surround each of the thirteenth to sixteenth pixels (PX13-PX16). Each of the thirteenth to sixteenth pixels (PX13-PX16) may be arranged in a (2×2) matrix structure while being spaced apart from each other. The fourth pixel group isolation structure 344 may be arranged in a mesh structure.

[0086] In some implementations, the first color may be green, the second color may be red, the third color may be blue, and the fourth color may be green or white. In some other implementations, the first color may be magenta, the second color may be cyan, the third color may be yellow, and the fourth color may be white. The first to fourth colors described above are merely examples, and other implementations are also possible.

[0087] Each of the first to fourth pixel group isolation structures (341-344) may have the same third width W3 within a tolerance range. Each of the first to fourth pixel group isolation structures (341-344) may be formed as a square mesh structure, but is not limited thereto. For example, the first to fourth pixel group isolation structures (341-344) may have any one of closed curved mesh structures such as a circle, a rounded square, or an octagon.

[0088] The error range may refer to a range of errors that may occur in a manufacturing process in which the target width of each of the first to fourth pixel group isolation structures ( 341 ˜ 344 ) is set to the third width ( W3 ), for example.

[0089] The first pixel group isolation structure to the fourth pixel group isolation structure (341 to 344) may be spaced apart from each other. The pixel insulation structure 330 may be disposed in the space between the first pixel group isolation structure to the fourth pixel group isolation structure (341 to 344) spaced apart from each other. The pixel insulation structure 330 may also be disposed along the inner walls of the first pixel group isolation structure to the fourth pixel group isolation structure (341 to 344). The inner wall of any one of the first pixel group isolation structure to the fourth pixel group isolation structure (341 to 344) may refer to the side wall of the pixel group isolation structure facing the pixel surrounded by the pixel group isolation structure. The pixel insulation structure 330 may be formed integrally with each of the first pixel group isolation structure to the fourth pixel group isolation structure (341 to 344) while surrounding each of the first pixel group isolation structure to the fourth pixel group isolation structure (341 to 344). In Figure 3 , portions of the pixel insulating structure 330 further disposed along the inner walls of the first to fourth pixel group isolation structures (341-344) are not shown to prevent congestion in the drawing. The pixel insulating structure 330 may have a fourth width W4 greater than the third width W3.

[0090] Figure 5A is a diagram showing that a bias voltage is applied to an embodiment of the disclosed technology. Figure 3 Schematic diagram of an example of a first pixel group shown in .

[0091] Figure 5B is a diagram showing that a bias voltage is applied to an embodiment of the disclosed technology. Figure 4 Schematic diagram of an example of a second pixel group shown in .

[0092] Reference Figure 3 、 Figure 4 、 Figure 5A and Figure 5B , the image sensing device 100A may be Figure 1 . The image sensing device 100A may include a bias voltage generator 300 and a portion 200A of a pixel array.

[0093] In order to avoid the complexity of the drawings, Figure 5A and Figure 5B omitted in Figure 3 The reference numerals of the constituent elements of the first pixel group 200G1 and Figure 4 Reference numerals of constituent elements of the second pixel group 200G2.

[0094] The bias voltage generator 300 can control a plurality of bias signals that control the bias voltage to be applied to the pixel isolation structure. In some implementations, the bias voltage generator 300 can generate a first bias signal to a fourth bias signal (BS1 to BS4). In some other implementations, the bias voltage generator 300 can generate a first bias signal to a fourth bias signal (BS1 to BS4). Figure 1 110) receives the first to fourth bias signals (BS1-BS4). Hereinafter, an exemplary embodiment in which the bias voltage generator 300 generates the first to fourth bias signals (BS1-BS4) will be described with reference to the accompanying drawings as an example.

[0095] Reference Figure 3 and Figure 5A The bias voltage generator 300 may generate a first bias signal BS1 that controls a first bias voltage VD1 to be applied to the first pixel isolation structure 321. The bias voltage generator 300 may generate a second bias signal BS2 that controls a second bias voltage VD2 to be applied to the second pixel isolation structure 322. The bias voltage generator 300 may generate a third bias signal BS3 that controls a third bias voltage VD3 to be applied to the third pixel isolation structure 323. The bias voltage generator 300 may generate a fourth bias signal BS4 that controls a fourth bias voltage VD4 to be applied to the fourth pixel isolation structure 324.

[0096] Reference Figure 4 and Figure 5BThe bias voltage generator 300 may generate a first bias signal BS1 that controls a first bias voltage VD1 to be applied to the first pixel group isolation structure 341. The bias voltage generator 300 may generate a second bias signal BS2 that controls a second bias voltage VD2 to be applied to the second pixel group isolation structure 342. The bias voltage generator 300 may generate a third bias signal BS3 that controls a third bias voltage VD3 to be applied to the third pixel group isolation structure 343. The bias voltage generator 300 may generate a fourth bias signal BS4 that controls a fourth bias voltage VD4 to be applied to the fourth pixel group isolation structure 344.

[0097] The magnitudes of the first bias voltage to the fourth bias voltage (VD1 to VD4) can be as shown in FIG. Figure 1 The values ​​described have been experimentally determined. Figure 11A Describe the magnitude relationship between the first bias voltage to the fourth bias voltage (VD1-VD4).

[0098] although Figure 5A and Figure 5B The portion 200A of the pixel array is shown to include the first pixel group 200G1 or the second pixel group 200G2, but other implementations are also possible. For example, the pixel array ( Figure 2 200) may include both a first pixel group 200G1 and a second pixel group 200G2.

[0099] Figure 6 is a diagram showing an embodiment of the disclosed technology. Figure 3 1 is a cross-sectional view of an example of a pixel group taken along line AA′.

[0100] Reference Figure 3 and Figure 6 The first cross-section 60 may include first to fourth filters (CF1 to CF4), a semiconductor substrate 600, a pixel insulation structure 310, first to fourth pixel isolation structures (321 to 324), an insulation trench structure 410, first to fourth photoelectric conversion elements or photodetectors (PD1 to PD4), and first to fourth bias contacts (421 to 424).

[0101] The semiconductor substrate 600 may be formed of or include a silicon-based material (e.g., silicon (Si), silicon germanium (SiGe), etc.). The semiconductor substrate 600 may include a first surface 610 and a second surface 620 facing the first surface 610 or opposite to the first surface 610. The first surface 610 may be, for example, a back surface (or back side) on which light is incident. The second surface 620 may be, for example, a front surface (or front side) of the semiconductor substrate.

[0102] The first optical filter or color filter CF1 may overlap with the first pixel PX1 or be included as part of the first pixel PX1 and may be disposed above the first surface 610 of the semiconductor substrate 600. The first optical filter CF1 may overlap with the first photoelectric conversion element or photodetector PD1. The first optical filter CF1 may selectively transmit light of a first color from the incident light. The first color of light may be, for example, green light. Green light may refer to light having a wavelength in a preset range (e.g., 500 nm to 600 nm).

[0103] The second filter or color filter CF2 may overlap with the second pixel PX2 or be included as part of the second pixel PX2 and may be disposed above the first surface 610 of the semiconductor substrate 600. The second filter CF2 may overlap with the second photoelectric conversion element or photodetector PD2. The second filter CF2 may selectively transmit light of a second color among the incident light. The second color of light may be, for example, red light. Red light may refer to light having a wavelength in a preset range (e.g., 600 nm to 700 nm).

[0104] The third filter or color filter CF3 may overlap with the third pixel PX3 or be included as part of the third pixel PX3 and may be disposed above the first surface 610 of the semiconductor substrate 600. The third filter CF3 may overlap with the third photoelectric conversion element or photodetector PD3. The third filter CF3 may selectively transmit light of a third color among the incident light. The light of the third color may be, for example, blue light. Blue light may refer to light having a wavelength in a preset range (e.g., 400 nm to 500 nm).

[0105] A fourth optical filter or color filter CF4 may overlap with the fourth pixel PX4 or be included as part of the fourth pixel PX4 and may be disposed above the first surface 610 of the semiconductor substrate 600. The fourth optical filter CF4 may overlap with the fourth photoelectric conversion element or photodetector PD4. The fourth optical filter CF4 may selectively transmit light of the first color or light of the fourth color among the incident light. The light of the fourth color may be, for example, white light. White light may refer to light having a wavelength in a preset range (e.g., 400 nm to 700 nm).

[0106] In the first pixel PX1, a first photoelectric conversion element or photodetector PD1 can generate photocharges in response to incident light. The incident light can be light of a first color that has passed through a first optical filter CF1. The first photoelectric conversion element or photodetector PD1 can be disposed within the semiconductor substrate 600. The first photoelectric conversion element or photodetector PD1 can overlap with the first optical filter CF1.

[0107] In the second pixel PX2, a second photoelectric conversion element or photodetector PD2 can generate photocharge in response to incident light. The incident light can be light of the second color that has passed through the second filter CF2. The second photoelectric conversion element PD2 can be disposed within the semiconductor substrate 600. The second photoelectric conversion element PD2 can overlap with the second filter CF2.

[0108] In the third pixel PX3, a third photoelectric conversion element or photodetector PD3 can generate photocharges in response to incident light. The incident light can be light of a third color that has passed through a third optical filter CF3. The third photoelectric conversion element PD3 can be disposed within the semiconductor substrate 600. The third photoelectric conversion element PD3 can overlap with the third optical filter CF3.

[0109] In the fourth pixel PX4, a fourth photoelectric conversion element or photodetector PD4 can generate photocharge in response to incident light. The incident light can be light of a fourth color that has passed through a fourth optical filter CF4. The fourth photoelectric conversion element PD4 can be disposed within the semiconductor substrate 600. The fourth photoelectric conversion element PD4 can overlap with the fourth optical filter CF4.

[0110] In some implementations, the first pixel isolation structure 321 may be recessed in one direction from the insulating trench structure 410 into the semiconductor substrate 600. In some other implementations, the first pixel isolation structure 321 may be recessed in one direction from the second surface 620 of the semiconductor substrate 600 into the semiconductor substrate 600. Depending on the order of the manufacturing process, the pixel group 200G1 may have one of the above two examples. For example, when the insulating trench structure 410 is formed after the first pixel isolation structure 321 is formed, the first pixel isolation structure 321 may be recessed in one direction from the insulating trench structure 410 into the semiconductor substrate 600, as shown in FIG. Figure 6 In another example, when the first pixel isolation structure 321 is formed after the insulating trench structure 410 is first formed, Figure 6Unlike the example shown, the first pixel isolation structure 321 may penetrate the insulating trench structure 410 and may be recessed from the second surface 620 into the semiconductor substrate 600. In some other implementations, the first pixel isolation structure 321 may be recessed from the first surface 610 into the semiconductor substrate 600 in another direction opposite to the one direction described above. In the following description, for ease of description, an embodiment in which the first to fourth pixel isolation structures (321-324) are recessed from the insulating trench structure 410 that may be formed on the second surface 620 into the semiconductor substrate 600 will be described as an example with reference to the accompanying drawings.

[0111] The first pixel isolation structure 321 may include, for example, polysilicon, polysilicon containing impurities, or a combination thereof. The first pixel isolation structure 321 may surround the first photoelectric conversion element PD1.

[0112] The second pixel isolation structure 322 may be recessed in one direction from the insulating trench structure 410 into the semiconductor substrate 600. The second pixel isolation structure 322 may include, for example, polysilicon, impurity-containing polysilicon, or a combination thereof and may surround the second photoelectric conversion element PD2.

[0113] The third pixel isolation structure 323 may be recessed in one direction from the insulating trench structure 410 into the semiconductor substrate 600. The third pixel isolation structure 323 may include, for example, polysilicon, impurity-containing polysilicon, or a combination thereof and may surround the third photoelectric conversion element PD3.

[0114] The fourth pixel isolation structure 324 may be recessed in one direction from the insulating trench structure 410 into the semiconductor substrate 600. The fourth pixel isolation structure 324 may include, for example, polysilicon, impurity-containing polysilicon, or a combination thereof and may surround the fourth photoelectric conversion element PD4.

[0115] The first to fourth pixel isolation structures (321-324) can optically isolate adjacent pixels (e.g., to prevent crosstalk). For example, the first pixel isolation structure 321 or the second pixel isolation structure 322 can prevent crosstalk between the first pixel PX1 and the second pixel PX2. In addition, the first to fourth pixel isolation structures (321-324) can reduce noise in the first to fourth pixels (PX1-PX4) when receiving a bias voltage through the first to fourth bias contacts (421-424).

[0116] The pixel insulating structure 310 may surround each of the first to fourth pixel isolation structures (321 to 324). The pixel insulating structure 310 may include an insulating material (e.g., silicon dioxide, silicon nitride, a silicon oxide-based insulating material, or a silicon nitride-based insulating material). The pixel insulating structure 310 may be recessed into the semiconductor substrate 600 from the insulating trench structure 410 (therein) in a direction along which the first to fourth pixel isolation structures (321 to 324) are recessed. The pixel insulating structure 310 may further gap-fill each space between the first to fourth pixel isolation structures (321 to 324), or may be further disposed in the space between the first to fourth pixel isolation structures (321 to 324).

[0117] For example, a trench (e.g., a first trench (i.e., a trench for forming the pixel isolation structure 310)) may be formed recessed from the second surface 620 into the semiconductor substrate 600, and the first trench may be gap-filled with an insulating material, thereby forming the pixel isolation structure 310. Two trenches (e.g., a second trench (i.e., a trench for forming the first pixel isolation structure 321) and a third trench (i.e., a trench for forming the second pixel isolation structure 322)) may be formed while penetrating the pixel isolation structure 310 and being spaced apart from each other. Each of the second and third trenches may be gap-filled with polysilicon or doped polysilicon, thereby forming the first and second pixel isolation structures 321 and 322. Then, a trench (e.g., a fourth trench (i.e., a trench for forming the insulating trench structure 410)) for removing a portion of the pixel isolation structure 310, the first and second pixel isolation structures (321, 322) may be formed recessed from the second surface 620. For example, the fourth trench and the pixel insulation structure 310 may be gap-filled with the same material, thereby forming the insulation trench structure 410 .

[0118] The pixel isolation structure 310 can electrically isolate (or insulate) the first to fourth pixel isolation structures (321-324) from each other. Due to this electrical isolation (or insulation), a bias voltage can be independently applied to each of the first to fourth pixel isolation structures (321-324).

[0119] The insulating trench structure 410 may have a structure that is recessed into the semiconductor substrate 600 from the second surface 620 (alternatively, from the first surface 610 according to another embodiment) in one direction. The insulating trench structure 410 may be recessed to have a smaller depth than the first to fourth pixel isolation structures (321-324). The insulating trench structure 410 may include the same material as the pixel insulation structure 310. The insulating trench structure 410 may electrically isolate adjacent pixels from each other. For example, the insulating trench structure 410 may electrically isolate the first pixel PX1 and the second pixel PX2 from each other. Although not shown near the second surface 620, one or more floating diffusion regions capable of accumulating photocharges generated by the first to fourth photoelectric conversion elements (PD1-PD4), or transfer transistors capable of moving these photocharges from each of the photoelectric conversion elements to each of the floating diffusion regions, may be provided near the second surface 620. The insulating trench structure 410 may prevent electrical interaction between transfer transistors of adjacent pixels or between floating diffusion regions of adjacent pixels.

[0120] The first bias contact 421 may have a structure that is recessed into the semiconductor substrate 600 from the second surface 620 (alternatively, according to another embodiment, from the first surface 610) in one direction. The first bias contact 421 may contact the first pixel isolation structure 321 by penetrating the insulating trench structure 410. The first bias contact 421 may apply a first bias voltage to the first pixel isolation structure 321. The first bias contact 421 only contacts the first pixel isolation structure 321. Figure 6 The reason for the first pixel isolation structure 321 on the left side is that: Figure 6 The first pixel isolation structure 321 on the left side and the Figure 6 The first pixel isolation structures 321 on the right side are connected to each other (see Figure 3 ).

[0121] The second bias contact 422 may have a structure that is recessed in one direction from the second surface 620 (alternatively, according to another embodiment, from the first surface 610) into the semiconductor substrate 600. The second bias contact 422 may contact the second pixel isolation structure 322 by penetrating the insulating trench structure 410. The second bias contact 422 may apply a second bias voltage to the second pixel isolation structure 322. The second bias contact 422 only contacts the second pixel isolation structure 322. Figure 6 The reason for the second pixel isolation structure 322 on the left side is that: Figure 6 The second pixel isolation structure 322 on the left side and the Figure 6 The second pixel isolation structures 322 on the right side are connected to each other (see Figure 3 ).

[0122] The third bias contact 423 may have a structure that is recessed in one direction from the second surface 620 (alternatively, according to another embodiment, from the first surface 610) into the semiconductor substrate 600. The third bias contact 423 may contact the third pixel isolation structure 323 by penetrating the insulating trench structure 410. The third bias contact 423 may apply a third bias voltage to the third pixel isolation structure 323. The third bias contact 423 only contacts the third pixel isolation structure 323. Figure 6 The reason for the third pixel isolation structure 323 on the left side is that: Figure 6 The third pixel isolation structure 323 on the left side and the Figure 6 The third pixel isolation structures 323 on the right side are connected to each other (see Figure 3 ).

[0123] The fourth bias contact 424 may have a structure that is recessed in one direction from the second surface 620 (alternatively, according to another embodiment, from the first surface 610) into the semiconductor substrate 600. The fourth bias contact 424 may contact the fourth pixel isolation structure 324 by penetrating the insulating trench structure 410. The fourth bias contact 424 may apply a fourth bias voltage to the fourth pixel isolation structure 324. The fourth bias contact 424 only contacts the fourth pixel isolation structure 324 located at the bottom of the pixel isolation structure 324. Figure 6 The reason for the fourth pixel isolation structure 324 on the left side is that: Figure 6 The fourth pixel isolation structure 324 on the left side and the Figure 6 The fourth pixel isolation structures 324 on the right side are connected to each other (see Figure 3 ).

[0124] The first to fourth bias contacts (421-424) may be formed of or include a metal material (e.g., copper (Cu), tungsten (W), etc.). When the first to fourth bias voltages are applied to the first to fourth pixel isolation structures (321-324) through the first to fourth bias contacts (421-424), respectively, the amount of noise (including, for example, the amount of dark current) in each of the first to fourth pixels (PX1-PX4) may be reduced.

[0125] The following describes a phenomenon that occurs when a bias voltage is applied to the pixel isolation structure as a representative example of the first pixel isolation structure 321 for the first pixel PX1. Figure 6 and Figure 3When a negative bias voltage is applied to a pixel (e.g., the first pixel isolation structure 321 surrounding the first pixel PX1), for example, electrons in the first pixel isolation structure 321 may move along the direction of the local electric field caused by the negative bias voltage to a position close to the sidewall of the first pixel isolation structure 321. This movement of electrons in the first pixel isolation structure 321 causes holes in the semiconductor substrate 600 of the first pixel PX1 to move toward a region close to the first pixel isolation structure 321 (e.g., an interface between the pixel isolation structure 310 disposed between different pixels (PX1 to PX16) (and their pixel isolation structures (321 to 324)) and the first pixel isolation structure 321 surrounding the first pixel (PX1). As a result, holes in the semiconductor substrate 600 of the first pixel PX1 may accumulate and be fixed at the interface between the pixel isolation structure 310 and the first pixel isolation structure 321, thereby reducing dark current of the semiconductor substrate 600 and reducing noise at the first pixel PX1. As the strength of the bias voltage applied to the first pixel isolation structure 321 changes, the amount of holes accumulated and fixed at the interface of the pixel insulation structure 310 increases, thereby further reducing the noise at the first pixel PX1. In this example, the bias voltage is applied to the first pixel isolation structure 321 through the first bias contact 421.

[0126] Figure 6 is a diagram showing an embodiment of the disclosed technology. Figure 3 For ease of explanation, Figure 6 The first to fourth bias contacts (421-424) are shown in FIG. Figure 3 The example on the line AA' is shown, but other implementations are also possible. For example, the first to fourth bias contacts (421-424) can be provided at different positions and are not limited to the first to fourth bias contacts (421-424). Figure 3 On line A-A'.

[0127] Figure 7 is a diagram showing an embodiment of the disclosed technology. Figure 3 A cross-sectional view of another example of a pixel group taken along line AA′.

[0128] Reference Figure 3 、 Figure 6 and Figure 7The second cross-section 70 may include first to fourth filters (CF1 to CF4), a semiconductor substrate 600, a pixel insulation structure 310, first to fourth pixel isolation structures (321 to 324), an insulation trench structure 410, first to fourth photoelectric conversion elements or photodetectors (PD1 to PD4), and first to fourth bias contacts (421 to 424).

[0129] In the following, we will focus on Figure 6 and Figure 7 The difference between Figure 7 The structure is described to avoid redundant explanation.

[0130] The pixel insulation structure 310 may surround each of the first to fourth pixel isolation structures (321-324). For adjacent pixel isolation structures among the first to fourth pixel isolation structures (321-324), when the two adjacent pixel isolation structures are spaced apart from each other so as to be electrically isolated from each other, the pixel insulation structure 310 does not gap-fill the space between the first to fourth pixel isolation structures (321-324). Instead, the pixel insulation structure 310 may be configured such that a depth at which the pixel insulation structure 310 is recessed from the second surface 620 (or, in another embodiment, the first surface 610) into the semiconductor substrate 600 is less than a depth at which the first to fourth pixel isolation structures (321-324) are recessed into the semiconductor substrate 600, and is also greater than a depth at which the insulation trench structure 410 is recessed into the semiconductor substrate 600.

[0131] For example, two trenches (e.g., first and second trenches) may be formed recessed from the second surface 620 into the semiconductor substrate 600. After the area between the first and second trenches is removed to a depth less than the depth of the two trenches, a layer including an insulating material may be formed in the area (e.g., the etched area) from which the semiconductor substrate 600 has been removed, thereby forming the pixel insulating structure 310. After forming the pixel insulating structure 310, the first and second trench areas may be gap-filled to form the first and second pixel isolation structures 321 and 322. Then, the trench (e.g., a third trench) formed when the first and second pixel isolation structures (321, 322) and the pixel insulating structure 310 are partially removed may be formed recessed from the second surface 620. For example, the third trench may be gap-filled with the same material as the pixel insulating structure 310, thereby forming the insulating trench structure 410.

[0132] Figure 8 is a diagram showing an embodiment of the disclosed technology. Figure 4A cross-sectional view of an example of a pixel group taken along line BB'.

[0133] Reference Figure 4 and Figure 8 The third cross-section 80 may include a first filter, a fourth filter, a thirteenth filter and a sixteenth filter (CF1, CF4, CF13, CF16), a semiconductor substrate 800, a pixel insulation structure 330, a first pixel group isolation structure and a fourth pixel group isolation structure (341, 344), an insulating trench structure 510, a first photoelectric conversion element, a fourth photoelectric conversion element, a thirteenth photoelectric conversion element and a sixteenth photoelectric conversion element (PD1, PD4, PD13, PD16), and a first group of bias contacts and a fourth group of bias contacts (521, 524).

[0134] In the following, for the convenience of description, the Figure 6 The semiconductor substrate 800 may be Figure 6 The first filter CF1 can be substantially the same as the semiconductor substrate 600. Figure 6 The first optical filters CF1 shown are substantially identical. Figure 8 The first photoelectric conversion element and the fourth photoelectric conversion element (PD1, PD4) shown can be connected to Figure 6 The first and fourth photoelectric conversion elements ( PD1 , PD4 ) shown are substantially identical. Figure 8 The insulating trench structure 510 shown can be Figure 6 The insulating trench structure 410 is substantially the same.

[0135] The fourth filter CF4 may overlap with the fourth pixel PX4 and may be disposed above the first surface 810 of the semiconductor substrate 800. The fourth filter CF4 may overlap with the fourth photoelectric conversion element PD4. The fourth filter CF4 may selectively transmit the incident light. Figure 6 The first color of light described.

[0136] The thirteenth filter CF13 may overlap with the thirteenth pixel PX13 and may be disposed above the first surface 810 of the semiconductor substrate 800. The thirteenth filter CF13 may overlap with the thirteenth photoelectric conversion element PD13. The thirteenth filter CF13 may also selectively transmit the incident light. Figure 6 The fourth color of light or the first color of light described in.

[0137] The sixteenth filter CF16 may overlap with the sixteenth pixel PX16 and may be disposed above the first surface 810 of the semiconductor substrate 800. The sixteenth filter CF16 may overlap with the sixteenth photoelectric conversion element PD16. The sixteenth filter CF16 may also selectively transmit the incident light. Figure 6 The fourth color of light or the first color of light described in.

[0138] The fourth photoelectric conversion element PD4 may generate photocharges in response to incident light. The incident light may be light of the first color that has passed through the fourth filter CF4.

[0139] The thirteenth photoelectric conversion element PD13 may generate photocharges in response to incident light. The incident light may be light of the first color or light of the fourth color that has passed through the thirteenth optical filter CF13. The thirteenth photoelectric conversion element PD13 may be disposed in the semiconductor substrate 800. The thirteenth photoelectric conversion element PD13 may overlap with the thirteenth optical filter CF13.

[0140] The sixteenth photoelectric conversion element PD16 may generate photocharges in response to incident light. The incident light may be light of the first color or light of the fourth color that has passed through the sixteenth optical filter CF16. The sixteenth photoelectric conversion element PD16 may be disposed in the semiconductor substrate 800. The sixteenth photoelectric conversion element PD16 may overlap with the sixteenth optical filter CF16.

[0141] In some implementations, the first pixel group isolation structure 341 can be recessed in one direction from the insulating trench structure 510 into the semiconductor substrate 800. In some other implementations, the first pixel group isolation structure 341 can be recessed in one direction from the second surface 820 of the semiconductor substrate 800 into the semiconductor substrate 800. The above two examples can vary depending on the order of the manufacturing process. For example, when the insulating trench structure 510 is formed after the first pixel group isolation structure 341 is formed, the first pixel group isolation structure 341 can be recessed in one direction from the insulating trench structure 510 into the semiconductor substrate 800, as shown in FIG. Figure 8 However, when the first pixel group isolation structure 341 is formed after the insulating trench structure 510 is first formed, Figure 8 Unlike the embodiment shown in FIG. 5 , the first pixel group isolation structure 341 may penetrate the insulating trench structure 510 and may be recessed from the second surface 820 into the semiconductor substrate 800. In addition, according to another embodiment, the first pixel group isolation structure 341 may be recessed from the first surface 810 into the semiconductor substrate 800 in a direction opposite to the one direction described above. However, for ease of description, the first to fourth pixel group isolation structures (e.g., Figure 4341 , 342 , 343 and 344 ) are recessed from the insulating trench structure 510 that may be formed on the second surface 820 into the semiconductor substrate 800 as an example.

[0142] For example, the first pixel group isolation structure 341 may be recessed in one direction from the insulating trench structure 510 into the semiconductor substrate 800. The first pixel group isolation structure 341 may include, for example, polysilicon, impurity-containing polysilicon, or a combination thereof. The first pixel group isolation structure 341 may surround the first photoelectric conversion element PD1 and the fourth photoelectric conversion element PD4. Return to reference Figure 4 The first pixel group isolation structure 341 may surround the first to fourth photoelectric conversion elements ( PD1 ˜ PD4 ).

[0143] For example, the fourth pixel group isolation structure 344 can be recessed in one direction from the insulating trench structure 510 into the semiconductor substrate 800. The fourth pixel group isolation structure 344 can include, for example, polysilicon, impurity-containing polysilicon, or any combination thereof. The fourth pixel group isolation structure 344 can surround the thirteenth photoelectric conversion element PD13 and the sixteenth photoelectric conversion element PD16. Return to reference Figure 4 The fourth pixel group isolation structure 344 may surround the thirteenth to sixteenth photoelectric conversion elements (PD13 ˜ PD16 ).

[0144] The first pixel group isolation structure 341 can optically isolate the first to fourth pixels (PX1-PX4) from each other. As an example, the first pixel group isolation structure 341 can optically isolate the first pixel PX1 from the fourth pixel PX4 from each other. In addition, when a bias voltage is applied to the first pixel group isolation structure 341 via the first set of bias contacts 521, noise in the first to fourth pixels (PX1-PX4) can be reduced.

[0145] The fourth pixel group isolation structure 344 can optically isolate the thirteenth through sixteenth pixels (PX13-PX16) from each other. As an example, the fourth pixel group isolation structure 344 can optically isolate the thirteenth pixel PX13 from the sixteenth pixel PX16 from each other. In addition, when a bias voltage is applied to the fourth pixel group isolation structure 344 via the fourth set of bias contacts 524, noise in the thirteenth through sixteenth pixels (PX13-PX16) can be reduced.

[0146] The first group of bias contacts 521 may have a structure that is recessed in one direction from the second surface 820 (alternatively, according to another embodiment, from the first surface 810) into the semiconductor substrate 800. The first group of bias contacts 521 may contact the first pixel group isolation structure 341 by penetrating the insulating trench structure 510. The first group of bias contacts 521 may apply a first bias voltage to the first pixel group isolation structure 341. The first group of bias contacts 521 is shown as only contacting the first pixel group isolation structure 341. Figure 8 The reason why the central first pixel group isolation structure 341 among the three first pixel group isolation structures 341 is in contact is that the three first pixel group isolation structures 341 are connected to each other and formed as one body (see Figure 4 ).

[0147] The fourth group of bias contacts 524 may have a structure that is recessed in one direction from the second surface 820 (alternatively, according to another embodiment, from the first surface 810) into the semiconductor substrate 800. The fourth group of bias contacts 524 may contact the fourth pixel group insulation structure 344 by penetrating the insulation trench structure 510. The fourth group of bias contacts 524 may apply a fourth bias voltage to the fourth pixel group isolation structure 344. The fourth group of bias contacts 524 is shown as contacting only the central fourth pixel group isolation structure 344 among the three fourth pixel group isolation structures 344 because the three fourth pixel group isolation structures 344 are connected to each other and formed integrally (see Figure 4 ).

[0148] The pixel insulating structure 330 may surround each of the first pixel group isolation structure and the fourth pixel group isolation structure (341, 344). The pixel insulating structure 330 may include an insulating material (e.g., silicon dioxide, silicon nitride, a silicon oxide-based insulating material, or a silicon nitride-based insulating material). The pixel insulating structure 330 may be recessed from the insulating trench structure 510 into the semiconductor substrate 800 in a direction along which the first pixel group isolation structure and the fourth pixel group isolation structure (341, 344) are recessed. The pixel insulating structure 330 may further gap-fill the space between the first pixel group isolation structure and the fourth pixel group isolation structure (341, 344), or may be further disposed in a region corresponding to the space between the first pixel group isolation structure and the fourth pixel group isolation structure (341, 344).

[0149] For example, a trench (e.g., a first trench) may be formed recessed from the second surface 820 into the semiconductor substrate 800, and the first trench may be gap-filled with an insulating material, thereby forming the pixel insulation structure 330. Two trenches (e.g., a second trench and a third trench) may be formed that are spaced apart from each other while penetrating the pixel insulation structure 330, and each of the second trench and the third trench may be gap-filled with polysilicon or doped polysilicon, thereby forming the first pixel group isolation structure 341 and the fourth pixel group isolation structure 344. Thereafter, a trench (e.g., a fourth trench) for removing a portion of the first and fourth pixel group isolation structures (341, 344) may be formed recessed from the second surface 820. For example, the fourth trench may be gap-filled with the same material as the pixel insulation structure 330, thereby forming the insulation trench structure 510.

[0150] The pixel isolation structure 330 can electrically isolate (or insulate) the first pixel group isolation structure 341 and the fourth pixel group isolation structure 344 from each other. Due to this electrical isolation (or insulation), a bias voltage can be applied independently to each of the first pixel group isolation structure and the fourth pixel group isolation structure (341, 344). Figure 4 Due to the insulating function (ie, electrical isolation or insulation) of the pixel isolation structure 330 , a bias voltage may be independently applied to each of the first to fourth pixel group isolation structures ( 341 ˜ 344 ).

[0151] Figure 9 is a diagram showing an embodiment of the disclosed technology. Figure 4 A cross-sectional view of another example of a pixel group taken along line BB'.

[0152] Reference Figure 4 、 Figure 8 and Figure 9 The fourth section 90 may include a first filter, a fourth filter, a thirteenth filter and a sixteenth filter (CF1, CF4, CF13, CF16), a semiconductor substrate 800, a pixel insulation structure 330, a first pixel group isolation structure and a fourth pixel group isolation structure (341, 344), an insulating trench structure 510, a first photoelectric conversion element, a fourth photoelectric conversion element, a thirteenth photoelectric conversion element and a sixteenth photoelectric conversion element (PD1, PD4, PD13, PD16), and a first group of bias contacts and a fourth group of bias contacts (521, 524).

[0153] In the following, we will focus on Figure 8 and Figure 9 Describe the difference between Figure 9 structure to avoid redundant explanations.

[0154] The pixel insulation structure 330 may surround each of the first pixel group isolation structure and the fourth pixel group isolation structure (341, 344). For pixel group isolation structures adjacent to each other among the first pixel group isolation structure and the fourth pixel group isolation structure (341, 344), when the two adjacent pixel group isolation structures are spaced apart from each other so that the adjacent pixel group isolation structures are electrically isolated from each other, the pixel insulation structure 330 does not gap fill the space between the first pixel group isolation structure and the fourth pixel group isolation structure (341, 344), but may be configured such that a recess depth of the pixel insulation structure 330 from the second surface 820 (or from the first surface 810 according to another embodiment) into the semiconductor substrate 800 is less than a recess depth of the first pixel group isolation structure and the fourth pixel group isolation structure (341, 344) into the semiconductor substrate 800, and is also greater than a recess depth of the insulation trench structure 510 into the semiconductor substrate 800.

[0155] For example, two trenches (e.g., a first trench and a second trench) may be formed recessed from the second surface 820 into the semiconductor substrate 800. After the area between the first trench and the second trench is removed to a depth less than the depth of the two trenches, a layer including an insulating material may be formed in the area (e.g., the etched area) from which the semiconductor substrate 800 has been removed, thereby forming the pixel insulating structure 330. After forming the pixel insulating structure 330, the first and second trench areas may be gap-filled to form the first and fourth pixel group isolation structures 341 and 344. Then, the trench (e.g., a third trench) formed when the first and fourth pixel group isolation structures (341, 344) and the pixel insulating structure 330 are partially removed may be formed recessed from the second surface 820. For example, the third trench may be gap-filled with the same material as the pixel insulating structure 330, thereby forming the insulating trench structure 510.

[0156] Figure 10 is a diagram showing an embodiment of the disclosed technology configured to Figure 2 An example circuit diagram of a pixel circuit (PC) modeling each pixel is shown in FIG.

[0157] Reference Figure 2 and Figure 10 , a pixel circuit (PC) may include a photoelectric conversion element (PD), a transfer transistor (TX), a floating diffusion region (FD), a reset transistor (RX), a source follower transistor (SF), and a select transistor (SX). A pixel circuit (PC) is a circuit diagram that models each pixel. For example, Figure 3 or Figure 4Each of the first to sixteenth pixels (PX1-PX16) may be modeled as the same circuit diagram.

[0158] The photoelectric conversion element (PD) can receive and absorb incident light, and can generate photoelectric charges corresponding to the intensity of the incident light through photoelectric conversion of the incident light. For example, the photoelectric conversion element (PD) can be implemented as a photodiode, a phototransistor, a photogate, or a combination thereof. Figure 10 In the drawings, for convenience of description, the photoelectric conversion element (PD) is exemplarily shown as a photodiode.

[0159] The transfer transistor (TX) may be a transistor having a gate to which a voltage corresponding to a row transfer signal (TS) is applied. The transfer signal (TS) may have either a high level or a low level. The transfer transistor TX may be turned on in response to a transfer signal (TS) having a high level, and may be turned off in response to a transfer signal (TS) having a low level. When the transfer transistor (TX) is turned on, photocharges generated by the photoelectric conversion element (PD) may be moved to the floating diffusion region (FD). The source of the transfer transistor (TX) may be, for example, the photoelectric conversion element (PD). The drain of the transfer transistor (TX) may be, for example, the floating diffusion region (FD).

[0160] The floating diffusion region (FD) can accumulate photocharges introduced by moving from the photoelectric conversion element (PD) via the transfer transistor (TX). The floating diffusion region (FD) can be used to convert the photocharges into a voltage. Since the floating diffusion region (FD) has a junction capacitor, the floating diffusion region (FD) can be used as a region in which photocharges can be accumulated. For example, the floating diffusion region (FD) can be a region containing impurities of the first conductivity type, and the semiconductor layer (e.g., Figure 6 and Figure 7 semiconductor substrate 600 or Figure 8 and Figure 9 The semiconductor substrate 800 may be a region containing impurities of the second conductivity type. Here, the floating diffusion region (FD) may include a floating capacitor (CFD).

[0161] The reset transistor (RX) may be a transistor having a gate to which a voltage corresponding to the reset signal (RS) is applied. The reset signal (RS) may have either a high level or a low level. The reset transistor (RX) may be turned on in response to the reset signal (RS) having a high level, and may be turned off in response to the reset signal (RS) having a low level. When the reset transistor (RX) is turned on, the floating diffusion (FD) may be reset to the power supply voltage (VDD). The source of the reset transistor (RX) may be, for example, the floating diffusion (FD). The drain of the reset transistor (RX) may be, for example, the power supply voltage (VDD).

[0162] The source follower transistor (SF) can amplify the potential change of the floating diffusion region (FD) and can transmit the amplified potential change to the selection transistor (SX). The voltage caused by the photocharge accumulated in the floating diffusion region (FD) can be applied to the gate of the source follower transistor (SF). The source of the source follower transistor (SF) can be connected to the power supply voltage (VDD). The drain of the source follower transistor (SF) can be connected to the source of the selection transistor (SX).

[0163] The selection transistor (SX) may be a transistor having a gate to which a voltage corresponding to the selection signal (SEL) is applied. The selection signal (SEL) may have a high level or a low level. The selection transistor (SX) may be turned on in response to the selection signal (SEL) having a high level, and may be turned off in response to the selection signal (SEL) having a low level. When the selection transistor (SX) is turned on, a pixel signal corresponding to a potential change of the floating diffusion region (FD) amplified by the source follower transistor (SF) may be output. A series of processes for outputting a pixel signal from the selection transistor (SX) may be an example of a pixel readout process. The output pixel signal may be transmitted to Figure 1 The correlated double sampler (CDS) 130 described in .

[0164] For example, an example of a pixel readout process is as follows.

[0165] The transfer transistor (TX) can move the photocharges generated by the photoelectric conversion element or photodetector (PD) to the floating diffusion region (FD) in response to a transfer signal (TS) having a high level. The source follower transistor (SF) can amplify the potential change corresponding to the photocharge accumulated in the floating diffusion region (FD). The select transistor (SX) can generate a pixel signal corresponding to the potential change amplified by the source follower transistor (SF) in response to a select signal (SEL) having a high level.

[0166] During the readout period of the pixel, for example, the selection signal (SEL) may have a high level. The readout period may refer to a time period in which a pixel readout process is performed.

[0167] Figure 11A The present invention is applied to the embodiment of the disclosed technology. Figure 5A 1 to 4. A timing diagram showing example levels of first to fourth bias signals (BS1 to BS4) of the first to fourth pixel isolation structures (321 to 324) shown in FIG.

[0168] Figure 11B The present invention is applied to the embodiment of the disclosed technology. Figure 5B 1 to 4. A timing diagram of example levels of first to fourth bias signals (BS1 to BS4) of the first to fourth pixel group isolation structures (341 to 344) shown in FIG.

[0169] Reference Figure 3 、 Figure 5A 、 Figure 10 and Figure 11A , the first pixel to the sixteenth pixel (PX1~PX16) of the first pixel group 200G1 can be arranged in a (4×4) matrix structure. The first pixel, the second pixel, the fifth pixel, and the sixth pixel (PX1, PX2, PX5, PX6) can be arranged in a row (e.g., the first row line). The third pixel, the fourth pixel, the seventh pixel, and the eighth pixel (PX3, PX4, PX7, PX8) can be arranged in another row (e.g., the second row line). The ninth pixel, the tenth pixel, the thirteenth pixel, and the fourteenth pixel (PX9, PX10, PX13, PX14) can be arranged in another row (e.g., the third row line). The eleventh pixel, the twelfth pixel, the fifteenth pixel, and the sixteenth pixel (PX11, PX12, PX15, PX16) can be arranged in another row (e.g., the fourth row line).

[0170] A section performing readout for a first row line may be a first readout section (RO1). A section performing readout for a second row line may be a second readout section (RO2). A section performing readout for a third row line may be a third readout section (RO3). A section performing readout for a fourth row line may be a fourth readout section (RO4).

[0171] The first readout period (RO1) may be a period represented by [t1, t2] (where t1 < t2). The second readout period (RO2) may be a period represented by [t3, t4] (where t2 < t3 < t4). The third readout period (RO3) may be a period represented by [t5, t6] (where t4 < t5 < t6). The fourth readout period (RO4) may be a period represented by [t7, t8] (where t6 < t7 < t8).

[0172] The bias voltage generator 300 may generate first to fourth bias signals (BS1 to BS4), respectively. Each of the first to fourth bias signals (BS1 to BS4) may have a high level (H) or a low level (L) according to time.

[0173] The first bias signal (BS1) may have a high level (H) in each of the first readout period (RO1) and the third readout period (RO3). The first bias signal (BS1) may have a low level (L) in each of the second readout period (RO2) and the fourth readout period (RO4). In each of the first readout section and the third readout section (RO1, RO3) in which the first bias signal (BS1) has a high level (H), the bias voltage generator 300 may apply the first bias voltage (VD1) to the first pixel isolation structure 321. In the section in which the first bias signal (BS1) has a low level (L), the bias voltage generator 300 may not apply the first bias voltage (VD1) to the first pixel isolation structure 321.

[0174] The second bias signal (BS2) may have a high level (H) in each of the first readout period (RO1) and the third readout period (RO3). The second bias signal (BS2) may have a low level (L) in each of the second readout period (RO2) and the fourth readout period (RO4). In each of the first and third readout sections (RO1, RO3) in which the second bias signal (BS2) has a high level (H), the bias voltage generator 300 may apply the second bias voltage (VD2) to the second pixel isolation structure 322. In the section in which the second bias signal (BS2) has a low level (L), the bias voltage generator 300 may not apply the second bias voltage (VD2) to the second pixel isolation structure 322.

[0175] The third bias signal (BS3) may have a high level (H) in each of the second readout period (RO2) and the fourth readout period (RO4). The third bias signal (BS3) may have a low level (L) in each of the first readout period (RO1) and the third readout period (RO3). In each of the second readout section and the fourth readout section (RO2, RO4) in which the third bias signal (BS3) has a high level (H), the bias voltage generator 300 may apply the third bias voltage (VD3) to the third pixel isolation structure 323. In the section in which the third bias signal (BS3) has a low level (L), the bias voltage generator 300 may not apply the third bias voltage (VD3) to the third pixel isolation structure 323.

[0176] The fourth bias signal (BS4) may have a high level (H) in each of the second readout period (RO2) and the fourth readout period (RO4). The fourth bias signal (BS4) may have a low level (L) in each of the first readout period (RO1) and the third readout period (RO3). In each of the second readout section and the fourth readout section (RO2, RO4) in which the fourth bias signal (BS4) has a high level (H), the bias voltage generator 300 may apply the fourth bias voltage (VD4) to the fourth pixel isolation structure 324. In the section in which the fourth bias signal (BS4) has a low level (L), the bias voltage generator 300 may not apply the fourth bias voltage (VD4) to the fourth pixel isolation structure 324.

[0177] At a specific time point where the first to fourth bias signals (BS1-BS4) have a low level (L), the first to fourth bias voltages (VD1-VD4) may not be applied to the pixel isolation structure. The image sensing device 100 based on some implementations of the disclosed technology can reduce power consumption required when applying bias voltages to reduce noise.

[0178] exist Figure 3 In the embodiment of the disclosed technology described in , in an embodiment in which the first color is green, the second color is red, and the third color is blue, the first bias voltage (VD1) may be higher than the second bias voltage (VD2), and the second bias voltage (VD2) may be higher than the third bias voltage (VD3). In an embodiment in which the fourth color is green, the fourth bias voltage (VD4) may be higher than each of the second bias voltage (VD2) and the third bias voltage (VD3). In an embodiment in which the fourth color is white, the fourth bias voltage (VD4) may be higher than the first bias voltage (VD1).

[0179] The magnitude relationship between the first bias voltage to the fourth bias voltage ( VD1 ˜ VD4 ) is merely an example, may vary depending on the implementation, and may be determined experimentally.

[0180] exist Figure 11B In order to facilitate the description, the Figure 11A Description of duplicate description.

[0181] Reference Figure 4 、 Figure 5B 、 Figure 10 and Figure 11B , the first pixel to the sixteenth pixel (PX1 to PX16) of the second pixel group 200G2 can be arranged in a (4×4) matrix structure. The first pixel, the second pixel, the fifth pixel, and the sixth pixel (PX1, PX2, PX5, PX6) can be arranged in a row (e.g., the first row line). The third pixel, the fourth pixel, the seventh pixel, and the eighth pixel (PX3, PX4, PX7, PX8) can be arranged in another row (e.g., the second row line). The ninth pixel, the tenth pixel, the thirteenth pixel, and the fourteenth pixel (PX9, PX10, PX13, PX14) can be arranged in another row (e.g., the third row line). The eleventh pixel, the twelfth pixel, the fifteenth pixel, and the sixteenth pixel (PX11, PX12, PX15, PX16) can be arranged in another row (e.g., the fourth row line).

[0182] The bias voltage generator 300 may generate first to fourth bias signals (BS1 to BS4), respectively. Each of the first to fourth bias signals (BS1 to BS4) may have either a high level (H) or a low level (L) according to time.

[0183] The first bias signal (BS1) may have a high level (H) in each of the first readout period (RO1) and the second readout period (RO2). The first bias signal (BS1) may have a low level (L) in each of the third readout period (RO3) and the fourth readout period (RO4). In each of the first readout section and the second readout section (RO1, RO2) in which the first bias signal (BS1) has a high level (H), the bias voltage generator 300 may apply the first bias voltage (VD1) to the first pixel isolation structure 321. In the section in which the first bias signal (BS1) has a low level (L), the bias voltage generator 300 may not apply the first bias voltage (VD1) to the first pixel isolation structure 321.

[0184] The second bias signal (BS2) may have a high level (H) in each of the first readout period (RO1) and the second readout period (RO2). The second bias signal (BS2) may have a low level (L) in each of the third readout period (RO3) and the fourth readout period (RO4). In each of the first readout section and the second readout section (RO1, RO2) in which the second bias signal (BS2) has a high level (H), the bias voltage generator 300 may apply the second bias voltage (VD2) to the second pixel isolation structure 322. In the section in which the second bias signal (BS2) has a low level (L), the bias voltage generator 300 may not apply the second bias voltage (VD2) to the second pixel isolation structure 322.

[0185] The third bias signal (BS3) may have a high level (H) in each of the third readout period (RO3) and the fourth readout period (RO4). The third bias signal (BS3) may have a low level (L) in each of the first readout period (RO1) and the second readout period (RO2). In each of the third and fourth readout sections (RO3, RO4) in which the third bias signal (BS3) has a high level (H), the bias voltage generator 300 may apply the third bias voltage (VD3) to the third pixel isolation structure 323. In the section in which the third bias signal (BS3) has a low level (L), the bias voltage generator 300 may not apply the third bias voltage (VD3) to the third pixel isolation structure 323.

[0186] The fourth bias signal (BS4) may have a high level (H) in each of the third readout period (RO3) and the fourth readout period (RO4). The fourth bias signal (BS4) may have a low level (L) in each of the first readout period (RO1) and the second readout period (RO2). In each of the third and fourth readout sections (RO3, RO4) in which the fourth bias signal (BS4) has a high level (H), the bias voltage generator 300 may apply the fourth bias voltage (VD4) to the fourth pixel isolation structure 324. In the section in which the fourth bias signal (BS4) has a low level (L), the bias voltage generator 300 may not apply the fourth bias voltage (VD4) to the fourth pixel isolation structure 324.

[0187] At a specific time point when the first to fourth bias signals (BS1 to BS4) have a low level (L), the first to fourth bias voltages (VD1 to VD4) may not be applied to the pixel isolation structure. Image sensing device 100 based on some implementations of the disclosed technology can reduce power consumption required when applying bias voltages to reduce noise.

[0188] exist Figure 3 In an embodiment of the disclosed technology described in , in an embodiment where the first color is green, the second color is red, and the third color is blue, the first bias voltage (VD1) may be higher than the second bias voltage (VD2), and the second bias voltage (VD2) may be higher than the third bias voltage (VD3). In an embodiment where the fourth color is green, the fourth bias voltage (VD4) may be higher than each of the second bias voltage (VD2) and the third bias voltage (VD3). In an embodiment where the fourth color is white, the fourth bias voltage (VD4) may be higher than the first bias voltage (VD1).

[0189] Reference Figures 1 to 11B The described embodiment of the image sensing device 100 is not limited to the above example. When the image sensing device 100 operates in, for example, the full 4-coupling (A4C) mode or the phase detection autofocus (PDAF) mode for adjusting the focus, the readout order of the pixels included in the pixel array 200 may be determined differently from the image generation mode in which an image of an external scene is generated, and either the timing point of applying the bias voltage to the pixel isolation structure according to the readout order of the pixels or the magnitude of the bias voltage may also be determined differently from the image generation mode.

[0190] The image sensing device 100 according to an embodiment of the disclosed technology can independently control the bias voltage applied to each pixel isolation structure surrounding a pixel that generates a pixel signal in response to light of different colors, and can provide higher quality images in which the noise of pixels on which light beams of different colors are incident can be more effectively reduced.

[0191] In addition, embodiments of the disclosed technology can provide an image sensing device that adjusts a signal level of a bias voltage applied to a pixel isolation structure to reduce noise of a pixel, thereby reducing power consumption required to reduce noise of each pixel.

[0192] As apparent from the above description, an image sensing device based on some implementations of the disclosed technology can reduce noise of pixels and can reduce noise deviation that may occur between pixels transmitting light of different wavelengths.

[0193] An image sensing device based on some implementations of the disclosed technology can reduce power consumption by designing timing points for applying different bias voltages to pixels that respectively transmit light beams of different wavelengths.

[0194] Although a number of illustrative embodiments have been described, it should be understood that modifications and enhancements to the disclosed embodiments and other embodiments may be devised based on what is described and / or illustrated in this patent document.

[0195] CROSS-REFERENCE TO RELATED APPLICATIONS

[0196] This patent document claims priority to and the benefit of Korean Patent Application No. 10-2024-0042574, filed on March 28, 2024, the disclosure of which is incorporated herein by reference in its entirety as a part of the disclosure of this patent document.

Claims

1. An image sensing device, comprising: a first pixel overlapping a first filter that transmits light of a first color and that generates photocharge in response to the light of the first color; a second pixel spaced apart from the first pixel in a first direction and overlapping a second filter, the second filter transmitting light of a second color different from the first color, and the second pixel generating photocharge in response to the light of the second color; a first pixel isolation structure, the first pixel isolation structure surrounding the first pixel to isolate the first pixel and the second pixel from each other, and receiving a first bias voltage; as well as A second pixel isolation structure surrounds the second pixel to optically isolate the first pixel and the second pixel from each other, and receives a second bias voltage different from the first bias voltage.

2. The image sensing device according to claim 1, further comprising: a first bias contact configured to transmit the first bias voltage to the first pixel isolation structure; as well as A second bias contact is provided to transfer the second bias voltage to the second pixel isolation structure.

3. The image sensing device according to claim 1 , further comprising: a third pixel having a third filter that transmits light of a third color that is different from each of the first color and the second color, the third pixel being spaced apart from the first pixel in a second direction different from the first direction; as well as a third pixel isolation structure, the third pixel isolation structure surrounding the third pixel and receiving a third bias voltage, in, The third bias voltage is different from each of the first bias voltage and the second bias voltage.

4. The image sensing device according to claim 3, further comprising: A third bias contact is provided, wherein the third bias contact transmits the third bias voltage to the third pixel isolation structure.

5. The image sensing device according to claim 3, wherein: The first color is green, the second color is red, and the third color is blue.

6. The image sensing device according to claim 1, further comprising: A pixel isolation structure is provided between the first pixel isolation structure and the second pixel isolation structure, and electrically isolates the first pixel isolation structure and the second pixel isolation structure from each other.

7. The image sensing device according to claim 1, wherein: In response to the dark current of the first pixel being greater than the dark current of the second pixel, the magnitude of the first bias voltage is greater than the magnitude of the second bias voltage.

8. The image sensing device according to claim 1, wherein In response to the temperature of the first pixel being higher than the temperature of the second pixel, the magnitude of the first bias voltage is smaller than the magnitude of the second bias voltage.

9. The image sensing device according to claim 1, further comprising: a third pixel overlapping a third filter, the third filter transmitting light of the first color and spaced apart from the first pixel in a second direction different from the first direction; a fourth pixel, the fourth pixel overlapping with a fourth filter, the fourth filter transmitting light of the second color and spaced apart from the second pixel in the second direction; a third pixel isolation structure, the third pixel isolation structure surrounding the third pixel and receiving the first bias voltage; as well as A fourth pixel isolation structure surrounds the fourth pixel and receives the second bias voltage.

10. The image sensing device according to claim 9, wherein The first pixel isolation structure and the third pixel isolation structure are included in the first pixel group isolation structure and are disposed in contact with each other; and The second pixel isolation structure and the fourth pixel isolation structure are included in a second pixel group isolation structure and are disposed in contact with each other.

11. The image sensing device according to claim 10, further comprising: A pixel isolation structure is provided between the first pixel group isolation structure and the second pixel group isolation structure to electrically isolate the first pixel group isolation structure and the second pixel group isolation structure from each other.

12. The image sensing device according to claim 10, wherein: The first pixel and the third pixel are read out during a first time period, and the second pixel and the fourth pixel are read out during a second time period; and applying the first bias voltage to the first pixel group isolation structure during the first time period, and applying the second bias voltage to the second pixel group isolation structure during the second time period, in, The end point of the first time period is earlier than the start point of the second time period.

13. The image sensing device according to claim 1, wherein: applying the first bias voltage to the first pixel isolation structure during readout of the first pixel; and During readout of the second pixel, the second bias voltage is applied to the second pixel isolation structure.

14. An image sensing device, comprising: a first photoelectric conversion element that is provided in the semiconductor substrate and generates photocharges in response to incident light; a second photoelectric conversion element provided in the semiconductor substrate and spaced apart from the first photoelectric conversion element in a first direction, the second photoelectric conversion element generating photocharges in response to the incident light; a first optical filter provided on a back surface of the semiconductor substrate on which the incident light is incident and overlapping with the first photoelectric conversion element, the first optical filter transmitting light of a first color among the incident light; a second optical filter provided on the back surface of the semiconductor substrate and overlapping with the second photoelectric conversion element, the second optical filter transmitting light of a second color different from the first color among the incident light; a first pixel isolation structure, the first pixel isolation structure being recessed into the semiconductor substrate and surrounding the first photoelectric conversion element; as well as a second pixel isolation structure, the second pixel isolation structure being recessed into the semiconductor substrate and surrounding the second photoelectric conversion element; in, The first pixel isolation structure receives a first bias voltage; and The second pixel isolation structure receives a second bias voltage different from the first bias voltage.

15. The image sensing device according to claim 14, further comprising: a third photoelectric conversion element provided in the semiconductor substrate and spaced apart from the first photoelectric conversion element in a second direction different from the first direction, the third photoelectric conversion element generating photocharges in response to the incident light; as well as a third filter provided on the back surface of the semiconductor substrate and overlapping with the third photoelectric conversion element, the third filter transmitting light of a third color different from each of the first color and the second color among the incident light.

16. The image sensing device according to claim 15, wherein: The first color is green, the second color is red, and the third color is blue.

17. The image sensing device according to claim 15, further comprising: a third pixel isolation structure, the third pixel isolation structure being recessed in the semiconductor substrate and surrounding the third photoelectric conversion element, the third pixel isolation structure being spaced apart from the first pixel isolation structure along the second direction, in, The third pixel isolation structure receives a third bias voltage that is different from each of the first bias voltage and the second bias voltage.

18. The image sensing device according to claim 14, further comprising: A pixel isolation structure is provided between the first pixel isolation structure and the second pixel isolation structure to electrically isolate the first pixel isolation structure and the second pixel isolation structure from each other.

19. An image sensing device, comprising: a first pixel that generates an electrical signal in response to light of a first color; a second pixel spaced apart from the first pixel and generating an electrical signal in response to light of a second color; a first pixel isolation structure receiving a first bias voltage and surrounding the first pixel; as well as A second pixel isolation structure is spaced apart from the first pixel isolation structure, receives a second bias voltage, and surrounds the second pixel.

20. An image sensing device, comprising: a first pixel group including a plurality of first pixels, each first pixel generating an electrical signal in response to light of a first color; a second pixel group including a plurality of second pixels, each second pixel generating an electrical signal in response to light of a second color; a first pixel group isolation structure receiving a first bias voltage and surrounding the plurality of first pixels; as well as A second pixel group isolation structure is provided, the second pixel group isolation structure being spaced apart from the first pixel group isolation structure and surrounding the plurality of second pixels, the second pixel group isolation structure receiving a second bias voltage.

Images