Satellite-borne DBF-SAR channel error real-time correction method and device

Abstract

The application discloses a kind of real-time correction method and device for channel error of spaceborne DBF-SAR, belong to the technical field of spaceborne synthetic aperture radar multi-channel.The method includes the scaling signal of single channel containing error is carried out to be unoblique, and unoblique signal is generated;From unoblique signal, the absolute time delay information of single channel is extracted, and after traversing all channels, the relative time delay compensation code of each channel is obtained;After compensating time delay error, unoblique is handled again to obtain new unoblique signal, and the absolute amplitude and phase information of single channel is extracted therefrom, and after traversing all channels, the relative amplitude and phase compensation code of each channel is obtained;DBF time delay control code and weight are generated based on compensation code, realize DBF real-time processing and multi-channel error real-time compensation.The digital resource that the application additionally occupies and consumes is small, error extraction precision meets use requirement, greatly improves the engineering realizability of DBF-SAR.

Description

Technical Field

[0001] This invention belongs to the field of multi-channel technology of spaceborne synthetic aperture radar, specifically relating to a method and device for real-time correction of channel errors in spaceborne DBF-SAR. Background Technology

[0002] With the continuous development of Synthetic Aperture Radar (SAR) technology, high-resolution, wide-swath imaging has become an important goal for next-generation SAR systems. To achieve this goal, elevation-oriented digital beamforming (DBF) technology has been widely applied to spaceborne SAR systems. DBF technology can significantly improve the imaging performance of SAR systems by weighting and synthesizing signals from multiple receiving channels in the digital domain. However, DBF technology places extremely high demands on the consistency of the elevation multi-channels. Amplitude, phase, and time delay errors between channels can reduce inter-channel coherence, leading to image quality degradation and even failing to meet the requirements for high-resolution imaging.

[0003] In traditional spaceborne SAR systems, the extraction and compensation of multi-channel errors typically rely on ground processing. Specifically, calibration data acquired during imaging by a spaceborne SAR system needs to be first transmitted to the ground for error extraction and calculation by a ground-based computer. The calculation results are then transmitted back to the satellite via command packets to compensate for the errors. This traditional error extraction and compensation method has significant limitations. First, spaceborne DBF-SAR systems typically allow only a few minutes for DBF self-calibration before each imaging cycle, while the traditional transmission, calculation, and transmission processes are time-consuming and cannot meet the real-time requirements of DBF technology. Second, ground processing relies heavily on ground-based computers, is highly dependent on ground equipment, and has a complex processing flow that is easily affected by the ground environment and communication links.

[0004] Furthermore, existing channel error extraction methods mainly focus on amplitude and phase error extraction, while methods for extracting time delay errors are relatively few. For systems with time delay errors, directly extracting amplitude and phase errors without first correcting these errors will result in inaccurate results, and may even lead to error extraction failure. Therefore, how to extract amplitude, phase, and time delay errors between multiple channels in real time and accurately on a satellite, and perform real-time compensation, is a key problem that urgently needs to be solved in current spaceborne DBF-SAR systems. Summary of the Invention

[0005] To address the aforementioned technical problems, this invention provides a method and apparatus for real-time correction of channel errors in spaceborne DBF-SAR. Under the premise of hard real-time constraints, it can extract and compensate for the inconsistencies in amplitude, phase, and time delay between multiple channels of DBF-SAR in real time on orbit, thus solving the engineering feasibility problem of real-time DBF processing in next-generation spaceborne SAR systems oriented towards high-resolution wide-swath systems.

[0006] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0007] A method for real-time correction of channel errors in spaceborne DBF-SAR, the method comprising:

[0008] Step 1: Deskewing the calibration signal of a single channel containing errors to generate a deskewing signal;

[0009] Step 2: Extract the absolute time delay information of a single channel from the descrambling signal, and obtain the relative time delay compensation code of each channel after traversing all channels;

[0010] Step 3: After compensating for the time delay error based on the relative time delay compensation code, execute step S1 again to obtain a new deslope signal. Extract the absolute amplitude and phase information of a single channel from the new deslope signal, and obtain the relative amplitude and phase compensation code of each channel after traversing all channels.

[0011] Step 4: Generate DBF delay control code based on relative delay compensation code, and input relative amplitude and phase compensation codes into weight generator to realize real-time DBF processing and real-time compensation of multi-channel errors.

[0012] On the other hand, the present invention provides a spaceborne DBF-SAR channel error real-time correction device, comprising:

[0013] The processing module is used to deskeep the calibration signal of a single channel containing errors and generate a deskeep signal.

[0014] The extraction module is used to extract the absolute time delay information of a single channel from the descrambling signal, and obtain the relative time delay compensation code of each channel after traversing all channels.

[0015] The reprocessing module is used to compensate for the time delay error based on the relative time delay compensation code, and then obtain a new deslope signal through the processing module again. The absolute amplitude and phase information of a single channel are extracted from the new deslope signal, and the relative amplitude and phase compensation code of each channel is obtained after traversing all channels.

[0016] The generation module is used to generate DBF delay control codes based on relative delay compensation codes, and simultaneously inputs the relative amplitude and phase compensation codes into the weight generator to realize real-time DBF processing and real-time multi-channel error compensation.

[0017] Thirdly, the present invention provides an electronic device, comprising: one or more processors; and a memory for storing one or more programs; wherein, when the one or more programs are executed by the one or more processors, the one or more processors implement the aforementioned method for real-time correction of channel errors in a spaceborne DBF-SAR system.

[0018] Fourthly, the present invention provides a computer-readable storage medium having executable instructions stored thereon, which, when executed by a processor, enable the processor to implement the aforementioned method for real-time correction of channel errors in a spaceborne DBF-SAR.

[0019] The beneficial effects of this invention are as follows:

[0020] This invention provides a method and apparatus for real-time correction of channel errors in spaceborne DBF-SAR, offering significant advantages. First, this method can extract and compensate for amplitude, phase, and time delay errors between multiple channels in real time while the satellite is in orbit, without relying on ground processing, significantly improving the system's real-time performance and imaging quality. Second, through efficient algorithm design and hardware implementation, this invention requires minimal additional digital resources while ensuring high-precision error extraction capabilities, guaranteeing the system's stability and reliability under various operating conditions. Furthermore, this method is highly compatible with existing mid-frequency DBF real-time processing frameworks, facilitating integration, reducing system complexity and cost, and improving engineering feasibility. Simulation and experimental verification demonstrate that this invention can effectively extract minute time delay errors, as well as amplitude and phase errors, verifying its feasibility and reliability in practical applications, providing a solid technical guarantee for high-resolution, wide-swath imaging tasks. Attached Figure Description

[0021] Figure 1 This is a schematic diagram of the error extraction principle and a schematic diagram of the real-time error correction principle during DBF operation;

[0022] Figure 2 This is a flowchart of a real-time correction method for channel errors of a spaceborne DBF-SAR according to the present invention;

[0023] Figure 3 This represents the shaping result of a threshold comparator in the prior art.

[0024] Figure 4 This is the shaping result of the hysteresis comparator trigger of the present invention;

[0025] Figure 5 The simulation results are based on the time delay setting and extraction method of this invention;

[0026] Figure 6 The simulation results are based on the amplitude and phase error settings and extraction according to the method of the present invention. Detailed Implementation

[0027] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0028] This invention provides a real-time correction method for channel errors in spaceborne DBF-SAR, comprising: performing dechirp processing on the calibration signal of a single channel containing errors; extracting the absolute time delay information of a single channel from the Decirp signal, repeating multiple rounds of Pulse Repetition Interval (PRI) to traverse each channel and obtaining the time delay compensation code for all channels; after compensating for the time delay error, repeating the Decirp operation, extracting the absolute amplitude and phase information of a single channel from the new Decirp signal, repeating multiple rounds of PRI to traverse each channel and obtaining the amplitude and phase compensation codes for all channels; adding the time delay compensation code to the Pulse Extension Loss (PEL) time delay control code required for DBF imaging to obtain the DBF time delay control code; inputting the amplitude error and phase error compensation codes into a weight generator, thereby simultaneously realizing real-time DBF processing and real-time multi-channel error compensation.

[0029] According to embodiments of this disclosure, dechirp processing is performed on a calibration signal containing errors in a single channel, including: a frequency modulation source generates a linear frequency modulation (LFM) signal pulse; an intermediate frequency (IF) signal is up-converted to a radio frequency (RF) signal using a radar transmitter; after passing through an internal calibration loop containing a transceiver (TR) calibration network, the RF signal is down-converted to an IF signal by an IF receiver; and a digital IF signal is obtained after AD sampling. The digital IF signal enters a DBF IF real-time processing module implemented on an FPGA, and follows the same channel as the normal DBF signal, and is digitally down-converted to a baseband signal. While the calibration signal is being transmitted and recorded, a digital copy of an ideal LFM baseband signal pulse is generated based on Direct Digital Synthesizer (DDS), so that the calibration signal, which has a slight delay after passing through the loop, is multiplied point-by-point by the ideal signal starting from 0 sampling in real time, thereby realizing the dechirp processing.

[0030] According to embodiments of this disclosure, the absolute delay information of a single channel is extracted from the Decirp signal. After repeating multiple rounds of PRI to traverse each channel, the delay compensation code for all channels is obtained. This includes: designing a hysteresis comparator to shape the Decirp-reduced frequency signal into a 0-1 square wave signal; using the transition of the 0-1 square wave as a trigger and the FPGA high-speed clock as a counter to count the periods of multiple square wave signals; estimating the frequency of the square wave signal by averaging based on the period and signal parameters, and finally converting it into the absolute delay of the channel; traversing each channel in multiple rounds of PRI and repeating the above operation to obtain the absolute delay error of each channel; subtracting the value of the reference channel from all absolute errors to obtain the relative delay compensation code for all channels.

[0031] According to embodiments of this disclosure, noise can cause glitches in the shaped square wave. To overcome this problem, this disclosure designs a hysteresis comparator trigger, the system function of which is:

[0032] ,

[0033] The threshold is updated after each trigger:

[0034] ,

[0035] Here, TH is the threshold value set by the instruction, which can be adjusted flexibly according to the situation.

[0036] According to an embodiment of this disclosure, the absolute channel delay time of the nth channel... for:

[0037] ,

[0038] in, is the FPGA master clock, N is the number of square wave cycles, CNT is the FPGA master clock count value, and Kr is the calibration signal bar frequency.

[0039] According to an embodiment of this disclosure, the delay compensation value of the nth channel for:

[0040] ,

[0041] Among them, the delay compensation value of the nth channel, n takes the number of all channels, and when n is 1, the relative delay is 0.

[0042] According to embodiments of this disclosure, after compensating for time delay errors, the Decirp operation is repeated to extract the absolute amplitude and phase information of a single channel from the Decirp signal. After repeating multiple rounds of PRI to traverse each channel, the amplitude and phase compensation codes for all channels are obtained. This includes: compensating for time delay errors based on the intermediate frequency DBF real-time processing framework, and then performing the Decirp operation. At this time, the Decirp signal only contains amplitude and phase errors; setting the same sampling start, accumulating several point-frequency signals to obtain complex estimates of the signal, and converting the real and imaginary parts into amplitude and phase based on the CORDIC core; traversing each channel in multiple rounds of PRI, repeating the above operation to obtain the absolute amplitude and phase estimates for each channel; subtracting the reference channel value from all absolute errors to obtain the amplitude and phase compensation codes for all channels.

[0043] ,

[0044] in, This is the amplitude compensation value for the nth channel. This is the phase compensation value for the nth channel. n takes the value of all channels. When n is 1, the relative amplitude is 100% and the relative phase is 0 degrees.

[0045] According to embodiments of this disclosure, the delay compensation code is added to the pulse extension loss (PEL) delay control code required for DBF imaging to obtain the DBF delay control code. The amplitude error and phase error compensation codes are input into a weight generator. During normal DBF startup and imaging, both real-time DBF processing and real-time multi-channel error compensation are simultaneously achieved. This includes: adding the delay compensation code to the pulse extension loss (PEL) delay control code required for DBF imaging to obtain the DBF delay control code, which controls the DBF digital delay unit; inputting the amplitude error and phase error compensation codes into a weight generator to obtain the DBF weight amplitude and phase control code, thus generating DBF weights that simultaneously possess error compensation functionality; and simultaneously achieving real-time DBF processing and real-time multi-channel error compensation during normal DBF startup and imaging. The specific implementation process of this invention is described step by step below.

[0046] like Figure 2 As shown, the real-time correction method for channel errors of the spaceborne DBF-SAR includes:

[0047] Step S1: Dechirp the calibration signal of a single channel containing errors to obtain the dechirped signal. This includes:

[0048] Step S11: The frequency modulation source generates a linear frequency modulation (LFM) signal pulse. The radar transmitter upconverts the intermediate frequency signal into a radio frequency signal. After passing through an internal calibration loop containing a TR calibration network, the radio frequency signal is downconverted into an intermediate frequency signal by the intermediate frequency receiver. After AD sampling, a digital intermediate frequency signal is obtained.

[0049] Step S12: The digital intermediate frequency signal enters the DBF intermediate frequency real-time processing module based on FPGA, and follows the same channel as the normal DBF signal, and is digitally down-converted into a baseband signal.

[0050] The signal model after digital down-conversion is shown in the following equation:

[0051] ,

[0052] Where rect(.) represents the rectangular envelope of the pulse, and t represents the fast time. Represents the calibration signal pulse width. This represents the actual physical delay of the nth channel, where j represents the imaginary unit. The frequency modulation of the calibration signal. The center frequency of the radio frequency signal is represented by the amplitude and phase error. Since amplitude and phase errors do not affect the extraction of time delay error, the above model ignores amplitude and phase errors.

[0053] The true physical delay refers to the delay of the electrical signal from the frequency modulation source to the DBF module through the loop cable. For a typical spaceborne DBF-SAR, the length of this loop is generally on the order of tens to hundreds of meters, with a typical value of about 0.3 μs. Based on this, it is necessary to extract the inter-channel delay relative error with an accuracy of 0.1 ps.

[0054] Since the intermediate frequency DBF only has one digital down-conversion module, only one channel of signal should be allowed to enter the real-time processing module in each pulse repetition interval (PRI), and the signal input of other channels must be blocked. This can be achieved by setting the weighting coefficient of the DBF to keep it at 1 or 0.

[0055] Step S13: While the calibration signal is being transmitted and recorded, a digital copy of the ideal linear frequency modulated baseband signal pulse is generated based on DDS. The calibration signal, which has a slight delay after passing through the loop, is then multiplied point by point with the ideal reference signal starting from 0 sampling in real time to achieve Decirp processing.

[0056] The Decirp process does not require additional large storage space to record the signals to be analyzed; it is a fully automated process.

[0057] The expression for the ideal reference signal is:

[0058] ,

[0059] The expression for the signal after Dechirp is:

[0060] ,

[0061] It can be seen that the Decirp signal is a point-frequency signal with a frequency of . .

[0062] In this embodiment of the disclosure, reference is made to Figure 1 The diagrams shown illustrate the error extraction principle and the real-time error correction principle during DBF operation. The bold outlines in the diagrams indicate the signal flow during error extraction. Each PRI allows only a single channel's signal to pass through and extracts the error in real time. After several PRIs have traversed all channels, the delay (①) is compensated first, and then the process of extracting the error through a single channel is repeated to obtain the amplitude (②) and phase (③) errors. After the real-time error extraction is completed, when the DBF is working normally, the signals from all channels enter the DBF processing unit in parallel. At this time, the previously extracted compensation factors for the delay (①), amplitude (②), and phase (③) errors work simultaneously, achieving the effect of real-time error compensation.

[0063] Step S2: Extract the absolute time delay information of a single channel from the descrambling signal. Repeat the PRI process multiple times, traversing each channel, to obtain the relative time delay compensation code for all channels. This includes:

[0064] Step S21: Design a hysteresis comparator to shape the dechirp-de-scanned point frequency signal into a 0-1 square wave signal.

[0065] To achieve fully automated operation, it is necessary to shape the point frequency signal into a square wave signal. The processed square wave can then be used as the trigger for a gated clock, thereby calculating the signal frequency in real time and extrapolating high-precision absolute time delay based on the frequency. Practical experience has shown that, as... Figure 3 As shown, if a threshold comparator is simply used for shaping, quantization noise and system noise will cause glitches in the shaped square wave. To overcome this problem, this disclosure designs a hysteresis comparator flip-flop, the system function of which is:

[0066] ,

[0067] The threshold is updated after each trigger:

[0068] ,

[0069] The threshold value TH can be set using auxiliary data or adjusted in advance as needed.

[0070] The advantage of using this hysteresis trigger is that, although it introduces a certain delay effect on the signal, as a time-invariant system, the frequency of the shaped signal is the same as before shaping. (See reference...) Figure 4 The shaping result of the hysteresis comparator shown is given with the threshold TH set to 50. Although the square wave signal in the figure is delayed relative to the sine wave signal, there are no glitches when it jumps, and the frequency (period) information of the signal is also preserved, which can achieve accurate extraction of the time delay error parameter.

[0071] Step S22: Use the transition of the 0-1 square wave signal as a trigger, and use the FPGA high-speed clock as a counter to count the periods of multiple square wave signals.

[0072] Step S23: Based on the period and parameters of multiple square wave signals, the frequency of the square wave signal is estimated by averaging the period, and finally converted into the absolute time delay of the channel.

[0073] Using dual-edge triggering, to eliminate incomplete cycles, the first two transition triggers must be filtered out. The FPGA master clock count value CNT is then calculated after 2N transitions to obtain the average signal period over N cycles. The calculation results corresponding to these N cycles provide an estimate of the true physical delay of the nth channel.

[0074] ,

[0075] in, The FPGA master clock is used here. It's worth noting that the measurement accuracy for delay time far exceeds the interval of a single tick of the FPGA master clock. The minimum time difference between multiple DBF-SAR channels can be as small as a one-division or even half-division misalignment between the AD sampling clocks. AD sampling clocks are typically in the GHz range, while the FPGA master clock used for measurement is typically in the 100MHz range. The core of this innovation lies in utilizing a frequency modulation factor. This amplifies minute time differences, enabling the measurement of high-speed clocks based on low-speed clocks. In practice, these clock sources are all temperature-controlled, low-jitter crystal oscillators, and the time error remains constant during power-on imaging. Therefore, as long as this error is estimated and compensated for, the time synchronization of each channel can be maintained.

[0076] Step S24: Traverse each channel in multiple rounds of PRI, repeating steps S21-S23 to obtain the absolute time delay error for each channel.

[0077] As previously mentioned, each PRI only allows the signal from a single channel to enter the real-time processing module, while other channels remain blocked. By going through the number of PRI channels, the absolute time delay of all channels can be extracted. For spaceborne SAR, the traversal operation of all channels can be completed within 10ms, which meets the hard real-time requirements.

[0078] Step S25: Subtract the value of the reference channel from all absolute delay errors to obtain the relative delay compensation code for the entire channel.

[0079] Generally, the first channel can be used as the reference channel, and the absolute delay of all channels is calculated as follows to obtain the relative delay.

[0080] ,

[0081] in, Let n be the time delay compensation value for the nth channel, where n takes the value of all channels. When n is 1, the relative time delay is 0. In DBF-SAR, the unit of compensation is generally not seconds, but rather a "grid" of sampling, which is a point in the discrete digital signal sequence. As mentioned earlier, the minimum time difference between multiple DBF-SAR channels can be half a grid offset between the AD sampling clocks. Therefore, the number of grid points for compensation for the nth channel is:

[0082] ,

[0083] in, This is the AD sampling frequency, and `round()` is the rounding function. The solution obtained in this way... It could be a compensation code in half-grid units like 0, 0.5, 1, 1.5..., which can compensate for time delay errors in half-grid units between channels.

[0084] Step S3: After compensating for the time delay error, repeat step S1 to extract the absolute amplitude and phase information of a single channel from the obtained new Decirp signal. After repeating the PRI process multiple times for each channel, obtain the relative amplitude and phase compensation codes for all channels. This includes:

[0085] Step S31: Based on the intermediate frequency DBF real-time processing framework, compensate for the time delay error, and then perform step S1 again. The new solution slope signal obtained at this time only contains amplitude and phase errors.

[0086] The baseband signal, which compensates for time delay errors and contains only amplitude and phase errors, is shown below:

[0087] ,

[0088] in, To ensure consistency in the time delay of the electrical signal after time delay error from the frequency modulation source to the DBF module, all channels must have the same delay. At this point, the only differences between signals are amplitude and phase. This represents the absolute amplitude error of the nth channel. This represents the absolute phase error of the nth channel.

[0089] Step S32: Set the same sampling start point, perform deskewing on the baseband signal containing only amplitude and phase errors to obtain a new deskewing point frequency signal s(k). Since the s(k) signal is a discrete digital signal, take M effective points of the s(k) signal, for example, from the 1st point to the Mth point, and perform complex summation to obtain the complex estimate of the s(k) signal. Based on the CORDIC kernel, convert the real and imaginary parts into amplitude and phase:

[0090] ,

[0091] Where C is the result of the summation, which is a complex number, s is the signal being summed, and k is the variable counted M times. In FPGA development tools, CORDIC has ready-made IP cores that convert the real and imaginary parts into amplitude and phase, which will not be elaborated further.

[0092] The absolute amplitude and phase of the nth channel are calculated as follows:

[0093] ,

[0094] Here, Amp represents the absolute amplitude, which is obtained by taking the absolute value of the complex number C using the function abs(), and angle represents the absolute phase, which is obtained by taking the phase of the complex number C using the function angle().

[0095] Step S33: Traverse each channel in multiple rounds of PRI, repeating steps S31-S32 to obtain the absolute amplitude and absolute phase estimates for each channel.

[0096] Step S34: Divide the absolute amplitude of all channels by the amplitude of the reference channel, subtract the phase of the reference channel from the absolute phase error of all channels, and subtract the value of the reference channel to obtain the relative amplitude and relative phase compensation code of all channels.

[0097] Generally, the first channel can be used as the reference channel. The absolute amplitude and phase of all channels are calculated as follows to obtain the relative amplitude and phase. The amplitude and phase compensation values ​​are calculated as follows:

[0098] ,

[0099] in, This is the amplitude compensation value for the nth channel. This is the phase compensation value for the nth channel. n takes the value of all channels. When n is 1, the relative amplitude is 100% and the relative phase is 0 degrees.

[0100] Step S4: Add the relative delay compensation code to the pulse extension loss (PEL) delay control code required for DBF imaging to obtain the DBF delay control code. Input the relative amplitude and relative phase compensation codes into the weight generator to simultaneously achieve real-time DBF processing and real-time multi-channel error compensation. This includes:

[0101] Step S41: Add the relative time delay compensation code to the pulse extension loss (PEL) time delay control code required for DBF imaging to obtain the DBF time delay control code, and control the DBF digital delay unit.

[0102] Step S42: Input the relative amplitude and relative phase compensation codes into the weight generator to obtain the DBF weight amplitude and phase control codes. The generated DBF weights then have the function of error compensation.

[0103] Step S43: During normal DBF startup imaging, simultaneously realize DBF real-time processing and multi-channel error real-time compensation.

[0104] In this embodiment, based on the intermediate frequency DBF real-time processing framework, a method for real-time extraction and compensation of errors in time delay, amplitude, and phase is added. This disclosure mainly describes the technical details of how the added part is organically combined with the intermediate frequency DBF framework. Through the method described in this disclosure, the consistency of multiple channels in the intermediate frequency DBF real-time processing framework is ensured, and the stability and robustness of DBF-SAR are ultimately improved.

[0105] In the embodiments disclosed herein, see again Figure 1 The thick lines in the diagram indicate the signal flow. In each PRI, only a single channel's signal is allowed to pass through, and its passing error is extracted. After several PRIs, all channels are traversed. First, the delay (①) is compensated, and then this traversal process is repeated to extract the amplitude (②) and phase (③). After the error extraction is completed, while the DBF is working normally, the signals from all channels enter the DBF processing unit in parallel. At this time, the previously extracted error compensation factors (① delay, ② amplitude, and ③ phase) work simultaneously, achieving the effect of real-time error compensation.

[0106] In this embodiment of the disclosure, Figure 5 The simulation results of delay error extraction are illustrated, where the unit of delay is a division of the AD sampling clock, and 1 represents one sampling point of the AD. The results show that this invention can robustly estimate even a half-division AD sampling deviation, with a residual of 0 for the delay estimation.

[0107] In this embodiment of the disclosure, Figure 6The simulation results of amplitude and phase error extraction are illustrated. The amplitude and phase settings are represented by circles (〇), while the extraction results are represented by asterisks (). The results show that the method proposed in this disclosure can effectively extract amplitude and phase errors with deviations within 5%.

[0108] The embodiments of this disclosure have been described in detail above with reference to the accompanying drawings. It should be noted that implementations not illustrated or described in the drawings or the main text of the specification are forms known to those skilled in the art and are not described in detail. Furthermore, the definitions of the various elements and methods described above are not limited to the specific structures, shapes, or methods mentioned in the embodiments, and those skilled in the art can easily modify or substitute them.

[0109] Based on the above description, those skilled in the art should have a clear understanding of the real-time correction method for channel errors of spaceborne DBF-SAR disclosed herein.

[0110] In summary, this disclosure provides a real-time channel error correction method for spaceborne DBF-SAR, which is closely integrated with the existing intermediate frequency (IF) DBF real-time processing framework. It highly reuses the weighting, delay, and down-conversion functions in the IF DBF, controlling the sequential passage of a single signal and extracting delay, amplitude, and phase errors. Finally, the weighting and delay of the IF DBF are used to achieve real-time error compensation. Because this scheme requires minimal additional digital resources and its error extraction accuracy meets usage requirements, it significantly improves the engineering feasibility of DBF-SAR.

[0111] On the other hand, the present invention provides a spaceborne DBF-SAR channel error real-time correction device, the various modules of which can implement the various steps of the aforementioned method, specifically including:

[0112] The processing module is used to deskeep the calibration signal of a single channel containing errors and generate a deskeep signal.

[0113] The extraction module is used to extract the absolute time delay information of a single channel from the descrambling signal, and obtain the relative time delay compensation code of each channel after traversing all channels.

[0114] The reprocessing module is used to compensate for the time delay error based on the relative time delay compensation code, and then obtain a new deslope signal through the processing module again. The absolute amplitude and phase information of a single channel are extracted from the new deslope signal, and the relative amplitude and phase compensation code of each channel is obtained after traversing all channels.

[0115] The generation module is used to generate DBF delay control codes based on relative delay compensation codes, and simultaneously inputs the relative amplitude and phase compensation codes into the weight generator to realize real-time DBF processing and real-time multi-channel error compensation.

[0116] Thirdly, the present invention provides an electronic device, comprising: one or more processors; and a memory for storing one or more programs; wherein, when the one or more programs are executed by the one or more processors, the one or more processors implement the aforementioned method for real-time correction of channel errors in a spaceborne DBF-SAR system.

[0117] Fourthly, the present invention provides a computer-readable storage medium having executable instructions stored thereon, which, when executed by a processor, enable the processor to implement the aforementioned method for real-time correction of channel errors in a spaceborne DBF-SAR.

[0118] It should also be noted that the directional terms mentioned in the embodiments, such as "up," "down," "front," "back," "left," and "right," are only for reference to the directions in the accompanying drawings and are not intended to limit the scope of protection of this disclosure. Throughout the drawings, the same elements are represented by the same or similar reference numerals. Conventional structures or constructions will be omitted where they may cause confusion in understanding this disclosure.

[0119] Furthermore, the shapes and dimensions of the components in the figures do not reflect actual size and proportion, but are merely illustrative of embodiments of this disclosure. Additionally, any reference numerals placed between parentheses in the claims should not be construed as limiting the scope of the claims.

[0120] Unless otherwise stated, the numerical parameters in this specification and the appended claims are approximate values ​​and can be varied according to desired characteristics derived from the content of this disclosure. Specifically, all figures used in the specification and claims to indicate composition, reaction conditions, etc., should be understood to be modified by the term "about" in all cases. Generally, this means that a specific amount may vary by ±10% in some embodiments, ±5% in some embodiments, ±1% in some embodiments, and ±0.5% in some embodiments.

[0121] Furthermore, the word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements.

[0122] The use of ordinal numbers such as "first," "second," "third," etc., in the specification and claims to modify the corresponding elements does not imply that the element has any ordinal number, nor does it represent the order of one element with another element, or the order of manufacturing methods. The use of these ordinal numbers is only to enable a named element to be clearly distinguished from another element with the same name.

[0123] Furthermore, unless specifically described or required to occur in a specific order, the order of the above steps is not limited to those listed above and can be varied or rearranged according to the desired design. Moreover, the above embodiments can be used in combination with each other or with other embodiments based on design and reliability considerations; that is, technical features from different embodiments can be freely combined to form more embodiments.

[0124] Those skilled in the art will understand that modules in the device of the embodiments can be adaptively changed and placed in one or more devices different from that embodiment. Modules, units, or components in the embodiments can be combined into a single module, unit, or component, and further, they can be divided into multiple sub-modules, sub-units, or sub-components. Except where at least some of such features and / or processes or units are mutually exclusive, any combination can be used to combine all features disclosed in this specification (including the accompanying claims, abstract, and drawings) and all processes or units of any method or device so disclosed. Unless expressly stated otherwise, each feature disclosed in this specification (including the accompanying claims, abstract, and drawings) may be replaced by an alternative feature that serves the same, equivalent, or similar purpose. Furthermore, in the unit claims enumerating several means, several of these means may be embodied by the same hardware item.

[0125] Similarly, it should be understood that, in order to simplify this disclosure and aid in understanding one or more of the various aspects of the disclosure, in the foregoing description of exemplary embodiments of the disclosure, various features of the disclosure are sometimes grouped together in a single embodiment, figure, or description thereof. However, this approach to disclosure should not be construed as reflecting an intention that the claimed disclosure requires more features than are expressly recited in each claim. Rather, as reflected in the following claims, the aspects of the disclosure consist of fewer than all features of a single foregoing disclosed embodiment. Therefore, the claims following the detailed description are hereby expressly incorporated into that detailed description, wherein each claim itself is a separate embodiment of the disclosure.

[0126] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A real-time channel error correction method for a spaceborne DBF-SAR, characterized in that, The method comprises: Step S1, performing desquaring processing on the single-channel scaled signal containing errors to generate a desquaring signal; Step S2, extracting absolute time delay information of the single channel from the desquaring signal, and obtaining relative time delay compensation codes of each channel after traversing all channels; Step S3, compensating time delay errors based on the relative time delay compensation codes, and then performing step S1 again to obtain a new desquaring signal, extracting absolute amplitude and phase information of the single channel from the new desquaring signal, and obtaining relative amplitude and phase compensation codes of each channel after traversing all channels; Step S4, generating DBF time delay control codes based on the relative time delay compensation codes, and inputting the relative amplitude and phase compensation codes into a weight generator to realize real-time processing of DBF and real-time compensation of multi-channel errors.

2. The method according to claim 1, wherein, The step S1 comprises: Step S11, a frequency modulation source generates a linear frequency modulation signal pulse, and after frequency up-conversion, internal scaling loop, frequency down-conversion and AD sampling, a digital intermediate frequency signal is obtained; Step S12, the digital intermediate frequency signal is down-converted to a baseband signal through DBF intermediate frequency real-time processing; Step S13, a digital copy of an ideal linear frequency modulation baseband signal is generated based on DDS, and point-by-point complex multiplication is performed on the desquaring signal to complete desquaring processing.

3. The method according to claim 1, wherein, The step S2 comprises: Step S21, the desquaring signal after desquaring processing is shaped into a 0-1 square wave signal through a hysteresis comparison flip-flop; Step S22, the jump of the 0-1 square wave signal is taken as a trigger, and a FPGA high-speed clock is taken as a counter to count the periods of multiple square wave signals; Step S23, based on the periods and parameters of the multiple square wave signals, the frequency of the square wave signal is estimated after averaging the periods, and is finally converted into the absolute time delay of the channel; Step S24, each channel is traversed in multiple rounds of PRI, and steps S21-S23 are repeated to obtain the absolute time delay error of each channel; Step S25, the absolute time delay errors of all channels are respectively subtracted from the absolute time delay of the reference channel to obtain the relative time delay compensation codes of all channels.

4. The method according to claim 3, wherein, In the step S21, the system function of the hysteresis comparison flip-flop is: ， And the threshold is updated after each trigger: ， Wherein, TH represents the threshold value.

5. The method according to claim 1, wherein, The step S3 comprises: Step S31, based on the intermediate frequency DBF real-time processing framework, the time delay error is compensated, and step S1 is performed again to obtain a new desquaring signal; Step S32, the same sampling start is set, a plurality of points of the new desquaring signal are accumulated to obtain a complex estimation value of the signal, the real part and the imaginary part are converted into amplitude and phase based on the CORDIC core to obtain the absolute amplitude and phase; Step S33, each channel is traversed in multiple rounds of PRI, and steps S31-S32 are repeated to obtain the absolute amplitude and absolute phase estimation value of each channel; Step S34, the absolute amplitudes of all channels are divided by the amplitude of the reference channel, and the absolute phase errors of all channels are subtracted from the phase of the reference channel to obtain the relative amplitude and relative phase compensation codes of all channels.

6. The method according to claim 5, wherein, The new desquaring signal only contains amplitude and phase errors.

7. The method according to claim 1, wherein, The step S4 comprises: Step S41, add the relative time delay compensation code to the pulse stretch loss time delay control code required by DBF imaging to obtain the DBF time delay control code, and control the DBF digital delay unit; Step S42, input the relative amplitude and relative phase compensation code into the weight generator to obtain the DBF weight amplitude and phase control code, and the generated DBF weight has the function of error compensation; Step S43, when the DBF is normally started to image, the DBF real-time processing and the multi-channel error real-time compensation are simultaneously realized.

8. A device for real-time correction of channel errors of a spaceborne DBF-SAR, characterized in that Comprise: The processing module is used for performing desquamation processing on the single channel calibration signal containing the error to generate a desquamation signal; The extraction module is used for extracting the absolute time delay information of the single channel from the desquamation signal, and obtaining the relative time delay compensation code of each channel after traversing all channels; The reprocessing module is used for compensating the time delay error based on the relative time delay compensation code, and then obtaining a new desquamation signal through the processing module, extracting the absolute amplitude and phase information of the single channel from the new desquamation signal, and obtaining the relative amplitude and phase compensation code of each channel after traversing all channels; The generation module is used for generating the DBF time delay control code based on the relative time delay compensation code, and inputting the relative amplitude and phase compensation code into the weight generator to realize the DBF real-time processing and the multi-channel error real-time compensation.

9. An electronic device, comprising: Comprise: One or more processors; Memory for storing one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors realize the method for correcting the real-time error of the channel of the spaceborne DBF-SAR according to any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, Executable instructions are stored thereon, which can make the processor realize the method for correcting the real-time error of the channel of the spaceborne DBF-SAR according to any one of claims 1-7 when executed by the processor.

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