Annealing method of oxidation film

Through the staged gradient temperature annealing method, the problem of uneven residual stress release in the furnace tube annealing of chemical vapor deposition silicon oxide thin films was solved, the reliability and uniformity of semiconductor devices were improved, and microcracks and interface delamination defects were reduced.

CN120767192AActive Publication Date: 2025-10-10BEIJING INTEGRATED CIRCUIT EQUIPMENT INNOVATION CENTER CO LTD
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Patent Information

Application Number
CN202510926436.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-07-04
Publication Date
2025-10-10
Estimated Expiration
2045-07-04

AI Technical Summary

Technical Problem

The furnace tube annealing process of chemical vapor deposition silicon oxide films in the existing technology cannot release the residual stress at different levels in stages, resulting in instantaneous thermal stress concentration caused by differences in thermal expansion coefficients, causing microcracks or interface delamination defects in semiconductor devices, affecting device reliability.

Method used

A staged gradient temperature rise annealing method is adopted, including stress release stage, structural reorganization stage, pre-densification stage and steady-state densification stage. Through the combination of different atmospheres and heating rates, the residual stress is gradually released, the thermal stress concentration is alleviated, and the film structure is optimized.

Benefits of technology

It achieves the staged release of residual stress, reduces microcracks and interface delamination defects, improves the reliability and uniformity of semiconductor devices, reduces the wet etching rate, and adapts to the shrinkage requirements of advanced process technology.

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Abstract

The invention relates to the technical field of semiconductor annealing, in particular to an annealing method of an oxide film, which comprises the following stages: a stress release stage: in an inert gas atmosphere, heating to a first temperature at a first heating rate, and keeping the temperature for a first duration; a structure recombination stage: in the atmosphere of mixed gas of oxygen and inert gas, raising the temperature from the first temperature to a second temperature at a second temperature raising rate, and keeping the temperature for a second duration; in the pre-densification stage, in the atmosphere of mixed gas of oxygen and inert gas, the temperature is increased to a third temperature from the second temperature at a third temperature increasing rate, and heat preservation is conducted for a third duration; and a steady-state densification stage: in the inert gas atmosphere, raising the temperature from the third temperature to a fourth temperature at a fourth temperature raising rate, and keeping the temperature for a fourth duration. According to the annealing method of the oxidation film, staged stepped heating is adopted, and residual stress of different levels is released in a staged mode; instantaneous thermal stress concentration can be relieved, defects are reduced, and the reliability of the semiconductor device is improved.
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Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor annealing, and in particular to an annealing method for an oxide film. Background Art

[0002] In semiconductor device manufacturing, chemical vapor deposition (CVD) is a process in which gaseous or vaporous substances react in the gas phase or at a gas-solid interface to form a solid deposit. CVD silicon oxide films are widely used in semiconductor devices as gate dielectric layers, passivation layers, or shallow trench isolation (STI), and their performance is highly dependent on the annealing process. During the CVD process, the decomposition of precursors (such as silane and TEOS) may leave residual hydrogen in the form of Si-H or Si-OH, resulting in poor chemical stability in the film. Annealing removes free hydrogen (H) and restructures the amorphous silicon oxide network (optimizing the Si-O-Si bond angle), thereby increasing film density. The shrinkage rate is then adjusted to match the substrate's thermal expansion coefficient. It also reduces the density of defect states (such as dangling bonds) at the Si / SiO2 interface, thereby improving the electrical reliability of semiconductor devices.

[0003] During the furnace annealing process for chemical vapor deposited silicon oxide thin films, differences in film shrinkage due to thermal stress release directly impact device performance and yield. Related technologies typically employ a single-temperature annealing process, which has the following drawbacks: It cannot release residual stress at different levels; and differences in thermal expansion coefficients caused by sudden temperature changes can compound transient thermal stress, leading to stress concentrations within the film and causing microcracks or interface delamination defects in semiconductor devices, thus reducing device reliability. Summary of the Invention

[0004] The present invention aims to at least solve the technical problems existing in the related art and proposes an annealing method for an oxide film, which can release residual stress in stages; it can alleviate instantaneous thermal stress concentration, reduce defects such as microcracks or interface delamination, and thus improve the reliability of semiconductor devices.

[0005] The present invention provides an annealing method for an oxide film, which is applied to a semiconductor device. The annealing method comprises:

[0006] Stress release stage: in an inert gas atmosphere, heating to a first temperature at a first heating rate and keeping the temperature for a first time;

[0007] Restructuring stage: in a mixed gas atmosphere of oxygen and inert gas, heating from the first temperature to a second temperature at a second heating rate and maintaining the temperature for a second time period;

[0008] Pre-densification stage: in a mixed gas atmosphere of oxygen and inert gas, heating from the second temperature to a third temperature at a third heating rate and maintaining the temperature for a third time;

[0009] Steady-state densification stage: in an inert gas atmosphere, heating from the third temperature to a fourth temperature at a fourth heating rate and maintaining the temperature for a fourth time period.

[0010] Optionally, the structural reorganization stage is a step-by-step temperature increase stage, and the step-by-step temperature increase stage has N sub-temperature increase stages, where N≥2.

[0011] Optionally, the sub-heating stage includes the following steps:

[0012] Each time the sub-temperature is increased, the temperature is kept warm for a fifth period of time; wherein, the sub-temperature = (the second temperature - the first temperature) / N, N ≥ 2.

[0013] Optionally, the oxide film has a target shrinkage rate, and the third temperature is determined based on the target shrinkage rate.

[0014] Optionally, the target shrinkage rate includes a first shrinkage rate and a second shrinkage rate, and the third temperature includes a third lower limit temperature and a third upper limit temperature, the third lower limit temperature corresponds to the first shrinkage rate, and the third upper limit temperature corresponds to the second shrinkage rate;

[0015] The first shrinkage rate is smaller than the second shrinkage rate, and the third lower limit temperature is smaller than the third upper limit temperature.

[0016] Optionally, the first shrinkage rate is in the range of 4% to 6%, and the second shrinkage rate is in the range of 7% to 9%;

[0017] The third lower temperature limit has a value range of 600±5°C, and the third upper temperature limit has a value range of 700±5°C.

[0018] Optionally, the target shrinkage rate satisfies the following formula:

[0019]

[0020] Wherein, S is the target shrinkage rate, in %; T3 is the third temperature, in °C; t2 is the second temperature, in min; P is the actual pressure of the annealing chamber, in Torr; P0 is the initial pressure of the annealing chamber, in Torr; m1, m2, and m3 are process coefficients.

[0021] Optionally, the fourth duration includes a first time period and a second time period set successively, during the first time period, HCl gas is introduced into the inert gas atmosphere to remove metal impurities and residual H; during the second preset time period, an inert gas atmosphere is used.

[0022] Optionally, the first heating rate K1, the second heating rate K2, the third heating rate K3 and the fourth heating rate K4 satisfy: K1 < K4, K2 < K4, and K3 < K4.

[0023] Optionally, the first heating rate ranges from 2°C / min to 3°C / min; the first temperature ranges from 195°C to 205°C; and the first duration ranges from 15min to 25min.

[0024] And / or, the second heating rate is in the range of 3°C / min to 5°C / min; the second temperature is in the range of 395°C to 405°C; the second duration is in the range of 30min to 45min; the oxygen content in the mixed gas atmosphere of oxygen and inert gas is 4% to 6%;

[0025] And / or, the third heating rate is in the range of 2°C / min to 4°C / min; the third temperature is in the range of 595°C to 705°C; the third duration is in the range of 20min to 40min;

[0026] And / or, the fourth heating rate ranges from 17°C / min to 20°C / min; the fourth temperature ranges from 1000°C to 1200°C; and the fourth duration ranges from 30min to 60min.

[0027] The present invention provides an annealing method for an oxide film, which is applied to semiconductor devices and has at least the following beneficial technical effects:

[0028] First, a staged temperature increase is adopted to release residual stress at different levels in stages, thereby improving the uniformity of semiconductor devices.

[0029] Secondly, the use of staged temperature increase prevents sudden temperature changes, which can alleviate instantaneous thermal stress concentration and reduce defects such as microcracks or interface delamination, thereby improving the reliability of semiconductor devices.

[0030] Thirdly, it promotes the release of free hydrogen, realizes the efficient removal of free hydrogen, reduces the pore defects caused by hydrogen aggregation in subsequent high-temperature treatment, reduces or even avoids the formation of weak bonding areas between residual hydrogen and the film, and thus avoids abnormal increase in wet etching rate. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 A schematic diagram of an annealing curve of an annealing method for a silicon oxide film of a semiconductor device in the related art;

[0032] Figure 2A schematic diagram of an annealing curve of an oxide film annealing method provided in an embodiment of the present invention;

[0033] Figure 3 A schematic diagram of removing H in an oxide film annealing method provided by an embodiment of the present invention.

[0034] Description of reference numerals:

[0035] 01, stress release stage; 02, structural reorganization stage; 03, pre-densification stage; 04, steady-state densification stage; K1, first heating rate; T1, first temperature; t1, first duration; K2, second heating rate; T2, second temperature; t2, second duration; K3, third heating rate; T3, third temperature; T 31 , the third lower limit temperature; T 32 , third upper limit temperature; t3, third duration; K4, fourth heating rate; T4, fourth temperature; t4, fourth duration; ΔT, sub-temperature; t5, fifth duration; S, target shrinkage rate; S1, first shrinkage rate; S2, second shrinkage rate; P, actual pressure of annealing chamber; P0, initial pressure of annealing chamber. DETAILED DESCRIPTION

[0036] Semiconductor annealing is an important step in the semiconductor manufacturing process. It refers to the process of changing the internal structure and properties of semiconductor materials through heating and subsequent slow cooling. In this process, the atomic arrangement of the semiconductor material is optimized, thereby eliminating internal stress, reducing defects, and improving the stability and electrical properties of the semiconductor material. Among them, residual stress is the stress that exists in equilibrium within the material when there are no external factors acting on the material. Residual stress is divided into macro-densification residual stress and micro-bonding residual stress. Low temperature (200℃~500℃) can only release local micro-bonding residual stress and has limited effect on macro-densification residual stress. Although high temperature (>800℃) can release macro-densification residual stress, the micro-bonding residual stress gradient remaining at low temperature can easily aggravate local defects at high temperature, resulting in uneven internal stress distribution.

[0037] See also Figure 1The annealing method of the silicon oxide film of the semiconductor device of the related art includes the following steps: placing the semiconductor device in a vertical furnace tube, and setting the deposition thickness of the silicon oxide film of the semiconductor device to 100nm to 500nm; in an inert gas atmosphere, heating the temperature in the furnace tube from room temperature to 500℃ at a heating rate of 3℃ / min to 5℃ / min, and then heating the temperature in the furnace from 500℃ to the target temperature T0 at a heating rate of 1℃ / min to 2℃ / min; wherein the target temperature T0 is based on the required temperature of the semiconductor device. Density selection: Under normal density, the target temperature T0 ranges from 800℃ to 900℃, and under high density, the target temperature T0 ranges from 1000℃ to 1100℃; and the holding time at the target temperature T0 is 60min to 180min, and the holding time is adjusted based on the target shrinkage rate S of the semiconductor device; then the temperature in the furnace is cooled from the target temperature T0 to 500℃ at a cooling rate of less than or equal to 2℃ / min, and then the temperature in the furnace is naturally cooled from 500℃ to room temperature. This annealing method rapidly raises the furnace temperature from room temperature to a target temperature T0 (≥800°C). First, it cannot release residual stress at different levels in stages, but only releases macroscopic densification residual stress. Second, the difference in thermal expansion coefficient caused by the sudden temperature change superimposes transient thermal stress, causing stress concentration within the film and resulting in defects. Such defects are prone to microcracks or interface delamination. For example, in high-aspect-ratio structures (aspect ratio >40:1) of dynamic random access memory (DRAM), such defects can easily lead to microcracks on the sidewalls due to uneven stress release, thereby reducing device reliability. Third, hydrogen diffusion efficiency is low, and residual hydrogen forms weak bonding areas with the film, resulting in poor chemical stability of the film. In an HF solution, the weak bonding areas are preferentially etched, significantly increasing the wet etching rate (for example, the etching rate of flowable chemical vapor deposition (FCVD) films in HF is 3 to 5 times that of traditional CVD films), which affects the device integration process.

[0038] To address the technical issues of the aforementioned single-temperature annealing method for silicon oxide films used in semiconductor devices, which cannot release residual stress at different levels in stages and leads to stress concentration within the film, resulting in defects in the semiconductor device and a reduction in the reliability of the semiconductor device, Referring to the Figure, an embodiment of the present invention provides an annealing method for an oxide film. This method primarily utilizes a staged gradient temperature increase annealing method to release residual stress in stages, alleviate transient thermal stress concentration, reduce defects such as microcracks or interface delamination, and thus improve the reliability of the semiconductor device, as described below.

[0039] In order to make the above-mentioned objects, features and advantages of the present invention more clearly understood, the following Figure 2 The specific embodiments of the present invention are described in detail.

[0040] See also Figure 2 An embodiment of the present invention provides an annealing method for an oxide film, which is applied to a semiconductor device. The annealing method includes the following steps:

[0041] (1) Stress release stage A: In an inert gas atmosphere, such as argon, nitrogen or other inert gases, which can effectively exhaust the air and oxygen in the annealing chamber to prevent the semiconductor from being oxidized, the temperature is raised to the first temperature T1 at a first heating rate K1 and kept at this temperature for a first time t1; in this stage, the temperature is raised to the first temperature T1 by heating, such as Figure 3 As shown, it promotes the release of physically adsorbed free hydrogen (such as H2 and H2O) in semiconductor devices, reducing the porosity defects caused by hydrogen accumulation in subsequent high-temperature treatments; relaxes the residual stress through internal local plastic deformation or local stress relaxation, reducing the local microscopic bonding residual stress;

[0042] (2) Structural reorganization stage B: In a mixed gas atmosphere of oxygen and inert gas, the temperature is increased from the first temperature T1 to the second temperature T2 at a second heating rate K2, and the temperature is maintained for a second time t2; in this stage, during the heating process, the semiconductor device undergoes microstructural reorganization, for example, Si-O-Si network reconstruction, and film densification is initiated. The shrinkage rate in this stage initially reaches 1% to 3%; the plastic deformation energy stored in the stress release stage A is released, promoting lattice adjustment and defect repair; in addition, oxygen is introduced into the process, which can introduce oxygen atoms, which react with defects in the semiconductor device to form oxides, thereby repairing lattice defects and improving the electrical properties of the semiconductor device;

[0043] (3) Pre-densification stage C: In a mixed gas atmosphere of oxygen and inert gas, the temperature is increased from the second temperature T2 to the third temperature T3 at a third heating rate K3 and maintained for a third time t3; in this stage, the temperature is further increased to accelerate the diffusion of oxygen atoms, further eliminate internal micropores and optimize the grain boundary distribution;

[0044] (4) Steady-state densification stage D: In an inert gas atmosphere, the temperature is increased from the third temperature T3 to the fourth temperature T4 at a fourth heating rate K4 and maintained at the temperature for a fourth time t4. In this stage, the high temperature is maintained to promote grain boundary migration and macro densification, release macro densification residual stress, promote the semiconductor device to achieve a steady-state densification structure, inhibit subsequent deformation or stress rebound, and improve the mechanical properties of the semiconductor device.

[0045] An annealing method for an oxide film provided by an embodiment of the present invention, when applied to a semiconductor device, has the following beneficial technical effects:

[0046] First, a staged step-by-stage temperature increase is used to release residual stress at different levels in stages, thereby improving the uniformity of semiconductor devices. Specifically, in the stress release stage A, local microscopic bonding residual stress is released; in the structural reorganization stage B, oxygen is introduced to introduce oxygen atoms to react with defects in the semiconductor device to form oxides to repair lattice defects; in the pre-densification stage C, the temperature is continued to increase to accelerate the diffusion of oxygen atoms, further eliminate internal micropores and optimize the grain boundary distribution; in the steady-state densification stage D, the macroscopic densification residual stress is released;

[0047] Secondly, the use of staged temperature increase prevents sudden temperature changes, which can alleviate instantaneous thermal stress concentration and reduce defects such as microcracks or interface delamination, thereby improving the reliability of semiconductor devices.

[0048] Thirdly, it promotes the release of free hydrogen, realizes the efficient removal of free hydrogen, reduces the pore defects caused by hydrogen aggregation in subsequent high-temperature treatment, reduces or even avoids the formation of weak bonding areas between residual hydrogen and the film, and thus avoids abnormal increase in wet etching rate.

[0049] See also Figure 2 In the embodiment of the present invention, the structural reorganization stage B is a step-by-step heating stage, which has N sub-heating stages, where N≥2. For example, N can be 2, 3, 4, or other numbers. Figure 2 As shown, N is 4. With this arrangement, during the structural reorganization phase, the temperature is gradually increased through stepwise heating. This avoids lattice mutations caused by sudden temperature changes, thus making the temperature gradient inside the semiconductor device uniform. This effectively reduces thermal stress concentration, thereby reducing the risk of cracks in the semiconductor device, making it suitable for uniform densification of high aspect ratio structures. Furthermore, as the temperature rises, surface defects are repaired first, followed by deep lattice damage, thereby sequentially repairing defects at different energy levels.

[0050] See also Figure 2 In the embodiment of the present invention, the sub-heating stage includes the following steps:

[0051] Each sub-temperature increase, ΔT, is followed by a fifth holding time, t5; where ΔT = (second temperature T2 - first temperature T1) / N, where N ≥ 2. For example, if the second temperature T2 is 400°C, the first temperature T1 is 200°C, and N is 4, then the sub-temperature ΔT is 50°C. This arrangement allows each sub-temperature increase to be followed by a fifth holding time, t5, gradually releasing local residual stresses in the film while in a metastable state. The stepped temperature increase promotes localized SI-O grid reorganization, reducing porosity. This step-by-step approach prevents the formation of micropores due to the rapid escape of hydrogen.

[0052] In the embodiment of the present invention, the oxide film has a target shrinkage rate S, and the third temperature T3 is determined based on the target shrinkage rate S.

[0053] In the embodiment of the present application, the target shrinkage S includes a first shrinkage S1 and a second shrinkage S2, and the third temperature T3 includes a third lower limit temperature T 31 and a third upper limit temperature T 32 The third lower limit temperature T 31 corresponds to the first shrinkage S1, and the third upper limit temperature T 32 corresponds to the second shrinkage S2; wherein the first shrinkage S1 is less than the second shrinkage S2, and the third lower limit temperature T 31 is less than the third upper limit temperature T 32 . In this way, the adjustment of the shrinkage can be realized by setting different temperatures, so as to adapt to the different shrinkage requirements of the oxide film of the semiconductor device in the advanced process.

[0054] In the embodiment of the present application, the first shrinkage S1 is in the range of 4% to 6%, and the second shrinkage S2 is in the range of 7% to 9%;

[0055] The third lower limit temperature T 31 is in the range of 600±5℃, and the third upper limit temperature T 32 is in the range of 700±5℃.

[0056] In the embodiment of the present application, the target shrinkage S satisfies the following formula:

[0057]

[0058] Wherein, S is the target shrinkage, unit is %; T3 is the third temperature, unit is ℃; t2 is the second time length, unit is min; P is the actual pressure of the annealing chamber; P0 is the initial pressure of the annealing chamber; m1, m2, m3 are process coefficients, for example, m1=0.024, m2=0.78, m3=1.2.

[0059] In the embodiment of the present application, the fourth time length t4 includes a first time period and a second time period arranged in sequence. In the first time period, HCl gas is introduced in an inert gas atmosphere to remove metal impurities and residual H; in the second preset time period, an inert gas atmosphere is used. In this way, HCl gas is introduced, and HCl can react with the hydroxyl group on the surface of the film to reduce the interface charge trapping.

[0060] In the embodiment of the present application, the first temperature rising rate K1, the second temperature rising rate K2, the third temperature rising rate K3 and the fourth temperature rising rate K4 satisfy: K1 < K4, K2 < K4 and K3 < K4. In this way, the first temperature rising rate K1 of the stress release stage is low, which can ensure the slow escape of free hydrogen; the second temperature rising rate K2 of the structure recombination stage is low, which can adjust the lattice order and repair defects; the third temperature rising rate K3 of the pre-densification stage is low, which can preliminarily shrink the pores and avoid premature pore closure; and the fourth temperature rising rate K4 of the steady-state densification stage is high, which can improve the atomic diffusion rate, thereby accelerating the grain boundary migration and promoting the pore closure.

[0061] In the embodiment of the present application, the first temperature rising rate K1 is in the range of 2-3 ℃ / min; the first temperature T1 is in the range of 195-205 ℃; and the first time length t1 is in the range of 15-25 min. Preferably, the first temperature rising rate K1 is in the range of 2-3 ℃ / min; the first temperature T1 is in the range of 198-202 ℃; and the first time length t1 is in the range of 20-25 min.

[0062] In the embodiment of the present application, the second temperature rising rate K2 is in the range of 3-5 ℃ / min; the second temperature T2 is in the range of 395-405 ℃; the second time length t2 is in the range of 30-45 min; and the proportion of oxygen in the mixed gas atmosphere of oxygen and inert gas is 4-6%. Preferably, the second temperature rising rate K2 is in the range of 4-5 ℃ / min; the second temperature T2 is in the range of 398-402 ℃; and the second time length t2 is in the range of 35-45 min.

[0063] In the embodiment of the present application, the third temperature rising rate K3 is in the range of 2-4 ℃ / min; the third temperature T3 is in the range of 595-705 ℃; and the third time length t3 is in the range of 20-40 min. Preferably, the second temperature rising rate K2 is in the range of 2-3 ℃ / min; the second temperature T2 is in the range of 598-702 ℃; and the second time length t2 is in the range of 25-35 min.

[0064] In the embodiment of the present application, the fourth temperature rising rate K4 is in the range of 17-20 ℃ / min; the fourth temperature T4 is in the range of 1000-1200 ℃; and the fourth time length t4 is in the range of 30-60 min. Preferably, the fourth temperature rising rate K4 is in the range of 19-20 ℃ / min; the fourth temperature T4 is in the range of 1100-1200 ℃; and the fourth time length t4 is in the range of 50-60 min.

[0065] In order to further illustrate the present invention, the following describes in more detail an annealing method for an oxide film provided by the present invention in combination with Example 1, Example 2 and Example 3, but they should not be understood as limiting the scope of protection of the present invention.

[0066] Example 1

[0067] Referring to Table 1, an annealing method for an oxide film, which is applied to a semiconductor device, comprises the following steps:

[0068] (1) Stress release stage A: In an inert gas atmosphere, the temperature is increased to a first temperature T1 of 200°C at a first heating rate K1 of 3°C / min, and the temperature is kept at a first time t1 of 25 min;

[0069] (2) Restructuring stage B: in a mixed gas atmosphere of oxygen and inert gas, heating from a first temperature T1 of 200°C to a second temperature T2 of 400°C at a second heating rate K2 of 3°C / min, and holding for a second time t2 of 45 min;

[0070] (3) Pre-densification stage C: in a mixed gas atmosphere of oxygen and inert gas, heating from the second temperature T2 of 400°C to the third temperature T3 of 700°C at a third heating rate K3 of 3°C / min, and holding for a third time t3 of 20 min;

[0071] (4) Steady-state densification stage D: heating from the third temperature T3 of 700°C to the fourth temperature T4 of 1100°C at a fourth heating rate K4 of 20°C / min, and keeping warm for a fourth time t4 of 60 min; wherein, the first period is 30 min, using a mixed gas atmosphere of HCl and inert gas to remove metal impurities and residual H; the second period is 30 min, using an inert gas atmosphere to maintain stable densification.

[0072] See Table 2, shrinkage test: the actual shrinkage of the oxide film of the semiconductor device obtained by the annealing treatment in this embodiment is 8.1±0.4%.

[0073] Example 2

[0074] Referring to Table 1, an annealing method for an oxide film, which is applied to a semiconductor device, comprises the following steps:

[0075] (1) Stress release stage A: In an inert gas atmosphere, the temperature is increased to a first temperature T1 of 200°C at a first heating rate K1 of 3°C / min, and the temperature is kept at a first time t1 of 20 min;

[0076] (2) Restructuring stage B: in a mixed gas atmosphere of oxygen and inert gas, heating from a first temperature T1 of 200°C to a second temperature T2 of 400°C at a second heating rate K2 of 3°C / min, and maintaining the temperature for a second time t2 of 30 min;

[0077] (3) Pre-densification stage C: in a mixed gas atmosphere of oxygen and inert gas, heating from the second temperature T2 of 400°C to the third temperature T3 of 600°C at a rate of 3°C / min, and holding the temperature for a third time t3 of 20 min;

[0078] (4) Steady-state densification stage D: heating from the third temperature T3 of 600°C to the fourth temperature T4 of 1100°C at a fourth heating rate K4 of 20°C / min, and keeping warm for a fourth time t4 of 60 min; wherein, the first period is 30 min, using a mixed gas atmosphere of HCl and inert gas to remove metal impurities and residual H; the second period is 30 min, using an inert gas atmosphere to maintain stable densification.

[0079] See Table 2, shrinkage test: the actual shrinkage of the semiconductor device obtained by the annealing treatment in this embodiment is 4.7±0.3%.

[0080] Example 3

[0081] Referring to Table 1, an annealing method for an oxide film, which is applied to a semiconductor device, comprises the following steps:

[0082] (1) Stress release stage A: In an inert gas atmosphere, the temperature is increased to a first temperature T1 of 200°C at a first heating rate K1 of 3°C / min, and the temperature is kept at a first time t1 of 25 min;

[0083] (2) Restructuring stage B: in a mixed gas atmosphere of oxygen and inert gas, heating from a first temperature T1 of 200°C to a second temperature T2 of 405°C at a second heating rate K2 of 3°C / min, and maintaining the temperature for a second time t2 of 45 min;

[0084] (3) Pre-densification stage C: in a mixed gas atmosphere of oxygen and inert gas, heating from the second temperature T2 of 405°C to the third temperature T3 of 605°C at a third heating rate K3 of 3°C / min, and holding for a third time t3 of 40 min;

[0085] (4) Steady-state densification stage D: The temperature is raised from the third temperature T3 of 605°C to the fourth temperature T4 of 1200°C at a fourth heating rate K4 of 20°C / min, and the temperature is kept at a fourth time t4 of 60 min; wherein, the first period of 30 min adopts a mixed gas atmosphere of HCl and inert gas to remove metal impurities and residual H; the second period of 30 min adopts an inert gas atmosphere to maintain stable densification.

[0086] See Table 2, shrinkage test: the actual shrinkage of the semiconductor device obtained by the annealing treatment in this embodiment is 6.2±0.3%.

[0087] Table 1: Comparison of relevant parameters of various embodiments.

[0088]

[0089]

[0090] Table 2: Comparison of actual shrinkage rates of various embodiments.

[0091] Example 1 Example 2 Example 3 Actual shrinkage 8.1±0.4% 4.7±0.3% 6.2±0.3%

[0092] In summary, compared with the single temperature annealing used in the related art, the annealing method of the oxide film provided in the embodiment of the present invention can release residual stress in stages by adopting a staged gradient temperature rise annealing method; it can alleviate instantaneous thermal stress concentration, reduce defects such as microcracks or interface delamination, and thus improve the reliability of semiconductor devices; and it can adjust the shrinkage rate by setting different temperatures, thereby being able to adapt to the requirements of different shrinkage rates of oxide films of semiconductor devices in advanced process technologies.

[0093] The above description of the disclosed embodiments is intended to enable one skilled in the art to implement or use the present invention. Various modifications to the embodiments will be readily apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not limited to the embodiments shown herein but is to be construed in the widest manner consistent with the principles and novel features disclosed herein.

Claims

1. A method for annealing an oxide film, characterized in that: Applied to semiconductor devices, the annealing method includes: Stress release stage: in an inert gas atmosphere, heating to a first temperature T1 at a first heating rate K1 and keeping the temperature for a first time t1; Structural reorganization stage: in a mixed gas atmosphere of oxygen and inert gas, heating from the first temperature T1 to a second temperature T2 at a second heating rate K2, and maintaining the temperature for a second time t2; Pre-densification stage: in a mixed gas atmosphere of oxygen and inert gas, heating from the second temperature T2 to a third temperature T3 at a third heating rate K3 and maintaining the temperature for a third time t3; Steady-state densification stage: in an inert gas atmosphere, heating from the third temperature T3 to a fourth temperature T4 at a fourth heating rate K4, and maintaining the temperature for a fourth time period t4.

2. The annealing method of the oxide film according to claim 1, characterized in that: The structural reorganization stage is a step-by-step temperature increase stage, and the step-by-step temperature increase stage has N sub-temperature increase stages, where N≥2.

3. The annealing method of the oxide film according to claim 2, characterized in that: The sub-heating stage comprises the following steps: Each time the sub-temperature is increased by ΔT, the temperature is kept at a high temperature for a fifth time period t5; wherein the sub-temperature ΔT=(the second temperature T2-the first temperature T1) / N, N≥2.

4. The annealing method of an oxide film according to any one of claims 1 to 3, characterized in that: The oxide film has a target shrinkage rate S, and the third temperature T3 is determined based on the target shrinkage rate S.

5. The method for annealing an oxide film according to claim 4, wherein: The target shrinkage rate S includes a first shrinkage rate S1 and a second shrinkage rate S2, and the third temperature T3 includes a third lower limit temperature T 31 and the third upper limit temperature T 32 , the third lower limit temperature T 31 Corresponding to the first shrinkage rate S1, the third upper limit temperature T 32 corresponding to the second shrinkage rate S2; The first shrinkage rate S1 is smaller than the second shrinkage rate S2, and the third lower limit temperature T 31 is lower than the third upper limit temperature T 32 .

6. The method for annealing an oxide film according to claim 5, wherein: The first shrinkage rate S1 has a value range of 4% to 6%, and the second shrinkage rate S2 has a value range of 7% to 9%; The third lower limit temperature T 31 The value range is 600±5℃, and the third upper limit temperature T 32 The value range is 700±5℃.

7. The method for annealing an oxide film according to claim 4, wherein: The target shrinkage rate S satisfies the following formula: Wherein, S is the target shrinkage rate, in %; T3 is the third temperature, in °C; t2 is the second time, in min; P is the actual pressure of the annealing chamber, in Torr; P0 is the initial pressure of the annealing chamber, in Torr; m1, m2, and m3 are process coefficients.

8. The method for annealing an oxide film according to any one of claims 1 to 3, characterized in that: The fourth time duration t4 includes a first period and a second period which are set successively. During the first period, HCl gas is introduced into the inert gas atmosphere to remove metal impurities and residual H; during the second preset period, an inert gas atmosphere is used.

9. The method for annealing an oxide film according to claim 1, wherein: The first heating rate K1, the second heating rate K2, the third heating rate K3 and the fourth heating rate K4 satisfy: K1 < K4, K2 < K4, and K3 < K4.

10. The oxide film annealing method according to claim 1 or 9, characterized in that: The first heating rate K1 is in the range of 2°C / min to 3°C / min; the first temperature T1 is in the range of 195°C to 205°C; the first time t1 is in the range of 15min to 25min; And / or, the second heating rate K2 is in the range of 3°C / min to 5°C / min; the second temperature T2 is in the range of 395°C to 405°C; the second time t2 is in the range of 30min to 45min; the oxygen content in the mixed gas atmosphere of oxygen and inert gas is 4% to 6%; And / or, the third heating rate K3 is in the range of 2°C / min to 4°C / min; the third temperature T3 is in the range of 595°C to 705°C; the third time t3 is in the range of 20min to 40min; And / or, the fourth heating rate K4 has a value range of 17°C / min to 20°C / min; the fourth temperature T4 has a value range of 1000°C to 1200°C; and the fourth time duration t4 has a value range of 30min to 60min.

Citation Information

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