Single-point detection apparatus and method for safe operating area of power mosfet

By using a single-point detection device composed of a pulse trigger circuit and a capacitor energy storage circuit, the problems of low efficiency and insufficient accuracy of traditional MOSFET SOA testing methods are solved, enabling rapid, accurate and efficient evaluation of power MOSFETs, and improving the reliability and quality control of devices.

CN120779202BActive Publication Date: 2025-12-12GREAT WALL POWER SUPPLY TECH CO LTD
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Patent Information

Application Number
CN202511284378.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-09-09
Publication Date
2025-12-12
Estimated Expiration
2045-09-09

AI Technical Summary

Technical Problem

Traditional MOSFET SOA testing methods suffer from low data acquisition efficiency, long testing cycles, poor environmental adaptability, and difficulty in accurately testing single-point SOA, failing to meet the high-precision, high-efficiency, and high-compatibility requirements of high-power applications.

Method used

Employing a pulse triggering circuit, sampling feedback circuit, drive amplification circuit, capacitor energy storage circuit, and data acquisition unit, the system achieves rapid and accurate evaluation of power MOSFETs through a single pulse signal. This includes pulse signal generation, drain current acquisition, and drain-source voltage provision, combined with data recording to determine whether the device has failed.

Benefits of technology

It enables rapid, accurate, and efficient evaluation of the safe operating area of ​​power MOSFETs, improves testing efficiency, reduces costs, adapts to a wide range of high-voltage and low-voltage testing needs, and enhances device reliability and quality control.

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Abstract

The application provides a single-point detection device and method for a safe working area of a power MOSFET, and relates to the technical field of semiconductor device testing. The single-point detection device comprises a pulse trigger circuit, a sampling feedback circuit, a driving amplification circuit, a capacitor energy storage circuit and a data collector. The pulse trigger circuit is used for outputting a pulse signal with a preset width according to a conduction time corresponding to a specific test point. The sampling feedback circuit is used for collecting a drain current of the power MOSFET and generating a feedback signal. The driving amplification circuit drives the power MOSFET to be turned on or turned off according to the feedback signal and the pulse signal. The capacitor energy storage circuit provides a target drain-source voltage for the power MOSFET according to a drain-source voltage corresponding to the specific test point. The data collector records waveforms of the drain-source voltage and the drain current of the power MOSFET. The single-point detection device does not need to increase an additional circuit, parameter matching is realized by adjusting devices in the single-point detection device, the test efficiency is improved, and the single-point detection device has the advantages of high efficiency, flexibility, high precision and the like.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor device testing, in particular to a single-point detection device and method for safe operating area of power MOSFET. BACKGROUND

[0002] As an important semiconductor device, power Metal Oxide Semiconductor FET (MOSFET) is widely used in high-power fields such as switching power supply, motor drive, new energy vehicle electronic control system, etc. due to its excellent switching performance and power handling capability. In the application of power MOSFET, the safe operating area (SOA) of power MOSFET is a core indicator to measure whether the power MOSFET can reliably operate under the conditions of limit voltage VDS, current ID and time. Accurate evaluation of SOA is crucial to ensure the safety, stability and reliability of power MOSFET in actual application.

[0003] However, the traditional MOSFET SOA test method has many limitations. The common SOA test methods at present mainly include direct measurement method, oscilloscope product method and shell temperature measurement method. Although these methods can provide evaluation of safe operating area to some extent, they have exposed many problems in actual application. First, the test efficiency is low. The traditional method usually uses direct current or long pulse signal driving, which will cause significant temperature rise of the device, prolong the test time and may cause damage to the device. Second, the device compatibility is poor. High-voltage and low-voltage tests often require the use of different devices, which cannot cover all specifications of power MOSFET through a single platform, increasing the test cost and complexity. In addition, the adjustment precision is insufficient. The on-time of gate-source voltage VGS and the adjustment of drain current ID rely on the coordinated operation of multiple instruments, which not only complicates the operation, but also easily introduces errors, affecting the accuracy of test results. Finally, the quality control is lagging. SOA test link is usually concentrated in the post-production end of finished products, and the traditional method requires multiple high / low voltage devices, which is difficult to popularize in the production front end due to high test cost.

[0004] In summary, the traditional MOSFET SOA test method cannot effectively identify early failure risks in the selection and incoming inspection stage, which may cause batch quality accidents, and has limitations such as low data collection efficiency, long test period, poor environmental adaptability, etc. in single-point testing, and it is difficult to accurately test single-point SOA, so the traditional MOSFET SOA test method cannot meet the high-precision, high-efficiency and high-compatibility requirements of power MOSFET SOA evaluation in high-power application fields.

[0005] In order to meet the needs of high efficiency, flexibility and high precision of power MOSFET SOA single point detection, the industry urgently needs to develop a power MOSFET safe operating area single point detection device and method. SUMMARY

[0006] In view of the problems that the traditional MOSFET SOA test method has low data acquisition efficiency, long test period, poor environmental adaptability and other limitations in single point test, and it is difficult to accurately test single point SOA.

[0007] The application provides a power MOSFET safe operating area single point detection device, which comprises:

[0008] A pulse trigger circuit is configured to output a preset width pulse signal according to the on-time corresponding to a specific test point in a safe operating area curve;

[0009] A sampling feedback circuit is connected to the power MOSFET and configured to collect the drain current of the power MOSFET and generate a feedback signal;

[0010] A driving amplification circuit is connected to the pulse trigger circuit and the sampling feedback circuit, and is configured to drive the power MOSFET to turn on or turn off according to the pulse signal and the feedback signal;

[0011] A capacitor energy storage circuit is connected between the drain and the source of the power MOSFET, and is configured to provide a target drain-source voltage for the power MOSFET according to the drain-source voltage corresponding to a specific test point in the safe operating area curve; and

[0012] A data collector is configured to record the waveform of the drain-source voltage and the waveform of the drain current of the power MOSFET, wherein the waveform of the drain-source voltage and / or the waveform of the drain current of the power MOSFET is used to determine whether the power MOSFET is invalid.

[0013] Optionally, the pulse trigger circuit comprises:

[0014] An adjustable voltage generating circuit is configured to receive a direct current voltage and generate an adjustable voltage signal according to the on-time corresponding to a specific test point in the safe operating area curve; and

[0015] A timer is connected to the adjustable voltage generating circuit and is configured to generate the pulse signal according to the adjustable voltage signal.

[0016] Optionally, the adjustable voltage generating circuit comprises:

[0017] A first adjustable resistor, wherein a first end of the first adjustable resistor is configured to receive the direct current voltage; and

[0018] A first capacitor, a first end of the first capacitor is connected to a second end of the first adjustable resistor, for providing the adjustable voltage signal, a second end of the first capacitor is grounded.

[0019] Optionally, a position of a sliding end of the first adjustable resistor is adjusted according to a conduction time corresponding to a specific test point in the safety operating area curve to adjust a resistance value of the first adjustable resistor, and the preset width is adjusted according to the resistance value of the first adjustable resistor and a capacitance value of the first capacitor.

[0020] Optionally, the preset width is 1.1 × vr1 × c1, where vr1 is the resistance value of the first adjustable resistor, and c1 is the capacitance value of the first capacitor.

[0021] Optionally, the pulse trigger circuit further comprises:

[0022] A first resistor, a first end of the first resistor is used for receiving the direct current voltage; and

[0023] A key, a first end of the key is respectively connected to a second end of the first resistor and the timer, and a second end of the key is grounded;

[0024] When the key is closed, the timer is triggered.

[0025] Optionally, the driving amplification circuit comprises:

[0026] A first switch tube, a first end of the first switch tube is used for receiving a direct current voltage, a control end of the first switch tube is connected to the pulse trigger circuit, and is used for receiving the pulse signal;

[0027] A second switch tube, a first end of the second switch tube is grounded, a second end of the second switch tube is connected to a second end of the first switch tube, and a control end of the second switch tube is connected to the control end of the first switch tube;

[0028] A first diode, a cathode of the first diode is connected to the second end of the first switch tube;

[0029] A second diode, an anode of the second diode is connected to a first end of the first switch tube;

[0030] A third switch tube, a first end of the third switch tube is connected to a cathode of the second diode, and a control end of the third switch tube is connected to an anode of the first diode; and

[0031] A fourth switch tube, a first end of the fourth switch tube is grounded, a second end of the fourth switch tube is respectively connected to a second end of the third switch tube and a control end of the power MOSFET, and a control end of the fourth switch tube is connected to the control end of the third switch tube.

[0032] Optionally, the sampling feedback circuit is further configured to set a target drain current according to a drain current corresponding to a specific test point in the safe operating area curve.

[0033] Optionally, the sampling feedback circuit comprises:

[0034] a second resistor, a first end of the second resistor being configured to receive the direct current voltage;

[0035] a second adjustable resistor, a first end of the second adjustable resistor being connected to a second end of the second resistor, and a second end of the second adjustable resistor being grounded;

[0036] a reference source, a first end of the reference source being connected to a reference end of the reference source and the first end of the second adjustable resistor respectively, and a second end of the reference source being grounded;

[0037] a sampling resistor, a first end of the sampling resistor being connected to a source of the power MOSFET, and a second end of the sampling resistor being grounded, the sampling resistor being configured to collect a drain current of the power MOSFET and generate a sampling signal; and

[0038] a comparator, a first input end of the comparator being connected to the first end of the sampling resistor and configured to receive the sampling signal, a second input end of the comparator being connected to a sliding end of the second adjustable resistor and configured to receive an adjustable reference voltage, and an output end of the comparator being connected to a control end of the fourth switch tube and configured to output the feedback signal.

[0039] Optionally, a position of the sliding end of the second adjustable resistor is adjusted according to a drain current corresponding to a specific test point in the safe operating area curve to adjust the adjustable reference voltage.

[0040] Optionally, when the sampling signal is greater than the adjustable reference voltage, the drive amplification circuit drives the power MOSFET to be turned off according to the feedback signal.

[0041] Optionally, the capacitor energy storage circuit comprises:

[0042] a double-pole double-throw switch, a first input end of the double-pole double-throw switch being connected to a charging direct current source, and a second input end of the double-pole double-throw switch being connected to ground through a discharging resistor,

[0043] a high-voltage capacitor, a first end of the high-voltage capacitor being connected to a first output end and a fourth output end of the double-pole double-throw switch, and a second end of the high-voltage capacitor being grounded;

[0044] a low-voltage capacitor, a first end of the low-voltage capacitor being connected to a second output end and a third output end of the double-pole double-throw switch, and a second end of the low-voltage capacitor being grounded; and

[0045] a switch connected between the first end of the high voltage capacitor and the drain of the power MOSFET for conducting during testing.

[0046] Preferably, the double-pole double-throw action is controlled according to the drain-source voltage corresponding to a specific test point in the safe operating area curve, so that the charging DC source charges one of the high voltage capacitor and the low voltage capacitor to the target drain-source voltage, and the other of the high voltage capacitor and the low voltage capacitor is discharged through the discharging resistor.

[0047] The application also proposes a single-point detection method for a safe operating area of a power MOSFET, comprising:

[0048] outputting a preset width of pulse signals according to the on-time corresponding to a specific test point in the safe operating area curve;

[0049] collecting the drain current of the power MOSFET and generating a feedback signal;

[0050] driving the power MOSFET to turn on or off according to the pulse signals and the feedback signal;

[0051] providing a target drain-source voltage to the power MOSFET according to the drain-source voltage corresponding to a specific test point in the safe operating area curve;

[0052] recording the drain-source voltage waveform and the drain current waveform of the power MOSFET, wherein the drain-source voltage waveform and / or the drain current waveform of the power MOSFET are used to determine whether the power MOSFET is failed.

[0053] Preferably, the drain-source voltage waveform and / or the drain current waveform of the power MOSFET are used to determine whether the power MOSFET is failed, comprising:

[0054] determining whether the maximum value of the drain current in the drain current waveform of the power MOSFET exceeds the drain current corresponding to a specific test point in the safe operating area curve, and if so, marking as failed, and if not, marking as passed.

[0055] Preferably, a target drain current is provided according to the drain current corresponding to a specific test point in the safe operating area curve.

[0056] The application has at least the following beneficial effects:

[0057] The single-point detection device of the safe operating area of the power MOSFET in the embodiment comprises a pulse trigger circuit, a sampling feedback circuit, a driving amplification circuit, a capacitor energy storage circuit, and a data collector. The pulse trigger circuit is configured to output a preset-width pulse signal according to the on-time of a specific test point in the safe operating area curve. The sampling feedback circuit is configured to collect the drain current of the power MOSFET and generate a feedback signal. The driving amplification circuit is configured to drive the power MOSFET to turn on or off according to the pulse signal and the feedback signal. The capacitor energy storage circuit is configured to provide a target drain-source voltage for the power MOSFET according to the drain-source voltage of the specific test point in the safe operating area curve. The data collector is configured to record the waveform of the drain-source voltage and the waveform of the drain current of the power MOSFET. The waveform of the drain-source voltage and / or the waveform of the drain current of the power MOSFET are used to determine whether the power MOSFET is invalid. The single-point detection device can apply high voltage and large current to the power MOSFET without damaging the device within the on-time (e.g., microsecond level) of a single pulse signal, thereby achieving single-point testing of the SOA without increasing additional circuits and costs, improving testing efficiency, and having the advantages of high efficiency, flexibility, and high precision. The single-point detection device realizes rapid, accurate, and efficient evaluation of the safe operating area of the power MOSFET, thereby improving the reliability and quality control level of the power MOSFET in high-power applications.

[0058] The capacitor energy storage circuit comprises a double-pole double-throw switch, a high-voltage capacitor, a discharge resistor, and a low-voltage capacitor. By controlling the action of the double-pole double-throw switch, one of the high-voltage capacitor and the low-voltage capacitor is charged to the target drain-source voltage by the charging DC source, and the other of the high-voltage capacitor and the low-voltage capacitor is discharged through the discharge resistor. The single-point detection device is suitable for a wide range and can be compatible with high-voltage and low-voltage testing requirements.

[0059] The foregoing has outlined rather broadly the features and technical advantages of the present application so that it can be better understood in view of the following detailed description. Additional features and advantages of the present application will be described hereinafter which form the subject of the claims of the present application. Those skilled in the art will appreciate that the conception, and specific embodiment disclosed can be readily utilized as a basis for the designing or modifying other structures or processes for carrying out the same purposes of the present application. Those skilled in the art will also realize that such equivalent constructions do not depart from the spirit and scope of the present application as set forth in the appended claims. BRIEF DESCRIPTION OF DRAWINGS

[0060] For a more complete understanding of the present application, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings in which:

[0061] Figure 1 The structural schematic diagram of the single-point detection device of the safe operating area of the power MOSFET in the embodiment of the present application is shown;

[0062] Figure 2 A circuit diagram inside the single-point detection device of the safe operating area of the power MOSFET is shown in the embodiment of the present application;

[0063] Figure 3 A schematic diagram of the safe operating area curve in the embodiment of the present application is shown;

[0064] Figure 4 A voltage waveform diagram and a current waveform diagram detected according to the corresponding drain-source voltage of 40V and the drain current of 8A in the specific test point in the safe operating area curve are shown in the embodiment of the present application;

[0065] Figure 5 A voltage waveform diagram and a current waveform diagram detected according to the corresponding drain-source voltage of 80V and the drain current of 4A in the specific test point in the safe operating area curve are shown in the embodiment of the present application;

[0066] Figure 6 A flow chart of the single-point detection method of the safe operating area of the power MOSFET is shown in the embodiment of the present application.

[0067] Unless otherwise indicated, corresponding numbers and symbols in different drawings generally refer to corresponding parts. The drawings are drawn to clearly illustrate relevant aspects of various embodiments, and they are not necessarily drawn to scale. DETAILED DESCRIPTION

[0068] Various exemplary embodiments, features and aspects of the present application will be explained in detail below with reference to the accompanying drawings. The same reference numbers in the drawings represent functionally the same or similar elements. Although various aspects of embodiments are shown in the drawings, the drawings are not necessarily drawn to scale unless specifically indicated.

[0069] The term "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any implementation described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other implementations. The terms "first," "second," "third," etc. (if any) are used herein to distinguish between similar objects having different functions rather than to describe a particular chronological or hierarchical order. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting.

[0070] In the description of the present application, it needs to be explained that, unless otherwise explicitly specified and limited, the terms "coupled", "connected", "linked" should be understood in a broad sense. For example, it can be electrically connected or communicated with each other, it can be directly connected or indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0071] In addition, for a better understanding of the present application, a number of specific details are given in the following detailed description. It will be readily apparent to those skilled in the art that the present application can be practiced without some of these specific details. In some instances, well-known methods, structures, elements, and circuits have not been described in detail in order to avoid obscuring the purpose of the present application.

[0072] Please refer to Figure 1 The structure diagram of the single-point detection device of the power MOSFET safe operating area according to the embodiment of the present application is shown. The single-point detection device of the power MOSFET safe operating area according to the embodiment of the present application is used for accurately testing a single point in the safe operating area curve of the measured power MOSFET QT, wherein the safe operating area curve can refer to the specification of the measured power MOSFET. Specifically, according to the specification of the measured power MOSFET, a specific test point in the safe operating area (SOA) curve is selected for accurate testing, wherein the selected specific test point contains the drain-source voltage Vds, the drain current Id, and the on-time t and other parameters. The single-point detection device of the power MOSFET safe operating area includes a pulse trigger circuit 11, a sampling feedback circuit 13, a driving amplification circuit 12, a capacitor energy storage circuit 14, and a data collector 15. The pulse trigger circuit 11 is used for receiving a direct current voltage VCC and outputting a preset width of the pulse signal according to the on-time t corresponding to the specific test point in the SOA curve, so that the preset width is equal to or close to the on-time t. In the embodiment, the pulse signal can be a single pulse signal.

[0073] The sampling feedback circuit 13 is connected to the power MOSFET QT and is used for collecting the drain current Id of the power MOSFET and generating a feedback signal. Specifically, the sampling feedback circuit 13 is used for setting a target drain current according to the drain current Id corresponding to the specific test point in the SOA curve, and generating the feedback signal according to the target drain current and the collected drain current of the power MOSFET QT.

[0074] The driving amplification circuit 12 is connected to the pulse trigger circuit 11 and the sampling feedback circuit 13, and is used for driving the power MOSFET QT to turn on or turn off according to the pulse signal and the feedback signal.

[0075] The capacitor energy storage circuit 14 is connected between the drain and the source of the power MOSFET QT, and is configured to provide a target drain-source voltage to the power MOSFET QT according to the drain-source voltage Vds corresponding to a specific test point in the safe operating area curve. The capacitor energy storage circuit 14 provides instantaneous high-power output to the power MOSFET QT, so that the drain-source voltage between the drain and the source of the power MOSFET QT is the target drain-source voltage.

[0076] The data collector 15 is configured to record the waveform of the drain-source voltage and the waveform of the drain current of the power MOSFET QT, wherein the waveform of the drain-source voltage and / or the waveform of the drain current of the power MOSFET QT are used to determine whether the power MOSFET QT is failed. In the embodiment, the data collector 15 can be an oscilloscope, and the oscilloscope is connected to the power MOSFET QT through a differential probe and a current probe, so as to record the waveform of the drain-source voltage and the waveform of the drain current of the power MOSFET QT.

[0077] For the characteristics of high voltage, large current and fast switching of the power MOSFET, the single-point detection device for the safe operating area of the power MOSFET provided by the application has the advantages of high efficiency, flexibility, high precision and the like, and can realize fast, accurate and efficient evaluation of the safe operating area of the power MOSFET, and accurate testing of specific test points in the SOC curve, so as to improve the reliability and quality control level of the power MOSFET in high-power applications. In the test of the power MOSFET, the power MOSFET is turned on by a single pulse signal to avoid overheating of the power MOSFET. The detection device can be tested independently from product application, supports front-end selection and incoming inspection of the power MOSFET, identifies failure risks in advance, has a simple structure, relies less on external equipment, reduces cost, and has strong practicality.

[0078] The sampling feedback circuit 13 is configured to collect the drain current Id of the power MOSFET and generate a feedback signal to form a current feedback protection mechanism to effectively protect the power MOSFET.

[0079] Please refer to Figure 1 and Figure 2 The pulse trigger circuit 11 includes an adjustable voltage generating circuit and a timer. The adjustable voltage generating circuit is configured to receive a direct current voltage VCC and generate an adjustable voltage signal according to the turn-on time t corresponding to a specific test point in the safe operating area curve. The timer is connected to the adjustable voltage generating circuit and is configured to generate the pulse signal according to the adjustable voltage signal, wherein the pulse signal has a preset width .

[0080] Further, the adjustable voltage generating circuit comprises a first adjustable resistor VR1 and a first capacitor C1. A first end of the first adjustable resistor VR1 is configured to receive the direct current voltage VCC, and a sliding end of the first adjustable resistor VR1 is connected to the first end of the first adjustable resistor VR1. A first end of the first capacitor C1 is connected to a second end of the first adjustable resistor VR1, and is configured to provide the adjustable voltage signal, and a second end of the first capacitor is grounded. In the embodiment, the first adjustable resistor VR1 and the first capacitor C1 are connected in series to form an RC network, and a connection between the first adjustable resistor VR1 and the first capacitor C1 is configured to provide the adjustable voltage signal.

[0081] Further, the position of the sliding end of the first adjustable resistor VR1 is adjusted according to the conduction time t corresponding to a specific test point in the safety operating area curve to adjust the resistance value of the first adjustable resistor VR1, and the preset width is adjusted according to the resistance value of the first adjustable resistor VR1 and the capacitance value of the first capacitor C1.

[0082] Further, the preset width is approximately 1.1 × vr1 × c1, where vr1 is the resistance value of the first adjustable resistor VR1, and c1 is the capacitance value of the first capacitor C1.

[0083] Further, the timer can be a 555 timer, which comprises first to eighth pins. The first pin GND of the 555 timer is grounded, the fourth pin RST and the eighth pin VCC of the 555 timer are configured to receive the direct current voltage VCC, the fifth pin CTRL of the 555 timer is grounded through a second capacitor C2, the seventh pin DIS and the sixth pin TIIR of the 555 timer are connected to the first end of the first capacitor C1, which is configured to receive the adjustable voltage signal, and the third pin OUT of the 555 timer is configured to output the pulse signal.

[0084] Further, the pulse trigger circuit 11 further comprises a first resistor R1 and a button S1. A first end of the first resistor R1 is configured to receive the direct current voltage VCC. A first end of the button S1 is connected to a second end of the first resistor S1 and a second pin TRIG of the 555 timer, respectively, and a second end of the button S1 is grounded. A connection between the first resistor R1 and the button S1 is configured to provide a trigger signal to the 555 timer, wherein when the button is closed, the potential of the second pin TRIG of the 555 timer is pulled down to trigger the 555 timer.

[0085] By adjusting the position of the sliding end of the first adjustable resistor VR1 to adjust the resistance value of the first adjustable resistor VR1, the preset width of the single pulse Equal or close to the conduction time t corresponding to the specific test point in the SOA curve. It can be seen that by adjusting the first adjustable resistor VR1, the preset width of the pulse signal can be accurately set .

[0086] Further, the driving amplification circuit 12 comprises a first switch tube Q1, a second switch tube Q2, a third switch tube Q3, a fourth switch tube Q4, a first diode D1 and a second diode D2. The first end of the first switch tube Q1 is used to receive the direct current voltage VCC, the control end of the first switch tube Q1 is connected with the output end of the pulse trigger circuit, for example, the output end of a timer, for receiving the pulse signal. The first end of the second switch tube Q2 is grounded, the second end of the second switch tube Q2 is connected with the second end of the first switch tube Q1, and the control end of the second switch tube Q2 is connected with the control end of the first switch tube Q1. The cathode of the first diode D1 is connected with the second end of the first switch tube Q1. The anode of the second diode D2 is connected with the first end of the first switch tube Q1. The first end of the third switch tube Q3 is connected with the cathode of the second diode D2, and the control end of the third switch tube Q3 is connected with the anode of the first diode D1. The first end of the fourth switch tube Q4 is grounded, the second end of the fourth switch tube Q4 is connected with the second end of the third switch tube Q3, and the second end of the third switch tube Q3 is connected with the control end of the power MOSFET QT through the resistance R4, and the control end of the fourth switch tube Q4 is connected with the control end of the third switch tube Q3.

[0087] Specifically, the driving amplification circuit 12 includes two totem pole amplification circuits, wherein the first switch tube Q1 and the second switch tube Q2 constitute a first stage totem pole, and the third switch tube Q3 and the fourth switch tube Q4 constitute a second stage totem pole. When the pulse signal output by the timer is at a high level, the first switch tube Q1 and the third switch tube Q3 are controlled to be turned on, and the pulse signal output by the timer passes through the first switch tube Q1, the second diode D2 and the third switch tube Q3 to drive the power MOSFET QT to be turned on, wherein the second end of the third switch tube Q3 provides a high-level driving voltage and driving current of an approximate direct current voltage VCC, improves the current driving capability, and ensures that the power MOSFET is completely turned on. When the pulse signal output by the timer is at a low level, the second switch tube Q2 and the fourth switch tube Q4 are controlled to be turned on, and the reverse electromotive force generated by the gate inductance is discharged through the fourth switch tube Q4, the first diode D1 and the second switch tube Q2 to drive the power MOSFET QT to be turned off, so as to ensure that the power MOSFET is turned off more thoroughly. The first diode D1 can limit the gate-source voltage of the power MOSFET QT in the range of -0.7V to the direct current voltage VCC, and at the same time, when the pulse signal output by the timer is at a low level, the fourth switch tube Q4 and the second switch tube Q2 are connected in communication to quickly absorb the reverse electromotive force generated by the gate inductance, so as to prevent the negative breakdown of the gate oxide layer. The first diode D1 and the second diode D2 are driven to be anti-interference.

[0088] Further, the sampling feedback circuit 13 comprises a second resistor R2, a second adjustable resistor VR2, a reference source U3, a sampling resistor RS and a comparator U2. The first end of the second resistor R2 is connected to receive the DC power supply VCC. The first end of the second adjustable resistor VR2 is connected to the second end of the second resistor R2, and the second end of the second adjustable resistor VR2 is grounded. The first end (e.g. cathode) of the reference source U3 is connected to the reference terminal of the reference source U3 and the first end of the second adjustable resistor VR2 respectively, and the second end (e.g. anode) of the reference source U3 is grounded. The first end of the sampling resistor RS is connected to the source of the power MOSFET QT, and the second end of the sampling resistor RS is grounded. The sampling resistor RS is used to collect the drain current of the power MOSFET QT and generate a sampling signal. The second resistor R2 and the reference source U3 are connected in series, and a reference voltage, for example 2.5V, is output at the connection point between the second resistor R2 and the reference source U3. The reference voltage is divided by adjusting the position of the sliding end of the second adjustable resistor VR2 to obtain an adjustable reference voltage. The first input terminal of the comparator U2 is connected to the first end of the sampling resistor RS through a resistor R5 to receive the sampling signal, and the first input terminal of the comparator U2 is connected to the output terminal of the comparator U2 through a third capacitor C3. The second input terminal of the comparator U2 is connected to the sliding end of the second adjustable resistor VR2 to receive the adjustable reference voltage Vth, and the output terminal of the comparator U2 is connected to the control terminal of the fourth switch tube Q4 through a resistor R3 to output the feedback signal.

[0089] Further, when the sampling signal is greater than the adjustable reference voltage Vth, the drive amplification circuit 12 drives the power MOSFET to be turned off according to the feedback signal, thereby playing a role of current feedback protection. Specifically, the comparator U2 compares the sampling signal and the adjustable reference voltage Vth. When the sampling signal is greater than the adjustable reference voltage Vth, the comparator U2 outputs a low level, so that the fourth switch tube Q4 is turned on, and the power MOSFET gate is discharged through the fourth switch tube Q4 until it is lower than the turn-on threshold, so that the power MOSFET QT is turned off. In this embodiment, the second diode D2 ensures that the output terminal of the comparator U2 is unidirectionally pulled low to drive the power MOSFET QT to be turned off.

[0090] Further, the position of the sliding terminal of the second adjustable resistor VR2 is adjusted according to the drain current of the specific test point on the safe operating area curve to adjust the adjustable reference voltage Vth, and the target drain current is set according to the adjustable reference voltage Vth and the resistance of the sampling resistor RS. Specifically, the sampling signal is obtained according to the drain current Id of the specific test point on the safe operating area curve and the resistance of the sampling resistor RS, where the sampling signal is the product of the drain current Id of the specific test point on the safe operating area curve and the resistance of the sampling resistor RS, and the adjustable reference voltage Vth is obtained by adjusting the sliding terminal of the second adjustable resistor VR2. Similarly, when the adjustable reference voltage Vth is obtained, the target drain current of the power MOSFET can be obtained in reverse, which is the quotient of the adjustable reference voltage Vth and the sampling resistor RS. By adjusting the second adjustable resistor VR2, the target drain current of the power MOSFET QT can be accurately set.

[0091] Further, the capacitor energy storage circuit 14 includes a double-pole double-throw switch S3, a high-voltage capacitor C4, a low-voltage capacitor C4, and a switch S2. The first input terminal of the double-pole double-throw switch S3 is connected to the charging DC source Vcharge, and the second input terminal of the double-pole double-throw S3 is connected to ground through a discharge resistor RL. The first terminal of the high-voltage capacitor C4 is connected to the first output terminal and the fourth output terminal of the double-pole double-throw S3, and the second terminal of the high-voltage capacitor C4 is connected to ground. The first terminal of the low-voltage capacitor C5 is connected to the second output terminal and the third output terminal of the double-pole double-throw S3, and the second terminal of the low-voltage capacitor C5 is connected to ground. The switch S2 is connected between the first terminal of the high-voltage capacitor C4 and the drain of the power MOSFET QT. In this embodiment, the high-voltage capacitor C4 can be composed of a plurality of high-voltage electrolytic capacitors in series and parallel connection to support the testing of high-voltage power MOSFETs, and the low-voltage capacitor C5 can be composed of a plurality of low-voltage capacitors in parallel connection to support low-voltage power MOSFETs. In this embodiment, the high-voltage capacitor C4 is used to provide a first target drain-source voltage to the power MOSFET, and the low-voltage capacitor C5 is used to provide a second target drain-source voltage to the power MOSFET.

[0092] Further, the double-pole double-throw switch is controlled according to the drain-source voltage of the specific test point on the safe operating area curve, so that the charging DC source charges one of the high-voltage capacitor and the low-voltage capacitor to the target drain-source voltage, and the other of the high-voltage capacitor and the low-voltage capacitor is discharged through the discharge resistor.

[0093] Specifically, when the drain-source voltage corresponding to the test point in the SOA curve is high voltage, the high-voltage capacitor C4 stores energy by charging the DC power supply Vcharge, that is, the voltage of the DC power supply Vcharge is adjusted to the first target drain-source voltage according to the drain-source voltage corresponding to the test point in the SOA curve, and then the high-voltage capacitor C4 is charged to the target drain-source voltage by the DC power supply Vcharge, while the low-voltage capacitor C5 is discharged through the discharge resistor RL. In this embodiment, the first target drain-source voltage is equal to or close to the drain-source voltage corresponding to the test point in the SOA curve. When the test starts, the switch S2 is turned on, so that the high-voltage capacitor C4 supplies power to the power MOSFET. When the power MOSFET is turned on, the high-voltage capacitor C4 is discharged through the power MOSFET and the sampling resistor RS, generating the required drain-source voltage and drain current for the test. When the test is completed, the switch S2 is turned off, and the double-pole double-throw switch S3 is switched, so that the high-voltage capacitor C4 releases energy through the discharge resistor RL.

[0094] When the drain-source voltage corresponding to the test point in the SOA curve is low voltage, the low-voltage capacitor C5 stores energy by charging the DC power supply Vcharge, that is, the voltage of the DC power supply Vcharge is adjusted to the second target drain-source voltage according to the drain-source voltage corresponding to the test point in the SOA curve, and then the low-voltage capacitor C5 is charged to the target drain-source voltage by the DC power supply Vcharge, while the high-voltage capacitor C4 is discharged through the discharge resistor RL. In this embodiment, the second target drain-source voltage is equal to or close to the drain-source voltage corresponding to the test point in the SOA curve. When the test starts, the switch S2 is turned on, so that the low-voltage capacitor C5 supplies power to the power MOSFET. When the power MOSFET is turned on, the low-voltage capacitor C5 is discharged through the power MOSFET and the sampling resistor RS, generating the required drain-source voltage and drain current for the test. When the test is completed, the switch S2 is turned off, and the double-pole double-throw switch S3 is switched, so that the low-voltage capacitor C5 releases energy through the discharge resistor RL.

[0095] The single-point detection device of the safe working area of the power MOSFET in this embodiment can meet the test requirements of high voltage (for example, 650V) and low voltage (for example, 40V).

[0096] The energy storage energy of the capacitor is calculated by the following formula: .

[0097] The maximum discharge current can be calculated by the formula: .

[0098] wherein, is the energy storage energy of the capacitor, is the capacitance of the capacitor, is the charging voltage provided by the DC power supply, R = RDS (on) + RS, where RDS (on) is the on-resistance of the power MOSFET and RS is the sampling resistance.

[0099] In this embodiment, assuming that the capacitance of the high-voltage capacitor C4 is 6800 μF, the drain-source voltage Vds of the power MOSFET is 700 V, the drain current Id of the power MOSFET is 80 A, the on-resistance RDS (on) of the power MOSFET is 1.5 Ω, the resistance of the sampling resistance RS is 50 mΩ, the line resistance R = Rs + RDS (on) = 1.55 Ω, and the preset width of the pulse signal is 10 ms, when the high-voltage capacitor C4 is charged to 700 V, the stored energy is: The maximum discharge current is, which is greater than the measured drain current of the power MOSFET.

[0100] Assuming that the capacitance of the low-voltage capacitor C5 is 160000 μF, the drain-source voltage Vds of the power MOSFET is 40 V, the drain current Id of the power MOSFET is 190 A, the on-resistance RDS (on) of the power MOSFET is 38 mΩ, the resistance of the sampling resistance RS is 10 mΩ, the line resistance R = Rs + RDS (on) = 48 mΩ, and the preset width of the pulse signal is 10 ms, when the low-voltage capacitor C5 is charged to 40 V, the stored energy is:

[0101] The maximum discharge current is, which is greater than the measured drain current of the power MOSFET.

[0102] Due to the difference in physical structure, the drift region of the high-voltage MOS is designed to be thicker, the on-resistance RDS (on) is larger, and the gate-drain capacitance Cgd is higher. According to the formula It can be known that at the moment of turning on the high-voltage or low-voltage MOS, the energy of the capacitor is sufficient to support the high-power output required by the short-time pulse test.

[0103] During testing, a single pulse signal is output by the pulse trigger circuit 11 to control the conduction of the power MOSFET, and the high-voltage capacitor or the low-voltage capacitor is rapidly discharged through the power MOSFET and the sampling resistance RS, forming a large transient drain current and a drain-source voltage, simulating the SOA limit working condition.

[0104] The discharge process is divided into two stages: an initial stage and a decay stage. In the initial stage, the high-voltage capacitor or the low-voltage capacitor is rapidly discharged through the power MOSFET and the sampling resistance RS, generating a peak current. In the decay stage, the high-voltage capacitor or the low-voltage capacitor decreases with the discharge time, and the current decays exponentially. ​​

[0105] The peak current calculation formula is .

[0106] The current decay formula over time is , where is the time constant, .

[0107] The capacitance voltage decay formula is .

[0108] To meet the SOA test requirements, it is necessary to ensure that the preset width of the pulse signal is less than the time constant , so that the voltage of the high-voltage capacitor or the low-voltage capacitor is approximately constant during the test, and the current is maintained stable. That is

[0109] .

[0110] In this embodiment, the capacitance of the high-voltage capacitor , and the resistance of the loop resistance is 1.55Ω, so the time constant is .

[0111] When the preset width of the pulse signal , the drain-source voltage Vds and the drain current Id of the power MOSFET are approximately constant during the test.

[0112] Next, take a power MOSFET with a model of 500V / 5A as an example, and test two specific test points on the SOA curve of the on-time t of 1ms of the power MOSFET, where the corresponding drain-source voltages of the two test points are 40V and 80V respectively, and the corresponding drain currents are 8A and 4A respectively.

[0113] Test the first specific test point (drain-source voltage of 40V and drain current of 8A), as Figure 2 , Figure 3 and Figure 4As shown, the double-pole double-throw switch is controlled to connect the low-voltage capacitor C5 to the charging DC source Vcharge, and the voltage of the charging DC source is 40 V. A capacitor with a capacitance of 100 nF is selected as the first capacitor C1, and the resistance of the first adjustable resistor VR1 is calculated based on the on-time t and the first capacitor C1, so that the resistance of the first adjustable resistor is about 0.9 kΩ. A pulse signal with a preset width can be output based on the first capacitor and the first adjustable resistor, where the preset width tpulse = 1.1 x 0.9 kΩ x 100 nF ≈ 1 ms. The target drain current is set by adjusting the second adjustable resistor VR2, and the sampling resistor RS is 0.05 Ω. The second adjustable resistor is adjusted so that the adjustable reference voltage Vth = 0.4 V. At this time, the target drain current Imax = 0.4 / 0.05 = 8 A is obtained based on the sampling resistor and the adjustable reference voltage. As shown in Figure 4 As shown, the first waveform is the drain-source voltage waveform of the power MOSFET, and the second waveform is the drain current waveform of the power MOSFET. The maximum current value in the drain current waveform of the power MOSFET is 8 A, which reaches the drain current corresponding to the first specific test point in the SOA curve, and the power MOSFET has not broken down, which is determined to pass.

[0114] For the second specific test point (drain-source voltage of 80 V and drain current of 4 A), as shown in Figure 2 , Figure 3 and Figure 5 The double-pole double-throw switch is controlled to connect the high-voltage capacitor C4 to the charging DC source Vcharge, and the voltage of the charging DC source is 80 V. A capacitor with a capacitance of 100 nF is selected as the first capacitor C1, and the resistance of the first adjustable resistor VR1 is calculated based on the on-time t and the first capacitor C1, so that the resistance of the first adjustable resistor is about 0.9 kΩ. A pulse signal with a preset width can be output based on the first capacitor and the first adjustable resistor, where the preset width tpulse = 1.1 x 0.9 kΩ x 100 nF ≈ 1 ms. The target drain current is set by adjusting the second adjustable resistor VR2, and the sampling resistor RS is 0.05 Ω. The second adjustable resistor is adjusted so that the adjustable reference voltage Vth = 0.2 V. At this time, the target drain current Imax = 0.2 / 0.05 = 4 A is obtained based on the sampling resistor and the adjustable reference voltage. As shown in Figure 5 As shown, the first waveform is the drain-source voltage waveform of the power MOSFET, and the second waveform is the drain current waveform of the power MOSFET. The maximum current value in the drain current waveform of the power MOSFET is 4 A, which reaches the drain current corresponding to the second specific test point in the SOA curve, and the power MOSFET has not broken down, which is determined to pass.

[0115] In the embodiment, when the power MOSFET is tested at the first specific test point or the second specific test point, the maximum current value in the waveform of the drain current of the power MOSFET exceeds the drain current corresponding to the first specific test point or the second specific test point, and the power MOSFET is broken down, which is judged as failure.

[0116] In other embodiments, when the power MOSFET is tested at the first specific test point or the second specific test point, whether the MOSFET is failure can be judged according to the waveform of the drain-source voltage of the power MOSFET, or whether the MOSFET is failure can be judged according to the waveform of the drain-source voltage of the power MOSFET and the waveform of the drain current of the power MOSFET.

[0117] For the characteristics of high voltage, large current and fast switching of the power MOSFET, the single-point detection device for the safe working area of the power MOSFET provided in the application adjusts the resistance value of the first adjustable resistor to output a pulse signal with a preset width according to the conduction time corresponding to the specific test point in the SOA curve, adjusts the second adjustable resistor according to the drain current corresponding to the specific test point in the SOA curve so that the drain current of the power MOSFET reaches the target drain current, and provides the target drain-source voltage for the power MOSFET according to the drain-source voltage corresponding to the specific test point in the SOA curve, so as to accurately set the preset width of the pulse signal, the target drain-source voltage and the target drain current, and has the advantages of high efficiency, flexibility and high precision. It can realize fast, accurate and efficient evaluation of the safe working area of the power MOSFET, and accurate testing of the specific test point in the SOC curve, so as to improve the reliability and quality control level of the power MOSFET in high-power applications. When the power MOSFET is tested, the power MOSFET is turned on by a single pulse signal to avoid overheating of the power MOSFET. The detection device can be tested independently of product application, supports front-end selection and incoming inspection of power MOSFETs, identifies failure risks in advance, has a simple structure, relies less on external equipment, reduces costs, and has strong practicality.

[0118] As shown in Figure 6 The embodiment of the application further provides a single-point detection method for a safe area of a power MOSFET, which comprises:

[0119] Step S11: outputting a pulse signal with a preset width according to the conduction time corresponding to the specific test point in the safe working area curve;

[0120] Step S12: collecting the drain current of the power MOSFET and generating a feedback signal;

[0121] Step S13: driving the power MOSFET to turn on or turn off according to the pulse signal and the feedback signal;

[0122] Step S14: Provide the target drain-source voltage to the power MOSFET according to the drain-source voltage corresponding to the specific test point in the safe operating area curve;

[0123] Step S15: Record the drain-source voltage waveform and drain current waveform of the power MOSFET, wherein the drain-source voltage waveform and / or drain current waveform of the power MOSFET are used to determine whether the power MOSFET has failed.

[0124] Specifically, such as Figure 1 As shown, the pulse trigger circuit 11 receives the DC voltage VCC and outputs a pulse signal of a preset width according to the conduction time t corresponding to a specific test point in the SOA curve, such that the preset width is equal to or nearly equal to the conduction time t. In this embodiment, the pulse signal can be a single pulse signal.

[0125] The sampling feedback circuit 13 is connected to the power MOSFET QT and is used to acquire the drain current Id of the power MOSFET and generate a feedback signal. Specifically, the sampling feedback current 13 is used to set a target drain current according to the drain current Id corresponding to a specific test point in the SOA curve, and to generate the feedback signal based on the target drain current and the acquired drain current of the power MOSFET QT.

[0126] The drive amplifier circuit 12 is connected to the pulse trigger circuit 11 and the sampling feedback circuit 13, and is used to drive the power MOSFET QT to turn on or off according to the pulse signal and the feedback signal.

[0127] A capacitor energy storage circuit 14 is connected between the drain and source of the power MOSFET QT, and is used to provide a target drain-source voltage to the power MOSFET QT according to the drain-source voltage Vds corresponding to a specific test point in the safe operating area curve. The capacitor energy storage circuit 14 provides instantaneous high power output to the power MOSFET QT, so that the drain-source voltage between the drain and source of the power MOSFET QT is the target drain-source voltage.

[0128] The data acquisition unit 15 is used to record the waveforms of the drain-source voltage and drain current of the power MOSFET QT. These waveforms are used to determine whether the power MOSFET QT has failed. In this embodiment, the data acquisition unit 15 can be an oscilloscope. By connecting the differential probe and current probe of the oscilloscope to the power MOSFET QT, the waveforms of the drain-source voltage and drain current of the power MOSFET QT are recorded.

[0129] Further, the waveform of the drain-source voltage and / or the waveform of the drain current of the power MOSFET are used to determine whether the power MOSFET is failed, including:

[0130] determining whether the maximum value of the drain current in the waveform of the drain current of the power MOSFET exceeds the drain current corresponding to the specific test point in the safe operating area curve, if yes, marking as failed, if no, marking as passed.

[0131] Further, the target drain current is provided according to the drain current corresponding to the specific test point in the safe operating area curve.

[0132] For the characteristics of high voltage, large current and fast switching of the power MOSFET, the single-point detection method of the safe operating area of the power MOSFET provided by the present application can adjust the resistance value of the first adjustable resistor to output a pulse signal with a preset width according to the conduction time corresponding to the specific test point in the SOA curve, adjust the second adjustable resistor so that the drain current of the power MOSFET reaches the target drain current according to the drain current corresponding to the specific test point in the SOA curve, and provide the power MOSFET with a target drain-source voltage according to the drain-source voltage corresponding to the specific test point in the SOA curve, so as to accurately set the preset width of the pulse signal, the target drain-source voltage and the target drain current, and has the advantages of high efficiency, flexibility and high precision. The method can realize fast, accurate and efficient evaluation of the safe operating area of the power MOSFET, and accurate testing of the specific test point in the SOA curve, so as to improve the reliability and quality control level of the power MOSFET in high-power applications. When testing the power MOSFET, the power MOSFET is turned on by a single pulse signal to avoid overheating of the power MOSFET. The method supports front-end selection and incoming inspection of the power MOSFET, identifies the failure risk in advance, has a simple structure, relies less on external equipment, reduces cost, and has strong practicality.

[0133] Although embodiments of the application and its advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the application as defined by the appended claims.

[0134] Furthermore, the scope of the application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure of the application, processes, machines, manufacture, compositions of matter, means, methods or steps, presently existing or later to be developed, that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein can be utilized according to the application. Accordingly, the appended claims are intended to cover all such processes, machines, manufacture, compositions of matter, means, methods or steps.

Claims

1. A single-point detection apparatus for safe operating area of power MOSFET, characterized by, The method comprises the following steps: a pulse trigger circuit is used to output a preset width pulse signal according to the conduction time corresponding to a specific test point in a safe operating area curve; a sampling feedback circuit is connected to a power MOSFET and is used to collect the drain current of the power MOSFET and generate a feedback signal; a drive amplification circuit is connected to the pulse trigger circuit and the sampling feedback circuit and is used to drive the power MOSFET to turn on or turn off according to the pulse signal and the feedback signal; a capacitor energy storage circuit is connected between the drain and the source of the power MOSFET and is used to provide a target drain-source voltage for the power MOSFET according to the drain-source voltage corresponding to a specific test point in the safe operating area curve; and a data collector is used to record the waveform of the drain-source voltage and the waveform of the drain current of the power MOSFET, wherein the waveform of the drain-source voltage and / or the waveform of the drain current of the power MOSFET is used to determine whether the power MOSFET is invalid. The drive amplification circuit comprises: a first switch tube, a first end of the first switch tube is used to receive a direct current voltage, and a control end of the first switch tube is connected to the pulse trigger circuit and is used to receive the pulse signal; a second switch tube, a first end of the second switch tube is grounded, a second end of the second switch tube is connected to a second end of the first switch tube, and a control end of the second switch tube is connected to the control end of the first switch tube; a first diode, a cathode of the first diode is connected to the second end of the first switch tube; a second diode, an anode of the second diode is connected to a first end of the first switch tube; a third switch tube, a first end of the third switch tube is connected to a cathode of the second diode, and a control end of the third switch tube is connected to an anode of the first diode; and a fourth switch tube, a first end of the fourth switch tube is grounded, a second end of the fourth switch tube is connected to a second end of the third switch tube and a control end of the power MOSFET respectively, and a control end of the fourth switch tube is connected to the control end of the third switch tube. The sampling feedback circuit is further used to set a target drain current according to the drain current corresponding to a specific test point in the safe operating area curve. The sampling feedback circuit comprises: a second resistor, a first end of the second resistor is used to receive the direct current voltage; a second adjustable resistor, a first end of the second adjustable resistor is connected to a second end of the second resistor, and a second end of the second adjustable resistor is grounded; a reference source, a first end of the reference source is connected to a reference end of the reference source and a first end of the second adjustable resistor respectively, and a second end of the reference source is grounded; a sampling resistor, a first end of the sampling resistor is connected to a source of the power MOSFET, and a second end of the sampling resistor is grounded, and the sampling resistor is used to collect the drain current of the power MOSFET and generate a sampling signal. ​ A comparator, a first input terminal of the comparator is connected to a first terminal of the sampling resistor for receiving the sampling signal, a second input terminal of the comparator is connected to a sliding terminal of the second adjustable resistor for receiving an adjustable reference voltage, and an output terminal of the comparator is connected to a control terminal of the fourth switch tube for outputting the feedback signal.

2. The apparatus of claim 1, wherein, The pulse trigger circuit comprises: An adjustable voltage generating circuit, configured to receive a direct current voltage and generate an adjustable voltage signal according to a conduction time corresponding to a specific test point in the safe operating area curve; and A timer, connected to the adjustable voltage generating circuit, configured to generate the pulse signal according to the adjustable voltage signal.

3. The apparatus of claim 2, wherein, The adjustable voltage generating circuit comprises: A first adjustable resistor, a first terminal of the first adjustable resistor is configured to receive the direct current voltage; and A first capacitor, a first terminal of the first capacitor is connected to a second terminal of the first adjustable resistor for providing the adjustable voltage signal, and a second terminal of the first capacitor is grounded.

4. The apparatus of claim 3, wherein the power MOSFET safe operating area single point detection device is characterized by, The position of the sliding terminal of the first adjustable resistor is adjusted according to the conduction time corresponding to the specific test point in the safe operating area curve to adjust the resistance of the first adjustable resistor, and the preset width is adjusted according to the resistance of the first adjustable resistor and the capacitance of the first capacitor.

5. The apparatus of claim 3, wherein the power MOSFET safe operating area single point detection device further comprises: The preset width is 1.1×vr1×c1, where vr1 is the resistance of the first adjustable resistor, and c1 is the capacitance of the first capacitor.

6. The apparatus of claim 2, wherein, The pulse trigger circuit further comprises: A first resistor, a first terminal of the first resistor is configured to receive the direct current voltage; and A key, a first terminal of the key is connected to a second terminal of the first resistor and the timer respectively, and a second terminal of the key is grounded; When the key is closed, the timer is triggered.

7. The apparatus of claim 1, wherein, The position of the sliding terminal of the second adjustable resistor is adjusted according to the drain current corresponding to the specific test point in the safe operating area curve to adjust the adjustable reference voltage.

8. The apparatus of claim 1, wherein, When the sampling signal is greater than the adjustable reference voltage, the drive amplification circuit drives the power MOSFET to be turned off according to the feedback signal.

9. The apparatus of claim 1, wherein, The capacitor energy storage circuit comprises: A double-pole double-throw switch, a first input terminal of the double-pole double-throw switch is connected to a charging direct current source, a second input terminal of the double-pole double-throw switch is connected to ground through a discharge resistor, A high-voltage capacitor, a first terminal of the high-voltage capacitor is connected to a first output terminal and a fourth output terminal of the double-pole double-throw switch, and a second terminal of the high-voltage capacitor is grounded; A low-voltage capacitor, a first terminal of the low-voltage capacitor is connected to a second output terminal and a third output terminal of the double-pole double-throw switch, and a second terminal of the low-voltage capacitor is grounded; and A switch, connected between the first terminal of the high-voltage capacitor and the drain of the power MOSFET, for being turned on during testing.

10. The apparatus of claim 9, wherein the power MOSFET safe operating area single point detection device further comprises: The double-pole double-throw switch is controlled according to the drain-source voltage corresponding to the specific test point in the safe operating area curve, so that the charging direct current source charges one of the high-voltage capacitor and the low-voltage capacitor to the target drain-source voltage, and the other of the high-voltage capacitor and the low-voltage capacitor is discharged through the discharge resistor.

11. A method for single point detection of safe operating area of power MOSFETs, characterized by, The single-point detection device suitable for the safe operating area of the power MOSFET according to any one of claims 1 to 10 comprises: outputting a preset width pulse signal according to the conduction time corresponding to a specific test point in the safe operating area curve; collecting the drain current of the power MOSFET and generating a feedback signal; driving the power MOSFET to turn on or off according to the pulse signal and the feedback signal; providing a target drain-source voltage to the power MOSFET according to the drain-source voltage corresponding to a specific test point in the safe operating area curve; recording the drain-source voltage waveform and the drain current waveform of the power MOSFET, wherein the drain-source voltage waveform and / or the drain current waveform of the power MOSFET are used to determine whether the power MOSFET is failed; the driving amplifier circuit comprises: a first switch tube, a first end of the first switch tube is used to receive a direct current voltage, a control end of the first switch tube is connected to the pulse trigger circuit for receiving the pulse signal; a second switch tube, a first end of the second switch tube is grounded, a second end of the second switch tube is connected to a second end of the first switch tube, a control end of the second switch tube is connected to the control end of the first switch tube; a first diode, a cathode of the first diode is connected to the second end of the first switch tube; a second diode, an anode of the second diode is connected to a first end of the first switch tube; a third switch tube, a first end of the third switch tube is connected to a cathode of the second diode, a control end of the third switch tube is connected to an anode of the first diode; and a fourth switch tube, a first end of the fourth switch tube is grounded, a second end of the fourth switch tube is connected to a second end of the third switch tube and a control end of the power MOSFET respectively, a control end of the fourth switch tube is connected to the control end of the third switch tube; the sampling feedback circuit is further used to set a target drain current according to the drain current corresponding to a specific test point in the safe operating area curve; the sampling feedback circuit comprises: a second resistance, a first end of the second resistance is used to receive the direct current voltage; a second adjustable resistance, a first end of the second adjustable resistance is connected to a second end of the second resistance, a second end of the second adjustable resistance is grounded; a reference source, a first end of the reference source is connected to a reference end of the reference source and a first end of the second adjustable resistance respectively, a second end of the reference source is grounded; a sampling resistance, a first end of the sampling resistance is connected to a source of the power MOSFET, a second end of the sampling resistance is grounded, the sampling resistance is used to collect the drain current of the power MOSFET and generate a sampling signal; and a comparator, a first input end of the comparator is connected to the first end of the sampling resistance for receiving the sampling signal, a second input end of the comparator is connected to a sliding end of the second adjustable resistance for receiving an adjustable reference voltage, an output end of the comparator is connected to the control end of the fourth switch tube for outputting the feedback signal.

12. The method of claim 11, wherein the power MOSFET safe operating area single point detection is characterized by, The waveform of the drain-source voltage and / or the waveform of the drain current of the power MOSFET are used to determine whether the power MOSFET is failed, including: determining whether the maximum value of the drain current in the waveform of the drain current of the power MOSFET exceeds the corresponding drain current of the specific test point in the safe operating area curve, if yes, marking as failed, if not, marking as passed.

Citation Information

Patent Citations

  • Current detection device for SiC MOSFET and short-circuit protection method

    CN111313874A

  • Dynamic characteristic test system for power semiconductor device

    CN114675152A

  • Short-circuit characteristic test method and system of switching device

    CN118884299A