Data transmission method, device and equipment of network on chip, and storage medium

Abstract

The application provides a data transmission method and device of an on-chip network, equipment and a storage medium, relates to the technical field of computers, and the method is applied to a transmission control node. The transmission control node is arranged on a transmission channel between a network interface of a first node and a second node. The first node sends messages to the second node through multiple transmission channels. The method comprises the following steps: acquiring a credit value of each transmission channel; the credit value reflects the number of empty positions of a buffer area of the transmission channel, and the credit value is positively correlated with the number of empty positions; selecting a target transmission channel from the multiple transmission channels according to the credit value; receiving a message transmission request sent by the first node and forwarding the message transmission request to the second node through the target transmission channel; and in the case that a response message returned by the second node is received, returning the identification of the target transmission channel to the first node through the network interface, so that the first node sends messages to the second node through the target transmission channel.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a data transmission method, apparatus, device, and storage medium for a network-on-a-chip. Background Technology

[0002] Network-on-chip (NOC) is a key technology in multiprocessor architecture. It is the interconnection path and communication network inside the processor, responsible for message passing, and is the basis for processor collaboration.

[0003] Currently, on-chip networks mainly consist of a network interface (NI), one or more routers, and routing channels. Data from the intellectual property (IP) core is packaged through the network interface and sent to the routers via the routing channels. The routers forward the data packets according to their destination addresses through the routing channels. When the data packet reaches the network interface of the destination IP core, the network interface extracts the useful data from the packet and sends it to the destination IP core. Compared to traditional shared bus interconnect structures, on-chip network technology offers advantages such as space reusability and good scalability, packet switching mechanisms, high design efficiency, globally asynchronous and locally synchronous design, and low communication power consumption.

[0004] However, as the number of devices carried by the network-on-chip increases, congestion during network-on-chip transmission becomes more frequent, gradually failing to meet the transmission bandwidth requirements of multiple devices. Summary of the Invention

[0005] This application provides a data transmission method, apparatus, device, and storage medium for on-chip networks to solve problems in related technologies.

[0006] In a first aspect, this application provides a data transmission method for an on-chip network, applied to a transmission control node. The transmission control node is located on a transmission channel between a first node's network interface and a second node. The first node sends messages to the second node through multiple transmission channels. The method includes:

[0007] Obtain a credit value for each of the transmission channels; the credit value reflects the number of empty slots in the buffer of the transmission channel, and the credit value is positively correlated with the number of empty slots;

[0008] Based on the credit value, a target transmission channel is selected from the plurality of transmission channels;

[0009] Receive the message transmission request sent by the first node and forward it to the second node through the target transmission channel;

[0010] Upon receiving a response message from the second node, the identifier of the target transmission channel is returned to the first node through the network interface, so that the first node can send a message to the second node through the target transmission channel.

[0011] Secondly, this application provides a data transmission device for an on-chip network, applied to a transmission control node. The transmission control node is located on a transmission channel between a first node's network interface and a second node. The first node sends messages to the second node through multiple transmission channels. The device includes:

[0012] An acquisition module is used to acquire multiple credit values ​​for each of the transmission channels; the credit value reflects the number of empty slots in the buffer of the transmission channel, and the credit value is positively correlated with the number of empty slots;

[0013] The selection module is used to select a target transmission channel from the multiple transmission channels based on the multiple credit values;

[0014] The first forwarding module is used to receive the message transmission request sent by the first node and forward it to the second node through the target transmission channel;

[0015] The second forwarding module is used to return the identifier of the target transmission channel to the first node through the network interface when it receives the response message returned by the second node, so that the first node can send a message to the second node through the target transmission channel.

[0016] Thirdly, this application also provides an electronic device, including a processor;

[0017] Memory used to store the processor's executable instructions;

[0018] The processor is configured to execute the instructions to implement the method of the first aspect.

[0019] Fourthly, this application also provides a computer-readable storage medium that, when the instructions in the computer-readable storage medium are executed by a processor of an electronic device, enables the electronic device to perform the method of the first aspect.

[0020] In this embodiment, the first node and the second node are interconnected through multiple channels, enabling multiple transmission channels to share network resources, so that the bandwidth of the shared network resources meets the needs of parallel transmission of multiple devices. On the other hand, the transmission control node obtains the credit value of each channel, which reflects the number of empty slots in the buffer, and selects only the channel with sufficient credit value as the target channel to forward the message. Since the credit value is positively correlated with the number of empty slots, it can ensure that the selected channel has enough space to temporarily store the message, avoid data loss and blockage, and ensure the stability of data flow.

[0021] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 This is a schematic diagram of an application environment provided in an embodiment of this application.

[0024] Figure 2 This is a flowchart illustrating the steps of a data transmission method for an on-chip network provided in an embodiment of this application.

[0025] Figure 3 This is a flowchart illustrating the specific steps of a data transmission method for an on-chip network provided in an embodiment of this application.

[0026] Figure 4 This is a schematic diagram of the structure of a transmission control node provided in an embodiment of this application.

[0027] Figure 5 This is a schematic diagram of another transmission control node provided in an embodiment of this application.

[0028] Figure 6 This is a schematic diagram of a data transmission system for an on-chip network provided in an embodiment of this application.

[0029] Figure 7 This is a block diagram of a data transmission device for an on-chip network provided in an embodiment of this application.

[0030] Figure 8 This is a block diagram of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0031] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0032] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and are not limited in number; for example, a first object can be one or more. Furthermore, the term "and / or" in the specification and claims is used to describe the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. In the embodiments of this application, the term "multiple" refers to two or more, and other quantifiers are similar.

[0033] In practical applications, although the multiple processor cores on a multi-core processor chip execute their own code, the processor cores need to share and synchronize data. Therefore, the hardware architecture of a multi-core processor must support efficient inter-core communication, and the performance of the on-chip communication architecture will directly affect the performance of the processor.

[0034] Therefore, network-on-chip (NOC) is a key technology in multiprocessor architecture. It serves as the interconnection path and communication network within the processor, responsible for message passing and forming the basis for processor collaboration. NOC aims to solve communication problems within multi-core processors. A NOC is an integrated circuit built on a network-based communication subsystem, acting as a router-based packet-switching network between on-chip systems. NOC technology borrows from the interconnection network structure of parallel computers, integrating a large number of computing resources and the on-chip communication network connecting these resources onto a single chip. Each processor core has an independent router and its private cache, connected together via the on-chip communication network. The processor cores communicate using a message-based mechanism, replacing the on-chip bus of related technologies with routers and packet switching to complete communication tasks, thereby solving various bottleneck problems caused by bus interconnection in related technologies.

[0035] Specifically, in the process of developing and designing on-chip networks, high-level languages ​​(such as Python) can be used to write the design files for the on-chip network. In one implementation, the design files for the on-chip network can be in the form of register-transfer level (RTL). In digital circuit design, RTL is an abstract model of synchronous digital circuits. This model can describe the circuit structure based on the flow of digital signals between logic units such as hardware registers, memories, combinational logic devices and buses, as well as their logical algebra operation.

[0036] A network-on-a-chip (NIC) can include multiple hardware units, such as routing modules, access devices, consistency modules, processor cores, and buffers. The routing module is a crucial component of the NIC, responsible for implementing essential functions like route calculation and data arbitration. Furthermore, there can be multiple routing modules that can interconnect. Routing modules can also connect to other access devices; for example, the injection ports of a routing module can connect to external devices such as memory, graphics cards, and network cards. This rich selection of additional access devices enhances the functionality of multi-core processor architectures.

[0037] In network-on-chip (NOC) or router interconnection scenarios, different nodes establish connections through routing channels. A routing channel is the physical or logical path that enables data packets to be transmitted from the source node to the destination node; it is also called a "channel" or "link." It is the infrastructure for data flow in a NOC, responsible for connecting various routers and end nodes (such as processor cores, memory controllers, etc.), and determining the transmission path of data packets through specific routing algorithms.

[0038] In some cases, different nodes are interconnected via a single routing channel, a method also known as "interconnection via a single channel." As the scale of on-chip networks further expands, interconnection via a single channel leads to increasing congestion during on-chip network transmission, and shared network resources gradually become unable to meet the transmission bandwidth requirements of multiple devices.

[0039] In other cases, different nodes are connected through two or more independent routing channels to improve bandwidth, achieve data separation, or enhance fault tolerance. This method is also known as "dual-channel interconnection" or "multi-channel interconnection." The core of this interconnection method is to utilize the independence of dual or multi-channels to build parallel or complementary transmission paths between upstream and downstream. However, related technologies often use random dual-channel interconnection, which is not conducive to the effective utilization of on-chip network bandwidth and may result in situations where one channel is congested while another channel has fewer packets.

[0040] As described above, with the increase in chip size and the number of modules within the chip, the number of devices carried by the on-chip network (ISP) is increasing, leading to more congestion during ISP transmission. Shared network resources are gradually becoming insufficient to meet the transmission bandwidth requirements of multiple devices. In other words, the bandwidth of shared network resources can no longer meet the parallel transmission needs of multiple devices, necessitating the addition of resources to the network to improve ISP bandwidth. As the proportion of routing channels in the ISP's chip area increases, the industry demands very high link utilization, requiring a high-bandwidth message transmission path with high link utilization.

[0041] To address the aforementioned issues, this application provides a data transmission method, apparatus, device, and storage medium for on-chip networks. First, an application scenario related to an embodiment of this application will be described.

[0042] The on-chip network data transmission method provided in this application is applied to scenarios where different nodes establish connections through multiple routing channels (physical or logical channels). Taking dual-channel interconnection as an example, see [link to relevant documentation]. Figure 1 The process involves two nodes (left and right) exchanging data and responses through the middle routing control switch module. Figure 1 The core of the architecture is to improve data transmission efficiency by separating data transmission and response feedback and using parallel sub-channels. This improves data transmission efficiency in multi-core chip intra-node communication or low-latency interaction scenarios.

[0043] In this embodiment, the Network Interface (NI) is used to interact with external or other nodes, is responsible for encapsulating or decapsulating data, and connects to the router through the interface.

[0044] In this embodiment, the router is the core of data forwarding. Internally, the router splits into two routing channels: a data channel (DAT) and a response channel (RSP), which operate in parallel. The first data channel (DAT0) or the second data channel (DAT1) is responsible for sending forward data, such as data transmission requests and data packets. The first response channel (RSP0) or the second response channel (RSP1) is responsible for sending reverse responses, such as response messages, acknowledgment messages, and feedback messages. Each routing channel typically includes data lines for transmitting data packet content; control signal lines for carrying handshake signals and routing information; and a buffer for temporarily storing data packets awaiting forwarding to prevent data loss due to link congestion.

[0045] In this embodiment, the routing control switch module is used for channel mapping, scheduling, or conflict arbitration, and can dynamically adjust the path. The left and right nodes are designed with a completely symmetrical architecture, supporting bidirectional communication. For example, data is sent from left to right, and a response is returned from right to left; or data is sent from right to left, and a response is returned from left to right.

[0046] In some embodiments, taking the left side sending data and the right side responding as an example, the data flow is as follows: The network interface (NI) of the left node sends data to the router through the interface, and the data is split into two channels: the first data channel (DAT0) and the second data channel (DAT1). The first data channel (DAT0) or the second data channel (DAT1) of the right router receives the data and forwards it to the network interface (NI) of the right node through the interface. After the right node processes the data, it triggers a response through the interface, which is split into the first response channel (RSP0) and the second response channel (RSP1) by the right router. The data from the first response channel (RSP0) or the second response channel (RSP1) is cross-mapped back to the left router's RSP0 / RSP1 receiving response via the routing control switch and fed back to the network interface (NI) of the left node.

[0047] As can be seen, both data transmission and response transmission adopt a dual-channel parallel transmission method. That is, DAT and RSP each use two sub-channels to achieve separate transmission of data and response, avoid mutual interference, and improve bandwidth.

[0048] The data transmission method of the on-chip network provided in this application will be described in detail below.

[0049] Figure 2 This is a flowchart illustrating the steps of a data transmission method for an on-chip network provided in an embodiment of this application, as follows: Figure 2As shown, this method is applied to a transmission control node and may include the following steps.

[0050] Step 101: Obtain multiple credit values ​​for each transmission channel.

[0051] In this embodiment of the application, the credit value reflects the number of empty slots in the buffer of the transmission channel, and the credit value is positively correlated with the number of empty slots.

[0052] In the embodiments of this application, the transmission channel includes a data channel (DAT) and / or a response channel (RSP).

[0053] In one possible implementation, the credit value of each transmission channel is stored in the application manager of the transmission control node and updated in real time during data transmission; the credit value of each transmission channel is obtained through the application manager.

[0054] For example, each transmission channel has an independent credit management unit, which is used to implement downstream receiving buffers, credit value definitions and feedback paths, and send its own credit value to the application manager of the transmission control node for unified management.

[0055] In this embodiment, a transmission control node is configured on the transmission channel between the network interface of the first node and the second node. The first node sends messages to the second node through multiple transmission channels. The transmission control node is used to distribute data in parallel based on the credit value of each transmission channel. The first node can be an upstream router, and the second node can be a downstream router. Alternatively, the first node can be a central processing unit (CPU) core in a multi-core processor chip, and the second node can be another CPU core or other processing unit connected to that CPU core. This embodiment does not impose specific limitations on these limitations.

[0056] In another possible implementation, the transmission control node sends a credit acquisition request to the credit management unit corresponding to each transmission channel and receives the credit value returned by the credit management unit.

[0057] Step 102: Select the target transmission channel from multiple transmission channels based on multiple credit values.

[0058] It should be noted that the credit value represents the amount of free space in the downstream cache. The credit value of each channel is calculated independently. The caches of each target transmission channel are physically or logically isolated and do not occupy space with each other. This ensures that the congestion of the cache of one transmission channel will not affect another transmission channel. In other words, the increase or decrease of the credit value only applies to the current transmission channel and is unrelated to other transmission channels.

[0059] In one possible implementation, a transmission channel with a credit value greater than zero is selected from multiple transmission channels as the target transmission channel.

[0060] In another possible implementation, if there are two or more transmission channels with a credit value greater than zero, the number of empty slots in the buffer of each of the multiple transmission channels is determined based on the credit value; the number of empty slots in the buffer of each transmission channel is compared; and the transmission channel with the most empty slots is selected as the target transmission channel from the multiple transmission channels. The number of empty slots in the buffer of each transmission channel is negatively correlated with the number of messages stored in First In First Out (FIFO).

[0061] For example, the downstream router allocates independent FIFO queues to multiple transmission channels to buffer received data; the difference between the total capacity of the buffer of the transmission channel and the number of packets stored in the FIFO queue is calculated to obtain the number of empty slots in the buffer.

[0062] Step 103: Receive the message transmission request sent by the first node and forward it to the second node through the target transmission channel.

[0063] In some embodiments, the target transmission channel includes a target data channel. Receiving a message transmission request sent by a first node and forwarding it to a second node through the target transmission channel may include: receiving a message transmission request sent by a first node and forwarding it to a second node through the target data channel.

[0064] For example, the target data channel is DAT0, which receives the message transmission request sent by the first node and forwards it to the second node through DAT0.

[0065] In some embodiments, a message transmission request may include a destination address, a source address, a message length, a bandwidth requirement, and a credit value request. The bandwidth requirement is used to inform the downstream router of the bandwidth resources required for the message transmission. Bandwidth refers to the amount of data that a channel can transmit per unit time, usually measured in gigabits per second (Gbps). The credit value request is used to query the downstream router for its current credit value.

[0066] Step 104: Upon receiving the response message from the second node, return the identifier of the target transmission channel to the first node through the network interface.

[0067] In this embodiment of the application, the first node sends a message to the second node through the target transmission channel.

[0068] In this embodiment of the application, the response message is a response message generated by the second node according to a preset protocol specification, and the response message includes a response type identifier.

[0069] In some embodiments, after receiving a message from the first node, the second node checks the message request information, makes a routing decision, and forwards the message from the corresponding output interface to the next-hop router or the final target device. During forwarding, the router re-encapsulates the message, adding new link-layer header information to adapt to the transmission requirements of the next link segment.

[0070] In one possible implementation, the first node sending a message to the second node through the target transmission channel includes: the first node sending multiple data units (flits) to the second node through the target transmission channel.

[0071] In summary, in this embodiment, the first node and the second node are interconnected through multiple channels, enabling multiple transmission channels to share network resources. This ensures that the bandwidth of the shared network resources meets the parallel transmission needs of multiple devices. On the other hand, the transmission control node obtains the credit value of each channel, which reflects the number of available slots in the buffer, and selects only the channel with sufficient credit value as the target channel to forward packets. Since the credit value is positively correlated with the number of available slots, it ensures that the selected channel has enough space to temporarily store packets, avoiding data loss and blockage, and ensuring the stability of data flow.

[0072] Figure 3 This is a flowchart illustrating the specific steps of a data transmission method for an on-chip network provided in an embodiment of this application, as follows: Figure 3 As shown, this method is applied to a transmission control node and may include the following steps.

[0073] Step 201: Obtain the credit value for each transmission channel.

[0074] In this embodiment of the application, the credit value reflects the number of empty slots in the buffer of the transmission channel, and the credit value is positively correlated with the number of empty slots.

[0075] The method for this step has been explained in step 101 above, and will not be repeated here.

[0076] Step 202: When multiple credit values ​​are all greater than zero, calculate the number of available slots for the two transmission channels based on their credit values.

[0077] In this embodiment of the application, the number of transmission channels is two.

[0078] Understandably, the essence of the credit value is that the receiving end informs the transmission control node of the number of empty slots in the buffer of the current transmission channel. If multiple credit values ​​are greater than zero, it means that the credit values ​​of both transmission channels are greater than zero, indicating that both transmission channels have available slots, providing a basis for further calculation and selection.

[0079] In one possible implementation, the number of empty slots for the two transmission channels is equal to the number of empty slots for the two transmission channels.

[0080] In one possible implementation, the number of currently stored packets is determined based on the credit values ​​of the two transmission channels; the difference between the total buffer capacity and the number of currently stored packets is calculated to obtain the number of available slots for the two transmission channels.

[0081] Step 203: Compare the number of empty slots in the two transmission channels.

[0082] In some embodiments, the number of available slots in the two transmission channels is compared using a comparator in the transmission control node.

[0083] Understandably, comparing the queue loads of the two channels and deciding which channel's FIFO queue to send from first, selecting the channel with the lower load, can avoid congestion.

[0084] For example, see Figure 4 The transmission control node includes a comparator (COMP), an application manager (Credit Manager), and a routing channel.

[0085] In this embodiment, the routing channel includes a data channel for transmitting FIFO queues and a credit channel for transmitting credit values. The data channel stores data units (flits) to be sent. The data sent by the first node is divided into two paths within the transmission control node and sent to the data units to be sent in the first data channel or the second data channel, respectively.

[0086] In this embodiment, the credit manager is used to store the credit value of each transmission channel, monitor the downstream cache status, and report the amount of data that can be sent to the upper layer. After the first node sends data through the target transmission channel, the credit value (crd0 or crd1) of the target transmission channel is deducted to avoid downstream cache overflow.

[0087] It should be noted that the transmission control node is located closer to the router than the first and second nodes. The cable width from the device interface is one copy, which is then duplicated within the transmission control node. Since two routing channels are not required, this saves on the path channel area between devices. Furthermore, the close physical proximity of the transmission control node and the sub-channel route allows data transmission to be completed within the current clock cycle, reducing the impact on timing.

[0088] In some embodiments, the credit manager may also send control signals back upstream (interface) or provide feedback on the credit value for each transmission channel.

[0089] In some embodiments, after comparing the number of empty slots in the two transmission channels, the above-described on-chip network data transmission method further includes sub-step 2031.

[0090] Sub-step 2031: If the number of available slots in the two transmission channels is the same, the specified transmission channel shall be used as the target transmission channel.

[0091] It should be noted that in a multi-channel scenario, the physical or logical attributes of the two transmission channels may be different. For example, channel A is a low-latency link and channel B is a high-throughput link. The designated channel can force priority scheduling of the critical link.

[0092] In one possible implementation, the transmission channel is designated as a low-latency transmission channel.

[0093] For example, in NOC, channel 0 connects to the real-time control core, enabling microsecond-level response, while channel 1 connects to the general computing core, with channel 0 designated as the transmission channel. In this case, even if the available slots are the same, designating channel 0 as the target ensures that control commands prioritize the low-latency link, guaranteeing system real-time performance.

[0094] In another possible implementation, the specified transmission channel is determined based on the service type of the data stream.

[0095] For example, video streams have high requirements for bandwidth stability. When the data stream is a video stream, the designated transmission channel is a high-throughput channel to avoid screen stuttering caused by scheduling to a low-bandwidth channel. Control streams are sensitive to latency. When the data stream is a control stream, the designated transmission channel is a low-latency channel to ensure fast command response.

[0096] In another possible implementation, the transmission channel is specified as a transmission channel with a low implicit error rate.

[0097] Understandably, if a certain transmission channel has a high implicit error rate, using other channels as target transmission channels can achieve rapid isolation without the need for complex fault detection algorithms, thus reducing the real-time requirements for fault handling.

[0098] The above technical solution enables data transmission through a designated transmission channel when there are transmission channels with the same number of available slots. This bypasses arbitration, simplifies complex algorithms by replacing them with simple conditional judgments, and reduces the design difficulty and resource consumption of the scheduling module.

[0099] Step 204: Select the transmission channel with more empty slots from the two transmission channels as the target transmission channel.

[0100] In some embodiments, when the number of transmission channels is at least three, the data transmission method of the on-chip network may further include: when multiple credit values ​​are all greater than zero, calculating the number of empty slots in at least three transmission channels based on the credit values ​​of at least three transmission channels; comparing the number of empty slots in at least three transmission channels pairwise to determine the transmission channel with the most empty slots among the at least three transmission channels; and taking the transmission channel with the most empty slots as the target transmission channel.

[0101] By using the above technical solution, the target transmission channel is selected based on the real-time credit value. The transmission channel with more available slots is selected as the target transmission channel. This allows the packets sent by the first node to be distributed to channels with relatively idle buffers, thereby achieving dynamic load balancing across multiple channels, maximizing the use of the advantages of multi-channel parallelism, and increasing the total transmission bandwidth.

[0102] Step 205: If the sum of multiple credit values ​​is less than or equal to zero, send a congestion signal to the first node.

[0103] In this embodiment, the congestion signal is used to allow the first node to suspend sending messages to the second node.

[0104] Understandably, a sum of multiple credit values ​​less than 0 indicates that all transmission channels have no available space, requiring a congestion signal to cause the first node to pause message transmission. A sum of multiple credit values ​​equal to zero indicates that the credit value of each transmission channel is equal to 0, meaning all transmission channels are full, and message transmission needs to be paused to avoid buffer overflow.

[0105] In some embodiments, if the sum of multiple credit values ​​is less than or equal to a preset credit threshold, a congestion signal is sent to the first node, wherein the credit threshold is greater than 0.

[0106] In one possible implementation, the credit threshold is the difference between the total capacity of the multi-channel buffer and the maximum amount received during the latency period.

[0107] Understandably, after receiving a congestion signal, the first node needs a certain amount of time to pause transmission due to transmission and processing delays, during which time it may continue to send several packets. Therefore, the credit threshold needs to reserve the number of packets to be received during the delay period to ensure that the remaining buffer can accommodate the packets during the delay period after the trigger signal is activated, avoiding overflow. For example, if a maximum of K packets are received during the delay period, then the credit threshold is the difference between the total buffer capacity of multiple channels and K.

[0108] By setting a credit threshold, we can avoid triggering the system only when it is completely full, thus reserving a buffer and preventing premature triggering that would waste resources.

[0109] In some embodiments, the data transmission method of the above-described on-chip network may further include: sending an abnormal signal to a first node when the credit value is continuously 0 or fluctuates abnormally, the abnormal signal being used to allow the first node to suspend sending messages to a second node. In this way, the transmission control node can monitor the congestion of the transmission channel through the credit value, and in the event of a failure in a transmission channel, stop sending messages through that transmission channel, achieving automatic isolation of the faulty channel and improving system fault tolerance.

[0110] By employing the above technical solution, when the total available buffer space across all channels is exhausted, the transmission of non-critical task messages can be paused by sending a congestion signal, thus prioritizing the transmission of data already in transit and preventing a global deadlock.

[0111] Step 206: Receive the message transmission request sent by the first node and forward it to the second node through the target transmission channel.

[0112] The method for this step has been explained in step 103 above, and will not be repeated here.

[0113] Step 207: Upon receiving the response message from the second node, return the identifier of the target transmission channel to the first node through the network interface.

[0114] In this embodiment of the application, the first node sends a message to the second node through the target transmission channel.

[0115] The method for this step has been explained in step 104 above, and will not be repeated here.

[0116] In some embodiments, after step 207, the above-described on-chip network data transmission method further includes sub-steps 2071 to 2072.

[0117] Sub-step 2071: Upon receiving a data transmission request sent by the second node through the transmission channel, determine the number of data transmission requests and the credit value of the transmission channel.

[0118] Sub-step 2072: Based on the number of requests and the credit value of the transmission channel, forward the data to the second node.

[0119] In this embodiment, the number of requests from the second node reflects the data transmission needs of the second node.

[0120] In this embodiment of the application, the credit value of the transmission channel reflects the cache status of the first node.

[0121] In some embodiments, when the number of requests is one, the credit value of the transmission channel is obtained; if the credit value of the transmission channel is greater than 0, the data is forwarded to the first node.

[0122] Understandably, when the transmission control node receives only one data transmission request, it means that the second node only has one sub-channel that needs to send a message to the first node. By obtaining the credit value counter of the transmission channel, it confirms whether it holds credit, that is, whether the credit value of the transmission channel is greater than 0. If the credit value of the transmission channel is greater than 0, it means that there is space to receive messages and forward data to the first node.

[0123] The above technical solution associates the first and second nodes through the transmission control node before forwarding, and establishes a dynamic matching mechanism between the sending needs of the second node and the receiving capacity of the first node, so that the data transmission rhythm is more adapted to the processing capabilities of both parties, reducing link congestion caused by supply and demand imbalance.

[0124] In some embodiments, sub-step 2072 may include sub-steps 20721 to 20722.

[0125] Sub-step 20721: If the credit value of the transmission channel is greater than zero, poll and arbitrate multiple data transmission requests to determine the transmission order of multiple transmission channels.

[0126] Sub-step 20722: Forward data to the second node in the order of sending through the transmission channels corresponding to multiple data sending requests.

[0127] In this embodiment, the second node has two parallel sub-channels, namely the first data channel and the second data channel, enabling parallel message transmission. However, when messages from multiple sub-channels of the second node need to be transmitted to the first node via the same bus, since both sub-channels have messages to send simultaneously, and the bus can only serve one sub-channel at a time, the messages from the two sub-channels will compete for bus usage rights, resulting in contention. This contention may lead to message collisions, increased transmission delays, or even one sub-channel excessively occupying the bus, causing the other sub-channel's messages to be unable to be transmitted for an extended period.

[0128] In this embodiment, polling arbitration allocates resources to multiple data transmission requests in a fixed order, ensuring that each transmission channel receives an equal opportunity on a periodic basis. By using polling arbitration, it is guaranteed that as long as there is a request to send a message off the bus and a device-side credit value, a message will be sent off the bus in every cycle.

[0129] It should be noted that the premise of a transmission channel having a credit value greater than zero is that each transmission channel has available space in its buffer and is considered a usable channel. Unusable channels are filtered out in advance to avoid assigning requests to channels without available space.

[0130] For example, see Figure 5The first and second data channels send two data transmission requests to the application management module. The application management module decides whether to grant permission based on whether the credit value of the transmission channel is greater than zero, ensuring that data is sent only if it has credit, avoiding buffer overflow, and facilitating reliable and non-blocking communication within multi-core chips.

[0131] The above technical solution eliminates the need for complex priority calculations or load predictions. It can quickly determine the order of multiple requests, reducing the delay in the arbitration process. At the same time, round-robin arbitration distributes the sending rights in turn, making the load of available channels with credit values ​​greater than 0 more balanced.

[0132] Step 208: If data transmission is completed through the target transmission channel, update the credit value of the target transmission channel.

[0133] In this embodiment, the target transmission channel includes a target data channel and a target response channel. The target data channel is used to forward messages sent by the first node to the second node, and the target response channel is used to return response messages generated by the second node to the first node.

[0134] In this embodiment, data transmission occupies a buffer, causing the credit value to decrease. After the transmission is completed, the data leaves the buffer of the target transmission channel and is received and processed by the second node, indicating that the number of empty slots in the buffer area of ​​the target transmission channel has increased. Therefore, it is necessary to increase the credit value. By updating the credit value of the target transmission channel, the credit value can always be accurately synchronized with the actual buffer empty slot status.

[0135] In one possible implementation, the credit value of the target transmission channel is updated based on the amount of data transmitted. For example, if transmitting one message occupies one buffer unit, the number of empty spaces in the target transmission channel's buffer is incremented by 1 upon completion, and the credit value is incremented by 1 simultaneously.

[0136] In another possible implementation, the credit value of the target transmission channel is updated based on the number of buffer units occupied. For example, if N messages are transmitted, each occupying one buffer unit, then after the transmission is completed, the number of empty buffer slots increases by N, and the credit value increases by N accordingly.

[0137] Through the above technical solutions, in multi-channel scenarios, real-time updates of credit values ​​can dynamically balance the load of each channel, avoid bandwidth waste caused by the long-term depletion of credit values ​​in some channels, and improve the overall effective utilization of transmission bandwidth.

[0138] In some embodiments, step 208 may include the following sub-steps 2081 to 2083.

[0139] Sub-step 2081: If data transmission is completed on the target transmission channel, determine whether a response message transmitted through the target response channel has been received;

[0140] Sub-step 2082: Upon receiving a response message, determine the number of free slots in the buffer to be released based on the response message;

[0141] Sub-step 2083: Calculate the sum of the credit value and the number of empty slots of the target transmission channel, and use the sum as the updated credit value of the target transmission channel.

[0142] In this embodiment of the application, the response message is returned by the second node after receiving the data sent by the first node through the target response channel.

[0143] In this embodiment of the application, the response message reflects the second node's confirmation of receiving data and releasing the buffer, and the number of response messages is the same as the number of messages transmitted through the target transmission channel.

[0144] In one possible implementation, after the second node finishes processing the data sent by the first node, it determines the space occupied by the processed data, obtains the number of free slots based on the space occupied by the processed data, and writes the number of free slots into a specific field of the response message; correspondingly, upon receiving the response message, it parses the value of the field to obtain the number of free slots in the buffer.

[0145] In some embodiments, if data transmission fails or is interrupted, the second node does not return a response message and the credit value is not updated.

[0146] For example, the initial credit value of the target transmission channel is equal to 5. After transmitting 1 message, the buffer is occupied, and the temporary credit value of the target transmission channel is equal to 5-1=4. After the second node returns a "reception completed" response message, it determines that the number of empty slots released in the buffer is 1 based on the response message, and the credit value is updated to 4+1=5.

[0147] The above technical solution confirms that the second node has received data and the buffer has been successfully released by responding to the message. The credit value is updated according to the sum of the credit value of the target transmission channel and the number of available slots. This allows the available capacity of the target transmission channel to dynamically match the processing capacity of the second node, avoiding congestion of the entire system due to one channel occupying the resources of other channels or due to information lag.

[0148] In some other embodiments, step 208 may include the following sub-steps 2084 to 2085.

[0149] Sub-step 2084: Upon receiving data transmitted by the first node through the target transmission channel, calculate the difference between the credit value of the target transmission channel and a preset constant to obtain a temporary credit value;

[0150] Sub-step 2085: Use the temporary credit value as the updated credit value for the target transmission channel.

[0151] In this embodiment of the application, the preset constant can be 1.

[0152] Understandably, the credit value is reduced by 1 after the target transmission channel transmits one message.

[0153] For example, before data is transmitted through the target transmission channel, the credit value of the target channel is C; during the data transmission process, the message is temporarily stored in the buffer of the target channel, the number of empty slots in the buffer is reduced by 1, and the credit value of the target channel is temporarily changed to C-1.

[0154] Through the above technical solution, the credit value is updated in real time during data transmission, which can dynamically balance the load of each channel, avoid bandwidth waste caused by the long-term depletion of credit value in some channels, and improve the effective utilization rate of the overall transmission bandwidth.

[0155] In summary, in this embodiment, multi-channel interconnection provides network resource sharing, reducing the probability of network congestion. By adaptively selecting transmission channels based on resource usage in the sub-channel routing buffer, the first node can use the sum of credit values ​​of all channels, effectively increasing the packet forwarding efficiency of data and response channels.

[0156] Figure 6 This is a schematic diagram of a data transmission system for an on-chip network provided in an embodiment of this application. The data transmission system for the on-chip network includes Double Data Rate (DDR) memory, network freedom, shared cache, and core.

[0157] In this embodiment of the application, DDR is the external storage unit of the system, used to store a large amount of data.

[0158] In this embodiment, the network resource is a data channel connecting the DDR and the shared cache, responsible for transmitting data requests or the data itself. The first data channel (solid arrow) is the primary or active data channel; the second data channel (dashed arrow) is the backup / inactive data channel.

[0159] In the embodiments of this application, the core can be a CPU core or a GPU core, which performs data processing tasks.

[0160] In some embodiments, when the core needs to access data, it first sends a data retrieval request to the shared cache, requesting the shared cache to load the corresponding data from the DDR. Upon receiving the data retrieval request, the shared cache loads the corresponding data from the DDR via a first data channel; if the first data channel is busy or faulty, a second data channel may be activated. After receiving the data retrieval request from the first data channel, the DDR sends the corresponding data back to the shared cache via the first data channel; the shared cache temporarily stores the data, waiting for the core to read it or forwarding it directly to the core.

[0161] It should be noted that in a single-channel network, because the DAT messages on the DDR side are not returned quickly enough, the REQ requests in the shared cache cannot be released quickly, causing the REQs to accumulate in the shared cache and frequently sending retry requests to the core side, resulting in a decrease in system performance.

[0162] By employing the above technical solutions, direct access to DDR by the core is avoided, the behavior of the shared cache sending retry requests to the core is significantly reduced, and the on-chip network data transmission system reduces data access latency through the high-speed characteristics of the cache, thereby improving overall computing efficiency and increasing system performance by more than 31%.

[0163] Figure 7 This is a block diagram of a data transmission device for an on-chip network provided in an embodiment of this application. It is applied to a transmission control node. The transmission control node is set on the transmission channel between the network interface of a first node and a second node. The first node sends messages to the second node through multiple transmission channels. The device 600 includes the following modules.

[0164] The acquisition module 601 is used to acquire multiple credit values ​​for each transmission channel; the credit value reflects the number of empty slots in the buffer of the transmission channel, and the credit value is positively correlated with the number of empty slots;

[0165] The selection module 602 is used to select a target transmission channel from multiple transmission channels based on multiple credit values;

[0166] The first forwarding module 603 is used to receive the message transmission request sent by the first node and forward it to the second node through the target transmission channel;

[0167] The second forwarding module 604 is used to return the identifier of the target transmission channel to the first node through the network interface when it receives the response message returned by the second node, so that the first node can send a message to the second node through the target transmission channel.

[0168] Optionally, module 602 is selected, including:

[0169] The first calculation submodule is used to calculate the number of available slots for two transmission channels based on their credit values ​​when multiple credit values ​​are greater than zero.

[0170] The comparison submodule is used to compare the number of empty slots in two transmission channels;

[0171] The first determination submodule is used to select the transmission channel with more empty slots from the two transmission channels as the target transmission channel.

[0172] Optionally, the selection module 602 may also include:

[0173] The second determination submodule is used to select a specified transmission channel as the target transmission channel when the number of available slots in the two transmission channels is the same.

[0174] Optionally, module 602 is selected, including:

[0175] The first sending submodule is used to send a congestion signal to the first node when the sum of multiple credit values ​​is less than or equal to zero. The congestion signal is used to allow the first node to suspend sending messages to the second node.

[0176] Optionally, the on-chip network data transmission device also includes:

[0177] The update module is used to update the credit value of the target transmission channel when data transmission is completed through the target transmission channel.

[0178] Optionally, the target transmission channel includes a target response channel, and the update module includes:

[0179] The judgment submodule is used to determine whether a response message transmitted through the target response channel has been received after the data transmission through the target transmission channel has been completed. The response message is returned by the second node after receiving the data sent by the first node through the target response channel.

[0180] The third determination submodule is used to determine the number of free slots in the buffer to be released based on the response message received.

[0181] The second calculation submodule is used to calculate the sum of the credit value and the number of empty slots of the target transmission channel, and use the sum as the updated credit value of the target transmission channel.

[0182] Optionally, the on-chip network data transmission device also includes:

[0183] The temporary update module is used to calculate the difference between the credit value of the target transmission channel and a preset constant when data is received from the first node through the target transmission channel, and obtain a temporary credit value.

[0184] Use the temporary credit value as the updated credit value for the target transmission channel.

[0185] Optionally, the on-chip network data transmission device also includes:

[0186] The determination module is used to determine the number of data transmission requests and the credit value of the transmission channel when a data transmission request is received from a second node through the transmission channel.

[0187] The third forwarding module is used to forward data to the first node based on the number of requests and the credit value of the transmission channel.

[0188] Optionally, there can be multiple requests, and these multiple data transmission requests are sent through different transmission channels. The third forwarding module includes:

[0189] The arbitration submodule is used to poll and arbitrate multiple data transmission requests to determine the transmission order of multiple transmission channels when the credit value of the transmission channel is greater than zero.

[0190] The second sending submodule is used to forward data to the first node in the order of sending through the transmission channels corresponding to multiple data sending requests.

[0191] As the device embodiment is basically similar to the method embodiment, the description is relatively simple, and relevant parts can be found in the description of the method embodiment.

[0192] This application provides an electronic device including a memory and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by one or more processors, the one or more programs comprising methods described in one or more of the above embodiments.

[0193] This application also provides an electronic device, see [link to document]. Figure 8 The electronic device 700 may include one or more of the following components: processing component 702, memory 704, power supply component 706, multimedia component 708, audio component 710, input / output (I / O) interface 712, sensor component 714, and communication component 716.

[0194] Processing component 702 typically controls the overall operation of electronic device 700, such as operations associated with display, telephone calls, data communication, camera operation, and recording operations. Processing component 702 may include one or more processors 720 to execute instructions to complete all or part of the steps of the methods described above. Furthermore, processing component 702 may include one or more modules to facilitate interaction between processing component 702 and other components. For example, processing component 702 may include a multimedia module to facilitate interaction between multimedia component 708 and processing component 702.

[0195] Memory 704 is used to store various types of data to support the operation of electronic device 700. Examples of this data include instructions for any application or method operating on electronic device 700, contact data, phonebook data, messages, pictures, multimedia, etc. Memory 704 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0196] Power supply component 706 provides power to various components of electronic device 700. Power supply component 706 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to electronic device 700.

[0197] Multimedia component 708 includes an interface that provides an output interface between electronic device 700 and a user. In some embodiments, the interface may include a liquid crystal display (LCD) and a touch panel (TP). If the interface includes a touch panel, the interface may be implemented as a touchscreen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors may not only sense the boundaries of touch or swipe actions but also detect the duration and pressure associated with the touch or swipe operation. In some embodiments, multimedia component 708 includes a front-facing camera and / or a rear-facing camera. When electronic device 700 is in an operating mode, such as a shooting mode or a multimedia mode, the front-facing camera and / or rear-facing camera may receive external multimedia data. Each front-facing camera and rear-facing camera may be a fixed optical lens system or have focal length and optical zoom capabilities.

[0198] Audio component 710 is used to output and / or input audio signals. For example, audio component 710 includes a microphone (MIC) used to receive external audio signals when electronic device 700 is in an operating mode, such as call mode, recording mode, and voice recognition mode. The received audio signals may be further stored in memory 704 or transmitted via communication component 716. In some embodiments, audio component 710 also includes a speaker for outputting audio signals.

[0199] Input / output (I / O) interface 712 provides an interface between processing component 702 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to, home buttons, volume buttons, power buttons, and lock buttons.

[0200] Sensor assembly 714 includes one or more sensors for providing state assessments of various aspects of electronic device 700. For example, sensor assembly 714 may detect the on / off state of electronic device 700, the relative positioning of components such as the display and keypad of electronic device 700, changes in position of electronic device 700 or a component of electronic device 700, the presence or absence of user contact with electronic device 700, orientation or acceleration / deceleration of electronic device 700, and temperature changes of electronic device 700. Sensor assembly 714 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. Sensor assembly 714 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, sensor assembly 714 may also include an accelerometer, gyroscope, magnetometer, pressure sensor, or temperature sensor.

[0201] Communication component 716 facilitates wired or wireless communication between electronic device 700 and other devices. Electronic device 700 can access wireless networks based on communication standards, such as WiFi, carrier networks (such as 2G, 3G, 7G, or 7G), or combinations thereof. In one exemplary embodiment, communication component 716 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, communication component 716 also includes a near-field communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on radio frequency identification (RFID) technology, Infrared Data Association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0202] In an exemplary embodiment, the electronic device 700 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to implement a data transmission method for an on-chip network provided in this application embodiment.

[0203] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 704 including instructions, which can be executed by a processor 720 of an electronic device 700 to perform the above-described method. For example, the non-transitory storage medium may be a ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, and optical data storage device, etc.

[0204] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the methods described in the above embodiments.

[0205] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the application disclosed herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the following claims.

[0206] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.

Claims

1. A data transmission method for an on-chip network, characterized in that, The method is applied to a transmission control node, which is set on a transmission channel between a first node's network interface and a second node. The first node sends messages to the second node through multiple transmission channels. Obtain multiple credit values ​​for each of the transmission channels; the credit values ​​reflect the number of empty slots in the buffer of the transmission channel, and the credit values ​​are positively correlated with the number of empty slots; Based on the multiple credit values, a target transmission channel is selected from the multiple transmission channels; Receive the message transmission request sent by the first node and forward it to the second node through the target transmission channel; Upon receiving a response message from the second node, the identifier of the target transmission channel is returned to the first node through the network interface, so that the first node can send a message to the second node through the target transmission channel; After selecting a target transmission channel from the multiple transmission channels based on the multiple credit values, the method further includes: If the sum of the multiple credit values ​​is less than or equal to a preset credit threshold, a congestion signal is sent to the first node; The credit threshold is the difference between the total buffer capacity of the multiple channels and the maximum amount received during the delay period, and the congestion signal is used to allow the first node to suspend sending messages to the second node.

2. The data transmission method for an on-chip network according to claim 1, characterized in that, The number of transmission channels is two, and the step of selecting a target transmission channel from the multiple transmission channels based on the multiple credit values ​​includes: When all the credit values ​​are greater than zero, the number of available slots in the two transmission channels is calculated based on the credit values ​​of the two transmission channels. Compare the number of available slots in the two transmission channels; The transmission channel with more empty slots among the two transmission channels shall be selected as the target transmission channel.

3. The data transmission method for an on-chip network according to claim 2, characterized in that, After comparing the number of available slots in the two transmission channels, the method further includes: If the number of available slots in the two transmission channels is the same, the designated transmission channel will be used as the target transmission channel.

4. The data transmission method for an on-chip network according to claim 1, characterized in that, The step of selecting a target transmission channel from the multiple transmission channels based on the multiple credit values ​​includes: If the sum of the multiple credit values ​​is less than or equal to zero, a congestion signal is sent to the first node, which is used to allow the first node to suspend sending messages to the second node.

5. The method according to claim 1, characterized in that, After receiving the response message returned by the second node, and returning the identifier of the target transmission channel to the first node through the network interface, the method further includes: When data transmission is completed through the target transmission channel, the credit value of the target transmission channel is updated.

6. The method according to claim 5, characterized in that, The target transmission channel includes a target response channel, and updating the credit value of the target transmission channel when data transmission is completed through the target transmission channel includes: If data transmission is completed on the target transmission channel, determine whether a response message transmitted through the target response channel has been received; the response message is returned by the second node after receiving data sent by the first node through the target response channel. Upon receiving the response message, determine the number of free slots in the buffer that are released based on the response message; Calculate the sum of the credit value of the target transmission channel and the number of empty slots, and use the sum as the updated credit value of the target transmission channel.

7. The data transmission method for an on-chip network according to claim 5, characterized in that, The target transmission channel includes a target data channel, and updating the credit value of the target transmission channel when data transmission is completed through the target transmission channel includes: Upon receiving data transmitted by the first node through the target transmission channel, the difference between the credit value of the target transmission channel and a preset constant is calculated to obtain a temporary credit value; The temporary credit value is used as the updated credit value for the target transmission channel.

8. The data transmission method for an on-chip network according to claim 1, characterized in that, After receiving the response message returned by the second node, and returning the identifier of the target transmission channel to the first node through the network interface, the method further includes: Upon receiving a data transmission request sent by the second node through the transmission channel, determine the number of data transmission requests and the credit value of the transmission channel; Based on the number of requests and the credit value of the transmission channel, data is forwarded to the first node.

9. The data transmission method for an on-chip network according to claim 8, characterized in that, The number of requests is multiple, and the multiple data transmission requests are sent through different transmission channels. The step of forwarding data to the first node based on the number of requests and the credit value of the transmission channel includes: If the credit value of the transmission channel is greater than zero, multiple data transmission requests are polled and arbitrated to determine the transmission order of the multiple transmission channels; The data is forwarded to the first node through the transmission channels corresponding to the multiple data sending requests, in the order of transmission.

10. A data transmission device for an on-chip network, characterized in that, An apparatus applied to a transmission control node, wherein the transmission control node is configured on a transmission channel between a first node's network interface and a second node, and the first node sends messages to the second node through multiple transmission channels, the apparatus comprising: An acquisition module is used to acquire multiple credit values ​​for each of the transmission channels; the credit value reflects the number of empty slots in the buffer of the transmission channel, and the credit value is positively correlated with the number of empty slots; The selection module is used to select a target transmission channel from the multiple transmission channels based on the multiple credit values; The first forwarding module is used to receive the message transmission request sent by the first node and forward it to the second node through the target transmission channel; The second forwarding module is used to return the identifier of the target transmission channel to the first node through the network interface when it receives the response message returned by the second node, so that the first node can send a message to the second node through the target transmission channel; The device further includes a first transmitting submodule, used for: If the sum of the multiple credit values ​​is less than or equal to a preset credit threshold, a congestion signal is sent to the first node; The credit threshold is the difference between the total buffer capacity of the multiple channels and the maximum amount received during the delay period, and the congestion signal is used to allow the first node to suspend sending messages to the second node.

11. An electronic device, characterized in that, include: processor; Memory used to store the processor's executable instructions; The processor is configured to execute the instructions to implement the method as described in any one of claims 1 to 9.

12. A computer-readable storage medium, characterized in that, When the instructions in the computer-readable storage medium are executed by the processor of the electronic device, the electronic device is enabled to perform the method as described in any one of claims 1 to 9.

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