Branch prediction device and method of dynamic adaptive TAGE-EC architecture
By using the dynamic adaptive TAGE-EC architecture, which combines the TAGE master predictor and the entropy-corrected edge-assisted predictor, the problem of low branch prediction efficiency in processor architecture is solved, and higher branch prediction accuracy and pipeline performance optimization are achieved.
Patent Information
- Application Number
- CN202510664126.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-22
- Publication Date
- 2025-10-17
AI Technical Summary
Existing processor architectures, under the von Neumann memory instruction structure, face structural hazard, data hazard, and control hazard problems. In particular, branch prediction efficiency is low under complex workloads, and traditional methods are difficult to effectively solve load-use hazards and bypass forwarding problems in long pipelines.
A dynamic adaptive TAGE-EC architecture is adopted, which combines the TAGE master predictor and the entropy correction edge-assisted predictor. The branch prediction is dynamically adjusted through entropy monitoring and sliding window algorithm. The prediction results are corrected by using the entropy correction module and EC table. The hardware resource utilization of the branch predictor is optimized by combining a multi-level history length table and a hierarchical arbitration strategy.
It significantly improves the accuracy and timeliness of branch prediction, reduces pipeline flushing penalties, reduces alias conflicts and out-of-order conflicts, and improves hardware resource utilization and pipeline performance.
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Figure CN120804725A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application belongs to the field of branch predictor design, and particularly relates to a branch prediction device and method of a dynamic adaptive TAGE-EC architecture. BACKGROUND
[0002] The statements in this section merely provide background information related to the application and do not necessarily constitute prior art.
[0003] The application range of the RISC-V open source instruction set architecture is expanding, and has gradually penetrated into the fields of Internet of Things terminal devices, edge computing nodes and artificial intelligence accelerators. Under this background, the execution efficiency of the processor pipeline has gradually become a bottleneck affecting the overall performance of the system, especially when processing complex workloads.
[0004] Although the processor architecture is constantly evolving, under the von Neumann instruction storage structure, there are still three main hazard problems in the instruction execution process, namely structural hazard, data hazard and control hazard. Structural hazard is caused by the finiteness of hardware component resources. When the hardware component is insufficient to support the normal execution of instructions, such hazard will be triggered. Data hazard is caused by the fact that the data required by the instruction is affected by the previous instruction and cannot be obtained temporarily, thereby hindering the continuous execution of the instruction. Control hazard is mainly caused by branch instructions, which interrupt the instruction flow during the control process, causing the program to fail to execute smoothly. Among them, structural hazard can be solved by increasing hardware resources, such as adding storage units, arithmetic units, etc. Data hazard can be partially alleviated by means of bypass forwarding technology, but for load-use hazard and other data hazard problems that bypass forwarding cannot completely solve in a long pipeline, there are still certain limitations. SUMMARY
[0005] In order to solve the above problems, the application provides a branch prediction device and method of a dynamic adaptive TAGE-EC architecture, which can improve the accuracy and timeliness of branch prediction.
[0006] According to some embodiments, the application adopts the following technical scheme: A branch prediction device of a dynamic adaptive TAGE-EC architecture, comprising a TAGE main predictor and an entropy correction edge auxiliary predictor, wherein: The TAGE main predictor is used for branch prediction mode matching, and each prediction table item stores prediction direction information trained based on historical patterns. The entropy correction edge auxiliary predictor adopts an entropy value monitoring mechanism, performs dynamic entropy value analysis on the update sequence of the global history register through a sliding window algorithm, determines the information disorder degree of the current branch history, and when the current window entropy value exceeds the current dynamic critical threshold, determines that the branch prediction enters a high uncertainty prediction stage, and uses the prediction direction stored in the table entry to cover the original prediction result of the TAGE main predictor.
[0007] As an alternative implementation, the entropy correction edge auxiliary predictor includes an entropy correction module and an EC table, the EC table is used to store data including a plurality of table entries, each table entry includes a label, a prediction direction counter, and an entropy error threshold, when the label in the table entry of the EC table matches the current branch address, the entropy correction module is used to compare the entropy error threshold stored in the current table entry with the current dynamic critical threshold, if the entropy error threshold exceeds the current dynamic threshold, it is considered that the reliability of the TAGE main predictor in the current branch mode is insufficient, and the prediction direction stored in the table entry is used to cover the original prediction result of the TAGE main predictor.
[0008] Further, the label and the prediction direction counter in the table entry of the EC table are only updated when the entropy correction edge auxiliary predictor reallocates the table entry, that is, if the prediction is wrong, the label is updated to the hash calculation value of the global history register and the current PC, and the prediction direction counter is reset to the correct jump direction of the current branch.
[0009] Further, the calculation process of the current dynamic critical threshold of the entropy correction module includes: using the confidence gradient to represent the deviation degree of the confidence, introducing a gradient sensitive mechanism, dynamically adjusting the update step of the critical threshold according to the prediction result and the range to which the confidence gradient belongs, and updating the current critical threshold according to the adjusted update step.
[0010] As an alternative implementation, the TAGE main predictor adopts a multi-level history length table structure, and T1-T4 tables are respectively configured with multi-bit history length, covering short-period cycle mode and long-range associated branch behavior, and the number of history length bits of each table presents a geometric progression mode in turn.
[0011] As an alternative implementation, the TAGE main predictor adopts a hierarchical arbitration strategy, and all history tables are queried in parallel, and the table entry output prediction result is preferentially selected when the longest history match and the label verification are successful; if none of them are matched, the base predictor is returned to ensure the prediction continuity.
[0012] As an alternative embodiment, the TAGE main predictor adopts a dynamic resource allocation mechanism, after the prediction ends, only the Ti table providing the final prediction result is updated, whether the prediction is correct or not, only the final branch result is used to update, a counter is used to determine whether it is a jump; when the prediction is wrong, the idle table entry with longer history depth is preferentially allocated; if there is resource competition, the table entry with utility less than a predetermined value is eliminated through the useful counter.
[0013] As an alternative embodiment, a multiplexer is further included, which is connected to the TAGE main predictor and the entropy correction edge auxiliary predictor, and integrates the output results of the TAGE main predictor and the entropy correction edge auxiliary predictor.
[0014] As an alternative embodiment, an information buffering module is further included, which is used to store the prediction results and the valid information, the prediction information of the branch instruction is sequentially stored in the information buffering module in the IF stage, the prediction information buffering of at most two branch instructions per cycle is supported, the result is transmitted into the information buffering module after the out-of-order execution in the IU stage, and the retired entry is released according to the oldest instruction which has not been submitted, at most one entry is retired per cycle, when the branch prediction error is detected, the information buffering module triggers the pipeline flushing and resets the related entry, and the error propagation range is reduced.
[0015] Further, the information buffering module adopts a hierarchical prefetch buffering mechanism, including two buffers, the first buffer stores the prediction results of the current cycle, and the second buffer preloads the secondary prediction data, when the branch instruction is identified, the data of the second buffer is automatically promoted to the first buffer through the forward recursion mechanism, and the adjacent branch prediction bubble is eliminated.
[0016] As an alternative embodiment, the device adopts a hash strategy combining the segment splicing and the polynomial hash algorithm, the number of bits of the global history register is compressed into an intermediate value, and the polynomial hash algorithm coding is used to generate a multi-bit index address.
[0017] The prediction method based on the above device includes the following steps: The TAGE main predictor is used for branch prediction mode matching, and each prediction table entry stores the prediction direction information trained based on the history mode; The entropy correction edge auxiliary predictor is used for dynamically analyzing the entropy value of the update sequence of the global history register through the sliding window algorithm, determining the information disorder degree of the current branch history, and when the current window entropy value exceeds the current dynamic threshold, it is determined that the branch prediction enters the high uncertainty prediction stage, and the prediction direction stored in the table entry is used to cover the original prediction result of the TAGE main predictor.
[0018] Compared with the prior art, the present application has the following beneficial effects: The application adds a dynamic entropy correction mechanism on the basis of the TAGE main predictor, and uses an entropy correction edge auxiliary predictor to perform dynamic entropy correction, which significantly improves the prediction accuracy of complex branch modes.
[0019] The application supports dynamic threshold adaptive adjustment and enhances the adaptability of non-steady-state branches.
[0020] The TAGE main predictor of the application adopts a multi-level geometric history length table structure, optimizes the coverage range of the history mode, specifically, T1-T4 tables can be configured with 8 / 15 / 44 / 131 bit history length respectively, and through a hierarchical arbitration strategy, long-range associated branches are preferentially matched, and through testing, the alias conflict probability can be reduced by 58%.
[0021] The application designs a segmented splicing and CRC16 polynomial hash algorithm to improve the utilization rate of hardware resources, folds the 131 bit GHR into a 40 bit intermediate value, and generates a 10 bit index address combined with the CRC16 code, experiments show that the utilization rate of the prediction table item is improved by 42%.
[0022] The application introduces an information buffer module, optimizes the pipeline timing and resource management, supports parallel processing of 2 branch instructions per cycle, eliminates out-of-order conflicts through a sequential retirement mechanism, experiments show that the pipeline bubble is reduced by 35%, and combined with a hierarchical prefetch buffer mechanism, zero-cycle history context transmission is realized, and the utilization rate of the front-end instruction fetch bandwidth is improved by 22%.
[0023] In order to make the above-mentioned purposes, features and advantages of the application more obvious and easy to understand, the following preferred embodiments are described in detail below, and the accompanying drawings are used for explanation. BRIEF DESCRIPTION OF DRAWINGS
[0024] The drawings accompanying the specification of the application are used to provide a further understanding of the application, the schematic embodiments of the application and the description thereof are used to explain the application, and do not constitute an improper limitation on the application.
[0025] Figure 1 The application is a dynamic adaptive TAGE-EC architecture branch prediction device (TAGE-EC) architecture diagram; Figure 2A schematic diagram of an XOR-Fold + dynamic displacement hashing strategy for an embodiment; Figure 3 A schematic diagram of a segmented stitching + CRC16 hashing strategy for an embodiment; Figure 4 A schematic diagram of a LONG_MOBILE-15.bt9.trace.gz running example for an embodiment; Figure 5 A schematic diagram of a 400.perlbench-41B.champsimtrace.xz running example for an embodiment; Figure 6 A schematic diagram of a comparison of IPC and MPKI for an embodiment; Figure 7 A schematic diagram of a C910 BPU compute pipeline for an embodiment; Figure 8 A schematic diagram of a TAGE-EC TIB entry for an embodiment. DETAILED DESCRIPTION
[0026] The present application will be further described with reference to the drawings and embodiments.
[0027] It should be noted that the following detailed description is exemplary in nature and is intended to provide further description of the application. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.
[0028] It is to be understood that the singular forms "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. It should be noted that, as used in this specification and the appended claims, the singular form "a," "an," and "the" include plural referents unless the context clearly dictates otherwise. It should be further understood that the terms "comprising," "including," and / or "having" and variations thereof when used herein, are meant to be inclusive in that the method, composition, and / or process comprising, including, and / or having the feature or features can also contain other features not expressly mentioned or inherent to such method, composition, and / or process.
[0029] The embodiments in the application and the features in the embodiments can be combined with each other in the case of no conflict.
[0030] To ensure the clarity of the scheme, the following terms are explained as follows: RISC-V, which means Reduced Instruction Set Computing-V, refers to an open reduced instruction set computing architecture; CPU, which means Central Processing Unit, refers to a central processor; BPU, which means Branch Predict Unit, refers to a branch prediction unit; BHR, or Branch History Registor, refers to the branch history register; GHR, which stands for Global History Registor, refers to the global history register; BHT, or Branch History Table, refers to the branch history table; BTB, namely Branch Target Buffer, refers to the branch target buffer; PHT, or Pattern History Table, refers to the pattern history table.
[0031] Example 1 A branch prediction device for a dynamic adaptive TAGE-EC architecture, such as Figure 1 As shown, it includes the TAGE main predictor and the entropy corrected edge auxiliary predictor (Entropy Correct, EC), where: The TAGE main predictor is used to perform branch prediction pattern matching, and each prediction table entry stores prediction direction information obtained based on historical pattern training; The entropy-corrected edge auxiliary predictor adopts an entropy value monitoring mechanism and performs dynamic entropy value analysis on the update sequence of the global history register through a sliding window algorithm to determine the information confusion of the current branch history. When the current window entropy value exceeds the current dynamic critical threshold, it is determined that the branch prediction enters the high-uncertainty prediction stage, and the prediction direction stored in its table entry is used to overwrite the original prediction result of the TAGE main predictor.
[0032] The details are described below.
[0033] The TAGE main predictor serves as the basic prediction framework and adopts a multi-level history length table structure for branch pattern matching. Each prediction table entry stores the prediction direction information obtained based on historical pattern training.
[0034] The entropy-corrected edge-assisted predictor uses a unique entropy monitoring mechanism to dynamically evaluate the reliability of branch predictions during program execution. A key innovation of this architecture lies in the real-time computational capabilities of the entropy correction module, also known as the Entropy module. This module uses a sliding window algorithm to dynamically analyze the entropy of the global history register (GHR) update sequence and calculates the information chaos of the current branch history using the Shannon entropy formula.
[0035] When the Entropy module detects that the current window entropy value exceeds the critical threshold of 0.7, the system determines that it enters the high uncertainty prediction phase. At this time, the branch history recorded by the GHR presents a significant non-steady-state feature, and the traditional branch predictor based on the matching mechanism of fixed history patterns may appear prediction performance decline.
[0036] In this case, the entropy correction edge auxiliary predictor in the embodiment is activated into working state, and the internal EC table, i.e., the EC Table, contains a tag, a prediction direction counter and an entropy error threshold in each table entry.
[0037] In the prediction process, the hardware of the device performs TAGE prediction query and EC table access in parallel, and when the address tag in the EC table entry matches the current branch address, the entropy error threshold stored in the table entry is compared with the real-time threshold parameter maintained by the dynamic threshold module.
[0038] When the entropy error threshold of the EC table entry exceeds the current dynamic threshold, it indicates that the credibility of the TAGE main predictor in the current branch pattern is insufficient, and at this time, the system will cover the original prediction result of the TAGE main predictor with the prediction direction stored in the EC table entry.
[0039] This prediction correction mechanism based on dynamic entropy value monitoring provides an effective hardware scheme for processing non-steady-state branch patterns.
[0040] In the embodiment, the TAGE main predictor adopts the classical TAGE architecture.
[0041] In order to optimize the timing and improve the overall frequency of the system, in the embodiment, the alternate predictor (i.e., the backup predictor) is always T0, i.e., the C910-Bi-Modal variant predictor by default.
[0042] T1-T4 uses 8, 15, 44 and 131 bit GHR and PC (instruction counter) for hash operation indexing. The T1-T4 table entry is the same as the classical TAGE predictor, which is composed of pred, useful and tag. In the embodiment, each predictor is composed of 1024 table entries, so 10 bit index is used for indexing.
[0043] Pred counter is signed 3bit, high bit Pred[2] represents prediction direction (1 for jump, 0 for no jump), low 2bit Pred[1:0] represents prediction strength, i.e. 3'b111 for strong jump, 3'b100 for weak jump. After prediction, only update Ti table providing final prediction result, whether correct or not, only update according to final branch result, if final is jump, Pred counter increases 1; if final is no jump, Pred counter decreases 1. Pred counter uses saturated counting, count to 3'b111 does not increase, 3'b000 does not decrease.
[0044] Useful counter is unsigned 2bit, representing the usefulness of current table entry. Only when backup predictor (in this embodiment, always T0 C910-Bi-Modal predictor) and Ti predictor providing final prediction result are different, update useful counter of Ti, if Ti result and final branch jump result are same, useful counter increases 1; if Ti result and final branch jump result are different, useful counter decreases 1. Useful counter uses saturated counting, count to 2'b11 does not increase, 2'b00 does not decrease. In addition, useful counter will be periodically reset, in this embodiment, set every 512K branch, high bit reset to 0; then after 512K branch, low bit reset to 0, and so on.
[0045] Tag is PC and global branch history hash operation label information. In this embodiment, the same length Tag label is used, all using 8bit length Tag label. Tag is only updated when the current belongs to the predictor is re-allocated.
[0046] When the result of TAGE providing final prediction result predictor Ti is different from the actual branch jump result, and Ti is not the table entry using the longest branch history (in this embodiment, i<4), the re-allocation operation of TAGE main predictor is enabled.
[0047] Re-allocation is to allocate a new entry table, the operation is as follows: Extract all Tm (in this embodiment, i<m<4) index to get the useful counter value in entry; If all Tm useful counter values are not 0, all corresponding useful counters in Tm decrease 1; If there is only one table useful counter value of 0 in all Tm, allocate to the corresponding entry of the table; if there are two or more useful counter values of 0 in all Tm, allocate to the entry corresponding to the table with the shortest branch history length; The Pred counter, the tag, and the useful counter in the newly allocated entry all need to be initialized. The Pred counter is initialized according to the final jump result of the current branch. If the final result is a jump, the Pred is initialized as 3'b100 (i.e., a weak jump). If the final result is not a jump, the Pred is initialized as 3'b011 (i.e., a weak non-jump). The tag is initialized as the tag value calculated by the GHR and the PC hash of the current branch. The useful counter is initialized as 0.
[0048] The entropy correction edge auxiliary predictor, which can also be referred to as an EC entropy correction predictor or EC, is used to record branches with a high TAGE predictor error rate. The EC entropy correction predictor uses the GHR part and the PC hash to perform indexing, and determines whether to enable the EC entropy correction predictor according to the current branch entropy value. The error judgment threshold is updated in real time by using a global dynamic threshold counter. Whether to modify the TAGE predictor result is determined according to a comparison between the entropy counter value read from the matching table entry and the dynamic threshold. When the entropy counter value is greater than the current dynamic threshold, it is indicated that the randomness of the current historical data is strong, and the TAGE prediction result is unreliable. The prediction information provided by the EC is used to replace the TAGE prediction result.
[0049] The entropy correction edge auxiliary predictor is composed of 32 entries. Each entry is composed of a Tag, a Pred, and an Entropy_cnt. The Tag is an 8-bit tag, and the Pred is a 3-bit. The Tag and the Pred are updated only when the EC predictor reallocates the entry, that is, when the predictor prediction is wrong. At this time, the Tag is updated as the hash calculation value of the GHR and the current PC, and the Pred is reset as the correct jump direction of the current branch.
[0050] The present embodiment proposes a quantitative index, i.e., branch entropy, to measure whether the prediction of the conditional branch at this moment under the current application program is reliable. Entropy close to 0 represents that the current branch prediction is highly reliable, and entropy close to 1 represents that the current branch prediction is extremely unreliable. In this paper, the branch instruction entropy and the Shannon information entropy are studied, and the branch instruction entropy value in the EC predictor is defined.
[0051] Branch history entropy is a specific application of the Shannon entropy in the field of branch prediction. The core idea is to quantify the uncertainty of the branch history sequence to reflect the predictability of the branch instruction. The mathematical definition of the Shannon entropy is formula 1. p(xi) represents the probability of the event xi, and the entropy value H(X) measures the uncertainty of the random variable X. When all event probabilities are equal, the entropy value is maximum, Hmax=log2N, where N is the total number of events. When the probability of a certain event is 1 (completely determined), the entropy value is minimum, Hmin=0.
[0052] (1) In branch prediction, the entropy of branch outcome (Taken / Not Taken) needs to consider the conditional probability of historical pattern.
[0053] In the design of this embodiment, the GHR maintains 131-bit table entries. Directly calculating branch entropy every cycle faces many challenges, such as calculation complexity. It is extremely complex to calculate the probability by traversing the entire GHR. And too long history will lead to the mixing of old data, reducing the accuracy of entropy. The locality principle of branch prediction shows that the recent history has a greater impact on the next branch outcome, and long history may introduce noise.
[0054] This embodiment proposes a dynamic sliding window to judge the influence of the current GHR on the current branch prediction by calculating the entropy value in the window in real time.
[0055] Assuming that the current branch history window is Gwindow, the branch entropy is defined as formula (2). Where p(1|Gwindow) is the probability of branch outcome Taken under the history window Gwindow, and p(0|Gwindow) is the probability of branch outcome Not Taken under the history window Gwindow. The global branch entropy is the weighted average of all history window entropy values, see formula (3).
[0056] (2) (3) For each history window Gwindow, the entropy value H(B|Gwindow) is calculated as formula (4), the conditional probability is calculated as formula (5) and (6), where taken_count(Gwindow) represents the number of branch outcomes Taken under the history window Gwindow, and total_count(Gwindow) represents the total number of branches under the history window Gwindow. The selection of window width will balance the branch entropy calculation effect (prediction accuracy) and hardware resource consumption (storage area). This embodiment takes 12-bit global history as each history window.
[0057] (4) (5) (6) The value of the entropy is in the range of 0-1, and in the embodiment, when H(B|Gwindow) is less than 0.7, it is considered that the branch history based on the current history window has a certain regularity, and the main predictor is used for prediction; when H(B|Gwindow) is greater than 0.7, it is considered that the branch history based on the current history window is relatively random, and the EC edge predictor needs to be enabled for auxiliary prediction, so as to correct the possible prediction error of the main predictor.
[0058] The selection of the optimal threshold value is different for different running applications, and in most benchmark tests, there is a strong correlation between the selection of the optimal threshold value and the ratio of the number of incorrect predictions (NUmiss) and the number of correct predictions (NUcorrect). Experiments show that, When approaching 1, the obtained threshold value approaches the optimal value.
[0059] The existing scheme proposes a dynamic threshold updating strategy, which uses a 7-bit saturation counter TC to adjust the threshold value θ by predicting correct or incorrect cases. When the prediction is incorrect, TC increases until it reaches the positive saturation value, at which time θ increases by 1 and TC is reset. When the prediction is correct and the absolute value of the predictor weight change |s| does not exceed the current threshold value θ, TC decreases until it reaches the negative saturation value θ-1, and TC is reset. The state transition equation of the above algorithm can be obtained, when the TC saturation counter reaches saturation, the threshold value θ is adjusted, wherein , N is the number of TAGE predictors: (7) However, this algorithm has certain defects. The single prediction result directly affects TC, which is easily disturbed by local fluctuations of the program; only the binary state of |s|≤θ is judged, without considering the closeness of s and θ. When θ deviates from the global optimal value, there is a lack of effective escape mechanism. When the prediction is incorrect and the confidence (|s|) is high, it indicates that the current threshold value θ deviates seriously from the optimal value and needs to be corrected quickly; when the prediction is correct but the confidence (|s|) is much lower than θ (difference>θ / 4), it indicates that the threshold value is too high, causing learning rigidity.
[0060] In the embodiment, a gradient-sensitive dynamic step adjustment mechanism is set based on the above basic algorithm, the internal confidence state of the predictor is quantized, and the update step of θ is adaptively adjusted. The confidence gradient CG (Confidence Gradient) is introduced as the basis for dynamic adjustment of the step, and the expression is shown in formula (8).
[0061] (8) where CG is greater than 0 represents that the internal confidence of the predictor is lower than the current threshold, and CG is less than 0 represents that the internal confidence of the predictor is higher than the current threshold. The dynamic step size Δθ is as shown in formula (9), defines four interval ranges of CG, and dynamically adjusts the update step size Δθ of θ according to the confidence gradient CG and the prediction result: (9) High confidence error (CG <-0.25): prediction error and internal confidence significantly higher than θ, indicating that the current θ deviates from the optimal value seriously, and θ needs to be increased at double speed.
[0062] Low confidence error (CG ≥ -0.25): prediction error but internal confidence close to θ, regular adjustment (Δθ=+1).
[0063] Low confidence correct (CG>0.25): prediction correct but internal confidence significantly lower than θ, indicating that θ is too high to cause insufficient learning, and θ needs to be reduced at double speed.
[0064] High confidence correct (CG ≤ 0.25): prediction correct and internal confidence close to θ, regular adjustment (Δθ=-1).
[0065] The above scheme introduces a gradient sensitive mechanism through the threshold update driven by the confidence gradient (CG), and dynamically adjusts the threshold step size (Δθ) according to the deviation degree of the prediction result and the confidence. For example, when the prediction is wrong and the confidence deviates significantly, a double step size is used to accelerate the threshold correction, improving the adaptability to non-steady-state branches. Through four-interval gradient division, the prediction state is divided into high confidence error, low confidence error, low confidence correct, and high confidence correct according to the confidence gradient (CG), which correspond to different step size adjustment strategies respectively, and the learning efficiency is optimized.
[0066] In some embodiments, clock gating technology is used to start EC table access only when the entropy value exceeds the threshold, reducing static power consumption by 78%.
[0067] As can be seen from the TAGE-EC implementation, Tag and Index calculation need to rely on GHR and PC, and in order to use GHR and PC bit width as much as possible while saving hardware resources, GHR and PC are usually selected to be folded in part, and then GHR and PC are used for hash operation. The selection and folding mode of different bits will have a great influence on branch prediction performance. In this embodiment, a branch predictor is constructed by using C language, and Python is used to configure the internal parameters of the predictor (such as branch predictor table size, branch predictor hash bit width selection, etc.), aiming to quickly verify the feasibility of the branch predictor design.
[0068] This embodiment maintains the GHR table item length of 131 bits, and the TAGE table item length is respectively: 8, 15, 40, 131 bits, two different hash strategies are used to verify the feasibility of the hash algorithm: (A) XOR-Fold+dynamic displacement, the calculation method is as Figure 2 , : fold 131-bit GHR into 20 bits, XOR in 6 segments (22 bits per segment, the last segment is supplemented with 0); (B) segmented splicing+polynomial hash (CRC16), the calculation method is as Figure 3 fold 131-bit GHR into 40 bits, XOR once every 33 bits (the last segment is supplemented with 0); the generating polynomial is 0x1021 (ISO / IEC 13239 standard), and the input data is the bit stream after splicing PC and GHR.
[0069] This embodiment will use the trace provided by CBP-5 (the fifth branch prediction championship) as input to test the branch predictor architecture performance, the trace adopts BT9 format and is divided into MOBILE and SERVER two categories, which can be further divided into SHORT and LONG according to the length of the trace. The test set will select 5 MOBILE SHORT, 3 MOBILE LONG, 5 SERVER SHORT, and 3 SERVER LONG, a total of 16 traces.
[0070] The test will use MPKI (the number of mispredicted instructions per thousand instructions) as the performance index for evaluation, and the MPKI when the total number of instructions reaches 1K, 10K---300M will be output respectively to count the dynamic change and the final value of MPKI. Take running LONG_MOBILE-15.bt9.trace.gz as an example Figure 4 , a total of 1540382230 instructions are run, of which 341525363 are branch instructions, the number of mispredicted instructions is 69093, and the resulting MPKI is 0.0449.
[0071] In the Tage branch predictor, two hash strategies of segmented splicing+polynomial hash and XOR-Fold+dynamic displacement are used to run the above 16 traces, respectively denoted as Strategy A and Strategy B, the trace name adopts the abbreviated naming, and LONG_MOBILE-15.bt9.trace.gz is taken as an example, named LM-15, the evaluation index is MPKI, a total of 12001180702 instructions, the weighted average of strategy A MPKI is 2.417775 greater than B 2.417385, and the performance of strategy B is obviously better.
[0072] In the design of the embodiment, the branch predictor is taken as a sub-component in the core, and complex conditions such as interface integration, instruction scheduling, and data path need to be considered. Therefore, it is complex and time-consuming to directly write RTL to integrate the core for algorithm verification. In the embodiment, Champsim simulator is used. The simulator can simulate a heterogeneous multi-core system with an arbitrary memory hierarchy, and can verify the feasibility of the algorithm based on low start-up time and design configurability.
[0073] The experimental platform researched in the embodiment is based on Champsim simulator, and a single-core out-of-order processor is constructed. The core parameters of the modeling model are configured as follows: The front-end pipeline: the processor frequency is 1GHz, the fetch / decode / issue width is 6, and the maximum parallel processing of instructions per cycle is 6; the L1 Icache is 64sets, 8-way set-associative, and the access delay is 4 cycles; the ITLB is 16sets, 4-way set-associative, and supports virtual address prefetching.
[0074] The back-end pipeline: the ROB is 352entry, and supports 5-way retirement; the load queue and the store queue are 128 and 72entry respectively, and the Load / Store issue width is 2.
[0075] The BHT is configured by the branch_predict parameter, and will be replaced by the variants Bi-moal, Gshare, and the TAGE-EC constructed in the embodiment. The custom prediction module is dynamically loaded through the Champsim interface; the branch target buffer (BTB) is 4K-entry, 4-way set-associative. The comparison benchmark predictor is TAGE-EC, Gshare, C910 variant Bi-Modal, and the BHT parameters are shown in Table 1.
[0076] The test benchmark selects the trace constructed by DPC3, which is constructed by the test data of SPEC CPU 2017. Ten representative loads (perlbench, gcc, etc.) are selected for testing. The dpc3 trace test case 400.perlbench-41B.champsimtrace.xz is used, the test is preheated with 1,000,000 instructions, and then 10,000,000 instructions are run. The running results are as follows Figure 5 .
[0077] Using the BiModal predictor, the preheating instructions are 1,000,000, the running instructions are 10,000,000, the conditional branch accounts for 15.59%, the indirect jump and return account for 0.53% and 1.67% respectively, and the running results show that the branch prediction accuracy is 95.48% and the MPKI is 9.4899.
[0078] In the same configuration environment, 10 load tests were run using Gshare predictor, C910-BiModal predictor, and TAGE-EC predictor respectively, and statistical data were obtained by comparing and analyzing two key indicators, IPC (instructions per cycle) and MPKI (cache miss per thousand instructions). Figure 6 .
[0079] In most benchmark tests, TAGE-EC has the highest IPC and the lowest MPKI, indicating that its branch prediction accuracy is significantly better than that of C910-BiModal and Gshare. For example, in exchange2_s, TAGE-EC achieves a 57.2% IPC improvement (1.2943→2.0347) and a 17.4-fold MPKI optimization (23.8375→1.3704) compared to C910-BiModal, which reflects its advantage in high branch density scenarios. Therefore, TAGE-EC has a significant advantage over C910 branch predictor and traditional Gshare predictor in modeling environment.
[0080] For the TAGE-EC architecture, SOC integration optimization is performed, and the main features are as follows: For the maintenance of the global branch history table, the branch history table is divided into multiple stages of maintenance. When rtu flushing occurs, rtughr is used. When bju in the iu module is not checked, bjughr is used. When the Loop buffer accelerator is activated and ghr needs to be updated, the ghr branch history information from the Loop buffer is used. The table entry bit width is 22 bits. In the improved BPU design, T1-T4 use 8, 15, 44, and 131-bit branch history lengths, respectively. Therefore, the GHR needs to be expanded from 22 bits to 131 bits to meet the requirements.
[0081] Whether the EC auxiliary predictor is enabled depends on the H(B|Gwindow) sliding window branch entropy. As can be seen from the definition of branch entropy calculation, logarithmic operation and probability operation are involved. The optimization design of the above two types of operations in hardware will be introduced below.
[0082] Firstly, for the probability calculation, the embodiment designs a sliding window size of 12 bits, so the total number of branches, i.e. the denominator, is always 12, taken_count takes a value range of 0-12, and the corresponding probability is 0 / 12, 1 / 12,..., 12 / 12. Subsequent calculation will use Q4.8 fixed-point number representation method, which has a structure of 12-bit width (4-bit integer part + 8-bit decimal part) and a value range of 0x000 (0.0)~0xFFF (15.99609375), and a resolution of 1 / 256 ≈ 0.00390625. In the application scenario, since the probability value p ∈ [0, 1], only 1 bit (0 or 1) in the lowest 4-bit integer is actually used. Taking 1 / 12 as an example, it is approximately equal to 0.083333 converted to Q4.8 format, 0.083333 × 2^8 = 21.333... → rounding to 21 → 0x15. Then, for the sliding window branch entropy H(B|Gwindow), its essence depends on the calculation of the above probability. In order to accelerate the operation and avoid multiplication and division operations, all possible results are stored in the LUT table item in advance.
[0083] In the design of the embodiment, the update of the TAGE table item will not be synchronized with the Bi-Modal. In the original design of C910, Figure 7 , the update of the Bi-Modal predictor only depends on the 2-bit pred value, PC, GHR and whether the actual jump is taken or not. It has less maintenance information, so its pipeline operation is to send all information from the BHT output to the PCFIFO. The main function of the PCFIFO is to store and manage the branch instruction information. The PCFIFO contains 32 table items, and its first-in-first-out characteristic is provided by the internal management of the read pointer and the write pointer. When ifu takes the instruction and performs pre-decoding, if the instruction is a branch or jump instruction, the related information of the instruction will be recorded in the PCFIFO. Mainly including PC information and BHT prediction information, these information are recorded in the corresponding table item by the write pointer index of pcfifo. At the same time when the table item is created successfully, pcfifo will return the value of the write pointer to idu in the form of pid to mark the corresponding instruction.
[0084] However, the update of the TAGE table item needs to maintain tag, pred and useful, and the writing into the PCFIFO and sending into the pipeline has a large overhead. The embodiment will construct a TIB (Tage Info Buffer) table item in the BHT to maintain the above information. The TIB is similar to the ROB structure for storing the information of the TAGE table item branch instruction and correct update. The prediction information of the branch instruction is sequentially stored in the TIB in the IF stage, and the result is transmitted into the TIB after the IU stage out-of-order execution, and the TAGE component is sequentially retired and updated.
[0085] When a prediction occurs in the TAGE prediction phase and update information is generated, the prediction result and valid information are written into the TIB, the allocation pointer push_ptr is increased, and the vld signal in the entry corresponding to the TIB is pulled high, and the prediction information is saved in the corresponding entry item. A maximum of 2 TIB items are generated per cycle. The reason for a maximum of two is that the bandwidth of the IF level is 128 bits (containing a maximum of 8 instructions, all compressed instructions), so there may be multiple branch instructions in each cycle, and the branch predictor in C910 builds a 2-level buffer. In a single cycle, the prediction result of the first branch instruction can be obtained from BUF1. Based on this result, the prediction result of the second branch instruction can be obtained from BUF2, so a maximum of two instructions can be predicted in one cycle. See TIB Figure 8 .
[0086] This solution enables parallel processing and lifecycle management, supporting prediction information caching for up to two branch instructions per cycle, and managing entry validity through the vld, iid_vld, and upd_vld status bits. The entry structure contains the historical jump direction (hist), the prediction update flag (pht_upd), and the instruction ID (iid).
[0087] In some embodiments, BUF1 stores the current cycle prediction result, and BUF2 preloads the secondary prediction data. When the decode unit recognizes a branch instruction, BUF2 data is automatically promoted to BUF1 through a forward mechanism, eliminating adjacent branch prediction bubbles.
[0088] In some embodiments, a loop acceleration buffer may be provided to directly shut down BTB and BHT access when a high-frequency short loop is detected, thereby reducing dynamic power consumption by 18%.
[0089] The composition of TIB entries is shown in Table 2.
[0090] The BRQ module marks the IID information and ghrid information for the br instruction to identify the age relationship of the instructions in the bpu. It assigns IID information to the branch instruction and passes the information to the TIB module. When a branch instruction is assigned IID information, it means that the instruction must be executed and upd information will be generated. After the IID information is written to the TIB, the iid_vld signal is pulled high.
[0091] After the out-of-order update result generated by the IU is written into the TIB, the upd_vld of the corresponding entry is pulled up, the TIB is sequentially retired, and the update information of the TAGE component is generated when the TIB is retired. At most one branch instruction is retired per cycle, and the retirement condition is vld && iid_vld && upd_vld in the entry. When the entry in the TIB has been retired, it is determined whether the entry can be released according to the IID information (uncommit_oldest_iid) of the oldest instruction that has not been retired in the CPU. The entry is released under the condition that the entry is retired and the IID information stored in the entry is greater than uncommit_oldest_iid. At most one entry is released per cycle.
[0092] Table 1
[0093] Table 2
[0094] Embodiment Two The prediction method based on the device provided in Embodiment One comprises the following steps: The branch prediction mode matching is performed by using the TAGE main predictor, and each prediction entry stores the prediction direction information trained based on the historical mode; The dynamic entropy value of the update sequence of the global history register is analyzed by using the entropy correction edge auxiliary predictor through the sliding window algorithm, the information confusion degree of the current branch history is determined, and when the current window entropy value exceeds the current dynamic critical threshold, it is determined that the branch prediction enters the high uncertainty prediction stage, and the prediction direction stored in the entry is used to cover the original prediction result of the TAGE main predictor.
[0095] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can adopt a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer usable storage media (including but not limited to magnetic disk storage, optical storage, etc.) containing computer usable program code. CD - ROM
[0096] The computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart block or blocks. Figure 1 one or more flow or blocks Figure 1 one or more flow or blocks
[0097] These computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture including instructions which implement the function specified in the flowchart block or blocks. Figure 1 one or more flow or blocks Figure 1 one or more flow or blocks
[0098] The computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart block or blocks. Figure 1 one or more flow or blocks Figure 1 one or more flow or blocks
[0099] The above descriptions are only the preferred embodiment of the application, not intended to limit the application. The application can be variously changed and modified by those skilled in the art without departing from the spirit and scope of the application. Any modification, equivalent replacement, improvement, etc. made by those skilled in the art without creative effort should be included in the protection scope of the application.
Claims
1. A branch prediction device for a dynamic adaptive TAGE-EC architecture, characterized in that: It includes a TAGE main predictor and an entropy-corrected edge auxiliary predictor, where: The TAGE main predictor is used to perform branch prediction pattern matching, and each prediction table entry stores prediction direction information obtained based on historical pattern training; The entropy-corrected edge auxiliary predictor adopts an entropy value monitoring mechanism and performs dynamic entropy value analysis on the update sequence of the global history register through a sliding window algorithm to determine the information confusion of the current branch history. When the current window entropy value exceeds the current dynamic critical threshold, it is determined that the branch prediction enters the high-uncertainty prediction stage, and the prediction direction stored in its table entry is used to overwrite the original prediction result of the TAGE main predictor.
2. The branch prediction device of the dynamic adaptive TAGE-EC architecture according to claim 1, characterized in that: The entropy-corrected edge auxiliary predictor includes an entropy correction module and an EC table. The EC table is used to store data, including several table entries, each of which contains a label, a prediction direction counter, and an entropy error threshold. When the label in the table entry of the EC table matches the current branch address, the entropy correction module is used to compare the entropy error threshold stored in the current table entry with the current dynamic critical threshold. If the entropy error threshold exceeds the current dynamic threshold, it is considered that the TAGE main predictor is not credible enough in the current branch mode, and the prediction direction stored in its table entry is used to overwrite the original prediction result of the TAGE main predictor.
3. The branch prediction device of the dynamic adaptive TAGE-EC architecture according to claim 2, characterized in that: The tag and prediction direction counter in the table entry of the EC table are only updated when the entropy corrected edge assisted predictor reallocates the table entry, that is, if the prediction is wrong, the tag is updated to the hash calculation value of the global history register and the current PC, and the prediction direction counter is reset to the correct jump direction of the current branch.
4. A branch prediction device for a dynamic adaptive TAGE-EC architecture according to any one of claims 1 to 3, characterized in that: The calculation process of the current dynamic critical threshold of the entropy correction module includes: using the confidence gradient to represent the degree of deviation of the confidence, introducing a gradient-sensitive mechanism, dynamically adjusting the update step size of the critical threshold according to the prediction result and the range of the confidence gradient, and updating the current critical threshold according to the adjusted update step size.
5. The branch prediction device of the dynamic adaptive TAGE-EC architecture according to claim 1, characterized in that: The TAGE master predictor adopts a multi-level history length table structure. Tables T1-T4 are configured with multi-bit history lengths respectively, covering short-term cyclic patterns and long-range associated branch behaviors, and the number of bits of history length in each table increases geometrically. Alternatively, the TAGE master predictor adopts a hierarchical arbitration strategy to query all history tables in parallel, and preferentially selects the table entries with the longest history match and successful tag verification to output the prediction results; If no match is found, fall back to the base predictor to ensure prediction continuity; Alternatively, the TAGE main predictor adopts a dynamic resource allocation mechanism. When the prediction is completed, only the Ti table that provides the final prediction result is updated. Regardless of whether the prediction is correct, it is updated only based on the final branch result, and a counter is used to determine whether it is a jump. When the prediction is wrong, free table entries with a longer historical depth are allocated first. If there is resource competition, the useful counter is used to eliminate table entries whose utility is less than a predetermined value.
6. A branch prediction device for a dynamic adaptive TAGE-EC architecture according to any one of claims 1 to 5, characterized in that: The invention also includes a multiplexer, which connects the TAGE main predictor and the entropy correction edge auxiliary predictor and integrates the output results of the TAGE main predictor and the entropy correction edge auxiliary predictor.
7. A branch prediction device for a dynamic adaptive TAGE-EC architecture according to any one of claims 1 to 6, characterized in that: It also includes an information buffer module, which is used to store prediction results and valid information. In the IF stage, the prediction information of the branch instruction is sequentially stored in the information buffer module, supporting the prediction information cache of up to two branch instructions per cycle. After out-of-order execution in the IU stage, the result is transferred to the information buffer module, and retired entries are released according to the oldest uncommitted instruction. At most one entry is retired per cycle. When a branch prediction error is detected, the information buffer module triggers a pipeline flush and resets the relevant entries to reduce the scope of error propagation.
8. The branch prediction device of the dynamic adaptive TAGE-EC architecture according to claim 7, characterized in that: The information buffer module adopts a hierarchical prefetch buffer mechanism, including two buffers. The first buffer stores the current cycle prediction results, and the second buffer preloads secondary prediction data. When a branch instruction is identified, the data in the second buffer is automatically promoted to the first buffer through a forward mechanism to eliminate adjacent branch prediction bubbles.
9. A branch prediction device for a dynamic adaptive TAGE-EC architecture according to any one of claims 1 to 8, characterized in that: The device adopts a hash strategy combining segmented splicing and a polynomial hash algorithm to compress the number of bits of a global history register into an intermediate value, and generates a multi-bit index address by encoding using the polynomial hash algorithm.
10. The prediction method based on the device according to any one of claims 1 to 9, characterized in that: The following steps are involved: Using the TAGE master predictor to perform branch prediction pattern matching, each prediction table entry stores the prediction direction information obtained based on historical pattern training; The entropy-corrected edge-assisted predictor is used to perform dynamic entropy analysis on the update sequence of the global history register through a sliding window algorithm to determine the information confusion of the current branch history. When the current window entropy value exceeds the current dynamic critical threshold, the branch prediction is determined to enter the high-uncertainty prediction stage, and the prediction direction stored in its table entry is used to overwrite the original prediction result of the TAGE main predictor.