Wafer graph processing system based on semiconductor packaging detection equipment

Abstract

The invention provides a wafer graph processing system based on semiconductor packaging detection equipment, and the system comprises a defect detection equipment layer which is used for detecting wafer defects in real time and outputting defect types and coordinates; the equipment connection control layer is used for communicating with detection equipment through an SECS / GEM protocol based on an EAP, collecting defect data and converting the EAP data into a standardized format identified by MES through a Highway101 protocol and an EIS; the business execution layer comprises a data storage module, a dynamic updating module and a graphic processing module; and the user operation layer supports multi-dimensional query of defect records and automatic execution of Loss marking and process Move operation. The method comprises the following steps: scanning a wafer through a defect detection equipment layer, outputting defect types and coordinates through a classification algorithm, converting defect data into a standard format, and transmitting the defect data to an MES (Manufacturing Execution System); the service execution layer updates the state of the wafer graph, marks the defect chip as Loss, and records a change history; and the MES controls the wafer to flow to the next process, so that the problems in the prior art are effectively solved, the precision is improved, and the reject ratio is reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor packaging, in particular to the field of wafer map processing technology, and more particularly to a wafer map processing system based on a semiconductor packaging detection device. BACKGROUND

[0002] The wafer map used by the semiconductor packaging device is usually sent to the packaging factory by the wafer factory through the wafer test project. The wafer before FCB (Flip Chip Bonding) needs to be processed through Lamination Taping (protective film sticking), wafer stealth dicing (laser stealth cutting), back grind (back grinding), wafer sawing (cutting), WBL (Wafer Backside Laminating) expand cut, etc. Many defects that cannot be detected by the naked eye will be generated during the wafer processing. The defects are usually detected by manual modification of the wafer map and manual generation of a new map in the MES system. It is difficult for manual detection to detect small defects, and the wafer map may be modified incorrectly or the defects may not be modified, resulting in scrap due to defects in subsequent testing. The existing technology has the following problems and shortcomings:

[0003] 1. Although the detection device is introduced to replace manual naked eye inspection to enhance the detection efficiency and detection rate, manual marking is still needed after the wafer defects are found in the existing technology. The wafer map is manually modified in the MES system, and a new map is generated for subsequent process. After the defective chips are lost in the system, the OUT operation of the process is manually performed. Human judgment and manual modification may lead to differences between the actual object and the computer, and manual operation may reduce the efficiency of the device, increase the labor cost, and pose a quality risk.

[0004] 2. There are only 8 types of defects in the original wafer map of the wafer factory. After the wafer is processed, there are 21 types of defects. The modification operation of the wafer map is large in the existing technology, and the accuracy of the manual modification of the map is at risk. The recording of defects and the flow of processes need to be manually operated, which leads to low efficiency and increased quality risk. There is a risk of wafer map use error and increased defect rate in the later period. SUMMARY

[0005] In view of the above-mentioned shortcomings of the prior art, the present application aims to provide a wafer map processing system based on a semiconductor packaging detection device to solve the difficulties of the prior art.

[0006] To achieve the above object and other related objects, the present application provides a wafer map processing system based on a semiconductor package detection device, comprising the following modules:

[0007] A defect detection device layer, containing a high-precision camera and a classification algorithm model, is used to detect wafer defects in real time and output defect types and coordinates;

[0008] A device connection control layer communicates with the detection device based on EAP through the SECS / GEM protocol, collects defect data, and converts EAP data into standardized XML or JSON formats recognized by MES through Highway101 protocol and EIS;

[0009] A business execution layer, containing a data storage module, a dynamic update module, and a graphics processing module, is used to store wafer data, dynamically update wafer map states, and generate visual wafer maps;

[0010] A user operation layer supports multi-dimensional query of defect records and automatic execution of Loss marking and process Move operations.

[0011] According to the preferred scheme, the classification algorithm model can identify 21 types of packaging process defects and output the coordinates, types, and confidence of the defects.

[0012] According to the preferred scheme, EIS receives defect data through SECS Message and encapsulates it into standardized XML / JSON format for transmission to MES.

[0013] According to the preferred scheme, the dynamic update module automatically marks the defective chip as Loss by comparing the defect data with the wafer map, and records the change time, operation account, and defect type to the database.

[0014] A wafer production process control method, characterized in that it comprises the following steps:

[0015] 1) Scanning the wafer through the defect detection device layer, and the classification algorithm outputs the defect type and coordinates;

[0016] 2) The device connection control layer converts the defect data into a standardized format and transmits it to MES;

[0017] 3) The business execution layer updates the wafer map state, marks the defective chip as Loss, and records the change history;

[0018] 4) MES automatically generates a Move instruction to control the wafer to flow to the next process.

[0019] The application scans the wafer through a defect detection equipment layer, a classification algorithm outputs a defect type and coordinates, converts defect data into a standardized format and transmits to MES, a service execution layer updates a wafer map state, marks a defect chip as Loss, and records a change history, MES automatically generates a Move instruction, controls wafer circulation to the next process, effectively solves the problems existing in the prior art, realizes cross-system cooperation through a standardized data interface (SECS / GEM+XML / JSON), reduces manual intervention errors, improves dynamic wafer map update efficiency, reduces defect data trace response time and process parameter optimization period.

[0020] The most preferred embodiments of the application will be described in more detail below with reference to the accompanying drawings, so that the features and advantages of the application can be easily understood. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1 The structure block diagram of the application is shown; DETAILED DESCRIPTION

[0022] In order to make the purpose, technical scheme and advantages of the technical scheme of the application more clear, the technical scheme of the embodiment of the application will be described clearly and completely below with reference to the drawings of the embodiment of the application. The same reference signs in the drawings represent the same parts. It should be noted that the described embodiment is part of the embodiment of the application, not all the embodiments. Based on the described embodiment of the application, all other embodiments obtained by those skilled in the art without creative labor belong to the protection scope of the application.

[0023] Compared with the embodiments shown in the drawings, the feasible implementation schemes within the protection scope of the application can have fewer parts, have other parts not shown in the drawings, have different parts, have differently arranged parts or differently connected parts, etc. In addition, two or more parts in the drawings can be implemented in a single part, or a single part shown in the drawings can be implemented as multiple separate parts.

[0024] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning understood by persons of ordinary skill in the field to which the invention belongs. The words "first", "second" and similar terms used in the patent application specification and claims of the present invention do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "a" or "an" do not necessarily indicate a quantity limitation. Words such as "include" or "comprising" mean that the elements or objects preceding the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connected" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0025] The present invention proposes a wafer image processing system based on semiconductor packaging detection equipment, which is used in semiconductor packaging technology. The present invention does not limit the type of wafer, but the structure of the wafer image processing system based on semiconductor packaging detection equipment is particularly suitable for wafer images.

[0026] In general, the wafer image processing system based on semiconductor packaging inspection equipment proposed in the present invention mainly includes a defect detection equipment layer, a device connection control layer, a business execution layer, and a user operation layer. Figure 1 , which shows the layout relationship of the defect detection equipment layer, device connection control layer, business execution layer, and user operation layer.

[0027] In order to achieve the purpose of adapting the same mold to different molding machines, the problem in the background technology is that although the detection efficiency and detection rate have been enhanced by introducing detection equipment to replace manual visual inspection, manual marking is still required after wafer defects are found under the existing technology. The wafer map is manually modified in the MES system and a map is regenerated for use in subsequent processes. After the defective chips are lost in the system, the process OUT operation is manually performed. Human judgment and manual modification are likely to lead to differences between the actual object and the computerized operation. Manual operation reduces equipment efficiency, increases labor costs, and poses quality risks; the original wafer of the wafer factory There are only 8 defect types in the map, and 21 defect types will appear after protection, cutting, grinding and other operations before packaging. Under the existing technology, the modification workload of wafermap is large, and manual modification has a great risk to the accuracy of the map. The recording of defects and the flow of processes require manual work, which leads to low efficiency and increased quality risks. There is a problem of incorrect use of wafer maps and the risk of increased defective rates in the later stage. For this reason, in the technical solution provided by this embodiment, the wafer is scanned by the defect detection equipment layer, and the classification algorithm outputs the defect type and coordinates, and the defect data is converted into a standardized format and transmitted to MES; the business execution layer updates the wafer map status, marks the defective chip as Loss, and records the change history; MES automatically generates Move instructions to control the wafer flow to the next process, effectively solving the problems existing in the existing technology, and realizing cross-system collaboration through standardized data interfaces (SECS / GEM+XML / JSON), reducing manual intervention errors, improving the efficiency of dynamic wafer map updates, and reducing the defect data traceability response time and process parameter optimization cycle.

[0028] The defect detection equipment layer outputs defect information through hardware composition and algorithm models. It uses high-resolution industrial cameras (such as 12-megapixel CMOS sensors), configures ring light sources and multi-angle lighting modules, and combines a classification model trained based on convolutional neural networks (CNN). It supports the identification of 21 defect types (such as cutting cracks C05, oxide layer shedding C12, etc.) and outputs defect coordinates (X, Y). Its type code and confidence level are ≥90%.

[0029] Next, the EAP implements data interaction with the inspection equipment through the SECS / GEM protocol in the equipment connection control layer. The collected content includes wafer ID, defect coordinates, type, and inspection timestamp. The EIS parses the raw data according to the Highway 101 protocol and encapsulates it in XML or JSON format, such as<defect type="C05"x="12.5"y="7.8" / > , ensuring compatibility with the MES system.

[0030] When the business execution layer receives the latest state wafer data, it uses the data storage module, dynamic update module and graphics processing module to react to the chip state, wherein the data storage module uses a relational database to store wafer map versions, defect records and change history, including fields: operation account, time, defect type; the dynamic update module updates the wafer map based on real-time defect data by calling a difference algorithm, and only refreshes the affected area; the graphics processing module uses graphics processing technology to generate a visual wafer map, which can also distinguish normal chips (green), Loss chips (red) and areas to be inspected (gray) by color.

[0031] On this basis, multi-dimensional queries and analysis are supported in the user operation layer according to wafer ID, time range and defect type combination, and a historical Map version comparison chart is displayed. When the defect is marked as Loss, the MES calls a pre-set rule engine to generate a Move instruction.

[0032] Embodiment one

[0033] Regarding the automatic Loss and Move process:

[0034] 1) Defect detection: The detection equipment scans the wafer, and the classification model outputs the defect type, such as "cutting crack - code C05";

[0035] 2) Data synchronization: EAP sends defect data to EIS through SECS Message;

[0036] 3) EIS encapsulates the data into a format that can be parsed by MES;

[0037] 4) Map update: MES calls a dynamic update algorithm to mark the defective chip as Loss in the wafer map;

[0038] 5) Database records change time, operation account, defect type and other history information;

[0039] 6) Computer execution: MES automatically generates a Move instruction, and the equipment transfers the wafer to the next process.

[0040] Embodiment two

[0041] The data tracing and quality analysis process includes:

[0042] 1) Query the wafer ID through the database to trace back the historical Map version, defect record and processing personnel

[0043] 2) Statistics defect type distribution, optimize cutting or grinding process parameters.

[0044] The above embodiments are only illustrative of the principles of the present application and its efficacy, and are not intended to limit the present application. Any modification or change made by any person skilled in the art without departing from the spirit and scope of the present application shall be covered by the claims of the present application.

Claims

1. A wafer image processing system based on semiconductor packaging testing equipment, characterized in that: include: The defect detection equipment layer includes high-precision cameras and classification algorithm models to detect wafer defects in real time and output the defect type and coordinates; The equipment connection control layer communicates with the inspection equipment through the SECS / GEM protocol based on EAP, collects defect data, and converts the EAP communication data into the standardized format XML or JSON recognized by MES through the Highway101 protocol and EIS; The business execution layer includes a data storage module, a dynamic update module, and a graphics processing module, which are used to store wafer data, dynamically update wafer map status, and generate visual wafer maps; The user operation layer supports multi-dimensional query of defect records and automatic execution of Loss marking and process Move operations.

2. The wafer image processing system based on semiconductor packaging testing equipment according to claim 1, characterized in that: The classification algorithm model can identify 21 types of packaging process defects and output the coordinates, type and confidence level of the defects.

3. The wafer image processing system based on semiconductor packaging testing equipment according to claim 2, characterized in that: The EIS receives defect data through SECS Message, encapsulates it into a standardized XML / JSON format and transmits it to the MES.

4. The wafer image processing system based on semiconductor packaging testing equipment according to claim 3, characterized in that: The dynamic update module automatically marks the defective chip as Loss status by comparing the defect data with the wafer map, and records the change time, operation account and defect type in the database.

5. A wafer production process control method, characterized in that: The following steps are involved: 1) The wafer is scanned by the defect detection equipment layer, and the classification algorithm outputs the defect type and coordinates; 2) The equipment connection control layer converts the defect data into a standardized format and transmits it to the MES; 3) The business execution layer updates the wafer map status, marks the defective chip as Loss, and records the change history; 4) MES automatically generates Move instructions to control the flow of wafers to the next process.

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