Chip control method, chip, display screen and electronic equipment

Abstract

The embodiment of the invention provides a chip control method, a chip, a display screen and electronic equipment, and the chip control method comprises the steps: detecting a to-be-processed video of a target chip, and obtaining the frame frequency interval data of the to-be-processed video; determining a clock control signal based on the frame frequency interval data; wherein the clock control signal is used for switching the output of an oscillator connected with a static random access memory of the target chip to a clock output frequency matched with the display frame frequency of the video to be processed; and adjusting the clock output frequency of an oscillator of the static random access memory according to the clock control signal. Through the method, the power consumption of the static random access memory in the chip can be reduced.

Description

Technical Field

[0001] The present application relates to the field of chip technology, and in particular to a chip control method, a chip, a display screen, and an electronic device. Background Art

[0002] The static random-access memory (SRAM) in a chip can retain stored data permanently as long as the power remains on. However, this also comes with the problem of high power consumption. Summary of the Invention

[0003] The purpose of this application is to provide a chip control method, a chip, a display screen and an electronic device, which can reduce the power consumption of the static random access memory in the chip.

[0004] In a first aspect, the present invention provides a chip control method, comprising: detecting a video to be processed of a target chip to obtain frame rate interval data of the video to be processed; determining a clock control signal based on the frame rate interval data; wherein the clock control signal is used to connect the output of an oscillator of a static random access memory of the target chip to switch to a clock output frequency that matches the display frame rate of the video to be processed; and adjusting the clock output frequency of the oscillator of the static random access memory according to the clock control signal.

[0005] In the above-mentioned implementation method, the clock output signal of the oscillator of the static random access memory can be adaptively adjusted based on the actual display requirements of the video to be processed, so that the working frame frequency of the static random access memory can be adjusted. By using a more matching working frame frequency to work, it is possible to avoid using a working frame frequency that is too high while meeting the display requirements of the video to be processed, thereby achieving the effect of reducing power consumption.

[0006] In an optional embodiment, determining the clock control signal based on the frame rate interval data includes: matching the frame rate interval data with multiple pre-stored working frame rates of the target chip to determine the target working frame rate; and determining the clock control signal based on the target working frame rate.

[0007] In an optional embodiment, the method also includes matching the frame rate interval data with multiple working frame rates of the target chip pre-stored to determine the target working frame rate, including: determining the display frequency of the video to be processed based on the frame rate interval data; matching the display frequency with multiple working frame rates of the target chip pre-stored to determine the target working frame rate.

[0008] In an optional implementation, the method further comprises: determining a driving control signal of a static random access memory of the target chip according to the target working frame frequency; and controlling a driving capability of the static random access memory of the target chip based on the driving control signal.

[0009] In an optional implementation, before detecting the current frame frequency of the video to be processed of the target chip, the method further comprises: configuring a plurality of working frame frequencies for the target chip; and determining the clock control signal based on the frame frequency interval data comprises: determining a target working frame frequency from the plurality of working frame frequencies based on the frame frequency interval data; and determining the clock control signal based on the target working frame frequency.

[0010] In an optional implementation, the configuring a plurality of working frame frequencies for the target chip comprises: obtaining a current application scenario parameter; and configuring a plurality of working frame frequencies for the target chip based on the current application scenario parameter.

[0011] In the above implementations, the plurality of working frame frequencies can be adaptively configured for the target chip based on the current application scenario parameter, so that the target chip can work at a lower power consumption frame frequency while meeting the working requirements.

[0012] In an optional implementation, the method further comprises: updating the working frame frequency configured for the target chip based on a change in a working environment of the target chip.

[0013] In the above implementations, the working frame frequency of the target chip can be adaptively updated based on the change in the actual environment, thereby improving the adaptability of the target chip to the environment.

[0014] In a second aspect, the application provides a chip, comprising: a digital control circuit, a static random access memory and an oscillator; the digital control circuit is connected with the static random access memory and the oscillator; the digital control circuit is used to control the static random access memory and the oscillator based on the method in any one of the above implementations; and the oscillator is used to output a required clock output signal based on the control of the digital control circuit.

[0015] In a third aspect, the application provides a display screen comprising the chip in any one of the above implementations.

[0016] In a fourth aspect, the application provides an electronic device comprising the display screen in any one of the above implementations. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly introduced as follows. It should be understood that the following drawings only show some of the embodiments of the present application, and therefore should not be considered as limiting the scope. For those skilled in the art, other related drawings can also be obtained without creative labor.

[0018] Figure 1 The flowchart of the chip control method provided by the embodiments of the present application is shown in FIG. 3. Figure 2 The signal timing diagrams under five frame frequencies provided by the embodiments of the present application are shown in FIG. 4. Figure 3 The flowchart of the dynamic adjustment of the oscillator of the static random access memory based on the matching of the five optional working frame frequencies provided by the embodiments of the present application is shown in FIG. 5. Figure 4 The partial flowchart of the chip control method provided by the embodiments of the present application is shown in FIG. 6. Figure 5 The flowchart of the dynamic adjustment of the driving capability of the static random access memory based on the matching of the five optional working frame frequencies provided by the embodiments of the present application is shown in FIG. 7. Figure 6 The block diagram of the chip provided by the embodiments of the present application is shown in FIG. 8.

[0019] Legend: 310 - digital control circuit; 320 - static random access memory; 321 - output driving circuit; 330 - oscillator. DETAILED DESCRIPTION

[0020] The technical solutions of the embodiments of the present application will be described in detail below with reference to the drawings in the embodiments of the present application.

[0021] It should be noted that similar reference numerals and letters indicate similar items in the following drawings, and therefore, once an item is defined in one drawing, it need not be further defined and explained in the subsequent drawings. Meanwhile, in the description of the present application, the terms "first", "second", etc. are only used for distinguishing description, and cannot be understood as indicating or implying relative importance.

[0022] In the description of the present application, it should be noted that the terms "upper", "lower", "inner", "outer", etc. indicate the orientation or position relationship based on the orientation or position relationship shown in the drawings, or the orientation or position relationship when the product is usually placed, and are only for the convenience of describing the present application and simplifying the description, and therefore cannot be interpreted as indicating or implying that the indicated device or element must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be interpreted as limiting the present application.

[0023] It should be noted that in the description of the present application, unless otherwise explicitly specified and limited, the terms "arrange", "mount", "connect" should be understood broadly, for example, it can be fixedly connected, or detachably connected, or integrally connected; it can be mechanically connected, or electrically connected; it can be directly connected, or indirectly connected through an intermediate medium, or the internal communication of two elements. For those skilled in the art, the specific meanings of the above terms in the present application can be understood according to the specific circumstances.

[0024] Display Driver Integrated Circuit (DDIC) is a kind of integrated circuit specially used for driving display screen, which is responsible for converting input video signals or image data into the required electrical signals for display screen, thereby controlling the brightness, color and contrast of pixels. Display driver IC is widely used in liquid crystal display (LCD), organic light emitting diode (OLED), micro light emitting diode display (Micro LED) and other display technologies. The main functions of display driver IC are as follows: signal conversion: converting digital signals from graphics processing unit (GPU), central processing unit (CPU) or other controllers into analog or digital signals required by display screen; driving pixels: controlling the lighting, color and brightness of each pixel point to ensure correct image display; refresh control: managing screen refresh rate to provide smooth visual experience; voltage regulation: providing stable driving voltage to optimize power consumption and improve display performance; energy saving and optimization: using intelligent algorithms to reduce power consumption, such as low power mode, adaptive brightness adjustment, etc.

[0025] Static Random-Access Memory (SRAM) is a kind of random access memory. As long as the static random access memory is powered on, the data stored in it can be constantly maintained, and it can save the data stored in its internal memory without refreshing circuit, therefore, static random access memory has high performance, but its power consumption is relatively high. Static random access memory generally includes five parts: memory cell array, row / column address decoder, sensitive amplification circuit, control circuit, buffer / drive circuit.

[0026] Since the data stored in the static random access memory can be constantly maintained, it results in relatively large power consumption. The power consumption of the static random access memory mainly comes from the following aspects: dynamic power consumption: related to the read and write operations of the memory cell, usually proportional to the square of the power supply voltage and the frequency of read and write operations; static power consumption: mainly caused by the leakage current, with the development of technology, the influence of static power consumption is becoming more and more great; short-circuit power consumption: the instantaneous power consumption generated when the signal is switched.

[0027] Based on the above status, in order to reduce the power consumption of the static random access memory, the inventors of the present application consider that low-power storage cell design, dynamic power management technology, and optimization of voltage and read-write clock frequency adjustment can be used. The chip control method provided by the present application can reduce the dynamic power consumption of the static random access memory in the chip and the dynamic power consumption on the system clock tree, thereby reducing the overall power consumption of the chip and improving the heat generation of the chip. The chip control method of the embodiment of the present application can realize, through circuit design, during the normal operation of the display driving chip, according to the system frame frequency and the use of the static random access memory, through circuit control, dynamically adjusting the clock signal connected with the static random access memory, and adjusting the driving ability of the internal circuit of the static random access memory, so as to reduce the dynamic power consumption, peak power consumption and power consumption on the system clock tree of the static random access memory. The chip control method provided by the present application will be described below in combination with some embodiments.

[0028] Figure 1 The flowchart of the chip control method provided by the embodiment of the present application is shown in FIG. 1. As shown in FIG. 1, the chip control method can include the following steps. Figure 1

[0029] Step 210, detecting the to-be-processed video of the target chip to obtain frame frequency interval data of the to-be-processed video.

[0030] The frame frequency interval data can be used to represent the interval time between two adjacent frames of the to-be-processed video. The frame frequency interval data can also be used to represent the actual display time of a frame of picture.

[0031] Exemplarily, the frame frequency interval data can be the count number between two adjacent frames vsync of the to-be-processed video.

[0032] In the embodiment, the to-be-processed video can be detected according to a set time rule, and the subsequent steps are executed based on the detection result, so as to realize dynamic adjustment of the oscillator of the static random access memory.

[0033] The set time rule can be a pre-set rule.

[0034] ​The setting time rule can be every specified time length, every specified time node, etc. The specified time length can be 1 hour, 2 hours, 5 hours, etc. The specified time node can be every whole hour, every 3 multiple time point, every double whole hour, etc. Of course, the setting time rule can be adaptively set based on actual needs. For example, there can be frequent switching of the video to be processed, and the setting time rule can be every time the video to be processed is switched. For another example, when the target chip switches the video in an uncertain rule, the setting time rule can be set to a shorter specified time length, and the detection of the video to be processed is performed every specified time length.

[0035] The setting time rule can also be different time rules configured in stages. For example, a first time rule is used during working hours, and a second time rule is used during non-working hours. Under the first time rule, the frequency of detecting the video to be processed is higher, and under the second time rule, the frequency of detecting the video to be processed is lower. Of course, the first time rule and the second time rule can be adaptively set based on actual needs.

[0036] Step 220, determining a clock control signal based on the frame frequency interval data.

[0037] The clock control signal is used to switch the output of the oscillator of the static random access memory of the target chip to a clock output frequency matching the display frame frequency of the video to be processed.

[0038] Exemplarily, the frame frequency interval data represents the display frame frequency required by the video to be processed.

[0039] Step 230, adjusting the clock output frequency of the oscillator of the static random access memory according to the clock control signal.

[0040] In one case, if the current clock output frequency of the oscillator of the static random access memory is matched with the display frame frequency of the video to be processed, the subsequent step 230 can not be performed. In another case, if the current clock output frequency of the oscillator of the static random access memory is not matched with the display frame frequency of the video to be processed, the subsequent step 230 can be performed to switch the output of the oscillator to a clock output frequency matched with the display frame frequency of the video to be processed.

[0041] In the above manner, the clock output frequency of the oscillator of the static random access memory can better adapt to the needs of the video to be processed, and the working of the oscillator is dynamically adjusted, so as to reduce the dynamic peak power consumption of the static random access memory and the power consumption on the system clock path.

[0042] In an alternative implementation, the step 220 can include a step 221 and a step 222.

[0043] The step 221 matches the frame interval data with the pre-stored multiple working frame frequencies of the target chip to determine the target working frame frequency.

[0044] Exemplarily, the pre-stored multiple working frame frequencies of the target chip can be configured when the target chip is designed.

[0045] The multiple working frame frequencies can be different in different use scenarios. The number of working frame frequencies configured by the target chip can also be different in different use scenarios. The multiple working frame frequencies of the target chip can include five frame frequencies, i.e., 144 hz frame frequency, 120 hz frame frequency, 90 hz frame frequency, 60 hz frame frequency, and 30 hz frame frequency. Of course, the multiple working frame frequencies of the target chip can also be six, seven, ten working frame frequencies, etc. The various working frame frequencies can also be different from the above-mentioned several frame frequencies, for example, the working frame frequencies can also include 80 hz frame frequency, 180 hz frame frequency, etc.

[0046] The step 222 determines the clock control signal based on the target working frame frequency.

[0047] Exemplarily, if the working frame frequency matched by the to-be-processed video is 120 hz frame frequency, the clock control signal can be assigned a value of 120 hz. The oscillator of the static random access memory can output a clock output frequency based on the value of the clock control signal.

[0048] In the above implementation, the target working frame frequency can be determined based on the matching with the pre-set multiple working frame frequencies, and the required target working frame frequency can be efficiently locked.

[0049] Exemplarily, the step 221 can include determining a display frequency of the to-be-processed video based on the frame interval data, and matching the display frequency with the pre-stored multiple working frame frequencies of the target chip to determine the target working frame frequency.

[0050] Exemplarily, the frame interval data can be used to represent the number of counter counts between adjacent two frames of pictures, and the time length between adjacent two frames of pictures can be determined based on the number of counter counts, so that the display frequency of the to-be-processed video can be further determined. It can be understood that, based on different settings of the counter of the target chip, the number of counts obtained for the same display frequency can be different. The embodiments of the present application are not limited to the configuration of the counter, as long as the determination of the time length between adjacent two frames of pictures can be achieved.

[0051] The following is an example of the target chip's multiple working frame frequencies, which can include 144hz frame frequency, 120hz frame frequency, 90hz frame frame frequency, 60hz frame frequency, 30hz frame frequency, etc. The dynamic adjustment logic of the oscillator of the static random access memory is introduced in combination with the signal transmission schematic. As shown in Figure 2 and Figure 3 , as shown in Figure 2 , the signal timing diagram under five frame frequencies is shown, Figure 3 , the flowchart of the dynamic adjustment of the oscillator of the static random access memory based on the matching of the five optional working frame frequencies is shown.

[0052] Figure 2 The signal timing diagram of five frame frequencies 144hz frame frequency, 120hz frame frequency, 90hz frame frequency, 60hz frame frequency, 30hz frame frequency is shown. As can be seen from Figure 2 , in different frame frequency application environments, the absolute time used by the target chip when processing each frame of data is different. The time for processing each frame of data increases from 144hz frame frequency to 30hz frame frequency. However, in fact, the number of read and write operations on the static random access memory when processing each frame of video data is the same.

[0053] Exemplarily, the clock required for operating the static random access memory under 144hz frame frequency is 144Mhz, and the clock required for operating the static random access memory under 120hz frame frequency is 120Mhz, and so on. The clock required for operating the static random access memory under 30hz frame frequency is only 30Mhz. Based on this, the logic can dynamically adjust the oscillator of the static random access memory based on the frame frequency of the actual video to be processed, so as to reduce the power consumption of the static random access memory.

[0054] As shown in Figure 3 , it shows five of them. When obtaining the video to be processed, the vsync detection circuit can be used to detect the video to be processed, and the count number between two frames of vsync can be detected. Based on the count number between two frames of vsync, the frame frequency of the video to be processed can be determined. The determined frame frequency of the video to be processed is judged by frame frequency, and the frame frequency is matched with 144hz frame frequency, 120hz frame frequency, 90hz frame frequency, 60hz frame frequency, 30hz frame frequency, respectively. After matching the target working frame frequency, the obtained target working frame frequency can be used to adjust the clock control signal (option_pll signal). The clock control signal can be sent to the oscillator of the static random access memory which generates the clock signal. The oscillator can dynamically adjust the output clock frequency based on the current option_pll value.

[0055] Through the above process, the clock of the system can be dynamically adjusted for different frame frequencies to reduce power consumption on the clock tree.

[0056] In order to further reduce the power consumption of the target chip, the digital control circuit (APR) normally needs the static random access memory to send data to the digital control circuit within one clock cycle when reading and writing the static random access memory. When the working frame frequency is 144hz, because the clock frequency is relatively fast, the clock period is relatively small, and the output driving circuit of the static random access memory needs strong driving capability in order to be able to send data to the digital control circuit within one clock cycle. At this time, the data transmission rate of the static random access memory to the digital control circuit is relatively fast, but the required power consumption is also larger. When the working frame frequency is 30hz, the clock frequency is relatively slow, and the clock period is relatively large. In this case, although the static random access memory also sends data to the digital control circuit within one clock cycle, the time is more sufficient, and the required power consumption is relatively smaller. Based on this research, the driving capability of the static random access memory can be adaptively adjusted based on the actual working frame frequency, so as to reduce the power consumption while meeting the working requirements. Figure 4 As shown in FIG. 8, the method provided by the embodiment of the present application can further include steps 240 and 250.

[0057] In step 240, the driving control signal of the static random access memory of the target chip is determined according to the target working frame frequency.

[0058] Exemplarily, the driving capability of the driving circuit of the static random access memory corresponding to different working frame frequencies can be set in advance. For example, the working frame frequency and the driving capability can be stored in a table in a one-to-one manner. After the working frame frequency is determined, the driving capability of the static random access memory corresponding to the working frame frequency can be matched from the table.

[0059] Exemplarily, the driving control signal can be represented as an option_ram signal, and the option_ram signal is valued based on the target working frame frequency.

[0060] In step 250, the driving capability of the static random access memory of the target chip is controlled based on the driving control signal.

[0061] The static random access memory can include an output driving circuit, and the driving control signal can be used to control the driving capability of the output driving circuit.

[0062] Exemplarily, in the case that the working frame frequency changes from high to low, the driving capability of the output driving circuit can also change from high to low; in the case that the working frame frequency changes from low to high, the driving capability of the output driving circuit can also change from low to high.

[0063] In the following, taking five working frame frequencies of the target chip as examples, including 144hz frame frequency, 120hz frame frequency, 90hz frame frequency, 60hz frame frequency, 30hz frame frequency and the like, the dynamic adjustment logic of the driving capability of the static random access memory is introduced in combination with a signal transmission schematic diagram. As shown in Figure 5 Figure 5 a flowchart of implementing the dynamic adjustment of the driving capability of the static random access memory based on matching of the five selectable working frame frequencies is shown.

[0064] As shown in Figure 5 , it is shown that five of them, when obtaining the video to be processed, the vsync detection circuit can be used to realize the detection of the video to be processed, and the count number between two frames of vsync is detected. Based on the count number between two frames of vsync, the frame frequency of the video to be processed can be determined. The determined frame frequency of the video to be processed is subjected to frame frequency judgment, and the frame frequencies are matched with 144hz frame frequency, 120hz frame frequency, 90hz frame frequency, 60hz frame frequency and 30hz frame frequency respectively. After matching the target working frame frequency, the obtained target working frame frequency can be used to adjust the driving control signal (option_ram signal). The adjusted driving control signal can be sent to the static random access memory. The driving capability of the static random access memory can be dynamically adjusted adaptively under the condition of adjusting the clock output frequency of the oscillator. The driving capability of the output driving circuit in the static random access memory is adjusted through the option_ram signal, so as to reduce the dynamic flip power consumption and the transient peak power consumption of the static random access memory.

[0065] In this embodiment, in order to enable the target chip to adapt to more video processing requirements, the working frame frequency of the target chip can be configured in advance. Based on this, before step 210, the chip control method can further include configuring the target chip with multiple working frame frequencies.

[0066] The working frame frequency of the target chip can be configured in the design stage of the target chip. In one example, the target chip can be configured with five working frame frequencies, which are 144hz frame frequency, 120hz frame frequency, 90hz frame frequency, 60hz frame frequency, 30hz frame frequency and the like. In another example, the target chip can be configured with six working frame frequencies, which are 144hz frame frequency, 120hz frame frequency, 90hz frame frequency, 80hz frame frequency, 60hz frame frequency, 30hz frame frequency and the like. ​

[0067] The above-mentioned step 220 may include: determining a target operating frame frequency from a plurality of operating frame frequencies based on the frame frequency interval data; and determining a clock control signal based on the target operating frame frequency.

[0068] Optionally, configuring a plurality of operating frame rates for the target chip may include: acquiring current application scenario parameters; and configuring a plurality of operating frame rates for the target chip based on the current application scenario parameters.

[0069] The current application scenario parameters may be application scenario parameters input by the user during the target chip design phase. For example, the application scenario parameters may include the target chip's usage environment, such as where the target chip is intended to be used; the type of data to be displayed, such as the need to display image advertisements with a limited frame rate, or the need to display high-frequency videos such as movies and television; and the typical frame rate of the video to be processed.

[0070] The frame rate coverage range of the video to be processed can be determined in combination with the current application scenario parameters, and multiple operating frame rates can be determined based on the coverage range. For example, if the frame rate coverage range is between 30Hz and 160Hz, multiple operating frame rates within the coverage range can be configured as the operating frame rates of the target chip.

[0071] In some cases, if the target chip needs to process higher-frequency video, the target chip's operating frame rate can be adaptively increased. Based on this, the chip control method can include updating the target chip's operating frame rate configuration based on changes in the target chip's operating environment.

[0072] Exemplarily, the operating frame rate of the target chip may be reconfigured to add more operating frame rates.

[0073] Based on the above implementation, the flexibility of using the target chip can be improved.

[0074] Through the above-mentioned chip control method, the clock output frequency and the driving capability of the static random access memory can be dynamically adjusted to alleviate the problems of high dynamic power consumption of the static random access memory and clock path power consumption inside the target chip. Specifically, according to different application environments, in the early stage of target chip design planning, the circuit design can be implemented. During the normal operation of the chip, according to the system frame frequency and the use of the static random access memory, the clock signal connected to the static random access memory is dynamically adjusted through the digital control circuit control, and the driving capability of the internal circuit of the SRAM is adjusted at the same time, so as to achieve the purpose of reducing the dynamic peak power consumption of the static random access memory and the power consumption on the system clock path.

[0075] The present application also provides a chip, such as Figure 6As shown, the chip can include a digital control circuit 310, a static random access memory 320, and an oscillator 330.

[0076] The digital control circuit 310 is connected with the static random access memory 320 and the oscillator 330. The digital control circuit 310 is configured to regulate the static random access memory 320 and the oscillator 330 based on the chip control method described above. The oscillator 330 is configured to output a clock output signal based on the control of the digital control circuit 310.

[0077] Exemplarily, the static random access memory 320 can include an output driving circuit 321 and other circuits. The other circuits can include a memory cell array, a row / column address decoder, a sense amplifier circuit, a control circuit, a buffer circuit, and the like.

[0078] The embodiments of the present application also provide a display screen, which includes the chip.

[0079] The chip of this embodiment can be similar to the chip of the foregoing embodiments, and other details of the chip of this embodiment can be referred to the description in the foregoing embodiments, which will not be repeated here.

[0080] Exemplarily, the display screen can be a liquid crystal display screen, an organic light-emitting diode display, a micro light-emitting diode display, or the like device having a display function.

[0081] The embodiments of the present application also provide an electronic device, which can include the display screen.

[0082] The display screen of this embodiment can be similar to the display screen of the foregoing embodiments, and other details of the display screen of this embodiment can be referred to the description in the foregoing embodiments, which will not be repeated here.

[0083] Based on different actual needs, the electronic device can further include more components.

[0084] Exemplarily, if it is needed to position the electronic device, the electronic device can further include a positioning unit, and the positioning of the electronic device is realized based on the positioning unit.

[0085] Exemplarily, if it is needed to communicate with other devices, the electronic device can further include a communication unit, and the communication with other devices is realized based on the communication unit.

[0086] The above merely provides the optional embodiments of the present application, but does not limit the present application. For those skilled in the field of the present application, the present application can have various modifications and changes. Any modifications, equivalent replacements, improvements, etc. made within the principles and technical scope of the present application shall be included in the protection scope of the present application. It should be noted that similar reference numerals and letters represent similar items in the following drawings, and thus, once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings.

[0087] The above merely provides the optional embodiments of the present application, but does not limit the present application. For those skilled in the field of the present application, the present application can have various modifications and changes. Any modifications, equivalent replacements, improvements, etc. made within the principles and technical scope of the present application shall be included in the protection scope of the present application. It should be noted that similar reference numerals and letters represent similar items in the following drawings, and thus, once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings.

[0087] The above merely provides the optional embodiments of the present application, but does not limit the present application. For those skilled in the field of the present application, the present application can have various modifications and changes. Any modifications, equivalent replacements, improvements, etc. made within the principles and technical scope of the present application shall be included in the protection scope of the present application. It should be noted that similar reference numerals and letters represent similar items in the following drawings, and thus, once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings.

Claims

1. A chip control method, characterized in that: include: Detecting a to-be-processed video of a target chip and obtaining frame rate interval data of the to-be-processed video; Determining a clock control signal based on the frame rate interval data; wherein the clock control signal is used to switch the output of an oscillator connected to a static random access memory of the target chip to a clock output frequency that matches the display frame rate of the video to be processed; The clock output frequency of the oscillator of the static random access memory is adjusted according to the clock control signal.

2. The method according to claim 1, characterized in that The determining of a clock control signal based on the frame frequency interval data comprises: Matching the frame frequency interval data with a plurality of pre-stored operating frame frequencies of the target chip to determine a target operating frame frequency; A clock control signal is determined based on the target operating frame frequency.

3. The method according to claim 2, characterized in that The method further includes matching the frame frequency interval data with a plurality of pre-stored operating frame frequencies of the target chip to determine a target operating frame frequency, including: Determining a display frequency of the video to be processed based on the frame rate interval data; The display frequency is matched with a plurality of pre-stored operating frame frequencies of the target chip to determine a target operating frame frequency.

4. The method according to claim 2, characterized in that The method further comprises: Determining a drive control signal for a static random access memory of the target chip according to the target operating frame frequency; The driving capability of the static random access memory of the target chip is controlled based on the driving control signal.

5. The method according to claim 1, wherein Before detecting the current frame rate of the to-be-processed video of the target chip, the method further includes: configuring a plurality of operating frame rates for the target chip; Determining the clock control signal based on the frame frequency interval data includes: determining a target working frame frequency from the multiple working frame frequencies based on the frame frequency interval data; and determining the clock control signal based on the target working frame frequency.

6. The method according to claim 5, characterized in that The target chip is configured with multiple operating frame rates, including: Get the current application scenario parameters; Based on the current application scenario parameters, multiple operating frame rates are configured for the target chip.

7. The method according to claim 1, characterized in that The method further comprises: Based on changes in the working environment of the target chip, an operating frame frequency is updated and configured for the target chip.

8. A chip, characterized in that: include: digital control circuits, static random access memory, and oscillators; The digital control circuit is connected to the static random access memory and the oscillator; The digital control circuit is used to regulate the static random access memory and the oscillator based on the method according to any one of claims 1 to 7; The oscillator is used to output a clock signal required for a control output based on the digital control circuit.

9. A display screen, characterized in that: Comprising the chip according to claim 8.

10. An electronic device, characterized in that: Including the display screen according to claim 9.

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