Substrate and method for improving density and reducing warping

Abstract

The invention provides a substrate and method for improving density and reducing warping, and belongs to the technical field of semiconductor packaging, the substrate comprises a substrate body, a micro through hole array is distributed in the middle of the substrate body, the micro through hole array is composed of a group of micro through holes, the aperture range of the micro through holes is 100-250 microns, and the distance between every two adjacent micro through holes is 150 microns; the hole area X1 is smaller than the cutting groove area X due to the tiny hole diameter, the area is saved, the range of the tiny hole diameter can ensure the feasibility of the drilling technology, the occupied area is not too large, the mechanical drilling capacity of a PCB factory can be matched, the interval between every two adjacent tiny holes is 150 micrometers, the minimum interval of electrical insulation can be met, meanwhile, the structural strength can be maintained, and the service life of the PCB factory is prolonged. According to the invention, the metal filling micro through hole array is used for replacing a cutting groove, so that the structural rigidity is enhanced, the substrate density is improved, and the warping risk is reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor packaging, in particular to a substrate and method for improving density and reducing warping. BACKGROUND

[0002] In the technical field of semiconductor packaging, with the development of technology, packaging technology gradually develops towards miniaturization and integration. This means that the thickness of the substrate used in the packaging process is getting thinner and thinner, and the number of rows is getting more and more. However, this miniaturization and integration has also brought a problem, that is, the risk of warping of the product is getting bigger and bigger. Warping refers to the deformation of the substrate due to factors such as thermal expansion and contraction, which may affect the performance and reliability of the packaged product.

[0003] In order to solve the problem of warping, the existing technical solution is to divide the existing substrate into two parts with a cutting groove to balance the stress. However, the existing technical solution, while solving the warping problem, also brings some new technical problems. For example, the increase of the cutting groove area will cause the waste of the substrate utilization rate, including the groove area itself and its buffer area, which not only increases the material cost, but also reduces the density of the packaged product. SUMMARY

[0004] The present application aims to solve the problems of the prior art and provide a substrate and method for improving density and reducing warping. By replacing the cutting groove with a micro-via array filled with metal, the structural rigidity is enhanced, the substrate density is improved, and the warping risk is reduced.

[0005] Technical solution: The substrate for improving density and reducing warping comprises a substrate body, a micro-via array is distributed in the middle of the substrate body, the micro-via array is composed of a group of micro-vias, the aperture of the micro-via ranges from 100 to 250 μm, and the distance between every two adjacent micro-vias is 150 μm.

[0006] The small aperture makes the hole area X1 < the cutting groove area X, saving area. At the same time, the range of the micro-aperture can ensure the feasibility of the drilling process without being too large to occupy too much area, which can match the mechanical drilling capacity of the PCB factory. The distance between two adjacent micro-holes is 150 μm, which can meet the minimum distance of electrical insulation and also maintain the structural strength. Too small distance will cause local embrittlement of the substrate.

[0007] Further, the micro-via is filled with metal to form a metal column, similar to a rigid support skeleton.

[0008] Further, the metal is copper, the residual copper rate of the substrate body is controlled in the range of 50% to 90%, the thermal expansion coefficient (CTE=17ppm / ℃) of copper is close to the core material (FR-4 CTE≈18ppm / ℃) of the substrate, the copper column can constrain the deformation of the substrate, and the copper matches the substrate, so that the interface shear stress during temperature cycling can be reduced.

[0009] Further, the hole disc diameter of the micro-via array is in the range of 210-360μm, the hole disc diameter is equal to the hole diameter plus 110μm, the ring width of 110μm can cover the drilling position error and ensure the copper plating reliability, and the hole disc is prevented from being too small to cause the copper plating of the hole wall to crack.

[0010] Further, the micro-via array is arranged in symmetrical vertical columns, and the number of columns is even, the vertical column arrangement matches the long side direction of the substrate, forms a reinforcing rib structure parallel to the long side, reduces the warping risk, and the symmetrical layout can offset the thermal deformation moment.

[0011] Further, the cross section of the micro-via is a waist shape, which can enhance the bonding force with the surrounding substrate, and there is no connecting structure between the substrate, the channel and the residual copper.

[0012] A method for manufacturing a substrate comprises the following steps:

[0013] S1: designing a micro-via array in the middle region of the substrate body, the micro-via array meets the following conditions: the micro-via hole diameter is in the range of 100-250μm, the hole disc diameter is in the range of 210-360μm, the spacing between every two adjacent micro-vias is 150μm, and the micro-via array is arranged in symmetrical vertical columns, and the number of columns is even;

[0014] S2: forming the micro-via array through a drilling process, and filling the metal in the micro-via through an electroplating process;

[0015] S3: controlling the residual copper rate of the substrate body to be 50%-90%;

[0016] S4: mounting a chip on the surface of the substrate body with the micro-via array;

[0017] S5: integrally encapsulating the substrate body, the micro-via array and the chip by using plastic sealing material.

[0018] Advantages: compared with the prior art, the advantages of the present application are:

[0019] (1) the micro-via array filled with metal is used to replace the cutting groove in the present application, the structural rigidity is enhanced, the continuous rigid body is reinforced, copper is used for filling and the residual copper rate is controlled, so that the thermal mismatch stress can be inhibited, meanwhile, the continuous metal structure formed by the micro-via channel filled with copper replaces the "discontinuous" design of the traditional cutting groove, the overall rigidity of the substrate is improved, more chip products can be carried, and the warping risk is reduced.

[0020] (2) The design of the present application can eliminate the cutting groove buffer area (Y area), reduce the hole area (X1X), and improve the substrate utilization rate;

[0021] (3) In the present application, the micro-via array adopts an even column vertical arrangement design, which can avoid additional stress caused by asymmetric layout and strengthen the anti-warping effect;

[0022] (4) In the method adopted in the present application, all parameters are within the process capability of the plate factory, ensuring the feasibility of mass production. BRIEF DESCRIPTION OF DRAWINGS

[0023] Figure 1 is the prior art mentioned in the background art;

[0024] Figure 2 is a side view of the substrate in the present application;

[0025] Figure 3 is a sectional view of Figure 2 ;

[0026] Figure 4 is a structural schematic view of the micro-via array in the present application;

[0027] Figure 5 is a top view of the substrate in the present application. DETAILED DESCRIPTION

[0028] The technical solutions of the present application will be described in detail below with reference to the drawings, but the protection scope of the present application is not limited to the described embodiments.

[0029] As shown in Figure 1 , a substrate for improving density and reducing warping includes a substrate body 1, a micro-via array 2 is distributed in the middle part of the substrate body 1, the micro-via array 2 is composed of a group of micro-vias 201, the aperture range of the micro-vias 201 is 100-250 μm, the spacing between every two adjacent micro-vias 201 is 150 μm, and the micro-vias 201 are filled with metal. The metal is copper 3, and the residual copper rate of the substrate body 1 is controlled within the range of 85%. The hole disc diameter range composed of the micro-vias 201 is 210-360 μm. The micro-via array 2 is arranged in a symmetrical vertical column, and the number of columns is even, thereby inhibiting thermal stress warping. The cross section of the micro-via is waist-shaped.

[0030] In the present embodiment, on a general substrate size of 240 mm x 76.3 mm, the substrate is divided into four blocks, each block is segmented by using the micro-via array 2, and the micro-via matrix is arranged in 4 columns * 67 rows, the aperture of each hole is 260 um, and the hole spacing in the left and right directions is 590 um, and the hole spacing in the up and down directions is 1000 um.

[0031] A method for preparing a substrate includes the following steps:

[0032] S1: design a micro-via array 2 in the middle region of the substrate body 1, the micro-via array 2 meets the micro-via aperture range of 100-250 μm, the hole disc diameter range of 210-360 μm; the spacing between every two adjacent micro-vias 201 is 150 μm; the micro-via array 2 is arranged in symmetrical columns, and the column number is even;

[0033] S2: form the micro-via array 2 with a waist-shaped cross section through a drilling process, and fill metal in the micro-via through an electroplating process, the copper layer thickness ≥ 20 μm, to ensure the continuity of the channel conduction;

[0034] S3: control the residual copper rate of the substrate body 1 to be 85% by adjusting the array distribution density;

[0035] S4: surface mount a chip on the substrate body 1 with the micro-via array 2 completed;

[0036] S5: use plastic sealing material to seal the substrate body 1, the micro-via array 2 and the chip as a whole.

[0037] As described above, although the present application has been shown and described with reference to certain preferred embodiments, it is to be understood that such is by way of illustration and not of limitation. Various substitutions and modifications can be made without departing from the spirit and scope of the present application as defined in the appended claims.

Claims

1. A substrate with improved density and reduced warpage, characterized in that: The invention comprises a substrate body (1), wherein a micro-through hole array (2) is distributed in the middle of the substrate body (1), wherein the micro-through hole array (2) is composed of a group of micro-through holes (201), wherein the aperture of the micro-through holes (201) ranges from 100 to 250 μm, and the spacing between each two adjacent micro-through holes (201) is 150 μm.

2. A substrate with improved density and reduced warpage according to claim 1, characterized in that: The micro-through holes (201) are filled with metal.

3. The substrate with improved density and reduced warpage according to claim 2, wherein: The metal is copper, and the residual copper rate of the substrate body (1) is controlled within a range of 50% to 90%.

4. The substrate with improved density and reduced warpage according to claim 1, wherein: The diameter of the hole disk composed of the micro-through holes (201) ranges from 210 to 360 μm.

5. The substrate with improved density and reduced warpage according to claim 1, wherein: The micro-through hole array (2) is arranged in symmetrical vertical rows, and the number of rows is an even number.

6. The substrate with improved density and reduced warpage according to claim 1, wherein: The cross section of the micro-through hole (201) is waist-shaped.

7. A method for preparing a substrate according to any one of claims 1 to 6, characterized in that The steps include: S1: A micro-through hole array (2) is designed in the middle area of ​​the substrate body (1), wherein the micro-through hole array (2) satisfies the micro-through hole diameter range of 100 to 250 μm and the hole plate diameter range of 210 to 360 μm; the spacing between each two adjacent micro-through holes (201) is 150 μm; and the micro-through hole array (2) is arranged in symmetrical vertical rows, and the number of rows is an even number; S2: forming the micro-through hole array (2) by a drilling process, and filling the micro-through holes with metal by an electroplating process; S3: controlling the residual copper rate of the substrate body (1) to be 50% to 90%; S4: mounting a chip on the surface of the substrate body (1) on which the micro-through hole array (2) is completed; S5: Using a plastic encapsulation material to encapsulate the substrate body (1), the micro-through hole array (2) and the chip as a whole.

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