Source-load integrated power supply

Abstract

The invention discloses a source-load integrated power supply, which comprises an alternating current-direct current conversion module, a direct current-direct current conversion module and a controllable load module, and is characterized in that when the source-load integrated power supply works in a load mode, electric energy is consumed by the controllable load module and does not need to be input into a power grid, so that the source-load integrated power supply is not influenced by the power grid; therefore, high-precision voltage and current are output; electric energy is not fed back to a power grid, and ripples can be reduced; the electric energy is not fed back to the power grid, so that harmonic current is not injected into the power grid, and the problem of electromagnetic interference to other equipment in the same power grid can be reduced; the electric energy is not fed back to the power grid, the source-load integrated power supply cannot work normally due to the abnormity of the power grid, the influence on the stability of the power grid can be reduced, and the stability of the source-load integrated power supply is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power supply, in particular to a source-load integrated power supply. BACKGROUND

[0002] With the rapid development of science and technology, there are dual demands for high-precision constant voltage output and dynamic load simulation of power supply in testing and application scenarios, and a source-load integrated power supply emerges as the times require. The source-load integrated power supply is a kind of power electronic equipment integrating power supply and load functions, which has the ability of bidirectional energy flow, can output electric energy as a power supply and can absorb electric energy as a load, and is particularly suitable for new energy testing, laboratory power supply, automation production line, electric vehicle, battery detection and other scenes.

[0003] As shown in Figure 1 A system control block diagram of a source-load integrated power supply provided by the related art, the source-load integrated power supply is composed of a front-stage PFC (Power Factor Correction, power factor correction) circuit, a middle-stage CLLL circuit (Capacitor-Inductor-Inductor-Capacitor Resonant Converter Circuit, capacitor-inductor-inductor-capacitor resonant converter circuit) and a rear-stage BUCK-BOOST circuit.

[0004] In the power supply mode, the 220V AC power input from the power grid is first filtered by a two-stage EMI (Electromagnetic Interference) filter, which prevents power grid interference from entering the previous stage circuit and ensures that the electromagnetic interference signals generated by the system are not transmitted back to the power grid. The current transformer is set before the previous stage PFC circuit and is responsible for sampling the power grid current. Before the system starts, the temperature sensors of the previous stage PFC circuit and the subsequent BUCK-BOOST circuit collect temperature data (PFC side radiator temperature sampling and BUCK side radiator temperature sampling) and send them to the FPGA (Field Programmable Gate Array) for comparison. When the temperature exceeds the threshold value, the system shuts down to protect the components in the system. Before the previous stage circuit starts, the auxiliary power supply provides power for the control system to ensure normal startup and operation of the system. The previous stage can use an FPGA with the model Artix-7-A100T as the main control chip of the previous stage PFC circuit, which generates four PWM (Pulse Width Modulation) signals to drive the four MOSFETs in the previous stage PFC circuit. The FPGA with the model Artix-7-A100T also controls the switching tubes of the intermediate CLLC circuit by outputting four PWM signals to control the conduction and shutdown of the switching tubes in the intermediate CLLC circuit. The output four PWM signals, two PWM signals are used to drive the left side MOSFET of the transformer, and the other two PWM signals are used to drive the right side MOSFET of the transformer. Since the left side MOSFET is responsible for converting DC power into AC power, an isolation chip is added when driving the right side MOSFET to enhance the safety of the system. Another FPGA in the system establishes serial communication with the main MCU (Microcontroller Unit) to realize data exchange and instruction control. The model of the other FPGA can be FLEX8000, and the model of the main MCU can be STM32F412RGT6. The BUCK-BOOST circuit in the subsequent stage uses an FPGA with the model FLEX8000 to generate two PWM signals to control the switching tubes in the BUCK-BOOST circuit. Considering the output accuracy requirement (within 1mV), the system selects a 16-bit ADC (Analog-to-Digital Converter) to meet the high precision requirement. The protection devices of the system are composed of various sensors and the previous stage PFGA, which can monitor the output overvoltage of the previous stage PFC circuit, the overcurrent of the power grid current, and the over-power of the intermediate CLLC circuit. Once an abnormality is detected, the previous stage FPGA will adjust the conduction time of the MOSFET or completely stop its conduction to protect the system and avoid damaging the components.

[0005] In the load mode, the to-be-tested power supply is connected to the system for discharging, and the system inputs direct current to the rear-stage BUCK-BOOST circuit by adjusting the discharging mode (CC mode or CV mode) of the to-be-tested power supply according to the upper computer (set by man). At this time, the rear-stage BUCK-BOOST circuit boosts the input direct current to 76V direct current, and inputs the 76V direct current into the intermediate-stage CLLC circuit, and then the intermediate-stage CLLC circuit reversely boosts the 76V direct current to 380V direct current and sends the 380V direct current into the front-stage PFC circuit. At this time, the current is inverted to 220V / 50HZ alternating current which can be fed into the power grid after passing through the front-stage PFC circuit, and the energy feedback process in the discharging test is completed, and the electric energy is recycled.

[0006] The source-load integrated power supply provided in the related art feeds back electric energy to the power grid in the load mode. The electric energy feedback to the power grid makes it difficult for the source-load integrated power supply to output high-precision voltage and current due to the influence of the power grid. The electric energy feedback to the power grid has a large ripple. When the electric energy is fed back to the power grid, the power electronic switches (such as IGBT (Insulated Gate Bipolar Transistor)) in the source-load integrated power supply generate high-frequency switching actions, which may inject harmonic current into the power grid. Although the device is internally provided with a filter, electromagnetic interference (EMI) may still be caused to other precision instruments under the same power grid. In addition, the source-load integrated power supply works in the load mode to feed back electric energy to the power grid, and relies on a stable and reliable power grid. If the voltage or frequency of the power grid fluctuates sharply or the power grid is powered off, the source-load integrated power supply will not work normally, and may even stop running for protection. A large amount of electric energy feedback to the power grid may affect the stability of the power grid, and also affect the stability of the source-load integrated power supply. SUMMARY

[0007] The present application provides a source-load integrated power supply to solve the problems that the voltage and current output by the source-load integrated power supply working in the load mode have low precision, have a large ripple, may cause electromagnetic interference to other devices under the same power grid, and when the voltage or frequency of the power grid fluctuates sharply or the power grid is powered off, the source-load integrated power supply cannot work normally, and may affect the stability of the power grid and the stability of the source-load integrated power supply.

[0008] The embodiment of the present application provides a source-load integrated power supply, which comprises an AC / DC conversion module, a DC / DC conversion module and a controllable load module. The AC / DC conversion module is electrically connected with the DC / DC conversion module, and the controllable load module is electrically connected with a first DC bus between the AC / DC conversion module and the DC / DC conversion module. The AC-DC conversion module is configured to convert the first AC power input from outside into first DC power when the source-load integrated power supply operates in the power supply mode. The DC-DC conversion module is configured to convert the first DC power into second DC power and output the second DC power when the source-load integrated power supply operates in the power supply mode, and convert third DC power input from outside into fourth DC power when the source-load integrated power supply operates in the load mode. The controllable load module is configured to be inoperative when the source-load integrated power supply operates in the power supply mode, and consume power input to the controllable load module when the source-load integrated power supply operates in the load mode.

[0009] In a possible implementation, the source-load integrated power supply further includes a voltage and current sampling module and a master control module. The sampling end of the voltage and current sampling module is electrically connected to a second DC bus of one end of the DC-DC conversion module outputting the second DC power, and the master control module is electrically connected to a control end of the DC-DC conversion module and an output end of the voltage and current sampling module, respectively. The voltage and current sampling module is configured to sample the DC power of the second DC bus to obtain a voltage signal and / or a current signal. The master control module is configured to control conduction and turn-off of a switch tube in the DC-DC conversion module based on the voltage signal and / or the current signal.

[0010] In a possible implementation, the source-load integrated power supply further includes a filtering module. The filtering module is electrically connected to the DC-DC conversion module. The filtering module is configured to perform filtering processing on the second DC power output by the DC-DC conversion module and output the second DC power for power supply of a load when the source-load integrated power supply operates in the power supply mode, and perform filtering processing on third DC power input from outside and output the filtered DC power to the DC-DC conversion module when the source-load integrated power supply operates in the load mode.

[0011] In a possible implementation, the controllable load module is specifically configured to: Consume power input to the controllable load module when the bus voltage of the first DC bus is greater than or equal to a preset threshold.

[0012] In a possible implementation, the controllable load module includes a first load driving circuit and a first heat dissipation circuit. The first load driving circuit is configured to output a driving signal for controlling the first heat dissipation circuit to work when the bus voltage is greater than or equal to the preset threshold value. The first heat dissipation circuit is configured to consume power input to the controllable load module under the control of the driving signal.

[0013] In a possible implementation, the first load driving circuit includes a first resistor, a second resistor, a first capacitor and a first power amplifier. A first end of the first resistor is electrically connected to a positive bus of the first DC bus, a second end of the first resistor is electrically connected to a first end of the second resistor and a same-direction input end of the first power amplifier; A second end of the second resistor is electrically connected to a ground end of the first power amplifier and grounded. The reverse input end of the first power amplifier is electrically connected to a first end of the first capacitor for inputting a reference voltage, a power supply end of the first power amplifier is for inputting a first power supply voltage, and an output end of the first power amplifier is electrically connected to a second end of the first capacitor for outputting the driving signal.

[0014] In a possible implementation, the first load driving circuit includes a fourth resistor, a fifth resistor, a sixth capacitor, a second power amplifier and a digital-to-analog converter (DAC). A first end of the fourth resistor is electrically connected to a positive bus of the first DC bus for inputting a bus voltage, and a second end of the fourth resistor is electrically connected to a first end of the fifth resistor and a same-direction input end of the second power amplifier. A second end of the fifth resistor is electrically connected to a ground end of the second power amplifier and grounded. The reverse input end of the second power amplifier is electrically connected to the DAC and a first end of the sixth capacitor, a power supply end of the second power amplifier is for inputting a first power supply voltage, and an output end of the second power amplifier is electrically connected to a second end of the sixth capacitor for outputting the driving signal. The DAC is configured to output a reference voltage.

[0015] In a possible implementation, the master control module is further configured to send an enable signal to the controllable load module after determining that the source load integrated power supply works in the load mode. The controllable load module is specifically configured to consume power input to the controllable load module when receiving the enable signal and determining that the bus voltage of the first DC bus is greater than or equal to the preset threshold value.

[0016] In a possible implementation, the controllable load module comprises a second load driving circuit and a first heat dissipation circuit. The second load driving circuit is configured to output a driving signal for controlling the first heat dissipation circuit to work when the enable signal is received and it is determined that the bus voltage is greater than or equal to the preset threshold. The first heat dissipation circuit is configured to consume power input to the controllable load module under the control of the driving signal.

[0017] In a possible implementation, the second load driving circuit comprises a ninth resistor, a tenth resistor, a seventh capacitor, a third power amplifier and a first switch. The first end of the ninth resistor is electrically connected to the positive bus of the first DC bus, configured to input the bus voltage, and the second end of the ninth resistor is electrically connected to the first end of the tenth resistor and the same-direction input end of the third power amplifier. The second end of the tenth resistor is electrically connected to the ground end of the third power amplifier and grounded. The reverse input end of the third power amplifier is electrically connected to the first end of the seventh capacitor, configured to input a reference voltage, the power supply end of the third power amplifier is electrically connected to the first end of the first switch, and the output end of the third power amplifier is electrically connected to the second end of the seventh capacitor, configured to output the driving signal. The second end of the first switch is configured to input a first power supply voltage, and the control end of the first switch is electrically connected to the master control module, configured to receive the enable signal.

[0018] In a possible implementation, the second load driving circuit comprises an eleventh resistor, a twelfth resistor, an eighth capacitor, a fourth power amplifier and a second switch. The first end of the eleventh resistor is electrically connected to the first end of the positive bus of the first DC bus, configured to input the bus voltage, and the second end of the eleventh resistor is electrically connected to the same-direction input end of the fourth power amplifier, the first end of the twelfth resistor and the first end of the second switch. The second end of the twelfth resistor is electrically connected to the second end of the second switch and the ground end of the fourth power amplifier, and grounded. The reverse input end of the fourth power amplifier is electrically connected to the first end of the eighth capacitor, configured to input a reference voltage, the power supply end of the fourth power amplifier is configured to input a first power supply voltage, and the output end of the fourth power amplifier is electrically connected to the second end of the eighth capacitor, configured to output the driving signal. The control end of the second switch is electrically connected to the master control module, configured to receive the enable signal.

[0019] In a possible implementation, the second load driving circuit comprises a thirteenth resistor, a fourteenth resistor, a ninth capacitor, a fifth power amplifier and a second switch; A first end of the thirteenth resistor is electrically connected to a positive bus of the first DC bus, for inputting the bus voltage, and a second end of the thirteenth resistor is electrically connected to a first end of the fourteenth resistor and a same-direction input end of the fifth power amplifier; A second end of the fourteenth resistor is electrically connected to a ground end of the fifth power amplifier and grounded; A reverse input end of the fifth power amplifier is used for inputting a reference voltage, a power supply end of the fifth power amplifier is used for inputting a first power supply voltage, and an output end of the fifth power amplifier is electrically connected to a first end of the second switch; A second end of the second switch is electrically connected to a second end of the ninth capacitor, for outputting the driving signal, and a control end of the second switch is electrically connected to the master control module, for receiving the enable signal.

[0020] In a possible implementation, the first heat dissipation circuit comprises at least one first heat dissipation sub-circuit; For each first heat dissipation sub-circuit, the first heat dissipation sub-circuit comprises a first switch tube, a sixth resistor, a seventh resistor and an eighth resistor; A first end of the first switch tube is electrically connected to a positive bus of the first DC bus, a second end of the first switch tube is electrically connected to a first end of the eighth resistor, and a control end of the first switch tube is electrically connected to a first end of the sixth resistor and a first end of the seventh resistor; A second end of the sixth resistor is used for inputting the driving signal; Second ends of the seventh resistor and the eighth resistor are both grounded.

[0021] In a possible implementation, the master control module is further configured to determine, when the source-load integrated power supply works in the load mode, to send an enable signal to the controllable load module; The controllable load module is specifically configured to consume power input to the controllable load module after receiving the enable signal.

[0022] In a possible implementation, the controllable load module comprises a third load driving circuit and a second heat dissipation circuit; The first end of the third load driving circuit is configured to input the enable signal, the second end of the third load driving circuit is electrically connected with the second end of the second heat dissipation circuit, the third end of the third load driving circuit is electrically connected with the third end of the second heat dissipation circuit, and the third end of the third load driving circuit is configured to output the driving signal, and the first end of the second heat dissipation circuit is configured to input the bus voltage. The third load driving circuit is configured to output a driving signal for controlling the second heat dissipation circuit to work after receiving the enable signal. The second heat dissipation circuit is configured to consume power input to the controllable load module under the control of the driving signal.

[0023] In a possible implementation, the third load driving circuit includes a sixth power amplifier, a sixteenth resistor, a seventeenth resistor and a diode. The same direction input end of the sixth power amplifier serves as the first end of the third load driving circuit, the reverse direction input end of the sixth power amplifier is electrically connected with the anode of the diode, the first end of the sixteenth resistor and the first end of the seventeenth resistor, the output end of the sixth power amplifier is electrically connected with the cathode of the diode and serves as the third end of the third load driving circuit, the power supply end of the sixth power amplifier is configured to input a first power supply voltage, and the grounding end of the sixth power amplifier is configured to input a second power supply voltage. The second end of the sixteenth resistor serves as the second end of the third load driving circuit. The second end of the seventeenth resistor is grounded.

[0024] In a possible implementation, the second heat dissipation circuit includes a switch-on and switch-off sub-circuit and at least one second heat dissipation sub-circuit. In the case of including one second heat dissipation sub-circuit, the first end of the second heat dissipation sub-circuit and the second end of the second heat dissipation sub-circuit are both electrically connected with the third end of the switch-on and switch-off sub-circuit, and the third end of the second heat dissipation sub-circuit serves as the first end of the second heat dissipation circuit. In the case of including multiple second heat dissipation sub-circuits, the third end of a preceding second heat dissipation sub-circuit is electrically connected with the first end and the second end of a subsequent second heat dissipation sub-circuit, the first end and the second end of a first second heat dissipation sub-circuit are both electrically connected with the third end of the switch-on and switch-off sub-circuit, and the third end of a last second heat dissipation sub-circuit serves as the first end of the second heat dissipation circuit. The first end of the switch-on and switch-off sub-circuit serves as the second end of the second heat dissipation circuit, and the second end of the switch-on and switch-off sub-circuit serves as the third end of the second heat dissipation circuit. The on-off sub-circuit is configured to, after receiving the driving signal, turn on a path between the first end of the on-off sub-circuit and the third end of the on-off sub-circuit. For each second heat dissipation sub-circuit, the second heat dissipation sub-circuit is configured to, after the path between the first end of the on-off sub-circuit and the third end of the on-off sub-circuit is turned on, turn on a path between the first end of the second heat dissipation sub-circuit and the third end of the second heat dissipation sub-circuit, and turn on a path between the second end of the second heat dissipation sub-circuit and the third end of the second heat dissipation sub-circuit.

[0025] In a possible implementation, the on-off sub-circuit comprises an eighteenth resistor, a nineteenth resistor, a twentieth resistor and a third switch tube. The first end of the eighteenth resistor is electrically connected to the first end of the nineteenth resistor and the first end of the third switch tube, and serves as the first end of the on-off sub-circuit, and the second end of the eighteenth resistor is grounded. The second end of the nineteenth resistor is electrically connected to the second end of the third switch tube, and serves as the third end of the on-off sub-circuit. The first end of the twentieth resistor serves as the second end of the on-off sub-circuit, and the second end of the twentieth resistor is electrically connected to the control end of the third switch tube.

[0026] In a possible implementation, the second heat dissipation sub-circuit comprises a fourth switch tube, a twenty-first resistor and a voltage stabilizing tube. The first end of the fourth switch tube serves as the second end of the second heat dissipation sub-circuit, the second end of the fourth switch tube is electrically connected to the cathode of the voltage stabilizing tube, and serves as the third end of the second heat dissipation sub-circuit, and the control end of the fourth switch tube is electrically connected to the second end of the twenty-first resistor and the anode of the voltage stabilizing tube. The first end of the twenty-first resistor serves as the first end of the second heat dissipation sub-circuit.

[0027] The present application has the following advantages: The source-load integrated power supply provided in the application, when the source-load integrated power supply works in the power supply mode, the AC-DC conversion module converts the first AC power input from outside into the first DC power, the DC-DC conversion module converts the first DC power into the second DC power, and outputs, to supply power for the load; when the source-load integrated power supply works in the load mode, the DC-DC conversion module converts the third DC power input from outside into the fourth DC power, and the controllable load module consumes the power input to the controllable load module. Since the electric energy is consumed by the controllable load module when the source-load integrated power supply works in the load mode, it is not necessary to input to the power grid, so that the source-load integrated power supply can be not affected by the power grid, thereby outputting high-precision voltage and current; the electric energy is not fed back to the power grid, and the ripple can be reduced; the electric energy is not fed back to the power grid, so that the harmonic current is not injected to the power grid, thereby the electromagnetic interference problem caused to other devices under the same power grid can be reduced; the electric energy is not fed back to the power grid, so that the source-load integrated power supply will not be unable to work normally due to the abnormal power grid, and the influence on the stability of the power grid can be reduced, and the stability of the source-load integrated power supply is improved. BRIEF DESCRIPTION OF DRAWINGS

[0028] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without any creative labor.

[0029] Figure 1 A system control block diagram of a source-load integrated power supply provided by the related art is provided. Figure 2 A structure diagram of a source-load integrated power supply provided by the embodiment of the present application is provided. Figure 3 Another structure diagram of a source-load integrated power supply provided by the embodiment of the present application is provided. Figure 4 Another structure diagram of a source-load integrated power supply provided by the embodiment of the present application is provided. Figure 5 A structure diagram of a controllable load module provided by the embodiment of the present application is provided. Figure 6 A circuit diagram of a first load driving circuit provided by the embodiment of the present application is provided. Figure 7 Another circuit diagram of a first load driving circuit provided by the embodiment of the present application is provided. Figure 8 Another circuit diagram of a first load driving circuit provided by the embodiment of the present application is provided. Figure 9 A circuit diagram of a first heat dissipation circuit provided by the embodiment of the present application is provided. Figure 10 Another structure schematic of a source load integrated power supply provided by the embodiment of the present application; Figure 11 Another structure schematic of a controllable load module provided by the embodiment of the present application; Figure 12 A circuit schematic of a second load driving circuit provided by the embodiment of the present application; Figure 13 Another circuit schematic of a second load driving circuit provided by the embodiment of the present application; Figure 14 Another circuit schematic of a second load driving circuit provided by the embodiment of the present application; Figure 15 Another structure schematic of a controllable load module provided by the embodiment of the present application; Figure 16 A circuit schematic of a third load driving circuit provided by the embodiment of the present application; Figure 17 A circuit schematic of a second heat dissipation circuit provided by the embodiment of the present application; Figure 18 A circuit schematic of an interleaved parallel BUCK architecture provided by the embodiment of the present application; Figure 19 A circuit schematic of a full-wave rectification full-bridge topology architecture provided by the embodiment of the present application; Figure 20 A circuit schematic of a full-bridge rectification full-bridge topology architecture provided by the embodiment of the present application. DETAILED DESCRIPTION

[0030] In order to make the objects, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the drawings. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all the other embodiments obtained by those skilled in the art without creative work fall into the scope of protection of the present application.

[0031] To solve the problem that when the source-load integrated power supply works in the load mode, the output voltage and current are low in precision, the ripple is large, other devices in the same power grid can be interfered electromagnetically, when the voltage or frequency of the power grid fluctuates greatly or the power grid is powered off, the source-load integrated power supply cannot work normally, and the stability of the power grid can be affected, and the stability of the source-load integrated power supply can be affected, the embodiment of the application provides a source-load integrated power supply, the source-load integrated power supply comprises a controllable load module, when the source-load integrated power supply works in the load mode, the controllable load module consumes the power input to the controllable load module, because when the source-load integrated power supply works in the load mode, the electric energy is consumed by the controllable load module, and does not need to be input to the power grid, therefore, the source-load integrated power supply can be affected by the power grid, so that high-precision voltage and current can be output; the electric energy is not fed back to the power grid, and the ripple can be reduced; the electric energy is not fed back to the power grid, and the harmonic current is not injected into the power grid, so that the problem that other devices in the same power grid are interfered electromagnetically can be reduced; the electric energy is not fed back to the power grid, and the source-load integrated power supply cannot work normally due to the abnormality of the power grid, and the influence on the stability of the power grid can be reduced, and the stability of the source-load integrated power supply can be improved.

[0032] To facilitate understanding, the source-load integrated power supply provided by the embodiment of the application is described in detail below with reference to the drawings.

[0033] As shown in Figure 2 Fig. 1 is a structure schematic diagram of a source-load integrated power supply provided by the embodiment of the application, the source-load integrated power supply comprises an AC-DC conversion module 21, a DC-DC conversion module 22 and a controllable load module 24. The AC-DC conversion module 21 and the DC-DC conversion module 22 are electrically connected, and the controllable load module 24 is electrically connected with a first DC bus between the AC-DC conversion module 21 and the DC-DC conversion module 22. The AC-DC conversion module 21 is used for converting the first AC power input from outside into the first DC power when the source-load integrated power supply works in the power supply mode.

[0034] The DC-DC conversion module 22 is used for converting the first DC power into the second DC power and outputting when the source-load integrated power supply works in the power supply mode, and converting the third DC power input from outside into the fourth DC power when the source-load integrated power supply works in the load mode. The controllable load module 24 is used for not working when the source-load integrated power supply works in the power supply mode, and consuming the power input to the controllable load module 24 when the source-load integrated power supply works in the load mode.

[0035] In the embodiment of the present application, when the source-load integrated power supply works in the power supply mode, the AC-DC conversion module 21 converts the first AC power input from outside into first DC power, the DC-DC conversion module 22 converts the first DC power into second DC power, and outputs the second DC power to supply power to the load; when the source-load integrated power supply works in the load mode, the DC-DC conversion module 22 converts the third DC power input from outside into fourth DC power, and the controllable load module 24 consumes the power input to the controllable load module 24. Since the power is consumed by the controllable load module 24 when the source-load integrated power supply works in the load mode, there is no need to input to the power grid, so that the source-load integrated power supply can be free from the influence of the power grid, thereby outputting high-precision voltage and current; the power is not fed back to the power grid, and the ripple can also be reduced; the power is not fed back to the power grid, so that the harmonic current is not injected into the power grid, thereby reducing the electromagnetic interference problem caused to other devices under the same power grid; the power is not fed back to the power grid, so that the source-load integrated power supply will not be unable to work normally due to the abnormality of the power grid, and the influence on the stability of the power grid can also be reduced, thereby improving the stability of the source-load integrated power supply.

[0036] It should be noted that, in the embodiment of the present application, the AC-DC conversion module 21 does not work when the source-load integrated power supply works in the load mode.

[0037] As shown in Figure 3 The source-load integrated power supply provided by the embodiment of the present application can further include a voltage and current sampling module 25 and a main control module 26, the sampling end of the voltage and current sampling module 25 is electrically connected to the second DC bus of one end of the DC-DC conversion module 22 outputting the second DC power, and the main control module 26 is electrically connected to the control end of the DC-DC conversion module 22 and the output end of the voltage and current sampling module 25, respectively. The voltage and current sampling module 25 is configured to sample the DC power of the second DC bus to obtain a voltage signal and / or a current signal. The main control module 26 is configured to control the conduction and turn-off of the switch tube in the DC-DC conversion module 22 based on the voltage signal and / or the current signal.

[0038] In the embodiment of the present application, the DC-DC conversion module 22 is a bidirectional module, and the main control module 26 can determine the working mode of the source-load integrated power supply based on the voltage signal and / or the current signal. When it is determined that the source-load integrated power supply works in the power supply mode, the main control module 26 controls the DC-DC conversion module 22 to convert the input first DC power into second DC power. When it is determined that the source-load integrated power supply works in the load mode, the main control module 26 controls the DC-DC conversion module 22 to convert the third DC power input from outside into fourth DC power.

[0039] It should be noted that the direct-current-direct-current conversion module 22 converts direct current into direct current, and the voltage of the direct current before conversion is different from the voltage of the direct current after conversion.

[0040] As shown in Figure 3 The master control module 26 provided by the embodiment of the present application can include a pulse width modulator, a controller and an analog-to-digital converter. The analog-to-digital converter converts the voltage signal and / or the current signal collected by the voltage and current sampling module 25 into a digital signal and sends it to the controller. The controller sends a control signal to the pulse width modulator based on the received digital signal, and controls the pulse width modulator to output a PWM signal for controlling the on and off of the switch tube in the direct-current-direct-current conversion module 22.

[0041] In addition, the master control module 26 runs a digital control algorithm to comprehensively detect, adjust and protect the voltage, current, power, frequency, timing and the like of the power supply.

[0042] As shown in Figure 4 The source-load integrated power supply can further include a filtering module 23, which is electrically connected with the direct-current-direct-current conversion module 22, that is, the alternating-current-direct-current conversion module 21, the direct-current-direct-current conversion module 22 and the filtering module 23 are electrically connected in sequence. The filtering module 23 is used for filtering the second direct current output by the direct-current-direct-current conversion module 22 when the source-load integrated power supply works in the power supply mode, and outputs the filtered direct current to supply power to the load. When the source-load integrated power supply works in the load mode, the filtering module 23 filters the third direct current input from outside and outputs the filtered direct current to the direct-current-direct-current conversion module 22.

[0043] Figure 4 As shown in the source-load integrated power supply, one end of the filtering module 23 is electrically connected with the direct-current-direct-current conversion module 22, and the other end of the filtering module 23 is electrically connected with the sampling end of the voltage and current sampling module 25. When the source-load integrated power supply works in the power supply mode, the voltage and current sampling module 25 samples the filtered direct current output by the filtering module 23. When the source-load integrated power supply works in the load mode, the direct-current-direct-current conversion module 22 converts the filtered direct current output by the filtering module 23 into the fourth direct current.

[0044] The above is a description of the overall structure of the source-load integrated power supply. The controllable load module disclosed by the embodiment of the present application will be described below.

[0045] In one embodiment, the controllable load module 24 consumes the power input to the controllable load module 24 when the bus voltage of the first direct-current bus is greater than or equal to a preset threshold.

[0046] Specifically, as shown in Figure 5, which is a structural diagram of a controllable load module provided in an embodiment of the present application, wherein the controllable load module 24 includes a first load driving circuit 241 and a first heat dissipation circuit 242; The first load driving circuit 241 is configured to output a driving signal Drv for controlling the operation of the first heat dissipation circuit 242 when the bus voltage at the input end of the controllable load module 24 is greater than or equal to a preset threshold; The first heat dissipation circuit 242 is configured to dissipate power input to the controllable load module 24 under the control of the driving signal Drv.

[0047] The preset threshold here may be the operating voltage of the controllable load module 24 .

[0048] In the embodiment of the present application, when the source-load integrated power supply operates in the load mode, the voltage of the input power of the controllable load module 24 is greater than or equal to the preset threshold value, that is, the voltage of the DC power input to the first load driving circuit 241 is greater than or equal to the preset threshold value, that is, the voltage of the fourth DC power is greater than or equal to the preset threshold value, the first load driving circuit 241 outputs a drive signal Drv, such as a high-level signal, and after the first heat dissipation circuit 242 receives the drive signal Drv (high-level signal), it consumes the power input to the controllable load module 24 to control the bus voltage to remain constant; when the source When the integrated power supply operates in the power mode, the voltage input to the controllable load module 24 is less than the preset threshold, that is, the voltage of the DC power input to the first load driving circuit 241 is less than the preset threshold, that is, the voltage of the first DC power is less than the preset threshold. At this time, the first load driving circuit 241 outputs a non-driving signal that cannot drive the first heat dissipation circuit 242 to work, such as a low-level signal. After receiving the non-driving signal (low-level signal), the first heat dissipation circuit 242 does not work, that is, the controllable load module 24 does not work and does not consume the power input to the controllable load module 24.

[0049] In an embodiment of the present application, when the source-load integrated power supply operates in the power supply mode, the first heat dissipation circuit 242 in the controllable load module 24 does not operate, and therefore does not consume the power input to the controllable load module 24. When the source-load integrated power supply operates in the load mode, the first heat dissipation circuit 242 in the controllable load module 24 operates and consumes the power input to the controllable load module 24. Therefore, without affecting the normal operation of the source-load integrated power supply, when the source-load integrated power supply operates in the load mode, the energy fed back to the power supply is reduced, thereby reducing the impact on the stability of the power grid and improving the stability of the source-load integrated power supply.

[0050] like Figure 6 FIG. 1 is a circuit diagram of a first load driving circuit provided in an embodiment of the present application, referring to FIG. Figure 6The first load driving circuit 241 comprises a first resistor R1, a second resistor R2, a first capacitor C1 and a first power amplifier U1. The first end of the first resistor R1 is electrically connected with the positive bus of the first DC bus, and the second end of the first resistor R1 is electrically connected with the first end of the second resistor R2 and the same direction input end of the first power amplifier U1. The second end of the second resistor R2 is electrically connected with the ground end of the first power amplifier U1 and grounded. The reverse input end of the first power amplifier U1 is electrically connected with the first end of the first capacitor C1 for inputting a reference voltage Vref, the power supply end of the first power amplifier U1 is for inputting a first power supply voltage +VEE, and the output end of the first power amplifier U1 is electrically connected with the second end of the first capacitor C1 for outputting a driving signal Drv.

[0051] In the embodiment of the application, the first resistor R1 divides the input bus voltage, and inputs the divided voltage to the same direction input end of the first power amplifier U1. The first power amplifier U1 compares the voltage inputted by the same direction input end with the reference voltage Vref inputted by the reverse input end. When the voltage inputted by the same direction input end is greater than or equal to the reference voltage Vref, the first power amplifier U1 outputs a high level signal, i.e. the driving signal Drv. When the voltage inputted by the same direction input end is less than the reference voltage Vref, the first power amplifier U1 outputs a low level signal, i.e. a non-driving signal.

[0052] It should be noted that the reference voltage Vref in the embodiment of the application is equal to the preset threshold value.

[0053] In another embodiment, as shown in FIG. 2B, another circuit schematic diagram of the first load driving circuit is provided in the embodiment of the application, referring to FIG. 1 and FIG. 2A, Figure 7 The first load driving circuit 241 further comprises a third resistor R3, a second capacitor C2, a third capacitor C3, a fourth capacitor C4 and a fifth capacitor C5. Figure 7 The third resistor R3 is connected between the second end of the first resistor R1 and the same direction input end of the first power amplifier U1. The first end of the second capacitor C2 is electrically connected with the first end of the third capacitor C3 and the power supply end of the first power amplifier U1, and the second end of the second capacitor C2 is electrically connected with the second end of the third capacitor C3 and grounded. The first end of the fourth capacitor C4 is electrically connected with the first end of the fifth capacitor C5 and the reverse input end of the first power amplifier U1, and the second end of the fourth capacitor C4 is electrically connected with the second end of the fifth capacitor C5 and grounded.

[0054] ​In the embodiment of the present application, the second capacitor C2 and the third capacitor C3 are used to eliminate the power supply ripple of the first supply voltage +VEE, and the fourth capacitor C4 and the fifth capacitor C5 make the reference voltage Vref more stable.

[0055] It should be noted that, in the embodiment of the present application Figure 7 The number of resistors and the number of capacitors in the first load driving circuit shown in the embodiment of the present application are only illustrative, and in specific embodiments, the number of resistors and the number of capacitors can also be other numbers, which are not limited in the embodiment of the present application.

[0056] As Figure 8 shown, the circuit schematic diagram of another first load driving circuit provided by the embodiment of the present application is shown in the figure. Figure 8 The first load driving circuit includes a fourth resistor R4, a fifth resistor R5, a sixth capacitor C6, a second power amplifier U2 and a DAC (Digital-to-Analog Converter, Digital-to-Analog Converter); The first end of the fourth resistor R4 is electrically connected to the positive bus of the first DC bus, for inputting the bus voltage, and the second end of the fourth resistor R4 is electrically connected to the first end of the fifth resistor R5 and the same direction input end of the second power amplifier U2; The second end of the fifth resistor R5 is electrically connected to the ground end of the second power amplifier U2 and grounded; The reverse input end of the second power amplifier U2 is electrically connected to the DAC and the first end of the sixth capacitor C6, the supply end of the second power amplifier U2 is used for inputting the first supply voltage +VEE, the output end of the second power amplifier U2 is electrically connected to the second end of the sixth capacitor C6, and the output driving signal Drv is outputted; The DAC is used for outputting the reference voltage Vref.

[0057] In the embodiment of the present application, the voltage value of the reference voltage Vref outputted by the DAC is adjustable, and the reference voltage Vref with a suitable voltage value can be outputted by the DAC according to actual needs, so as to improve the flexibility of the first load driving circuit.

[0058] The first heat dissipation circuit provided by the embodiment of the present application will be described in detail below.

[0059] As Figure 9 shown, the circuit schematic diagram of a first heat dissipation circuit provided by the embodiment of the present application is shown in the figure, Figure 9 In the embodiment of the present application, the first heat dissipation circuit includes at least one first heat dissipation sub-circuit 2421; For each first heat dissipation sub-circuit 2421, the first heat dissipation sub-circuit 2421 includes a first switch tube Q1, a sixth resistor R6, a seventh resistor R7 and an eighth resistor R8; A first end of the first switch tube Q1 is electrically connected to the positive busbar of the first DC bus, a second end of the first switch tube Q1 is electrically connected to the first end of the eighth resistor R8, and a control end of the first switch tube Q1 is electrically connected to the first end of the sixth resistor R6 and the first end of the seventh resistor R7; The second end of the sixth resistor R6 is used to input the driving signal Drv; A second end of the seventh resistor R7 and a second end of the eighth resistor R8 are both grounded.

[0060] It should be noted that Figure 9 The first heat dissipation circuit includes 6 first heat dissipation sub-circuits 2421. In the embodiment of the present application, the number of the first heat dissipation sub-circuits in the first heat dissipation circuit is only an example, and the embodiment of the present application does not impose any limitation on this.

[0061] In the embodiment of the present application, the first switch tube Q1 may be a MOSFET, and a parallel circuit of load MOS tubes is adopted. The operating voltage of all MOS tubes is the same, and the resistor on the source side (the sixth resistor R6) plays the role of current negative feedback. When the current of a certain MOS tube is too large, the divided voltage on the resistor also increases, the voltage of the G (gate) and S (source) of the MOS tube decreases, and the current flowing through the MOS tube also decreases accordingly.

[0062] For each first heat dissipation sub-circuit 2421 , when the MOS transistor in the first heat dissipation sub-circuit 2421 receives the driving signal Drv, the MOSFET operates in the linear region, and the MOSFET and the resistor in the first heat dissipation sub-circuit 2421 consume the power input to the controllable load module 24 .

[0063] In another embodiment, the main control module 26 is also used to send an enable signal EN to the controllable load module 24 after determining that the source-load integrated power supply is operating in load mode. When the controllable load module 24 receives the enable signal EN and determines that the bus voltage of the first DC bus is greater than or equal to a preset threshold, it consumes the power input to the controllable load module 24.

[0064] Specifically, such as Figure 10 FIG. 1 is a schematic diagram of another source-load integrated power supply provided in an embodiment of the present application, referring to FIG. Figure 10 The main control module 26 is also electrically connected to the controllable load module 24. When the main control module 26 determines that the source-load integrated power supply is operating in the load mode based on the voltage signal and / or current signal, it sends an enable signal EN to the controllable load module 24; when the controllable load module 24 receives the enable signal EN and determines that the bus voltage is greater than or equal to the preset threshold, it consumes the power input to the controllable load module 24.

[0065] In the embodiment, the controllable load module 24 consumes the power input to the controllable load module when the enable signal EN is received and it is determined that the bus voltage is greater than or equal to the preset threshold, which can prevent misoperation and improve the reliability of the controllable load module.

[0066] It should be noted that, Figure 10 This is only one specific embodiment, and in specific implementation, the source-load integrated power supply can also not include the filter module 23.

[0067] In one embodiment, the analog-to-digital converter in the main control module 26 converts the voltage signal and / or the current signal collected by the voltage and current sampling module 25 into a digital signal and sends it to the controller. The controller determines the working mode of the source-load integrated power supply based on the received digital signal. If it is determined that the source-load integrated power supply works in the power supply mode, the controller outputs a non-enable signal, such as a low-level signal. After the controllable load module 24 receives the non-enable signal, the controllable load module 24 is controlled not to work. If it is determined that the source-load integrated power supply works in the load mode, the controller sends an enable signal EN, such as a high-level signal, to the controllable load module 24.

[0068] In another embodiment, when the source-load integrated power supply works in the load mode, the voltage of the external power supply is greater than the set voltage of the source-load integrated power supply working in the power supply mode. Therefore, the current flows reversely from the external power supply into the source-load integrated power supply. When the main control module 26 detects the reverse current, it is determined that the source-load integrated power supply works in the load mode. Specifically, the main control module 26 can also include a bidirectional current detection amplifier circuit to realize the detection of the current direction.

[0069] In the embodiment, the enable control of the controllable load module 24 is added. When the source-load integrated power supply works in the power supply mode, the main control module 26 sends a non-enable signal. Whether the bus voltage of the input end of the controllable load module 24 exceeds the preset threshold, the controllable load module 24 does not work, which can prevent the misoperation of the controllable load module 24 and improve the reliability of the controllable load module 24.

[0070] In one embodiment, as Figure 11 shown, another structure of the controllable load module provided in the embodiment is shown. Referring to Figure 11 , the controllable load module 24 includes a second load driving circuit 243 and a first heat dissipation circuit 242. The second load driving circuit 243 is configured to output a driving signal Drv for controlling the working of the first heat dissipation circuit 242 when the enable signal EN is received and it is determined that the bus voltage is greater than or equal to the preset threshold. The first heat dissipation circuit 242 is configured to consume power input to the controllable load module 24 under the control of the driving signal Drv.

[0071] In the embodiment, the second load driving circuit 243 outputs the driving signal Drv based on the enable signal EN and the bus voltage, which can improve the reliability of the controllable load module compared with outputting the driving signal Drv only based on the bus voltage.

[0072] In one embodiment, as shown in Figure 12 , a circuit schematic diagram of a second load driving circuit provided in the embodiment is provided, referring to Figure 12 , the second load driving circuit includes a ninth resistor R9, a tenth resistor R10, a seventh capacitor C7, a third power amplifier U3 and a first switch S1. The first end of the ninth resistor R9 is electrically connected to the positive bus of the first DC bus for inputting the bus voltage, and the second end of the ninth resistor R9 is electrically connected to the first end of the tenth resistor R10 and the same direction input end of the third power amplifier U3. The second end of the tenth resistor R10 is electrically connected to the ground end of the third power amplifier U3 and grounded. The reverse input end of the third power amplifier U3 is electrically connected to the first end of the seventh capacitor C7 for inputting the reference voltage Vref, the power supply end of the third power amplifier U3 is electrically connected to the first end of the first switch S1, and the output end of the third power amplifier U3 is electrically connected to the second end of the seventh capacitor C7 for outputting the driving signal Drv. The second end of the first switch S1 is used for inputting the first power supply voltage +VEE, and the control end of the first switch S1 is electrically connected to the main control module 26 for receiving the enable signal EN.

[0073] In the embodiment, the first switch S1 is arranged at the power supply of the third operational amplifier U3, when the first switch S1 is disconnected, the third operational amplifier U3 has no power supply, and the driving function is invalid. Specifically, when the enable signal EN acts on the control end of the first switch S1, the first switch S1 is turned on, the power supply end of the third power amplifier U3 inputs the first power supply voltage +VEE, and the third power amplifier U3 starts to work, when the bus voltage is greater than or equal to the reference voltage Vref, the third power amplifier U3 outputs the driving signal Drv.

[0074] As shown in Figure 13 , another circuit schematic diagram of a second load driving circuit provided in the embodiment is provided, referring to Figure 13 , the second load driving circuit includes an eleventh resistor R11, a twelfth resistor R12, an eighth capacitor C8, a fourth power amplifier U4 and a second switch Q2. A first end of the eleventh resistor R11 is electrically connected to the positive busbar of the first DC busbar and is used to input the busbar voltage. A second end of the eleventh resistor R11 is electrically connected to the non-inverting input terminal of the fourth power amplifier U4, a first end of the twelfth resistor R12, and a first end of the second switch tube Q2. A second end of the twelfth resistor R12 is electrically connected to the second end of the second switch tube Q2 and the ground end of the fourth power amplifier U4, and is grounded; An inverting input terminal of the fourth power amplifier U4 is electrically connected to the first terminal of the eighth capacitor C8 for inputting a reference voltage Vref. A power supply terminal of the fourth power amplifier U4 is used to input a first power supply voltage +VEE. An output terminal of the fourth power amplifier U4 is electrically connected to the second terminal of the eighth capacitor C8 for outputting a drive signal Drv. The control end of the second switch tube Q2 is electrically connected to the main control module 26 for receiving the enable signal EN.

[0075] In the embodiment of the present application, the second switch tube Q2 is connected in parallel with the pull-down resistor (the twelfth resistor R12). When the second switch tube Q2 is turned on, the pull-down resistor is short-circuited, the voltage at the non-inverting input terminal of the fourth operational amplifier U4 is always lower than the voltage at the reverse input terminal, and the fourth operational amplifier U4 always outputs a low-level signal.

[0076] That is, when the signal applied to the control terminal of the second switch tube Q2 is a non-enable signal, the second switch tube Q2 is turned on, the twelfth resistor R12 is short-circuited, the voltage at the non-inverting input terminal of the fourth operational amplifier U4 is always lower than the voltage at the inverting input terminal, and the fourth operational amplifier U4 outputs a non-driving signal (a low-level signal). When the signal applied to the control terminal of the second switch tube Q2 is an enable signal EN, the second switch tube Q2 is turned off. At this time, if the voltage after voltage division by the eleventh resistor R11 is greater than or equal to the reference voltage Vref, the fourth power amplifier U4 outputs a driving signal Drv (a high-level signal).

[0077] like Figure 14 FIG. 1 is a circuit diagram of another second load driving circuit provided in an embodiment of the present application, referring to FIG. Figure 14 , the second load driving circuit includes a thirteenth resistor R13, a fourteenth resistor R14, a ninth capacitor C9, a fifth power amplifier U5 and a second switch S2; A first end of a thirteenth resistor R13 is electrically connected to the positive busbar of the first DC busbar for inputting a busbar voltage, and a second end of the thirteenth resistor R13 is electrically connected to a first end of a fourteenth resistor R14 and a non-inverting input end of a fifth power amplifier U5; A second end of the fourteenth resistor R14 is electrically connected to the ground terminal of the fifth power amplifier U5 and is grounded; The inverting input terminal of the fifth power amplifier U5 is used to input the reference voltage Vref, the power supply terminal of the fifth power amplifier U5 is used to input the first power supply voltage +VEE, and the output terminal of the fifth power amplifier U5 is electrically connected to the first terminal of the second switch S2; The second end of the second switch S2 is electrically connected to the second end of the ninth capacitor C9 for outputting the driving signal Drv. The control end of the second switch S2 is electrically connected to the main control module 26 for receiving the enable signal EN.

[0078] In this embodiment of the present application, the second switch S2 is set at the output end of the fifth power amplifier U5. When the second switch S2 is disconnected, the signal output by the fifth power amplifier U5 cannot be transmitted to the first heat dissipation circuit, and the second load driving circuit fails.

[0079] That is, when the signal acting on the control end of the second switch S2 is a non-enable signal, the second switch S2 is disconnected, and the signal output by the fifth power amplifier U5 cannot be output through the second switch S2; when the signal acting on the control end of the second switch S2 is an enable signal EN, the second switch S2 is closed. At this time, if the voltage after voltage division by the thirteenth resistor R13 is greater than or equal to the reference voltage Vref, the drive signal Drv output by the fifth operational amplifier U5 is output through the second switch S2.

[0080] The above is an explanation of the second load driving circuit. The circuit structure of the first heat dissipation circuit 242 in the embodiment of the present application can refer to the specific structure of the first heat dissipation circuit 242 in the above embodiment, and will not be repeated here.

[0081] In another embodiment, when the main control module 26 determines that the source-load integrated power supply operates in load mode, it sends an enable signal EN to the controllable load module 24. After receiving the enable signal EN, the controllable load module 24 consumes the power input to the controllable load module.

[0082] Specifically, such as Figure 15 , which is a structural diagram of another controllable load module provided in an embodiment of the present application, wherein the controllable load module 24 includes a third load driving circuit 244 and a second heat dissipation circuit 245; A first terminal of the third load driving circuit 244 is used to input an enable signal EN, a second terminal of the third load driving circuit 244 is electrically connected to a second terminal of the second heat dissipation circuit 245, and a third terminal of the third load driving circuit 244 is electrically connected to a third terminal of the second heat dissipation circuit 245, for outputting a driving signal Drv; a first terminal of the second heat dissipation circuit 245 is used to input a bus voltage; The third load driving circuit 244 is configured to output a driving signal Drv for controlling the operation of the second heat dissipation circuit 245 after receiving the enable signal EN; The second heat dissipation circuit 245 is configured to consume power input to the controllable load module 24 under the control of the driving signal Drv.

[0083] In the embodiment, the main control module 26 outputs the enable signal EN when the source-load integrated power supply works in the load mode, and the third load driving circuit 244 outputs the driving signal Drv as long as the enable signal EN is received, so that the second heat dissipation circuit consumes the power input to the controllable load module 24.

[0084] In a specific implementation, as shown in Figure 16 FIG. 6, a circuit schematic diagram of the third load driving circuit provided by the embodiment is provided, and the third load driving circuit 244 includes a sixth power amplifier U6, a sixteenth resistor R16, a seventeenth resistor R17, and a diode D1. The same direction input end of the sixth power amplifier U6 is configured as a first end of the third load driving circuit 244, and is configured to input the enable signal EN. The opposite direction input end of the sixth power amplifier U6 is electrically connected with the anode of the diode D1, the first end of the sixteenth resistor R16, and the first end of the seventeenth resistor R17. The output end of the sixth power amplifier U6 is electrically connected with the cathode of the diode D1, and is configured as a third end of the third load driving circuit 244, and is configured to output the driving signal Drv. The power supply end of the sixth power amplifier U6 is configured to input the first power supply voltage +VEE. The grounding end of the sixth power amplifier U6 is configured to input the second power supply voltage -VEE. The second end of the sixteenth resistor is configured as a second end of the third load driving circuit 244. The second end of the seventeenth resistor R17 is grounded.

[0085] In the embodiment, after the same direction input end of the sixth power amplifier U6 inputs the enable signal EN (a high-level signal), the output driving signal Drv (a high-level signal) is output. The diode D1 is configured to prevent reverse connection. The sixteenth resistor R16 and the seventeenth resistor R17 are configured as voltage dividing resistors.

[0086] As shown in Figure 17 FIG. 7, a circuit schematic diagram of a second heat dissipation circuit provided by the embodiment is provided. Referring to Figure 17 , the second heat dissipation circuit includes a switch sub-circuit 2451 and at least one second heat dissipation sub-circuit 2452. In the case of including one second heat dissipation sub-circuit, the first end of the second heat dissipation sub-circuit 2452 and the second end of the second heat dissipation sub-circuit 2452 are both electrically connected with the third end of the switch sub-circuit 2451. The third end of the second heat dissipation sub-circuit 2452 is configured as a first end of the second heat dissipation circuit, and is configured to input the bus voltage. In the case of comprising multiple second heat dissipation sub-circuits, the third end of the front-stage second heat dissipation sub-circuit 2452 is electrically connected with the first end of the rear-stage second heat dissipation sub-circuit 2452 and the second end of the rear-stage second heat dissipation sub-circuit 2452, the first end of the first-stage second heat dissipation sub-circuit 2452 and the second end of the first-stage second heat dissipation sub-circuit 2452 are both electrically connected with the third end of the on-off sub-circuit 2451, and the third end of the last-stage second heat dissipation sub-circuit 2452 serves as the first end of the second heat dissipation circuit 245 for inputting the bus voltage; The first end of the on-off sub-circuit 2451 serves as the second end of the second heat dissipation circuit 245, and the second end of the on-off sub-circuit 2451 serves as the third end of the second heat dissipation circuit 245 for receiving the driving signal Drv; The on-off sub-circuit 2451 is configured to, after receiving the driving signal Drv, turn on the path between the first end of the on-off sub-circuit 2451 and the third end of the on-off sub-circuit 2451; For each second heat dissipation sub-circuit 2452, the second heat dissipation sub-circuit 2452 is configured to, after the path between the first end of the on-off sub-circuit 2451 and the third end of the on-off sub-circuit 2451 is turned on, turn on the path between the first end of the second heat dissipation sub-circuit 2452 and the third end of the second heat dissipation sub-circuit 2452, and turn on the path between the second end of the second heat dissipation sub-circuit 2452 and the third end of the second heat dissipation sub-circuit 2452.

[0087] In specific implementations, referring to Figure 17 , the on-off sub-circuit 2451 comprises an eighteenth resistor R18, a nineteenth resistor R19, a twentieth resistor R20 and a third switch tube Q3; The first end of the eighteenth resistor R18 is electrically connected with the first end of the nineteenth resistor R19 and the first end of the third switch tube Q3, and serves as the first end of the on-off sub-circuit 2451, and the second end of the eighteenth resistor R18 is grounded; The second end of the nineteenth resistor R19 is electrically connected with the second end of the third switch tube Q3, and serves as the third end of the on-off sub-circuit 2451; The first end of the twentieth resistor R20 serves as the second end of the on-off sub-circuit 2451, and the second end of the twentieth resistor R20 is electrically connected with the control end of the third switch tube Q3.

[0088] Referring to Figure 17 , the second heat dissipation sub-circuit 2452 comprises a fourth switch tube Q4, a twenty-first resistor R21 and a voltage stabilizing tube Z1; The first end of the fourth switch Q4 is the second end of the second heat dissipation sub-circuit 2452, the second end of the fourth switch Q4 is electrically connected with the cathode of the voltage stabilizing tube Z1 and is the third end of the second heat dissipation sub-circuit 2452, and the control end of the fourth switch Q4 is electrically connected with the second end of the twenty-first resistor R21 and the anode of the voltage stabilizing tube Z1. The first end of the twenty-first resistor R21 is the first end of the second heat dissipation sub-circuit 2452.

[0089] It should be noted that, Figure 17 The second heat dissipation circuit 245 in the embodiment comprises three second heat dissipation sub-circuits 2452, Figure 17 The number of the second heat dissipation sub-circuits is only an example, and the embodiment of the present application does not make any limitation on this.

[0090] Referring to Figure 16 And Figure 17 When the source-load integrated power supply works in the load mode, the sixth power amplifier U6 receives the enable signal EN and outputs the drive signal Drv, the on-off sub-circuit 2451 receives the drive signal Drv, the third switch Q3 is turned on, the third switch Q3 is turned on, the voltage stabilizing tube Z1 in series with the third switch Q3 is also turned on, the fourth switch Q4 is turned on after the voltage stabilizing tube Z1 is turned on.

[0091] In the embodiment, the fourth switch Q4 can be a MOSFET, the MOSFET is turned on, thereby consuming the power output by the direct-current-direct-current conversion module 22, that is, consuming the power input to the second heat dissipation sub-circuit 2452. That is, the load MOS series circuit is adopted, which can ensure that the current flowing through each MOS tube is the same. In addition, the third switch Q3 in the embodiment can also be a MOSFET, and the third switch Q3 can also consume the input power after being turned on.

[0092] The above is the description of the specific structure of the controllable load module in the embodiment, and the specific structure of other modules of the source-load integrated power supply disclosed in the embodiment will be described in detail below.

[0093] The alternating-current-direct-current conversion module 21 in the embodiment can be a bidirectional AC-DC converter, which can convert the external input alternating current into direct current, and can also convert the direct current into alternating current.

[0094] The related art provides a source-load integrated power supply, which converts between alternating current and direct current by using a PFC circuit. The control of the inverter mode of the PFC circuit has a considerable challenge. When the PFC circuit is used as a grid-connected inverter, the core challenge lies in the quality of the grid-connected current. The inverter mentioned in the related art converts 220V / 50Hz alternating current, which needs a very precise phase-locked loop (PLL) to synchronize the phase and frequency of the grid, and a precise current loop control to ensure that the output current is a high-quality sine wave and in phase with the grid voltage (high power factor). There is a great challenge in high-precision phase-locked loop and low total harmonic distortion (THD) grid-connected current control.

[0095] The AC-DC converter is used in the embodiment of the application to convert between alternating current and direct current. Compared with the PFC circuit, the phase-locked loop and the current loop control are not needed, thereby reducing the control difficulty of the source-load integrated power supply.

[0096] The direct-current-direct-current conversion module 22 in the embodiment of the application can be a bidirectional DC-DC converter, which can convert the voltage of the input direct current into a higher or lower direct current voltage. Since the energy can be stored in an electric field (capacitor) or a magnetic field (inductor or transformer), the efficiency is usually higher than 90% or even 95%, which is the main part of power energy transmission.

[0097] The related art provides a source-load integrated power supply, which converts between alternating current and direct current by using a PFC circuit. The control of the inverter mode of the PFC circuit has a considerable challenge. When the PFC circuit is used as a grid-connected inverter, the core challenge lies in the quality of the grid-connected current. The inverter mentioned in the related art converts 220V / 50Hz alternating current, which needs a very precise phase-locked loop (PLL) to synchronize the phase and frequency of the grid, and a precise current loop control to ensure that the output current is a high-quality sine wave and in phase with the grid voltage (high power factor). There is a great challenge in high-precision phase-locked loop and low total harmonic distortion (THD) grid-connected current control.

[0098] On the other hand, the control of the bidirectional CLLC circuit is much more complex than that of the unidirectional CLLC circuit. The control of the bidirectional CLLC circuit needs to maintain stable output in both directions and handle the dynamic process during direction switching. The control strategy (usually frequency modulation PFM or phase shift PSM) needs to be adjusted differently in the forward and reverse modes, which brings great challenges to FPGA algorithm design.

[0099] The bidirectional DC-DC converter is used in the embodiment of the application to convert direct current into direct current with different voltages. Compared with the CLLC circuit, the control is simple, the switching loss is small, and the heat generation is also small.

[0100] In an embodiment, the bidirectional DC-DC converter can be an interleaved parallel BUCK architecture, a full-wave rectification full-bridge topology architecture, or a full-bridge rectification full-bridge topology architecture. In specific embodiments, in addition to the above three architectures, the bidirectional DC-DC converter can also be other structures for DC-DC conversion, which are not limited in the embodiments of the present application.

[0101] As shown in Figure 18 , a circuit schematic diagram of an interleaved parallel BUCK architecture provided by the embodiments of the present application is shown. Figure 18 In the embodiment, the interleaved parallel BUCK architecture includes a switch tube Q11, a switch tube Q12, a switch tube Q13, a switch tube Q14, a switch tube Q15, a switch tube Q16, a switch tube Q17, a switch tube Q18, an inductor L1, an inductor L2, a capacitor C13, and a capacitor C14. The first end of the switch tube Q11, the first end of the switch tube Q15, the first end of the switch tube Q13, and the first end of the switch tube Q17 are electrically connected, serving as a first positive terminal of the interleaved parallel BUCK architecture. The first end of the switch tube Q12, the first end of the switch tube Q16, the first end of the switch tube Q14, and the first end of the switch tube Q18 are electrically connected, serving as a first negative terminal of the interleaved parallel BUCK architecture. The second end of the switch tube Q11 is electrically connected with the second end of the switch tube Q15, the first end of the switch tube Q12, the first end of the switch tube Q16, and the first end of the inductor L1. The second end of the switch tube Q12 is electrically connected with the second end of the switch Q16, the capacitor C13, the second end of the switch tube Q14, the second end of the switch tube Q18, and the second end of the capacitor C14, and is grounded, serving as a second negative terminal of the interleaved parallel BUCK architecture. One end of the inductor L1 is electrically connected with one end of the capacitor C13, one end of the inductor L2, and one end of the capacitor C14, serving as a second positive terminal of the interleaved parallel BUCK architecture. The second end of the switch tube Q13 is electrically connected with the second end of the switch tube Q17, the first end of the switch tube Q14, the first end of the switch tube Q18, and the first end of the inductor L2.

[0102] The first positive terminal and the first negative terminal of the interleaved parallel BUCK architecture are electrically connected with the AC-DC conversion module 21, and the second positive terminal and the second negative terminal of the interleaved parallel BUCK architecture are electrically connected with the filtering module.

[0103] In the embodiments of the present application, the bidirectional DC-DC converter adopts the interleaved parallel BUCK architecture, which is suitable for products with an output voltage less than 40V. When the source-load integrated power supply works in the power supply mode, the interleaved parallel BUCK architecture works in the BUCK topology. When the source-load integrated power supply works in the load mode, the interleaved parallel BUCK architecture works in the BOOST topology.

[0104] As shown in Figure 19 Fig. 1 is a circuit schematic diagram of a full-wave rectification full-bridge topology architecture provided by an embodiment of the present application, Figure 19 In the full-wave rectification full-bridge topology architecture, the full-wave rectification full-bridge topology architecture includes a switch tube Q21, a switch tube Q22, a switch tube Q23, a switch tube Q24, a switch tube Q25, a switch tube Q26, a switch tube Q27, a switch tube Q28, a switch tube Q29, a switch tube Q30, a switch tube Q31, a switch tube Q32, an inductor L3, an inductor L4, a capacitor C15, a capacitor C16, an isolation transformer T1, and an isolation transformer T2. A first end of the switch tube Q21 is electrically connected with a first end of the switch tube Q23, a first end of the switch tube Q27, and a first end of the switch tube Q29, serving as a first positive terminal of the full-wave rectification full-bridge topology architecture, and a second end of the switch tube Q21 is electrically connected with a first end of the switch tube Q22 and a first end of a primary winding of the isolation transformer T1. A second end of the switch tube Q23 is electrically connected with a first end of the switch tube Q24 and a second end of the primary winding of the isolation transformer T1. A second end of the switch tube Q22 is electrically connected with a second end of the switch tube Q24, a second end of the switch tube Q28, and a second end of the switch tube Q30, serving as a first negative terminal of the full-wave rectification full-bridge topology architecture. A second end of the switch tube Q27 is electrically connected with a first end of the switch tube Q28 and a first end of a primary winding of the isolation transformer T2. A second end of the switch tube Q29 is electrically connected with a first end of the switch tube Q30 and a second end of the primary winding of the isolation transformer T2. A first end of a secondary winding of the isolation transformer T1 is electrically connected with a second end of the switch tube Q25, a second end of the secondary winding of the isolation transformer T1 is electrically connected with a second end of the capacitor C15, a second end of the inductor L4, and a second end of the capacitor C16, and a third end of the secondary winding of the isolation transformer T1 is electrically connected with a second end of the switch tube Q26. A first end of the switch tube Q25 is electrically connected with a first end of the switch tube Q26 and a first end of the inductor L3. A second end of the inductor L3 is electrically connected with a first end of the capacitor C15, serving as a second positive terminal of the full-wave rectification full-bridge topology architecture. A first end of a secondary winding of the isolation transformer T2 is electrically connected with a second end of the switch tube Q31, a second end of the secondary winding of the isolation transformer T2 is electrically connected with a second end of the capacitor C16, serving as a second negative terminal of the full-wave rectification full-bridge topology architecture, and a third end of the secondary winding of the isolation transformer T2 is electrically connected with a second end of the switch tube Q32. A first end of the switch tube Q31 is electrically connected with a first end of the switch tube Q32 and a first end of the inductor L4.

[0105] In the embodiment of the present application, the full-wave rectifier full-bridge topology architecture is suitable for products with an output voltage greater than 60V. When the source-load integrated power supply operates in power mode, the full-wave rectifier full-bridge topology architecture operates in a full-bridge topology. When the source-load integrated power supply operates in load mode, the full-wave rectifier full-bridge topology architecture operates in a push-pull topology.

[0106] like Figure 20 , which is a circuit diagram of a full-bridge rectifier topology architecture provided in an embodiment of the present application. Specifically, the full-bridge rectifier topology architecture includes switch tube Q33, switch tube Q34, switch tube Q35, switch tube Q36, switch tube Q37, switch tube Q38, switch tube Q39, switch tube Q40, switch tube Q41, switch tube Q42, switch tube Q43, switch tube Q44, switch tube Q45, switch tube Q46, switch tube Q47, switch tube Q48, isolation transformer T3, isolation transformer T4, capacitor C17 and capacitor C18; A first end of the switch Q33 is electrically connected to a first end of the switch Q35, a first end of the switch Q37, and a first end of the switch Q39, serving as a first positive end of the full-bridge rectifier topology. A second end of the switch Q33 is electrically connected to a first end of the switch Q34 and a first end of the primary coil of the isolation transformer T3. The second end of the switch tube Q34 is electrically connected to the second end of the switch tube Q36, the second end of the switch tube Q38, and the second end of the switch tube Q40, serving as the first negative end of the full-bridge rectifier full-bridge topology architecture; The second end of the switch tube Q35 is electrically connected to the first end of the switch tube Q36 and the second end of the primary coil of the isolation transformer T3; The second end of the switch tube Q37 is electrically connected to the first end of the switch tube Q38 and the first end of the primary coil of the isolation transformer T4; The second end of the switch tube Q39 is electrically connected to the first end of the switch tube Q40 and the second end of the primary coil of the isolation transformer T4; A first end of the secondary coil of the isolation transformer T3 is electrically connected to the second end of the switch tube Q41 and the first end of the switch tube Q42, and a second end of the secondary coil of the isolation transformer T3 is electrically connected to the second end of the switch tube Q43 and the first end of the switch tube Q44; The first end of the switch tube Q41 is electrically connected to the first end of the switch tube Q43 and the first end of the capacitor C17, serving as the second positive end of the full-bridge rectifier full-bridge topology architecture; The second end of the switch tube Q42 is electrically connected to the second end of the switch tube Q44, the second end of the capacitor C17, the first end of the switch tube Q45, the first end of the switch tube Q47 and the first end of the capacitor C18; The first end of the secondary coil of the isolation transformer T4 is electrically connected with the second end of the switch tube Q45 and the first end of the switch tube Q46, and the second end of the secondary coil of the isolation transformer T4 is electrically connected with the second end of the switch tube Q47 and the first end of the switch tube Q48. The second end of the switch tube Q46 is electrically connected with the second end of the switch tube Q48 and the second end of the capacitor C18, as the second negative end of the full-bridge rectification full-bridge topology architecture.

[0107] The filtering module 23 in the embodiment of the application can be an LC filtering circuit, a CLC filtering circuit or other filtering circuits, which are not limited in the embodiment of the application.

[0108] It should be noted that, Figure 18 , Figure 19 and Figure 20 In addition to the DC-DC conversion module, the filtering module is also included in the DC-DC conversion module.

[0109] The voltage and current sampling module 25 in the embodiment of the application can be a differential sampling circuit, and the positive and negative input ends of the differential operational amplifier are respectively connected with the positive phase end of the bus and the negative phase end of the bus, and the output differential signal is used as the output signal of the sampling module.

[0110] The source-load integrated power supply provided by the embodiment of the application can be applied in the following application scenarios: new energy field and energy storage system test, automatic production line and ATE system, lithium battery test system, DC power supply of switching power supply architecture requiring integration of power supply and load. The controllable load module is a carrier for realizing the load function, and the load consumes the input power when the power supply is reversely transmitted, so as to maintain the bus voltage constant through the independent analog constant voltage loop.

[0111] The embodiment of the application adopts an independent controllable constant voltage loop to realize controllable bus voltage. Compared with the traditional source-load integrated power supply, the controllable constant voltage loop has the advantages of simple structure, independent control, no conflict with the main power loop in loop control, cost saving, and improved stability of the power supply.

[0112] Those skilled in the art can make various modifications and variations to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application also intends to include these modifications and variations.

Claims

1. A source-load integrated power supply, characterized in that: include: AC-DC conversion module, DC-DC conversion module and controllable load module; The AC-DC conversion module is electrically connected to the DC-DC conversion module, and the controllable load module is electrically connected to a first DC bus between the AC-DC conversion module and the DC-DC conversion module; The AC-DC conversion module is used to convert an externally input first AC power into a first DC power when the source-load integrated power supply operates in the power supply mode; The DC-DC conversion module is configured to convert the first DC power into a second DC power and output the second DC power when the integrated power supply operates in the power supply mode, and to convert the third DC power inputted from the outside into a fourth DC power when the integrated power supply operates in the load mode; The controllable load module is configured to not operate when the source-load integrated power supply operates in a power mode, and to consume power input to the controllable load module when the source-load integrated power supply operates in a load mode.

2. The power supply according to claim 1, wherein: It also includes a voltage and current sampling module and a main control module; The sampling end of the voltage and current sampling module is electrically connected to the second DC bus at one end of the DC-DC conversion module outputting the second DC power, and the main control module is electrically connected to the control end of the DC-DC conversion module and the output end of the voltage and current sampling module respectively; The voltage and current sampling module is used to sample the DC power of the second DC bus to obtain a voltage signal and / or a current signal; The main control module is used to control the on and off of the switch tube in the DC-DC conversion module based on the voltage signal and / or the current signal.

3. The power supply according to claim 2, wherein: Also includes filtering module; The filter module is electrically connected to the DC-DC conversion module; The filtering module is used to filter the second DC power output by the DC-DC conversion module and output it to power the load when the source-load integrated power supply operates in the power supply mode; and to filter the third DC power input from the outside and output the filtered DC power to the DC-DC conversion module when the source-load integrated power supply operates in the load mode.

4. The power supply according to claim 2, wherein: The controllable load module is specifically used for: When the bus voltage of the first DC bus is greater than or equal to a preset threshold, the power input to the controllable load module is consumed.

5. The power supply according to claim 4, wherein: The controllable load module includes a first load driving circuit and a first heat dissipation circuit; The first load driving circuit is configured to output a driving signal for controlling the operation of the first heat dissipation circuit when the bus voltage is greater than or equal to the preset threshold; The first heat dissipation circuit is used to consume power input to the controllable load module under the control of the driving signal.

6. The power supply according to claim 5, wherein: The first load driving circuit includes a first resistor, a second resistor, a first capacitor and a first power amplifier; The first end of the first resistor is electrically connected to the positive bus of the first DC bus, and the second end of the first resistor is electrically connected to the first end of the second resistor and the non-inverting input terminal of the first power amplifier; The second end of the second resistor is electrically connected to the ground terminal of the first power amplifier and is grounded; The reverse input terminal of the first power amplifier is electrically connected to the first terminal of the first capacitor for inputting a reference voltage. The power supply terminal of the first power amplifier is used to input a first power supply voltage. The output terminal of the first power amplifier is electrically connected to the second terminal of the first capacitor for outputting the driving signal.

7. The power supply according to claim 5, wherein: The first load driving circuit includes a fourth resistor, a fifth resistor, a sixth capacitor, a second power amplifier and a digital-to-analog converter DAC; A first end of the fourth resistor is electrically connected to the positive busbar of the first DC busbar for inputting a busbar voltage, and a second end of the fourth resistor is electrically connected to the first end of the fifth resistor and the non-inverting input terminal of the second power amplifier; A second end of the fifth resistor is electrically connected to the ground terminal of the second power amplifier and is grounded; The second power amplifier has an inverting input terminal electrically connected to the DAC and the first terminal of the sixth capacitor, a power supply terminal of the second power amplifier is used to input a first power supply voltage, and an output terminal of the second power amplifier is electrically connected to the second terminal of the sixth capacitor for outputting the driving signal; The DAC is used to output a reference voltage.

8. The power supply according to claim 2, wherein: The main control module is further configured to send an enable signal to the controllable load module after determining that the source-load integrated power supply is operating in the load mode; The controllable load module is specifically configured to consume the power input to the controllable load module when receiving the enable signal and determining that the bus voltage of the first DC bus is greater than or equal to a preset threshold.

9. The power supply according to claim 8, wherein: The controllable load module includes a second load driving circuit and a first heat dissipation circuit; The second load driving circuit is configured to output a driving signal for controlling the operation of the first heat dissipation circuit when receiving the enable signal and determining that the bus voltage is greater than or equal to the preset threshold; The first heat dissipation circuit is used to consume power input to the controllable load module under the control of the driving signal.

10. The power supply according to claim 9, wherein: The second load driving circuit includes a ninth resistor, a tenth resistor, a seventh capacitor, a third power amplifier, and a first switch; a first end of the ninth resistor is electrically connected to the positive busbar of the first DC busbar for inputting the busbar voltage, and a second end of the ninth resistor is electrically connected to the first end of the tenth resistor and the non-inverting input end of the third power amplifier; The second end of the tenth resistor is electrically connected to the ground terminal of the third power amplifier and is grounded; an inverting input terminal of the third power amplifier electrically connected to the first terminal of the seventh capacitor for inputting a reference voltage, a power supply terminal of the third power amplifier electrically connected to the first terminal of the first switch, and an output terminal of the third power amplifier electrically connected to the second terminal of the seventh capacitor for outputting the driving signal; The second end of the first switch is used to input a first power supply voltage, and the control end of the first switch is electrically connected to the main control module and is used to receive the enable signal.

11. The power supply according to claim 9, wherein: The second load driving circuit includes an eleventh resistor, a twelfth resistor, an eighth capacitor, a fourth power amplifier and a second switch tube; The first end of the eleventh resistor is electrically connected to the first end of the positive bus of the first DC bus, and is used to input the bus voltage. The second end of the eleventh resistor is electrically connected to the non-inverting input end of the fourth power amplifier, the first end of the twelfth resistor, and the first end of the second switch tube. The second end of the twelfth resistor is electrically connected to the second end of the second switch tube and the ground end of the fourth power amplifier, and is grounded; The inverting input terminal of the fourth power amplifier is electrically connected to the first terminal of the eighth capacitor for inputting a reference voltage, the power supply terminal of the fourth power amplifier is used to input a first power supply voltage, and the output terminal of the fourth power amplifier is electrically connected to the second terminal of the eighth capacitor for outputting the driving signal; The control end of the second switch tube is electrically connected to the main control module and is used to receive the enable signal.

12. The power supply according to claim 9, wherein: The second load driving circuit includes a thirteenth resistor, a fourteenth resistor, a ninth capacitor, a fifth power amplifier, and a second switch; A first end of the thirteenth resistor is electrically connected to the positive bus of the first DC bus for inputting the bus voltage, and a second end of the thirteenth resistor is electrically connected to the first end of the fourteenth resistor and the non-inverting input terminal of the fifth power amplifier; A second end of the fourteenth resistor is electrically connected to the ground terminal of the fifth power amplifier and is grounded; The inverting input terminal of the fifth power amplifier is used to input a reference voltage, the power supply terminal of the fifth power amplifier is used to input a first power supply voltage, and the output terminal of the fifth power amplifier is electrically connected to the first terminal of the second switch; The second end of the second switch is electrically connected to the second end of the ninth capacitor for outputting the driving signal, and the control end of the second switch is electrically connected to the main control module for receiving the enable signal.

13. The power supply according to any one of claims 5 to 7 and 9 to 12, wherein: The first heat dissipation circuit includes at least one first heat dissipation sub-circuit; For each first heat dissipation sub-circuit, the first heat dissipation sub-circuit includes a first switching tube, a sixth resistor, a seventh resistor and an eighth resistor; a first end of the first switching tube is electrically connected to the positive busbar of the first DC bus, a second end of the first switching tube is electrically connected to the first end of the eighth resistor, and a control end of the first switching tube is electrically connected to the first end of the sixth resistor and the first end of the seventh resistor; The second end of the sixth resistor is used to input the driving signal; The second end of the seventh resistor and the second end of the eighth resistor are both grounded.

14. The power supply according to claim 2, wherein: The main control module is further configured to send an enable signal to the controllable load module when determining that the source-load integrated power supply is operating in a load mode; The controllable load module is specifically configured to consume the power input to the controllable load module after receiving the enable signal.

15. The power supply according to claim 14, wherein: The controllable load module includes a third load driving circuit and a second heat dissipation circuit; The first end of the third load driving circuit is used to input the enable signal, the second end of the third load driving circuit is electrically connected to the second end of the second heat dissipation circuit, the third end of the third load driving circuit is electrically connected to the third end of the second heat dissipation circuit, and is used to output a driving signal, and the first end of the second heat dissipation circuit is used to input the bus voltage of the first DC bus; The third load driving circuit is configured to output a driving signal for controlling the operation of the second heat dissipation circuit after receiving the enable signal; The second heat dissipation circuit is used to consume power input to the controllable load module under the control of the driving signal.

16. The power supply according to claim 15, wherein: The third load driving circuit includes a sixth power amplifier, a sixteenth resistor, a seventeenth resistor and a diode; The non-inverting input terminal of the sixth power amplifier serves as the first terminal of the third load driving circuit, the inverting input terminal of the sixth power amplifier is electrically connected to the anode of the diode, the first terminal of the sixteenth resistor, and the first terminal of the seventeenth resistor, the output terminal of the sixth power amplifier is electrically connected to the cathode of the diode and serves as the third terminal of the third load driving circuit, the power supply terminal of the sixth power amplifier is used to input a first power supply voltage, and the ground terminal of the sixth power amplifier is used to input a second power supply voltage; The second end of the sixteenth resistor serves as the second end of the third load driving circuit; A second end of the seventeenth resistor is grounded.

17. The power supply according to claim 15, wherein: The second heat dissipation circuit includes a switching subcircuit and at least one second heat dissipation subcircuit; In the case of including a second heat dissipation sub-circuit, the first end of the second heat dissipation sub-circuit and the second end of the second heat dissipation sub-circuit are both electrically connected to the third end of the on-off sub-circuit, and the third end of the second heat dissipation sub-circuit serves as the first end of the second heat dissipation circuit; In the case of including multiple second heat dissipation sub-circuits, the third end of the first-stage second heat dissipation sub-circuit is electrically connected to the first end of the next-stage second heat dissipation sub-circuit and the second end of the next-stage second heat dissipation sub-circuit, the first end of the first-stage second heat dissipation sub-circuit and the second end of the first-stage second heat dissipation sub-circuit are both electrically connected to the third end of the on-off sub-circuit, and the third end of the last-stage second heat dissipation sub-circuit serves as the first end of the second heat dissipation circuit; The first end of the on-off subcircuit serves as the second end of the second heat dissipation circuit, and the second end of the on-off subcircuit serves as the third end of the second heat dissipation circuit; The on-off sub-circuit is configured to conduct a path between the first terminal of the on-off sub-circuit and the third terminal of the on-off sub-circuit after receiving the driving signal; For each second heat dissipation sub-circuit, the second heat dissipation sub-circuit is configured to, after the path between the first end of the on-off sub-circuit and the third end of the on-off sub-circuit is conducted, conduct the path between the first end of the second heat dissipation sub-circuit and the third end of the second heat dissipation sub-circuit, and conduct the path between the second end of the second heat dissipation sub-circuit and the third end of the second heat dissipation sub-circuit.

18. The power supply according to claim 17, wherein: The on-off sub-circuit includes an eighteenth resistor, a nineteenth resistor, a twentieth resistor and a third switch tube; A first end of the eighteenth resistor is electrically connected to the first end of the nineteenth resistor and the first end of the third switch tube, and serves as the first end of the on-off sub-circuit, and a second end of the eighteenth resistor is grounded; The second end of the nineteenth resistor is electrically connected to the second end of the third switch tube and serves as the third end of the on-off sub-circuit; The first end of the twentieth resistor serves as the second end of the on-off sub-circuit, and the second end of the twentieth resistor is electrically connected to the control end of the third switch tube.

19. The power supply according to claim 17, wherein: The second heat dissipation sub-circuit includes a fourth switching tube, a twenty-first resistor and a voltage regulator tube; The first end of the fourth switch tube serves as the second end of the second heat dissipation sub-circuit, the second end of the fourth switch is electrically connected to the cathode of the voltage-stabilizing tube and serves as the third end of the second heat dissipation sub-circuit, and the control end of the fourth switch tube is electrically connected to the second end of the twenty-first resistor and the anode of the voltage-stabilizing tube; A first end of the twenty-first resistor serves as a first end of the second heat dissipation sub-circuit.

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