Global exposure image sensor, reading control method thereof, and electronic device

Abstract

The application discloses a global exposure image sensor, a reading control method thereof and electronic equipment, and relates to the technical field of image sensors. The global exposure image sensor comprises at least one global control switch, a readout module, a pixel array and a control module. The readout module comprises a plurality of first current source transistors, and the first current source transistors are connected with the global control switch. The pixel array comprises a plurality of pixel units arranged in m rows and n columns. Each column of pixel units is connected to the drain of one first current source transistor through a multiplexed output signal line. Each pixel unit comprises a basic pixel module, a sample-and-hold module and a signal amplification module connected in sequence. The output end of the signal amplification module is connected with the output signal line. The pixel array is connected with a second power supply. The control module is connected with the readout module, the pixel array and the gate of the global control switch respectively. The reset operation of the pixel array can be simplified, and the logic control cost and the circuit hardware cost are reduced.

Description

Technical Field

[0001] This application relates to the field of image sensor technology, and in particular to a global exposure image sensor, its readout control method, and electronic device. Background Technology

[0002] CMOS image sensors are widely used in various fields such as mobile phones, automotive driver assistance systems, security monitoring, industrial inspection, AR / VR wearable devices, and drones, meeting diverse video recording and image recognition needs. CMOS image sensors typically employ two exposure methods: Rolling Shutter (RS) and Global Shutter (GS). In rolling shutter image sensors, pixels in the pixel array are exposed and scanned line by line, primarily suitable for capturing images of static objects or environments. However, when capturing fast-moving scenes, distortion (the rolling shutter effect) occurs due to the difference in exposure times between different rows within an image. Global Shutter image sensors, on the other hand, expose all pixels in the pixel array simultaneously. After simultaneous exposure, the image signal is read from each pixel individually, ensuring synchronized exposure and eliminating distortion caused by the rolling shutter effect. Therefore, global shutter image sensors are better suited for capturing images of moving objects and provide excellent clarity.

[0003] Traditional global exposure pixel units employ a global exposure method that has several problems and drawbacks. Related technologies either involve setting up an independent bias current source within each pixel unit, which leads to high power consumption and circuit costs; or, in global exposure mode, power control is required to reset the pixel unit before sampling, and controlling multiple independent voltage sources in the pixel unit array for reset results in complex reset operations and high logic control and hardware costs. Summary of the Invention

[0004] This application aims to address at least one of the technical problems existing in the prior art. To this end, this application proposes a global exposure image sensor and its readout control method and electronic device, which can pull down the output signal line of each column in the pixel array by controlling a newly added global control switch. In conjunction with the control logic of the pixel array, the reset operation of the pixel array is simplified, and the logic control cost and circuit hardware cost are reduced.

[0005] In a first aspect, embodiments of this application provide a global exposure image sensor, including:

[0006] At least one global control switch;

[0007] The readout module includes multiple first current source transistors, which are connected to the global control switch.

[0008] A pixel array includes multiple pixel units arranged in m rows and n columns; wherein each column of pixel units is connected to the drain of a first current source transistor via a multiplexed output signal line; wherein each pixel unit includes: a basic pixel module, a sample-and-hold module, and a signal amplification module connected in sequence; the output terminal of the signal amplification module is connected to the output signal line; the pixel array is connected to a second power supply.

[0009] The control module is connected to the gates of the readout module, the pixel array, and the global control switch, respectively. The control module is configured to: respond to a first timing control signal in the global exposure mode, control the global control switch to turn on, pull up the current source gate voltage signal at the connection node between the first current source transistor and the global control switch, thereby pulling down the output signal of each column of pixel units; reset the sample-and-hold module based on the sampling timing control signal; after the reset is completed, control the global control switch to turn off, control the pixel units to perform global sampling processing, and control the readout module to read out each row of pixel units row by row.

[0010] Secondly, embodiments of this application provide a readout control method for a global exposure image sensor, characterized in that it is applied to a control module of a global exposure image sensor as described in any one of the embodiments of the first aspect, wherein the global exposure image sensor includes: a control module, a readout module connected to the control module, a pixel array, and at least one first global control switch; the readout module includes: a plurality of first current source transistors; the first current source transistors are connected to the first global control switch; the pixel array includes a plurality of pixel units arranged in m rows and n columns; each pixel unit includes: a basic pixel module, a sample-and-hold module, and a signal amplification module connected in sequence;

[0011] The read control method includes:

[0012] In response to the first timing control signal in the global exposure mode, the global control switch is turned on, and the current source gate voltage signal at the connection point between the first current source transistor in the readout module and the global control switch is pulled high, thereby pulling the output signal of each column of pixel units low. Based on the sampling timing control signal, the sample and hold module is reset.

[0013] After the reset process is completed, the global control switch is turned off, and the pixel unit is controlled to perform global sampling processing.

[0014] After the global sampling process is completed, the global control switch is kept off, and the readout module is controlled to read out each row of pixel units one by one.

[0015] Thirdly, embodiments of this application provide an electronic device including a global exposure image sensor as described in any of the embodiments of the first aspect.

[0016] The embodiments of this application include:

[0017] A global exposure image sensor includes: a control module, a readout module electrically connected to the control module, a pixel array, and at least one global control switch; wherein the readout module includes multiple first current source transistors connected to the global control switch; the pixel array includes multiple pixel units arranged in m rows and n columns; wherein each column of pixel units is connected to the drain of a first current source transistor via a multiplexed output signal line; wherein each pixel unit includes: a basic pixel module, a sample-and-hold module, and a signal amplification module connected in sequence; the output terminal of the signal amplification module is connected to the output signal line; the pixel array is connected to a second power supply; the circuit hardware cost is reduced by controlling the newly added global control switch and optimizing the external power supply; and the process of reading and controlling the global exposure image sensor is described. During the process, the control module, in response to the first timing control signal in the global exposure mode, controls the global control switch to be turned on, pulling up the current source gate voltage signal at the connection point between the first current source transistor in the readout module and the global control switch, thereby pulling down the output signal of each column of pixel units. Based on the sampling timing control signal, the sample-and-hold module is reset. After the reset process, the global control switch is turned off, and the pixel units are controlled to perform global sampling. After the global sampling process is completed, the global control switch remains off, and the readout module reads each row of pixel units row by row. By controlling the newly added global control switch, the output signal line of each column in the pixel array can be pulled down, which, in conjunction with the control logic of the pixel array, simplifies the reset operation of the pixel array and reduces the logic control cost. In other words, the solution of this application embodiment can, by controlling the newly added global control switch, pull down the output signal line of each column in the pixel array, which, in conjunction with the control logic of the pixel array, simplifies the reset operation of the pixel array and reduces the logic control cost and circuit hardware cost. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the overall structure of a global exposure image sensor provided in one embodiment of this application;

[0019] Figure 2 This is a schematic diagram of the specific structure of a global exposure image sensor with a global control switch provided in one embodiment of this application;

[0020] Figure 3 This is a schematic diagram of the specific structure of a pixel unit provided in one embodiment of this application;

[0021] Figure 4 This is a schematic diagram of the specific structure of a global exposure image sensor with multiple global control switches provided in one embodiment of this application;

[0022] Figure 5 This is a schematic diagram of the connection relationship when a global control switch is connected to each column of first current source transistors according to an embodiment of this application;

[0023] Figure 6 This is a flowchart illustrating the steps of a global exposure image sensor readout control method provided in one embodiment of this application;

[0024] Figure 7 This is a schematic diagram of the first timing control signal in the global exposure mode provided in one embodiment of this application;

[0025] Figure 8 This is a schematic diagram of the second timing control signal in the rolling exposure mode provided in one embodiment of this application. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments.

[0027] It should be noted that although a logical order is shown in the flowcharts in this application, in some cases, the steps shown or described may be performed in a different order than that shown in the flowcharts. In the description of this application, "several" means one or more, and "more" means two or more. The terms "first" and "second" are used only to distinguish technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of technical features indicated, or implicitly indicating the order in which the technical features are indicated.

[0028] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0029] This application discloses a global exposure image sensor and its readout control method and electronic device, relating to the field of image sensor technology. The global exposure image sensor includes: at least one global control switch; a readout module including multiple first current source transistors connected to the global control switch; a pixel array including multiple pixel units arranged in m rows and n columns; wherein each column of pixel units is connected to the drain of a first current source transistor via a multiplexed output signal line; wherein each pixel unit includes: a basic pixel module, a sample-and-hold module, and a signal amplification module connected in sequence; the output terminal of the signal amplification module is connected to the output signal line; the pixel array is connected to a second power supply; and a control module connected to the gates of the readout module, the pixel array, and the global control switch, respectively; this simplifies the reset operation of the pixel array and reduces logic control costs and circuit hardware costs.

[0030] The embodiments of this application will be further described below with reference to the accompanying drawings.

[0031] like Figure 1 As shown, the global exposure image sensor 1000 includes: a control module 200, a readout module 300 electrically connected to the control module 200, a pixel array 100, and at least one global control switch sw5. The specific structure of each functional module in the global exposure image sensor 1000 will be further explained below.

[0032] Specifically, such as Figure 2 , Figure 4 As shown, the readout module 300 includes a plurality of first current source transistors nm1; wherein, the first current source transistors nm1 are connected to the global control switch sw5; in addition, the readout module 300 also includes an analog-to-digital converter array (ADC ARRAY).

[0033] Specifically, such as Figure 2 and Figure 3 As shown, when each multiplexed output signal line is connected to only one first current source transistor nm1, and when the global exposure image sensor 1000 includes only one global control switch sw5, the source of the global control switch sw5 is connected to the gate of the first current source transistor nm1; the gate of the global control switch sw5 is connected to the control module 200; and the drain of the global control switch sw5 is connected to the first power supply VDDA. By controlling the on / off state of the global control switch sw5, the reset operation of the pixel array is simplified, and the logic control cost and circuit hardware cost are reduced.

[0034] Specifically, in some embodiments, when there are two first current source transistors nm1 connected in series on each multiplexed output signal line in the readout module 300 of the global exposure image sensor 1000, there are two rows of first current source transistors nm1 in the readout module 300. Two global control switches sw5 are then used to control the two rows of first current source transistors nm1 respectively. It is understood that the gates of both global control switches sw5 are connected to the control module 200; the control module 200 simultaneously controls the on / off states of both global control switches sw5, and the on / off states of the two global control switches sw5 are consistent. Therefore, in this application, the control logic of the method using two global control switches sw5 is the same as the control logic of the method using one global control switch sw5.

[0035] Specifically, such as Figure 4 As shown, in the readout module 300 of the global exposure image sensor 1000, when each column of multiplexed output signal lines is connected to only one first current source transistor nm1, a global control switch sw5 can be set corresponding to each column of first current source transistor nm1. In this case, the number of global control switches sw5 is the same as the number of first current source transistor nm1. The connection relationship between each column of first current source transistor nm1 and the corresponding connected global control switch sw5 is as follows: when there is one first current source transistor nm1 in each column, the gate of the global control switch sw5 is connected to the control module 200, the source of the global control switch sw5 is grounded, and the drain of the global control switch sw5 is connected to the drain of the first current source transistor nm1. Specifically, the control module 200 simultaneously controls the on / off states of multiple global control switches sw5, and the on / off states of the multiple global control switches sw5 are consistent. Therefore, in this application, the control logic of the method when using multiple global control switches sw5 is the same as the control logic of the method when using one global control switch sw5. It should be noted that by adding a global control switch sw5 to the first current source transistor nm1 of each column, the global control switch sw5 of each column will directly pull VPIX low when it is turned on, and the sampling capacitor will be reset in conjunction with the timing. However, setting a global control switch sw5 for each first current source transistor nm1 of each column requires more device area.

[0036] It is understood that the number of global control switches sw5 can be selected as needed, and this application does not impose a specific limit on the number of global control switches sw5. When the number of global control switches sw5 is different, the connection relationship between global control switches sw5 and the first current source transistor nm1 is different. Therefore, this application does not impose a specific limit on the connection relationship between global control switches sw5 and the first current source transistor nm1.

[0037] In some embodiments, such as Figure 2As shown, the global exposure image sensor 1000 also includes a second current source transistor nm0, and the connection relationship between the second current source transistor nm0 and the first current source transistor nm1 is as follows: Figure 2 As shown. The control logic of this application does not involve the second current source transistor nm0, and will not be described in detail here.

[0038] Specifically, in combination Figure 2 and Figure 3 The pixel array 100 includes multiple pixel units 110 arranged in m rows and n columns; each column of pixel units 110 is connected to a first current source transistor nm1 of the readout module 300 via a multiplexed output signal line VPIX; wherein, each pixel unit 110 includes: a basic pixel module 111, a sample-and-hold module 112, and a signal amplification module 113 connected in sequence; the output terminal of the signal amplification module 113 is connected to the output signal line VPIX. Specifically, Figure 2 In the middle, P00 represents pixel unit 110 in row 0 and column 0.

[0039] Specifically, let's further explain the global control switch SW5, such as... Figure 2 As shown, the drain of the global control switch sw5 is connected to the first power supply VDDA; the source of the global control switch sw5 is connected to the readout module 300 and the pixel array 100 through the first current source transistor nm1.

[0040] It is understandable that, such as Figure 1 As shown, the gate of the global control switch sw5 is used to receive the global reset control signal RST_GSC output by the control module 200; when the global reset control signal RST_GSC is high, the global control switch sw5 is turned on; when the global reset control signal RST_GSC is low, the global control switch sw5 is turned off. The on / off state of the global control switch sw5 is controlled by the control module 200.

[0041] like Figure 1 and Figure 2 As shown, the control module 200 is connected to the gates of the readout module 300, the pixel array 100, and the global control switch sw5, respectively. Specifically, the control module 200 includes a main control circuit 210 and a timing control unit 220; wherein, the output terminal of the main control circuit 210 is connected to the pixel array 100; and the output terminal of the timing control unit 220 is electrically connected to the main control circuit 210 and the readout module 300, respectively.

[0042] The control module 200 is used to: respond to the first timing control signal in the global exposure mode, control the global control switch sw5 to turn on, pull the current source gate voltage signal VBNPX at the connection node between the first current source transistor nm1 in the readout module 300 and the global control switch sw5 high, thereby pulling down the output signal of each column of pixel units 110; and perform a reset process on the sample-and-hold module 112 based on the sampling timing control signal. After the reset process is completed, control the global control switch sw5 to turn off, control the pixel units 110 to perform global sampling processing, and control the readout module 300 to perform readout operations on each row of pixel units 110 one row at a time.

[0043] In some embodiments, such as Figure 2 As shown, the global exposure image sensor 1000 also includes: a data processing unit 400, an interface module 500, and a power supply module 600; the output terminal of the readout module 300 is connected to the input terminal of the data processing unit 400; the output terminal of the data processing unit 400 is connected to the input terminal of the interface module 500; the interface module 500 is used to connect to other terminal devices. It should be noted that the same power supply can provide a second power supply VDDP to the pixel array 100; when a single global control switch sw5 is used, a first power supply VDDA is provided to the single global control switch sw5; or, different power supplies can be used to provide the first power supply VDDA and the second power supply VDDP.

[0044] Based on the global exposure image sensor 1000 provided in this application embodiment, during the reading control of the global exposure image sensor 1000, the control module 200, in response to the first timing control signal in the global exposure mode, controls the global control switch sw5 to be turned on, pulling the current source gate voltage signal VBNPX at the connection node between the first current source transistor nm1 in the readout module 300 and the global control switch sw5 high, thereby pulling down the output signal of each column of pixel units 110. Based on the sampling timing control signal, the sample-and-hold module 112 is reset. After the reset is completed, the global control switch sw5 is turned off, the pixel units 110 are controlled to perform global sampling, and the readout module 300 is controlled to read each row of pixel units 110 row by row. By controlling the newly added global control switch sw5, the output signal line of each column of the pixel array 100 can be pulled down, which, in conjunction with the control logic of the pixel array 100, simplifies the reset operation of the pixel array 100 and reduces the logic control cost. In other words, the solution in this application embodiment can pull down the output signal line of each column of the pixel array 100 by controlling the newly added global control switch sw5, and in conjunction with the control logic of the pixel array 100, simplify the reset operation of the pixel array, and reduce the logic control cost and circuit hardware cost.

[0045] The basic pixel module 111, sample and hold module 112, and signal amplification module 113 included in the pixel array 100 provided in the embodiments of this application will be further described.

[0046] like Figure 3 As shown, according to some embodiments of this application, the basic pixel module 111 includes: a photodiode D1, a pixel transmission control switch tx0, a pixel reset control switch rst, a first amplification drive transistor sf0, and a first control switch sw0.

[0047] In this configuration, one end of photodiode D1 is grounded, and the other end of photodiode D1 is connected to the source of pixel transmission control switch tx0. The gate of pixel transmission control switch tx0 is connected to control module 200. The drain of pixel transmission control switch tx0 is connected to the gate of first amplification driving transistor sf0 at floating node FD. The drains of pixel reset control switch rst and first amplification driving transistor sf0 are both connected to the second power supply VDDP. The sources of pixel reset control switch rst and first amplification driving transistor sf0 are connected to the drain of first control switch sw0. The gates of pixel reset control switch rst and first control switch sw0 are both connected to control module 200.

[0048] It is understandable that the gate of the pixel reset control switch rst is used to receive the pixel reset control signal RST sent by the control module 200. When the pixel reset control signal RST is high, the pixel reset control switch rst is turned on; when the pixel reset control signal RST is low, the pixel reset control switch rst is turned off.

[0049] Understandably, the gate of the first control switch sw0 is used to receive the first sampling enable signal SH_EN0. When the first sampling enable signal SH_EN0 is high, the first control switch sw0 is turned on; when the first sampling enable signal SH_EN0 is low, the first control switch sw0 is turned off.

[0050] Understandably, the pixel transmission control switch tx0 is used to receive the transmission control signal TX sent by the control module 200. When the transmission control signal TX is high, the pixel transmission control switch tx0 is turned on; when the transmission control signal TX is low, the pixel transmission control switch tx0 is turned off.

[0051] like Figure 3As shown, according to some embodiments of this application, the sample-and-hold module 112 includes: a second control switch sw1, a reset signal sampling storage unit, and an image signal sampling storage unit; wherein, the drain of the second control switch sw1 is connected to the source of the first control switch sw0, the gate of the second control switch sw1 is connected to the control module 200 and is used to receive the second sampling enable signal SH_EN1, the source of the second control switch sw1 is connected to the first terminal of the reset signal sampling storage unit and the first terminal of the image signal sampling storage unit respectively; the second terminal of the reset signal sampling storage unit is connected to the signal amplification module 113, and the second terminal of the image signal sampling storage unit is grounded.

[0052] It is understandable that the reset signal sampling storage unit and the image signal sampling storage unit are connected in parallel to form a parallel sampling module; the parallel sampling module is connected in series with the second control switch sw1.

[0053] It is understandable that when the second sampling enable signal SH_EN1 is high, the second control switch sw1 is turned on; when the second sampling enable signal SH_EN1 is low, the second control switch sw1 is turned off.

[0054] like Figure 3 As shown, according to some embodiments of this application, the reset signal sampling storage unit includes: a third control switch sw2 and a first sampling capacitor c1; wherein, the drain of the third control switch sw2 is connected to the source of the second control switch sw1; the source of the third control switch sw2 is grounded through the first sampling capacitor c1; the gate of the third control switch sw2 is connected to the control module 200 and is used to receive the first sampling control signal SH_RST.

[0055] like Figure 3 As shown, the image signal sampling and storage unit includes: a fourth control switch sw3 and a second sampling capacitor c2; wherein, the drain of the fourth control switch sw3 is connected to the source of the second control switch sw1; the source of the fourth control switch sw3 is grounded through the second sampling capacitor c2; the gate of the fourth control switch sw3 is connected to the control module 200 and is used to receive the second sampling control signal SH_SIG.

[0056] It is understandable that when the first sampling control signal SH_RST is high, the third control switch sw2 is turned on; when the first sampling control signal SH_RST is low, the third control switch sw2 is turned off.

[0057] It is understandable that when the second sampling control signal SH_SIG is high, the fourth control switch sw3 is turned on; when the second sampling control signal SH_SIG is low, the fourth control switch sw3 is turned off.

[0058] During the sampling operation, in one embodiment, in conjunction with the sampling timing control signal, when the second control switch sw1 and the third control switch sw2 are turned on and the fourth control switch sw3 is turned off, the first sampling capacitor c1 in the reset signal sampling storage unit is used for sampling to obtain the pixel reset sampling signal Vrst.

[0059] During the sampling operation, in one embodiment, in conjunction with the sampling timing control signal, when the second control switch sw1 and the fourth control switch sw3 are turned on and the third control switch sw2 is turned off, the second sampling capacitor c2 in the image signal sampling storage unit performs sampling to obtain the pixel image sampling signal Vsig.

[0060] like Figure 3 As shown, according to some embodiments of this application, the signal amplification module 113 includes: a second amplification driving transistor sf1 and a fifth control switch sw4; wherein, the drain of the second amplification driving transistor sf1 is connected to the first power supply VDDA, and the gate of the second amplification driving transistor sf1 is connected to the source of the third control switch sw2; the source of the second amplification driving transistor sf1 and the drain of the fifth control switch sw4 are both connected to the source of the first control switch sw0; the gate of the fifth control switch sw4 is connected to the control module 200 and is used to receive the mode selection control signal SEL_RG, and the source of the fifth control switch sw4 is connected to the output signal line VPIX as the output terminal of the signal amplification module 113.

[0061] Understandably, when the mode selection control signal SEL_RG is high, the fifth control switch sw4 is turned on; when the mode selection control signal SEL_RG is low, the fifth control switch sw4 is turned off. The on / off state of the fifth control switch sw4 is controlled by the control module 200.

[0062] Specifically, in the global exposure image sensor 1000 provided in this application embodiment, the global control switch sw5, the first current source transistor nm1, the pixel reset control switch rst, the first amplification drive transistor sf0, the first control switch sw0, the pixel transmission control switch tx0, the second control switch sw1, the third control switch sw2, the fourth control switch sw3, the second amplification drive transistor sf1, and the fifth control switch sw4 are all NMOS transistors.

[0063] In the global exposure image sensor 1000, the process of reading pixel units in global exposure mode includes a reset phase, a sampling phase, and a readout phase.

[0064] The control logic during the reset phase is as follows: The first control switch sw0 is disconnected, while the second control switch sw1, the third control switch sw2, the fourth control switch sw3, the fifth control switch sw4, and the global control switch sw5 are turned on to reset the first sampling capacitor c1 and the second sampling capacitor c2. Additionally, the pixel reset control switch rst is turned on to reset the floating node FD.

[0065] The control logic during the sampling phase is as follows: The fourth control switch sw3 and the global control switch sw5 are kept off, while the first control switch sw0, the second control switch sw1, the third control switch sw2, and the fifth control switch sw4 are turned on, sending the sampled pixel's reset sampling signal Vrst to the first sampling capacitor C1. The third control switch sw2 and the global control switch sw5 are kept off, while the first control switch sw0, the second control switch sw1, the fourth control switch sw3, and the fifth control switch sw4 are turned on, sending the sampled pixel's image sampling signal Vsig to the second sampling capacitor C2.

[0066] The control logic for the readout stage is as follows: The global control switch sw5 is turned off, and the first control switches sw0 and sw1 of all pixel units 110 are turned off; the fifth control switch sw4 of the pixel unit 110 to be read in the current row is turned on, and the third control switch sw2 and the fourth control switch sw3 are turned off. The pixel reset sampling signal Vrst sampled by the first sampling capacitor C1 is amplified by the second amplifying drive transistor sf1 and quantized by the readout module 300 to obtain the quantized reset signal; the third control switch sw4 of the pixel unit 110 to be read in the current row is turned on. When the second and fourth control switches sw3 are turned on, the average voltage signal is obtained by taking the sum of the pixel reset sampling signal Vrst sampled by the first sampling capacitor c1 and the pixel image sampling signal Vsig sampled by the second sampling capacitor c2. The average voltage signal is amplified by the second amplification driving transistor sf1 and quantized by the readout module 300 to obtain the quantized average voltage signal. The quantization reset signal is subtracted from the quantized average voltage signal to obtain the target image signal of the pixel unit 110 in the current row. After the readout operation is completed for each row of pixel units 110, the global exposure readout operation is completed for the pixel array 100.

[0067] Those skilled in the art will understand that the system structure shown in the figures does not constitute a limitation on the embodiments of this application, and may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0068] The system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0069] It will be understood by those skilled in the art that the system architecture and application scenarios described in the embodiments of this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided in the embodiments of this application. It is known by those skilled in the art that with the evolution of system architecture and the emergence of new application scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0070] Based on the aforementioned global exposure image sensor, various embodiments of the global exposure image sensor readout control method of this application are presented below.

[0071] Firstly, such as Figure 6 As shown, this global exposure image sensor readout control method can be applied to, for example... Figure 1 The control module of the global exposure image sensor shown includes: a control module, a readout module connected to the control module, a pixel array, and at least one global control switch; the readout module includes: a plurality of first current source transistors; the first current source transistors are connected to the first global control switch; the pixel array includes a plurality of pixel units arranged in m rows and n columns; each pixel unit includes: a basic pixel module, a sample and hold module, and a signal amplification module connected in sequence; the readout control method may include, but is not limited to, steps S110 to S130.

[0072] Step S110: In response to the first timing control signal in the global exposure mode, control the global control switch to turn on, pull up the current source gate voltage signal at the connection point between the first current source transistor and the global control switch, thereby pulling down the output signal of each column of pixel units, and perform a reset process on the sample-and-hold module based on the sampling timing control signal.

[0073] Step S120: After the reset process is completed, the global control switch is turned off, and the pixel unit is controlled to perform global sampling processing.

[0074] Step S130: After the global sampling process is completed, the global control switch is kept off, and the readout module is controlled to read out each row of pixel units one by one.

[0075] According to some embodiments of this application, the basic pixel module includes: a photodiode, a pixel transmission control switch, a pixel reset control switch, a first amplification driving transistor, and a first control switch; the sample-and-hold module includes: a second control switch, a reset signal sampling and storage unit, and an image signal sampling and storage unit; the reset signal sampling and storage unit includes: a third control switch and a first sampling capacitor; the image signal sampling and storage unit includes: a fourth control switch and a second sampling capacitor.

[0076] In one embodiment, the first timing control signal in step S110 is as follows: Figure 7 As shown.

[0077] Based on this, step S110 is further explained, wherein the reset process of the sample holding module includes, but is not limited to, steps S111 to S112.

[0078] Step S111: In global exposure mode, control the first control switch to be off and control the second control switch, the fifth control switch and the global control switch to be on.

[0079] Step S112: Control the first current source transistor to be in a pull-down state, ground the output signal line of each column multiplexed, control the third control switch and the fourth control switch to be turned on, and reset all the first sampling capacitors and the second sampling capacitors.

[0080] The global readout reset operation is completed through the logic control of steps S111 to S112.

[0081] It should be noted that when the first current source transistor is in the pull-down state, the first current source transistor is more fully turned on, thereby grounding the output signal line of each column multiplexed.

[0082] According to some embodiments of this application, step S120 is further described, wherein controlling the global control switch to be turned off and controlling the pixel unit to perform global sampling processing includes, but is not limited to, steps S121 to S123.

[0083] Step S121: Disconnect the global control switch, turn on the first control switch and the second control switch and disconnect the fifth control switch for each pixel unit, and turn on the pixel reset control switch to reset the floating node. After the floating node is reset, disconnect the pixel reset control switch.

[0084] Step S122: For each pixel unit, control the third control switch to be turned on and the fourth control switch to be turned off, and sample all pixel reset sampling signals through the first sampling capacitor.

[0085] Step S123: For each pixel unit, control the pixel transmission control switch to be turned on, and transmit the pixel photoelectric signal collected by the photodiode to the floating node. After the transmission is completed, control the pixel transmission control switch to be turned off, control the fourth control switch to be turned on and the third control switch to be turned off, and sample all pixel image sampling signals through the second sampling capacitor to complete the sampling.

[0086] The global sampling operation is completed through the logic control of steps S121 to S123.

[0087] According to some embodiments of this application, the signal amplification module includes: a second amplification driving transistor and a fifth control switch; further describing step S130, wherein the global control switch is kept off, and the readout module is controlled to perform readout operations on each row of pixel units row by row, including but not limited to steps S131 to S134.

[0088] Step S131: Control the global control switch to be turned off, and control the first control switch and the second control switch of all pixel units to be turned off; control the fifth control switch of the pixel unit to be read in the current row to be turned on, and the third control switch and the fourth control switch to be turned off. The pixel reset sampling signal sampled by the first sampling capacitor is amplified by the second amplification driving transistor and quantized by the readout module to obtain the quantized reset signal.

[0089] Step S132: Control the third and fourth control switches of the pixel unit to be read in the current row to be turned on, and take the average value of the sum of the pixel reset sampling signal sampled by the first sampling capacitor and the pixel image sampling signal sampled by the second sampling capacitor to obtain the average voltage signal; the average voltage signal is amplified by the second amplification driving transistor and quantized by the readout module to obtain the quantized average voltage signal.

[0090] Step S133: Subtract the quantization reset signal from the quantization average voltage signal to obtain the target image signal of the pixel unit in the current row;

[0091] Step S134: After completing the readout operation for each row of pixel units, complete the global exposure readout operation for the pixel array.

[0092] Through the logic control of steps S131 to S134, the global exposure readout operation is completed on the pixel array in global exposure mode.

[0093] Through steps S110 to S130, in the process of reading and controlling the global exposure image sensor, the control module, in response to the first timing control signal in the global exposure mode, controls the global control switch to be turned on, pulls up the current source gate voltage signal at the connection point between the first current source transistor and the global control switch, thereby pulling down the output signal of each column of pixel units. Based on the sampling timing control signal, the sample-and-hold module is reset. After the reset process, the global control switch is turned off, and the pixel units are controlled to perform global sampling. After the global sampling process is completed, the global control switch remains off, and the readout module reads each row of pixel units row by row. By controlling the newly added global control switch, the output signal line of each column in the pixel array can be pulled down, which, in conjunction with the control logic of the pixel array, simplifies the reset operation of the pixel array and reduces the logic control cost. In other words, the solution of this embodiment can, by controlling the newly added global control switch, pull down the output signal line of each column in the pixel array, which, in conjunction with the control logic of the pixel array, simplifies the reset operation of the pixel array and reduces the logic control cost and circuit hardware cost.

[0094] It should be emphasized that the global exposure image sensor of this application embodiment can operate not only in global exposure mode but also in rolling exposure mode. That is, the global exposure image sensor of this application embodiment is compatible with both global exposure mode and rolling exposure mode. The readout control method of the global exposure image sensor includes: readout control in global exposure mode and readout control in rolling exposure mode.

[0095] It should be noted that when using one, two, or multiple global control switches, all global control switches maintain the same on / off state. Even if the number of global control switches differs, the control logic involved in the global exposure image sensor readout control method remains consistent. Based on this, let's take an example, using an application scenario with one global control switch, combined with... Figure 7 The flow of the readout control method of the global exposure image sensor in global exposure mode provided in the embodiments of this application will be described in detail.

[0096] In global exposure mode, when resetting the photodiode D1 in the basic pixel module 111, the photodiode D1 is reset by simultaneously turning on the pixel reset control switch rst and the pixel transfer control switch tx0. The operation is the same and will not be described in detail here.

[0097] After the global exposure is completed, according to... Figure 7 The global read process performed by the first timing control signal shown is as follows:

[0098] T1 stage (perform a global reset operation on all pixel units):

[0099] When reading out in GS operating mode, the first sampling enable signal SH_EN0 is low and the first control switch sw0 is off; the second sampling enable signal SH_EN1 goes high and the second control switch sw1 is on; the mode selection control signal SEL_RG is high and the fifth control switch sw4 is on; the global reset control signal RST_GSC is high and the global control switch sw5 is on, the first current source transistor nm1 is on and pulls down the output voltage of the output signal line VPIX to ground. Then, the first sampling control signal SH_RST and the second sampling control signal SH_SIG simultaneously produce a high-level pulse, resetting the first sampling capacitor c1 and the second sampling capacitor c2 to 0 level, completing the reset operation before global sampling.

[0100] T2 stage (global sampling operation is performed on all pixel units):

[0101] Set the first sampling enable signal SH_EN0 high and turn on the first control switch sw0; set the second sampling enable signal SH_EN1 high and turn on the second control switch sw1; set the mode selection control signal SEL_RG low and turn off the fifth control switch sw4; set the global reset control signal RST_GSC low and turn off the global control switch sw5; set the pixel reset control signal RST high and turn on the pixel reset control switch rst, resetting all floating nodes FD; then set the first sampling control signal SH_RST high and turn on the third control switch sw0. When switch sw2 is turned on, all pixel reset sampling signals Vrst are sampled to the VRST node of the first sampling capacitor. By controlling the transmission control signal TX to be high, the pixel transmission control switch tx0 is turned on, transmitting the pixel photoelectric signals of photodiode D1 of all pixel units to their respective floating nodes FD. Then, the second sampling control signal SH_SIG is turned on, controlling the fourth control switch sw3 to be turned on, sampling the image photoelectric signals of all pixel units to the VSIG node on their respective second sampling capacitors c2. This completes the global sampling operation of the signals of all pixel units.

[0102] In stage T3 (the signal sampled from the pixel array is read out row by row), the following operations are performed on each row of pixel units in the pixel array:

[0103] In this stage, the first sampling enable signal SH_EN0, the second sampling enable signal SH_EN1, and the global reset control signal RST_GSC are set to low level, causing the first control switch sw0, the second control switch sw1, and the global control switch sw5 to be turned off. For the pixel unit of the current row to be processed, the mode selection control signal SEL_RG is set to high level, the fifth control switch sw4 is turned on, the first current source transistor nm1 is in a specific current source state, and the first sampling control signal SH_RST and the second sampling control signal SH_SIG are set to low level, causing the third control switch sw2 and the fourth control switch sw3 to be turned off. At this time, the pixel reset sampling signal sampled at the VRST node is amplified by the second amplification drive transistor sf1 and quantized by the external readout module to obtain the quantized reset signal Vrst. Then, the first sampling control signal S of the current row is... When H_RST and the second sampling control signal SH_SIG are both high-level pulses, the third control switch sw2 and the fourth control switch sw3 are turned on. The pixel reset sampling signals sampled by the first sampling capacitor c1 and the second sampling capacitor c2 are summed and averaged to obtain the average voltage signal level of the VRST node as (VRST+VSIG) / 2. After being amplified and output by the second amplification drive transistor sf1, the quantized average voltage signal is obtained by the external readout module: (Vrst+Vsig) / 2. This is then subtracted from the quantized reset signal Vrst obtained from the first quantization to obtain the target image signal δVsig=Vrst-(Vrst+Vsig) / 2=(Vrst-Vsig) / 2, thereby realizing the quantized readout of the target image signal δVsig after the current row CDS.

[0104] Repeat the above steps in stage T3 to read the target image signal of the next row of pixel units.

[0105] In summary, in global exposure mode, all pixel units in the pixel array are simultaneously reset and exposed. The exposure signal of each pixel is simultaneously sampled onto the first sampling capacitor C1 and the second sampling capacitor C2 within the pixel by the control switch and then read line by line starting from the first row.

[0106] For example, combined with Figure 8 The flow of the readout control method for the global exposure image sensor in rolling exposure mode provided in the embodiments of this application will be described in detail.

[0107] T1 stage (global reset operation for all pixel units): The global reset operation for all pixel units in rolling exposure mode is the same as the global reset operation for all pixel units in global exposure mode.

[0108] In phase T2, line-by-line read operations are performed:

[0109] If the second sampling enable signal SH_EN1, the first sampling control signal SH_RST, the second sampling control signal SH_SIG, and the global reset control signal RST_GSC are all low, then sw1, sw2, sw3, and sw5 are disconnected. If the first sampling enable signal SH_EN0 and the mode selection control signal SEL_RG are high, then sw0 and sw4 are turned on. Setting the pixel reset control signal RST to high level turns on the pixel reset control switch rst, resetting the floating node FD of the current row pixel unit. After amplification by sf0, the external readout module directly quantizes and obtains Vrst. By controlling the transmission control signal TX to high level, the pixel transmission control switch tx0 is turned on, transmitting the pixel photoelectric signals of the photodiodes D1 of all pixel units to their respective floating nodes FD. After amplification by sf0, the external readout module quantizes and obtains Vsig. Then, after circuit operation and subtraction by the readout module, the target image signal δVsig = Vrst - Vsig is obtained. This completes the quantization and readout of one row of CDS image signal δVsig.

[0110] Repeat the steps of stage T2 to read the target image signal of the next row of pixel units.

[0111] In summary, in the rolling exposure mode, this application reduces the number of components by multiplexing each column of output signal lines VPIX and simultaneously multiplexing the gating switches, ensuring that the pixel state in the rolling exposure mode is consistent with that of traditional rolling exposure pixels, with low noise and no loss of dynamic range (generally, RS mode signals need to pass through the sampling structure (second control switch sw1, third control switch sw2, and second amplification drive transistor sf1) in the global exposure image sensor). In the rolling exposure mode, the pixel array is reset and exposed row by row, with each row of pixel units being reset and exposed sequentially. After each row of exposure is completed, the image is read out directly, row by row, until all row image information is output.

[0112] In summary, the global exposure image sensor provided in this application has the following advantages: the global exposure image sensor is compatible with both rolling exposure (RS) and global exposure (GS) outputs; in global exposure mode, noise can be eliminated through CDS to output high-quality image signals; in global exposure mode, all pixel units are powered by an external single power supply, which is simple and easy to enhance, improving the power signal quality and thus improving the signal quality; a new switching and control logic is used in the sampling structure, cleverly controlling the pull-down of the output signal line of each column in the pixel array to achieve the reset operation of the first sampling capacitor C1 and the second sampling capacitor C2. It is evident that, compared with related technologies, this application does not require independent bias current within the pixel unit; nor does it require dynamic adjustment of the VRSF power supply for reset. Furthermore, in related technologies, true Correlated Double Sampling (CDS) cannot be achieved during signal readout, thus failing to eliminate the reset noise of floating diffusion (FD) nodes, resulting in significant readout noise during pixel output. Furthermore, due to the large leakage current at the floating nodes, the charge storage of later-read pixel signals is incomplete during signal reading in this pixel structure, which can affect the quality of the output image. This application addresses this issue by using CDS to eliminate noise and output high-quality image signals.

[0113] This application provides an electronic device, including a global exposure image sensor as provided in this application embodiment; it is compatible with both rolling exposure (RS) and global exposure (GS) outputs; and it can pull down the output signal line of each column in the pixel array by controlling a newly added global control switch, thereby simplifying the reset operation of the pixel array and reducing logic control costs and circuit hardware costs in conjunction with the control logic of the pixel array.

[0114] The above provides a detailed description of the preferred embodiments of this application. However, this application is not limited to the above-described embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of this application. All such equivalent modifications or substitutions are included within the scope defined by this application.

Claims

1. A global exposure image sensor, characterized by, include: At least one global control switch; The readout module includes multiple first current source transistors, which are connected to the global control switch. A pixel array includes multiple pixel units arranged in m rows and n columns; wherein each column of pixel units is connected to the drain of a first current source transistor via a multiplexed output signal line; wherein each pixel unit includes: a basic pixel module, a sample-and-hold module, and a signal amplification module connected in sequence; the output terminal of the signal amplification module is connected to the output signal line; the pixel array is connected to a second power supply. The control module is connected to the gates of the readout module, the pixel array, and the global control switch, respectively. The control module is configured to: respond to a first timing control signal in the global exposure mode, control the global control switch to turn on, pull up the current source gate voltage signal at the connection node between the first current source transistor and the global control switch, thereby pulling down the output signal of each column of pixel units; reset the sample-and-hold module based on the sampling timing control signal; after the reset is completed, control the global control switch to turn off, control the pixel units to perform global sampling processing, and control the readout module to read out each row of pixel units row by row.

2. The global exposure image sensor of claim 1, wherein, The basic pixel module includes: a photodiode, a pixel transmission control switch, a pixel reset control switch, a first amplifying driving transistor, and a first control switch; wherein, one end of the photodiode is grounded, and the other end of the photodiode is connected to the source of the pixel transmission control switch; the drain of the pixel transmission control switch and the gate of the first amplifying driving transistor are connected to a floating node; the drains of the pixel reset control switch and the first amplifying driving transistor are both connected to a second power supply, and the source of the pixel reset control switch and the source of the first amplifying driving transistor are connected to the drain of the first control switch; the gates of the pixel transmission control switch, the pixel reset control switch, and the first control switch are all connected to a control module; The gate of the pixel transmission control switch is used to receive a pixel transmission control signal, the gate of the pixel reset control switch is used to receive a pixel reset control signal, and the gate of the first control switch is used to receive a first sampling enable signal.

3. The global exposure image sensor of claim 2, wherein, The sample-and-hold module includes: a second control switch, a reset signal sampling and storage unit, and an image signal sampling and storage unit; wherein, the drain of the second control switch is connected to the source of the first control switch, the gate of the second control switch is connected to the control module and is used to receive a second sampling enable signal, the source of the second control switch is connected to the first terminal of the reset signal sampling and storage unit and the first terminal of the image signal sampling and storage unit respectively; the second terminal of the reset signal sampling and storage unit is connected to the signal amplification module, and the second terminal of the image signal sampling and storage unit is grounded.

4. The global exposure image sensor of claim 3, wherein, The reset signal sampling storage unit comprises a third control switch and a first sampling capacitor; the drain electrode of the third control switch is connected with the source electrode of the second control switch; the source electrode of the third control switch is grounded through the first sampling capacitor; the gate electrode of the third control switch is connected with the control module and is used for receiving a first sampling control signal; The image signal sampling storage unit comprises a fourth control switch and a second sampling capacitor; the drain electrode of the fourth control switch is connected with the source electrode of the second control switch; the source electrode of the fourth control switch is grounded through the second sampling capacitor; the gate electrode of the fourth control switch is connected with the control module and is used for receiving a second sampling control signal.

5. The global exposure image sensor of claim 4, wherein, The signal amplification module comprises a second amplification driving transistor and a fifth control switch; the drain electrode of the second amplification driving transistor is connected with a first power supply, the gate electrode of the second amplification driving transistor is connected with the source electrode of the third control switch; the source electrode of the second amplification driving transistor and the drain electrode of the fifth control switch are both connected with the source electrode of the first control switch; the gate electrode of the fifth control switch is connected with the control module and is used for receiving a mode selection control signal, and the source electrode of the fifth control switch is connected to the output signal line as the output end of the signal amplification module.

6. A read control method of a global exposure image sensor, characterized by, The control module is applied to the global exposure image sensor as claimed in any one of claims 1 to 5, and the global exposure image sensor comprises a control module, a readout module connected with the control module, a pixel array and at least one first global control switch; the readout module comprises a plurality of first current source transistors; the first current source transistors are connected with the first global control switch; the pixel array comprises a plurality of pixel units arranged in m rows and n columns; each pixel unit comprises a basic pixel module, a sample-and-hold module and a signal amplification module connected in sequence; The reading control method comprises: in response to a first timing control signal in a global exposure mode, controlling the global control switch to be turned on, pulling up the current source gate voltage signal at the connection point of the first current source transistor and the global control switch in the readout module, realizing that the output signals of each column of pixel units are pulled down, and performing reset processing on the sample-and-hold module based on a sampling timing control signal; after the reset processing is completed, controlling the global control switch to be turned off, and controlling the pixel units to perform global sampling processing; after the global sampling processing is completed, controlling the global control switch to remain turned off, and controlling the readout module to perform row-by-row readout operation on each row of pixel units.

7. The read control method of a global exposure image sensor according to claim 6, wherein The basic pixel module comprises a photodiode, a pixel transfer control switch, a pixel reset control switch, a first amplification driving transistor and a first control switch; the sample-and-hold module comprises a second control switch, a reset signal sample storage unit and an image signal sample storage unit; the reset signal sample storage unit comprises a third control switch and a first sample capacitor; the image signal sample storage unit comprises a fourth control switch and a second sample capacitor; the signal amplification module comprises a second amplification driving transistor and a fifth control switch; The reset processing of the sample-and-hold module comprises: In the global exposure mode, the first control switch is controlled to be turned off, and the second control switch, the fifth control switch and a global control switch are controlled to be turned on; The first current source transistor is controlled to be in a pull-down state, so that each column of multiplexed output signal lines are grounded, the third control switch and the fourth control switch are controlled to be turned on, and all the first sample capacitors and the second sample capacitors are reset.

8. The read control method of a global exposure image sensor according to claim 7, characterized by, The global control switch is controlled to be turned off, and the global sampling processing of the pixel unit comprises: The global control switch is controlled to be turned off, and the first control switch and the second control switch of each pixel unit are controlled to be turned on, the fifth control switch is controlled to be turned off, and the pixel reset control switch is turned on to reset the floating node; after the reset of the floating node is completed, the pixel reset control switch is turned off; The third control switch of each pixel unit is controlled to be turned on, and the fourth control switch is controlled to be turned off, so that all the pixel reset sampling signals are sampled through the first sample capacitors; The pixel transfer control switch of each pixel unit is controlled to be turned on, so that the pixel photoelectric signals collected through the photodiode are transmitted to the floating node; after the transmission is completed, the pixel reset control switch is controlled to be turned off, the fourth control switch is controlled to be turned on, and the third control switch is controlled to be turned off, so that all the pixel image sampling signals are sampled through the second sample capacitors, and the sampling is completed.

9. The read control method of a global exposure image sensor according to claim 7, wherein, The global control switch is controlled to be kept turned off, and the readout module performs row-by-row readout operation on each row of pixel units, comprising: The global control switch is controlled to be turned off, and the first control switch and the second control switch of all the pixel units are controlled to be turned off; the fifth control switch of the pixel unit to be read in the current row is controlled to be turned on, and the third control switch and the fourth control switch are controlled to be turned off; the pixel reset sampling signal sampled by the first sample capacitor is amplified through the second amplification driving transistor and quantized through the readout module to obtain a quantized reset signal; The third control switch and the fourth control switch of the pixel unit to be read in the current row are controlled to be turned on; the sum of the pixel reset sampling signal sampled by the first sample capacitor and the pixel image sampling signal sampled by the second sample capacitor is averaged to obtain a mean voltage signal; the mean voltage signal is amplified through the second amplification driving transistor and quantized through the readout module to obtain a quantized mean voltage signal; The quantized mean voltage signal is subtracted from the quantized reset signal to obtain a target image signal of the pixel unit in the current row. After the readout operation is completed for each row of pixel units, a global exposure readout operation is completed for the pixel array.

10. An electronic device, comprising: An image sensor comprising the global exposure image sensor of any one of claims 1 to 5.

Images