A circuit and method for real-time monitoring of the gate oxide health status of silicon carbide MOSFETs

Abstract

This invention relates to the technical field of health management of silicon carbide MOSFET devices, and particularly to a real-time monitoring circuit and method for the gate oxide health status of silicon carbide MOSFETs. The real-time monitoring circuit includes a differentiating circuit, a signal processing unit, and a monitoring output unit. It synchronously outputs a first specific monitoring signal when the first voltage spike signal during the turn-on phase of the silicon carbide MOSFET persists, and synchronously outputs a second specific monitoring signal when the second voltage spike signal during the turn-off phase of the silicon carbide MOSFET persists. The duration of the first and second specific monitoring signals reflects the gate oxide health status of the silicon carbide MOSFET. This invention effectively improves resolution and only acquires the gate signal, without requiring changes to the original operating states of devices such as the drive resistor. It maintains real-time online signal acquisition and low invasiveness, and is easy to integrate with the drive circuit.

Description

Technical Field

[0001] This invention relates to the technical field of health management of silicon carbide MOSFET devices, and in particular to a circuit and method for real-time monitoring of the gate oxide health status of silicon carbide MOSFETs. Background Technology

[0002] The reliability issues of silicon carbide MOSFETs can be mainly divided into chip reliability and package reliability. Chip reliability includes gate oxide degradation and body diode degradation. Silicon carbide MOSFETs can provide the high power, high frequency, and high temperature operation required for next-generation power electronics applications. However, long-term operation under high frequency, high temperature, and electric field stress will lead to gate oxide degradation, affecting device characteristics and even causing short-circuit faults, posing a danger to the converter system. Therefore, it is essential to monitor the gate oxide health status of silicon carbide MOSFETs in real time.

[0003] Current oxygen health monitoring technology still has the following problems:

[0004] First, it is not easy to integrate. Existing monitoring solutions often require the acquisition of multiple signals and signal processing modules, which necessitates the design of additional circuits. The introduction of these components directly leads to an increase in circuit design area.

[0005] Second, online measurement is difficult. Existing technical solutions require long time cycles for online monitoring, which may require a significant reduction in the operating frequency of power devices or even interruption of device operation in order to carry out measurements. This is not suitable for some scenarios that require continuous operation of power devices.

[0006] Third, the system is highly invasive. When existing technical solutions collect multiple signals, the monitoring module needs to be directly connected to the gate, source, and drain of the silicon carbide MOSFET, which will change the original operating state of the device and increase the device power consumption and failure risk.

[0007] To address the aforementioned issues, existing technologies urgently need improvement. Summary of the Invention

[0008] The purpose of this invention is to provide a real-time monitoring circuit and method for the gate oxide health status of silicon carbide MOSFETs, so as to improve integration, maintain real-time online signal acquisition of the monitoring circuit and minimize intrusion.

[0009] To address the aforementioned technical problems, this invention provides a circuit and method for real-time monitoring of the gate oxide health status of a silicon carbide MOSFET.

[0010] The silicon carbide MOSFET gate oxide health status real-time monitoring circuit of the present invention includes:

[0011] A differentiating circuit, connected to the gate of a silicon carbide MOSFET, is used to detect the gate voltage signal and convert the gate voltage signal into two voltage spike signals during the turn-on phase of the silicon carbide MOSFET, or to detect the gate voltage signal and convert the gate voltage signal into two voltage spike signals during the turn-off phase of the silicon carbide MOSFET.

[0012] The signal processing unit is connected to the output of the differentiating circuit and is connected to a reference voltage for comparison with the voltage spike signal. It is used to output a comparison signal reflecting the duration of the two voltage spike signals based on the comparison result.

[0013] A monitoring output unit, connected to the signal processing unit, receives the comparison signal and synchronously outputs a first specific monitoring signal when the first voltage spike signal during the turn-on phase of the silicon carbide MOSFET is continuous. The duration of the first specific monitoring signal is the time difference between the turn-on time of the silicon carbide MOSFET and the start time of the Miller plateau. Alternatively, a second specific monitoring signal is synchronously output when the second voltage spike signal during the turn-off phase of the silicon carbide MOSFET is continuous. The duration of the second specific monitoring signal is the time difference between the end time of the Miller plateau during the turn-off phase of the silicon carbide MOSFET and the complete turn-off time.

[0014] The time difference between the turn-on time and the start time of the Miller plateau in the turn-on phase of the silicon carbide MOSFET and / or the time difference between the end time of the Miller plateau and the complete turn-off time in the turn-off phase of the silicon carbide MOSFET are used to reflect the gate oxide health status of the silicon carbide MOSFET.

[0015] Furthermore, the signal processing unit includes a first voltage comparator and a second voltage comparator, both of which are connected to the output terminal of the differentiating circuit;

[0016] The differentiating circuit converts the gate signal into two positive voltage spikes during the turn-on phase of the silicon carbide MOSFET and into two negative voltage spikes during the turn-off phase of the silicon carbide MOSFET.

[0017] The first voltage comparator is used to output two first high-level comparison signals corresponding to the two positive voltage spike signals during the turn-on phase of the silicon carbide MOSFET; the second voltage comparator is used to output two second high-level comparison signals corresponding to the two negative voltage spike signals during the turn-off phase of the silicon carbide MOSFET.

[0018] The monitoring output unit synchronously outputs a first specific monitoring signal during the duration of the first high-level comparison signal, the duration of which is the time difference between the turn-on time of the silicon carbide MOSFET and the start time of the Miller plateau; the monitoring output unit synchronously outputs a second specific monitoring signal during the duration of the second high-level comparison signal, the duration of which is the time difference between the end time of the Miller plateau of the silicon carbide MOSFET turn-off phase and the complete turn-off time.

[0019] Furthermore, the monitoring output unit includes a signal conditioning unit and a signal judgment unit;

[0020] The signal conditioning unit includes a first D flip-flop and a second D flip-flop. The input terminal D of the first D flip-flop is not connected to the output terminal Q, and the input terminal D of the second D flip-flop is not connected to the output terminal Q. The clock signal input terminal of the first D flip-flop is connected to the first voltage comparator, and the clock signal input terminal of the second D flip-flop is connected to the second voltage comparator.

[0021] The signal determination unit includes a first AND gate, a second AND gate, and an OR gate;

[0022] The first AND gate is connected to the output terminal Q of the first D flip-flop, and is also connected to the first voltage comparator;

[0023] The second AND gate is not connected to the output terminal Q of the second D flip-flop, and is also connected to the second voltage comparator;

[0024] The outputs of both the first AND gate and the second AND gate are connected to the OR gate.

[0025] Furthermore, the inverting input of the first voltage comparator is connected to a first reference voltage, and the non-inverting input is connected to the differentiating circuit;

[0026] The positive input terminal of the second voltage comparator is connected to the second reference voltage, and the negative input terminal is connected to the differentiating circuit.

[0027] The voltage of the positive voltage spike signal is greater than the first reference voltage and the second reference voltage; the voltage of the negative voltage spike signal is less than the first reference voltage and the second reference voltage.

[0028] Furthermore, it also includes a microprocessor, which is configured to receive the first specific monitoring signal and the second specific monitoring signal and record the duration of the first specific monitoring signal and the second specific monitoring signal.

[0029] Furthermore, it also includes a programmable low-voltage source for providing power to the signal processing unit and the monitoring output unit.

[0030] This invention also provides a method for real-time monitoring of the gate oxide health status of a silicon carbide MOSFET, implemented using the real-time monitoring circuit for the gate oxide health status of a silicon carbide MOSFET as described in any of the above technical solutions, comprising:

[0031] To obtain the gate voltage of a silicon carbide MOSFET;

[0032] The gate voltage signal is detected during the turn-on and / or turn-off phases of the silicon carbide MOSFET and converted into two voltage spike signals.

[0033] The duration of the first voltage spike signal during the turn-on phase of the silicon carbide MOSFET is recorded as the time difference between the turn-on time of the silicon carbide MOSFET and the start time of the Miller plateau; and / or, the duration of the second voltage spike signal during the turn-off phase of the silicon carbide MOSFET is recorded as the time difference between the end time of the Miller plateau and the complete turn-off time of the silicon carbide MOSFET; the time difference between the turn-on time of the silicon carbide MOSFET and the start time of the Miller plateau and / or the time difference between the end time of the Miller plateau and the complete turn-off time of the silicon carbide MOSFET are used to reflect the gate oxide health state of the silicon carbide MOSFET.

[0034] Furthermore, the duration of the first voltage spike signal recorded during the turn-on phase of the silicon carbide MOSFET includes:

[0035] The voltage spike signal is compared with a reference voltage, and a comparison signal reflecting the duration of the two voltage spike signals is output based on the comparison result.

[0036] Receive the comparison signal;

[0037] The first voltage spike signal is determined based on the comparison signal, and a first specific monitoring signal is output synchronously while the first voltage spike signal is continuous. The duration of the first specific monitoring signal is the duration of the first voltage spike signal.

[0038] Furthermore, the duration of the second voltage spike signal recorded during the turn-off phase of the silicon carbide MOSFET includes:

[0039] The voltage spike signal is compared with a reference voltage, and a comparison signal reflecting the duration of the two voltage spike signals is output based on the comparison result.

[0040] Receive the comparison signal;

[0041] The second voltage spike signal is determined based on the comparison signal, and a second specific monitoring signal is output synchronously while the second voltage spike signal is continuous. The duration of the second specific monitoring signal is the duration of the second voltage spike signal.

[0042] Furthermore, during the turn-on phase of the silicon carbide MOSFET, the gate signal is converted into two positive voltage spike signals;

[0043] The duration of the first positive voltage spike signal is recorded as the time difference between the turn-on time of the silicon carbide MOSFET and the start time of the Miller plateau.

[0044] During the turn-off phase of the silicon carbide MOSFET, the gate signal is converted into two negative voltage spike signals;

[0045] The duration of the second negative voltage spike signal is recorded as the time difference between the end of the Miller plateau during the turn-off phase of the silicon carbide MOSFET and the moment of complete turn-off.

[0046] The sum of the time difference between the turn-on moment and the start of the Miller plateau in the turn-on phase of the silicon carbide MOSFET and the time difference between the end of the Miller plateau and the complete turn-off moment in the turn-off phase of the silicon carbide MOSFET is used to reflect the gate oxide health status of the silicon carbide MOSFET.

[0047] Compared with the prior art, the present invention has at least the following beneficial effects:

[0048] The gate voltage signal of the silicon carbide MOSFET is directly acquired by a differentiating circuit and converted into a voltage spike signal. Signal acquisition can be completed with only a single-point connection, avoiding the problem of connecting multiple electrodes required by traditional solutions and significantly reducing system invasiveness. The signal processing unit uses a comparator structure to detect the duration of the spike signal, and the circuit structure is simple and easy to integrate. The monitoring output unit realizes real-time extraction of time parameters by synchronously outputting monitoring signals, and can complete online measurement without interrupting device operation. The entire solution can effectively improve resolution through the coordinated work of three functional units. Only a single-point gate signal needs to be acquired to extract key time parameters reflecting the gate oxide health status without changing the original operating state of devices such as drive resistors. While reducing invasiveness, it achieves high integration and online monitoring capability, maintains real-time online signal acquisition and low invasiveness of the monitoring circuit, and is easy to integrate the silicon carbide MOSFET gate oxide health status real-time monitoring circuit of this application with the drive circuit. Attached Figure Description

[0049] Figure 1 This is a schematic diagram of an embodiment of the silicon carbide MOSFET gate oxide health status real-time monitoring circuit of the present invention;

[0050] Figure 2 for Figure 1 Timing diagram of the real-time monitoring circuit for the gate oxide health status of silicon carbide MOSFETs;

[0051] Figure 3 for Figure 1 The real-time monitoring circuit for the gate oxide health status of silicon carbide MOSFETs in the circuit monitors the signals of each module during the turn-on phase of the silicon carbide MOSFETs.

[0052] Figure 4 for Figure 1 The real-time monitoring circuit for the gate oxide health status of silicon carbide MOSFETs in the circuit monitors the signals of each module during the turn-off phase of the silicon carbide MOSFETs.

[0053] Figure 5 A schematic diagram illustrating the relationship between the gate oxide health of a silicon carbide MOSFET and monitoring parameters during accelerated gate oxide aging experiments. Detailed Implementation

[0054] The following description, with reference to schematic diagrams, illustrates the real-time monitoring circuit and method for the gate oxide health status of silicon carbide MOSFETs according to the present invention. Preferred embodiments of the invention are shown. It should be understood that those skilled in the art can modify the invention described herein while still achieving its advantageous effects. Therefore, the following description should be understood as being of general knowledge to those skilled in the art and is not intended to limit the invention. Based on the teachings of this specification, those skilled in the art can form new technical solutions through cross-combinations of different implementation methods without creating technical contradictions; such modifications should all be considered to fall within the protection scope of this patent.

[0055] The serial numbers assigned to components in this document, such as "first," "second," etc., are merely used to distinguish the described objects and have no sequential or technical meaning. The terms "connection" and "linkage" used in this application, unless otherwise specified, include both direct and indirect connections (linkages). In the description of this invention, it should be understood that the terms "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention.

[0056] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "over," and "on top" of the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0057] In this application, unless otherwise expressly specified and limited, the term "connection" should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral part; it can be a direct connection or an indirect connection through an intermediate medium. Furthermore, the term "electrical connection" can be a direct electrical connection or an indirect electrical connection through an intermediate medium.

[0058] The invention is described more specifically by way of example in the following paragraphs with reference to the accompanying drawings. The advantages and features of the invention will become clearer from the following description and claims. It should be noted that the drawings are in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the invention.

[0059] The inventors discovered that the formation principle of the Miller plateau originates from the voltage stagnation phenomenon caused by Miller capacitance during the switching process of a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor). Specifically, during the turn-on phase, when the gate voltage V... GS After rising to the Miller plateau voltage, the drain-source voltage V DS The gate-drain parasitic capacitance C begins to decrease. GD Instantaneous absorption of drive current, resulting in gate voltage V GS It remains almost constant for a period of time (Miller plateau); during the turn-off phase, the drain-source voltage V0 remains almost constant. DS Gate-drain parasitic capacitance C during rise GD Discharge also produces a Miller plateau.

[0060] Further research by the inventors revealed that as the gate oxide layer of the silicon carbide MOSFET ages, the time difference between the turn-on moment and the start of the Miller plateau (denoted as T1) and the time difference between the end of the Miller plateau and the complete turn-off moment (denoted as T2) of the turn-off phase both increase due to the influence of the device's own parameters. To reduce system invasiveness, the inventors proposed a new approach to monitor the gate oxide health of the silicon carbide MOSFET: by monitoring the duration of voltage changes in the gate signal of the silicon carbide MOSFET at the turn-on or turn-off moments, the time difference between the turn-on moment and the start of the Miller plateau or the time difference between the end of the Miller plateau and the complete turn-off moment of the turn-off phase is recorded to reflect the gate oxide health of the silicon carbide MOSFET.

[0061] Based on this idea, this invention proposes a circuit and method for real-time monitoring of the gate oxide health status of silicon carbide MOSFETs.

[0062] The following is in conjunction with the instruction manual appendix. Figure 1 To be continued Figure 5 This paper introduces the real-time monitoring circuit and method for the gate oxide health status of silicon carbide MOSFETs according to the present invention.

[0063] In some embodiments, the silicon carbide MOSFET gate oxide health status real-time monitoring circuit includes a differentiating circuit, a signal processing unit, and a monitoring output unit.

[0064] The differentiating circuit is connected to the gate of the silicon carbide MOSFET and is used to detect the gate voltage signal and convert it into two voltage spike signals during the turn-on phase of the silicon carbide MOSFET, or to detect the gate voltage signal and convert it into two voltage spike signals during the turn-off phase of the silicon carbide MOSFET. The differentiating circuit can be implemented using an RC differentiating network, and the selection of the differentiating time constant must ensure accurate extraction of the gate voltage change rate.

[0065] The signal processing unit is connected to the output of the differentiating circuit and is connected to a reference voltage for comparison with the voltage spike signal. It is used to output a comparison signal reflecting the duration of the two voltage spike signals based on the comparison result.

[0066] The monitoring output unit is connected to the signal processing unit to receive the comparison signal and synchronously output a first specific monitoring signal when the first voltage spike signal of the silicon carbide MOSFET turn-on phase is continuous. The duration of the first specific monitoring signal is the time difference between the turn-on time of the silicon carbide MOSFET turn-on phase and the start time of the Miller plateau. Alternatively, a second specific monitoring signal is synchronously output when the second voltage spike signal of the silicon carbide MOSFET turn-off phase is continuous. The duration of the second specific monitoring signal is the time difference between the end time of the Miller plateau of the silicon carbide MOSFET turn-off phase and the complete turn-off time.

[0067] The time difference between the turn-on time and the start time of the Miller plateau in the turn-on phase of the silicon carbide MOSFET and / or the time difference between the end time of the Miller plateau and the complete turn-off time in the turn-off phase of the silicon carbide MOSFET are used to reflect the gate oxide health status of the silicon carbide MOSFET.

[0068] The gate voltage signal of the silicon carbide MOSFET is directly acquired by a differentiating circuit and converted into a voltage spike signal. Signal acquisition can be completed with only a single-point connection, avoiding the problem of connecting multiple electrodes required by traditional solutions and significantly reducing system invasiveness. The signal processing unit uses a comparator structure to detect the duration of the spike signal, and the circuit structure is simple and easy to integrate. The monitoring output unit realizes real-time extraction of time parameters by synchronously outputting monitoring signals, and can complete online measurement without interrupting device operation. The entire solution can effectively improve resolution through the coordinated work of three functional units. Only a single-point gate signal needs to be acquired to extract key time parameters reflecting the gate oxide health status without changing the original operating state of devices such as drive resistors. While reducing invasiveness, it achieves high integration and online monitoring capability, maintains real-time online signal acquisition and low invasiveness of the monitoring circuit, and is easy to integrate the silicon carbide MOSFET gate oxide health status real-time monitoring circuit of this application with the drive circuit. In some embodiments, the present invention can reflect the gate oxide health state of the silicon carbide MOSFET by the sum of the time difference between the turn-on time and the start time of the Miller plateau during the turn-on phase and the time difference between the end time of the Miller plateau and the complete turn-off time during the turn-off phase, i.e., the sum of T1 and T2. Compared with reflecting it by only T1 or only T2, this can amplify the aging signal and greatly improve the sensitivity. In other embodiments, for the sake of circuit simplification, the gate oxide health state of the silicon carbide MOSFET can also be reflected by only T1 or only T2.

[0069] The following description uses the sum of T1 and T2 to reflect the gate oxide health status of a silicon carbide MOSFET as an example to illustrate the real-time monitoring circuit for the gate oxide health status of a silicon carbide MOSFET of the present invention.

[0070] In some of these embodiments, such as Figure 1 As shown, the signal processing unit includes a first voltage comparator U1 and a second voltage comparator U2, both connected to the output of the differentiating circuit. The differentiating circuit converts the gate signal into two positive voltage spikes during the silicon carbide MOSFET turn-on phase and into two negative voltage spikes during the silicon carbide MOSFET turn-off phase. The first voltage comparator U1 outputs two first high-level comparison signals corresponding to the two positive voltage spikes during the silicon carbide MOSFET turn-on phase; the second voltage comparator U2 outputs two second high-level comparison signals corresponding to the two negative voltage spikes during the silicon carbide MOSFET turn-off phase. The monitoring output unit synchronously outputs a first specific monitoring signal during the duration of the first first high-level comparison signal, the duration of which is the time difference between the turn-on time of the silicon carbide MOSFET turn-on phase and the start time of the Miller plateau; the monitoring output unit synchronously outputs a second specific monitoring signal during the duration of the second second high-level comparison signal, the duration of which is the time difference between the end time of the Miller plateau during the silicon carbide MOSFET turn-off phase and the complete turn-off time.

[0071] Specifically, the first voltage comparator U1 and the second voltage comparator U2 can be implemented using operational amplifiers with different threshold voltage settings. The positive input terminal of the first voltage comparator U1 is connected to the output of the differentiating circuit, and the inverting input terminal is connected to the first reference voltage V. REF1 The inverting input of the second voltage comparator U2 is connected to the output of the differentiating circuit, and the non-inverting input is connected to the second reference voltage V. REF2 The voltage of the positive voltage spike signal is greater than the first reference voltage V. REF1 Second reference voltage V REF2 The voltage of the negative voltage spike signal is less than the first reference voltage V. REF1 Second reference voltage V REF2 Among them, the first reference voltage V REF1 Second reference voltage V REF2 This can be achieved using a programmable reference voltage source, where different reference voltage thresholds can be set by adjusting the output value of the reference voltage source. The differentiating circuit, which can be an RC differentiating circuit or a differentiating circuit composed of an operational amplifier, is used to extract the rate of change of the gate voltage signal. This enables accurate differentiation of opposite polarity signals generated by the silicon carbide MOSFET at different operating stages.

[0072] In one preferred embodiment, the first reference voltage V REF1 Set to a potential slightly above zero to identify positive voltage spikes; second reference voltage V REF2Set slightly below zero potential to identify negative voltage spikes. The differentiating circuit can be constructed from an RC differentiating network, and its time constant needs to be optimized based on the switching frequency of the silicon carbide MOSFET. The monitoring output unit can achieve signal synchronization through D flip-flops, where the first D flip-flop U3 is triggered by the first voltage comparison signal, and the second D flip-flop U4 is triggered by the second voltage comparison signal, thereby ensuring strict synchronization between the monitoring signal and the spike signal.

[0073] By setting up independent first voltage comparators U1 and second voltage comparators U2, the positive voltage spike signal during the turn-on phase and the negative voltage spike signal during the turn-off phase are processed separately, effectively avoiding the signal polarity confusion problem. The monitoring output unit accurately captures the duration of the first positive voltage spike signal and the second negative voltage spike signal through a synchronous output mechanism, thereby accurately reflecting the gate oxide health status.

[0074] Further, in some embodiments, the monitoring output unit includes a signal conditioning unit and a signal judgment unit. The signal conditioning unit includes a first D flip-flop U3 and a second D flip-flop U4. The input terminal D of the first D flip-flop U3 is not connected to its output terminal Q. The input terminal D of the second D flip-flop U4 is not connected to its output terminal Q. The clock signal input terminal CLK of the first D flip-flop U3 is connected to the first voltage comparator U1. The clock signal input terminal CLK of the second D flip-flop U4 is connected to the second voltage comparator U2. The signal judgment unit includes a first AND gate AND1, a second AND gate AND2, and an OR gate OR. The first AND gate AND1 is connected to the output terminal Q of the first D flip-flop U3 and is also connected to the first voltage comparator U1. The second AND gate AND2 is not connected to the output terminal Q of the second D flip-flop U4 and is also connected to the second voltage comparator U2. The output terminals of both the first AND gate AND1 and the second AND gate AND2 are connected to the OR gate OR.

[0075] Specifically, both the first D flip-flop U3 and the second D flip-flop U4 are rising-edge triggered D flip-flops, and their clock signal inputs receive pulse signals from the first voltage comparator U1 and the second voltage comparator U2, respectively. One input of the first AND gate AND1 is connected to the Q output of the first D flip-flop U3, and the other input is directly connected to the output of the first voltage comparator U1. One input of the second AND gate AND2 is connected to the Q NOT output of the second D flip-flop U4, and the other input is directly connected to the output of the second voltage comparator U2. The OR gate is a two-input OR gate, with its inputs connected to the outputs of the first AND gate AND1 and the second AND gate AND2, respectively.

[0076] In this embodiment, signal synchronization processing is achieved through digital logic circuits to avoid timing errors caused by analog circuits. By disconnecting the input terminal D and output terminal Q of the first D flip-flop U3, and the input terminal D and output terminal Q of the second D flip-flop U4, the signal conditioning unit forms a frequency divider circuit, converting the pulse signal output by the voltage comparator into a square wave signal with a constant duty cycle, ensuring the monitoring signal V... OUT The time measurement reference is stable. The first D flip-flop U3 divides the high-level comparison signal during the turn-on phase by two, and the second D flip-flop U4 divides the high-level comparison signal during the turn-off phase by two. The signal judgment unit uses logic gates to filter signals: the first AND gate AND1 performs a logical AND operation between the divided turn-on signal and the original comparison signal to accurately capture the first positive voltage spike; the second AND gate AND2 performs a logical AND operation between the divided turn-off signal and the original comparison signal to accurately capture the second negative voltage spike. An OR gate combines the judgment results of the two operating states and outputs a unified monitoring signal V. OUT This eliminates jitter interference in the comparison signal, ensuring accurate timing measurement start point; AND gate logic enables precise filtering of spike signals, retaining only the duration information of the first positive voltage spike and the second negative voltage spike; OR gates provide a unified output interface for signals in both operating modes. This embodiment completes signal synchronization and logic judgment at the hardware level, requiring no software intervention, and meets the real-time requirements of high-frequency switching scenarios.

[0077] Furthermore, in some embodiments, the silicon carbide MOSFET gate oxide health status real-time monitoring circuit further includes a microprocessor (MCU), which is used to receive the output monitoring signal and record the monitoring signal V. OUT The duration.

[0078] Specifically, the microprocessor (MCU) receives the digital signal from the monitoring output unit and uses an internal timer module to precisely record the duration of the high-level signal. The timer can be configured for input capture mode, measuring the pulse width by capturing the signal edge trigger timestamps.

[0079] The monitoring process is automated by introducing a microprocessor. The pulse signal generated by the monitoring output unit is acquired in real time by the microprocessor, which uses its high-precision timing function to record the pulse width, which directly corresponds to the key timing parameters of the silicon carbide MOSFET. Compared to manual oscilloscope measurements, this eliminates human reading errors, improving measurement accuracy to the nanosecond level. The microprocessor can continuously record the time data of multiple switching cycles, improving measurement reliability through statistical analysis. The automatic data storage function avoids omissions or errors that may occur with manual recording, providing complete data support for long-term aging trend analysis.

[0080] Furthermore, in some embodiments, the silicon carbide MOSFET gate oxide health status real-time monitoring circuit further includes a programmable low-voltage source for providing power to the signal processing unit and the monitoring output unit.

[0081] Specifically, a programmable low-voltage source refers to a DC power supply module whose output voltage can be adjusted via digital or analog signals. Specific implementation methods include, but are not limited to, using an architecture combining a digital potentiometer and a reference voltage source, or sending PWM signals to control the output voltage of a switching power supply.

[0082] The programmable power supply design enables dynamic adjustment of the supply voltage, providing precise voltage values ​​according to the actual operating requirements of the signal processing unit and the monitoring output unit. When the monitoring circuit is in different operating modes, such as in the high-frequency switching state of the silicon carbide MOSFET, the supply voltage can be increased accordingly to ensure the response speed of the signal processing unit; in standby mode, the voltage can be reduced to reduce power consumption.

[0083] The following is combined with Figure 1 , Figure 2 , Figure 3 , Figure 4 and Figure 5 The operation of one embodiment of the silicon carbide MOSFET gate oxide health status real-time monitoring circuit will be described.

[0084] When the silicon carbide MOSFET device is in the off state, the output voltage V of the differentiating circuit is... R The voltage at the positive input terminal of the first voltage comparator U1 and the voltage at the inverting input terminal of the second voltage comparator U2 are both 0V.

[0085] Therefore, the voltage V at the positive input terminal of the first voltage comparator U1 R Less than the first reference voltage V at the inverting input terminal REF1 The first voltage comparator U1 outputs a low level, therefore the first AND gate AND1 outputs a low level. The second reference voltage V at the positive input of the second voltage comparator U2... REF2 Less than the voltage V at the inverting input terminal R The second voltage comparator U2 outputs a low level, therefore the second AND gate AND2 outputs a low level, and finally the OR gate outputs the monitoring signal V. OUT It is a low level.

[0086] When a PWM turn-on signal is input to the silicon carbide MOSFET device through the drive circuit, that is, when an 18V drive signal is applied to the gate, the gate voltage V GSStarting from 0V or a negative voltage, the voltage rises. Due to the characteristics of the Miller plateau, the gate voltage remains almost constant during the Miller plateau period. The differentiating circuit is only sensitive to the rapidly changing voltage portion. At this time, the differentiating circuit outputs two positive voltage spike signals V. R The second reference voltage V at the positive input terminal of the second voltage comparator U2 REF2 The positive voltage spike signal V, which is always less than the inverting input, will be... R Therefore, the output voltage V U2 When the level is low, the second AND gate AND2 will remain low.

[0087] The voltage V at the positive input terminal of the first voltage comparator U1 R Greater than the first reference voltage V at the inverting input terminal REF1 The first voltage comparator U1 outputs voltage V. U1 These are two first high-level comparison signals. Since the first D flip-flop U3 is triggered on the rising edge and its input terminal D is not connected to its output terminal Q, the initial state of the first D flip-flop U3 is that the output terminal Q is low and Q is not high, so the input terminal is also high.

[0088] The output of the first voltage comparator U1 is connected to the clock signal input CLK of the first D flip-flop U3. When the first high-level comparison signal arrives, the first D flip-flop U3 is triggered by the rising edge of the first high-level comparison signal. At this time, the output Q of the first D flip-flop U3 becomes high, and Qnot becomes low. Therefore, the input D also becomes low. At this time, both inputs of the first AND gate AND1 are high, and the output of the first AND gate AND1 is high. Therefore, the monitoring signal V output by the OR gate OR is high. OUT It is at a high level, serving as the first specific monitoring signal.

[0089] When the first high-level comparison signal ends, one of the inputs of the first AND gate AND1 goes low, so the output of the first AND gate AND1 goes low, and the monitoring signal output of the OR gate OR also goes low.

[0090] When the second first high-level comparison signal arrives, the first D flip-flop U3 is triggered again by the rising edge of the voltage signal. At this time, the output terminal Q becomes low, so the output terminal of the first AND gate AND1 remains low.

[0091] At this time, the duration of the monitoring signal output by the OR gate being at a high level is the time difference T1 between the turn-on time of the silicon carbide MOSFET and the start time of the Miller plateau.

[0092] When a turn-off signal is applied to a silicon carbide MOSFET device, i.e., 0V or a negative voltage is applied to the gate, the gate voltage V GSStarting from 18V, the voltage drops. Due to the characteristics of the Miller plateau, the gate voltage remains almost constant during the Miller plateau period. The differentiating circuit is only sensitive to the rapidly changing voltage portion. At this time, the differentiating circuit outputs two negative voltage spike signals V. R The voltage V at the positive input terminal of the first voltage comparator U1 R Always less than the first reference voltage V at the inverting input terminal REF1 Output voltage V U1 When the level is low, the output of the first AND gate AND1 will remain low.

[0093] The second reference voltage V at the positive input terminal of the second voltage comparator U2 REF2 Greater than the inverting input voltage V R The output voltage V of the second voltage comparator U2 These are two second high-level comparison signals.

[0094] Since the second D flip-flop U4 is triggered on the rising edge, and its input terminal D is not connected to its output terminal Q, the initial state of the D flip-flop is that the output terminal Q is low and Q is not high, so the input terminal is also high.

[0095] The output of the second voltage comparator U2 is connected to the clock signal input CLK of the second D flip-flop U4. When the first second high-level comparison signal arrives, the second D flip-flop U4 is triggered by the rising edge of the second high-level comparison signal. At this time, the output Q of the second D flip-flop U4 becomes high, and Qnot becomes low. Therefore, the input D also becomes low. The Qnot of the second D flip-flop U4 is connected to one of the inputs of the second AND gate AND2. At this time, one of the two inputs of the second AND gate AND2 is high and the other is low. Therefore, the second AND gate AND2 remains low. At this time, the monitoring signal V output by the OR gate... OUT It also remains at a low level.

[0096] When the second high-level comparison signal arrives, the second D flip-flop U4 is triggered again by the rising edge of the second high-level comparison signal. At this time, the output Q of the second D flip-flop U4 goes low, and Qnot goes high, so the input D also goes high. At this time, both inputs of the second AND gate AND2 are high, so the second AND gate AND2 changes from low to high. The monitoring signal V output by the OR gate at this time... OUT It also changes from a low level to a high level, serving as a second specific monitoring signal.

[0097] When the second high-level comparison signal ends, that is, when the output of the second voltage comparator U2 goes low, the inputs of the second AND gate AND2 are one low and one high, and the output of the second AND gate AND2 changes from high to low. At this time, the monitoring signal output of the OR gate also changes from high to low.

[0098] At this time, the duration of the monitoring signal output by the OR gate being at a high level is the time difference T2 between the end of the Miller plateau during the turn-off phase of the silicon carbide MOSFET and the moment of complete turn-off.

[0099] The times T1 and T2 both increase as the gate oxide of the silicon carbide MOSFET degrades. After processing T1 and T2 by the MCU, the sum of T1 and T2 can be obtained as the time parameter. Compared with reflecting the time by only T1 or only T2, the aging signal can be amplified and the sensitivity is greatly improved.

[0100] The present invention also provides a method for real-time monitoring of the gate oxide health status of silicon carbide MOSFETs.

[0101] In some embodiments, the real-time monitoring method for the gate oxide health status of the silicon carbide MOSFET includes:

[0102] To obtain the gate voltage of a silicon carbide MOSFET;

[0103] The gate voltage signal is detected during the turn-on and / or turn-off phases of the silicon carbide MOSFET and converted into two voltage spike signals.

[0104] The duration of the first voltage spike signal during the turn-on phase of the silicon carbide MOSFET is recorded as the time difference between the turn-on time of the silicon carbide MOSFET and the start time of the Miller plateau; and / or, the duration of the second voltage spike signal during the turn-off phase of the silicon carbide MOSFET is recorded as the time difference between the end time of the Miller plateau and the complete turn-off time of the silicon carbide MOSFET; the time difference between the turn-on time of the silicon carbide MOSFET and the start time of the Miller plateau and / or the time difference between the end time of the Miller plateau and the complete turn-off time of the silicon carbide MOSFET are used to reflect the gate oxide health state of the silicon carbide MOSFET.

[0105] Specifically, the gate voltage can be obtained by directly connecting it to the gate pin. The transition of the voltage spike signal can be achieved through a differentiating circuit, the time constant of which needs to be optimized according to the switching frequency of the silicon carbide MOSFET.

[0106] By acquiring a single-point gate signal and utilizing the inherent gate voltage variation characteristics during the switching process, time parameters directly related to gate oxide health are extracted. Among these, the time from turn-on to the start of the Miller plateau during the turn-off phase and the time from the end of the Miller plateau to complete turn-off during the turn-off phase sensitively reflect changes in the charge trapping state of the gate oxide layer. Compared to existing technologies, this method only requires acquiring a single-point gate signal, resulting in minimal system invasiveness; it achieves true online monitoring through real-time signal processing without interrupting device operation; and the monitored parameters have a clear physical correlation with gate oxide health, enabling accurate assessment of the gate oxide health status.

[0107] In some embodiments, the real-time monitoring method for the gate oxide health status of a silicon carbide MOSFET can be implemented using the real-time monitoring circuit for the gate oxide health status of a silicon carbide MOSFET as described in any of the above technical solutions.

[0108] In some embodiments, to record the duration of the first voltage spike signal during the turn-on phase of the silicon carbide MOSFET, the following is included:

[0109] The voltage spike signal is compared with a reference voltage, and a comparison signal reflecting the duration of the two voltage spike signals is output based on the comparison result.

[0110] Receive the comparison signal;

[0111] The first voltage spike signal is determined based on the comparison signal, and a first specific monitoring signal is output synchronously while the first voltage spike signal is continuous. The duration of the first specific monitoring signal is the duration of the first voltage spike signal.

[0112] The voltage comparison process can be implemented using a voltage comparator connected to a reference voltage.

[0113] In some embodiments, to record the duration of the second voltage spike signal during the turn-off phase of the silicon carbide MOSFET, the following is included:

[0114] The voltage spike signal is compared with a reference voltage, and a comparison signal reflecting the duration of the two voltage spike signals is output based on the comparison result.

[0115] Receive the comparison signal;

[0116] The second voltage spike signal is determined based on the comparison signal, and a second specific monitoring signal is output synchronously while the second voltage spike signal is continuous. The duration of the second specific monitoring signal is the duration of the second voltage spike signal.

[0117] The voltage comparison process can be implemented using a voltage comparator connected to a reference voltage.

[0118] In some embodiments, the gate oxide health state of the silicon carbide MOSFET is reflected by the sum of the time difference between the turn-on time and the start time of the Miller plateau during the turn-on phase, and the time difference between the end time of the Miller plateau and the complete turn-off time during the turn-off phase, i.e., the sum of T1+T2. Specifically:

[0119] During the turn-on phase of the silicon carbide MOSFET, the gate signal is converted into two positive voltage spike signals;

[0120] The duration of the first positive voltage spike signal is recorded as the time difference between the turn-on time of the silicon carbide MOSFET and the start time of the Miller plateau.

[0121] During the turn-off phase of the silicon carbide MOSFET, the gate signal is converted into two negative voltage spike signals;

[0122] The duration of the second negative voltage spike signal is recorded as the time difference between the end of the Miller plateau during the turn-off phase of the silicon carbide MOSFET and the moment of complete turn-off.

[0123] The sum of the time difference between the turn-on moment and the start of the Miller plateau in the turn-on phase of the silicon carbide MOSFET and the time difference between the end of the Miller plateau and the complete turn-off moment in the turn-off phase of the silicon carbide MOSFET is used to reflect the gate oxide health status of the silicon carbide MOSFET.

[0124] Using the sum of T1 and T2 to reflect the gate oxide health status of the silicon carbide MOSFET can amplify the aging signal and greatly improve sensitivity compared to using only T1 or only T2.

[0125] Furthermore, in some embodiments, a differentiating circuit is used to detect the gate voltage signal during the turn-on and / or turn-off phases of the silicon carbide MOSFET and convert the gate voltage signal into two voltage spike signals. The differentiating circuit can be implemented using an RC differentiating network, and the selection of the differentiating time constant must ensure accurate extraction of the gate voltage change rate.

[0126] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A real-time monitoring circuit for the gate oxide health status of a silicon carbide MOSFET, characterized in that, include: A differentiating circuit, connected to the gate of a silicon carbide MOSFET, is used to detect the gate voltage signal and convert the gate voltage signal into two voltage spike signals during the turn-on phase of the silicon carbide MOSFET, or to detect the gate voltage signal and convert the gate voltage signal into two voltage spike signals during the turn-off phase of the silicon carbide MOSFET. The signal processing unit is connected to the output of the differentiating circuit and is connected to a reference voltage for comparison with the voltage spike signal. It is used to output a comparison signal reflecting the duration of the two voltage spike signals based on the comparison result. A monitoring output unit, connected to the signal processing unit, receives the comparison signal and synchronously outputs a first specific monitoring signal when the first voltage spike signal during the turn-on phase of the silicon carbide MOSFET is continuous. The duration of the first specific monitoring signal is the time difference between the turn-on time of the silicon carbide MOSFET and the start time of the Miller plateau. Alternatively, a second specific monitoring signal is synchronously output when the second voltage spike signal during the turn-off phase of the silicon carbide MOSFET is continuous. The duration of the second specific monitoring signal is the time difference between the end time of the Miller plateau during the turn-off phase of the silicon carbide MOSFET and the complete turn-off time. The time difference between the turn-on time and the start time of the Miller plateau in the turn-on phase of the silicon carbide MOSFET and / or the time difference between the end time of the Miller plateau and the complete turn-off time in the turn-off phase of the silicon carbide MOSFET are used to reflect the gate oxide health status of the silicon carbide MOSFET.

2. The real-time monitoring circuit for the gate oxide health status of a silicon carbide MOSFET according to claim 1, characterized in that, The signal processing unit includes a first voltage comparator and a second voltage comparator, both of which are connected to the output terminal of the differentiating circuit. The differentiating circuit converts the gate signal into two positive voltage spikes during the turn-on phase of the silicon carbide MOSFET and into two negative voltage spikes during the turn-off phase of the silicon carbide MOSFET. The first voltage comparator is used to output two first high-level comparison signals corresponding to the two positive voltage spike signals during the turn-on phase of the silicon carbide MOSFET; the second voltage comparator is used to output two second high-level comparison signals corresponding to the two negative voltage spike signals during the turn-off phase of the silicon carbide MOSFET. The monitoring output unit synchronously outputs a first specific monitoring signal during the duration of the first high-level comparison signal, the duration of which is the time difference between the turn-on time of the silicon carbide MOSFET and the start time of the Miller plateau; the monitoring output unit synchronously outputs a second specific monitoring signal during the duration of the second high-level comparison signal, the duration of which is the time difference between the end time of the Miller plateau of the silicon carbide MOSFET turn-off phase and the complete turn-off time.

3. The real-time monitoring circuit for the gate oxide health status of a silicon carbide MOSFET according to claim 2, characterized in that, The monitoring output unit includes a signal conditioning unit and a signal judgment unit; The signal conditioning unit includes a first D flip-flop and a second D flip-flop. The input terminal D of the first D flip-flop is not connected to the output terminal Q, and the input terminal D of the second D flip-flop is not connected to the output terminal Q. The clock signal input terminal of the first D flip-flop is connected to the first voltage comparator, and the clock signal input terminal of the second D flip-flop is connected to the second voltage comparator. The signal determination unit includes a first AND gate, a second AND gate, and an OR gate; The first AND gate is connected to the output terminal Q of the first D flip-flop, and is also connected to the first voltage comparator; The second AND gate is not connected to the output terminal Q of the second D flip-flop, and is also connected to the second voltage comparator; The outputs of both the first AND gate and the second AND gate are connected to the OR gate.

4. The real-time monitoring circuit for the gate oxide health status of a silicon carbide MOSFET according to claim 2, characterized in that, The inverting input of the first voltage comparator is connected to a first reference voltage, and the non-inverting input is connected to the differentiating circuit. The positive input terminal of the second voltage comparator is connected to the second reference voltage, and the negative input terminal is connected to the differentiating circuit. The voltage of the positive voltage spike signal is greater than the first reference voltage and the second reference voltage; the voltage of the negative voltage spike signal is less than the first reference voltage and the second reference voltage.

5. The real-time monitoring circuit for the gate oxide health status of a silicon carbide MOSFET according to claim 2, characterized in that, It also includes a microprocessor for receiving the first specific monitoring signal and the second specific monitoring signal and recording the duration of the first specific monitoring signal and the second specific monitoring signal.

6. The real-time monitoring circuit for the gate oxide health status of a silicon carbide MOSFET according to claim 1, characterized in that, It also includes a programmable low-voltage source for providing power to the signal processing unit and the monitoring output unit.

7. A method for real-time monitoring of the gate oxide health status of a silicon carbide MOSFET, characterized in that, Implemented by the silicon carbide MOSFET gate oxide health status real-time monitoring circuit according to any one of claims 1 to 6, comprising: To obtain the gate voltage of a silicon carbide MOSFET; The gate voltage signal is detected during the turn-on and / or turn-off phases of the silicon carbide MOSFET and converted into two voltage spike signals. The duration of the first voltage spike signal during the turn-on phase of the silicon carbide MOSFET is recorded as the time difference between the turn-on time of the silicon carbide MOSFET and the start time of the Miller plateau; and / or, the duration of the second voltage spike signal during the turn-off phase of the silicon carbide MOSFET is recorded as the time difference between the end time of the Miller plateau and the complete turn-off time of the silicon carbide MOSFET; the time difference between the turn-on time of the silicon carbide MOSFET and the start time of the Miller plateau and / or the time difference between the end time of the Miller plateau and the complete turn-off time of the silicon carbide MOSFET are used to reflect the gate oxide health state of the silicon carbide MOSFET.

8. The method for real-time monitoring of the gate oxide health status of a silicon carbide MOSFET according to claim 7, characterized in that, The duration of the first voltage spike signal recorded during the turn-on phase of the silicon carbide MOSFET includes: The voltage spike signal is compared with a reference voltage, and a comparison signal reflecting the duration of the two voltage spike signals is output based on the comparison result. Receive the comparison signal; The first voltage spike signal is determined based on the comparison signal, and a first specific monitoring signal is output synchronously while the first voltage spike signal is continuous. The duration of the first specific monitoring signal is the duration of the first voltage spike signal.

9. The method for real-time monitoring of the gate oxide health status of a silicon carbide MOSFET according to claim 7, characterized in that, The duration of the second voltage spike signal recorded during the turn-off phase of the silicon carbide MOSFET includes: The voltage spike signal is compared with a reference voltage, and a comparison signal reflecting the duration of the two voltage spike signals is output based on the comparison result. Receive the comparison signal; The second voltage spike signal is determined based on the comparison signal, and a second specific monitoring signal is output synchronously while the second voltage spike signal is continuous. The duration of the second specific monitoring signal is the duration of the second voltage spike signal.

10. The method for real-time monitoring of the gate oxide health status of a silicon carbide MOSFET according to claim 7, characterized in that, During the turn-on phase of the silicon carbide MOSFET, the gate signal is converted into two positive voltage spike signals; The duration of the first positive voltage spike signal is recorded as the time difference between the turn-on time of the silicon carbide MOSFET and the start time of the Miller plateau. During the turn-off phase of the silicon carbide MOSFET, the gate signal is converted into two negative voltage spike signals; The duration of the second negative voltage spike signal is recorded as the time difference between the end of the Miller plateau during the turn-off phase of the silicon carbide MOSFET and the moment of complete turn-off. The sum of the time difference between the turn-on moment and the start of the Miller plateau in the turn-on phase of the silicon carbide MOSFET and the time difference between the end of the Miller plateau and the complete turn-off moment in the turn-off phase of the silicon carbide MOSFET is used to reflect the gate oxide health status of the silicon carbide MOSFET.

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