Photoelectric detector and manufacturing method thereof
By setting trenches in silicon and forming a germanium layer, the structure and electrical contact of the photodetector are optimized, solving the problem of low photoresponsivity in traditional germanium photodetectors and achieving higher photoresponsivity and electrical contact performance.
Patent Information
- Application Number
- CN202410397349.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-02
- Publication Date
- 2025-10-21
AI Technical Summary
Traditional vertical germanium photodetectors have low photoresponsivity even with high bandwidth, and existing technologies make it difficult to optimize the structure and electrical contact performance of photodetectors.
By employing a vertical Si/Ge/Si structure, trenches are set in silicon and germanium layers are formed in specific regions to optimize the structure and electrical contacts of the photodetector, reduce defect states, and improve lattice quality.
This improved the photoresponsivity and electrical contact performance of the photodetector, thus optimizing its overall performance.
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Figure CN120826044A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductors, and in particular to a photoelectric detector and a method for manufacturing the photoelectric detector. Background Art
[0002] Photodetectors are one of the key components of high-speed optoelectronic devices, and one type of photodetector is the germanium PIN photodetector. Summary of the Invention
[0003] The present invention provides a photoelectric detector and a method for manufacturing the photoelectric detector, aiming to optimize the performance of the photoelectric detector.
[0004] According to a first aspect of the present invention, the present invention provides a method for manufacturing a photodetector, comprising: providing a substrate, the substrate comprising a first silicon layer, and forming a first conductive type region using the first silicon layer; growing a first germanium layer on the first silicon layer, and forming an intrinsic region using the first germanium layer; growing a second silicon layer on the first germanium layer and the first silicon layer, and forming a second conductive type region using the second silicon layer.
[0005] In some embodiments, the step of growing a first germanium layer on the first silicon layer includes: forming a first silicon oxide layer on the first silicon layer; forming a groove in the first silicon layer, including etching the first silicon oxide layer and the first silicon layer, and making the first silicon oxide layer cover the surface of the first silicon layer except the groove; growing a first germanium layer on the groove.
[0006] In some embodiments, after growing the first germanium layer on the trench, the method further includes: planarizing a surface of the first germanium layer, removing the first silicon oxide layer, and forming an intrinsic region.
[0007] In some embodiments, the step of growing the first germanium layer on the trench includes: growing the first germanium layer on the first trench until the height of the first germanium layer is not lower than that of the first silicon layer.
[0008] In some embodiments, the substrate is a silicon-on-insulator (SOI) substrate, and the substrate further includes an underlying silicon layer and a buried oxide layer disposed in sequence, and the first silicon layer is disposed on the buried oxide layer.
[0009] In some embodiments, the step of forming the first conductivity type region using the first silicon layer further includes:
[0010] The first conductive type region is doped to form a first region with a first doping concentration; and a portion of the first region is doped to form a second region with a second doping concentration.
[0011] In some embodiments, the step of forming a second conductive type region using the second silicon layer further includes: doping the second conductive type region to form a third region with a third doping concentration; and doping a portion of the third region to form a fourth region with a fourth doping concentration.
[0012] According to a second aspect of the present invention, the present invention provides a photodetector comprising: a first conductive type region, an intrinsic region and a second conductive type region; wherein the first conductive type region is manufactured based on a first silicon layer, the intrinsic region is manufactured based on a first germanium layer, and the second conductive type region is manufactured based on a second silicon layer, and the first silicon layer, the first germanium layer and the second silicon layer are arranged sequentially in the thickness direction of the photodetector.
[0013] In some embodiments, on a plane perpendicular to the thickness direction of the photodetector, a projection of the first conductive type region and a projection of the intrinsic region at least partially overlap, and a projection of the second conductive type region and a projection of the intrinsic region at least partially overlap.
[0014] In some embodiments, on a plane perpendicular to the thickness direction of the photodetector, a projection of the first conductive type region, a projection of the intrinsic region, and a projection of the second conductive type region at least partially overlap.
[0015] In some embodiments, the intrinsic region is at least partially embedded in the first conductivity type region.
[0016] In some embodiments, the photodetector further includes a first conductive structure and a second conductive structure; the first conductive structure is electrically connected to the first conductive type region, and the second conductive structure is electrically in contact with the second conductive type region.
[0017] In some embodiments, the first conductive type region includes a first region and a second region doped with a first dopant, the second region being connected to a side of the first region relatively away from the second conductive type region; the second conductive type region includes a third region and a fourth region doped with a second dopant, the fourth region being connected to a side of the third region relatively away from the first conductive type region; the doping concentration of the first region is less than that of the second region; and the doping concentration of the third region is less than that of the fourth region.
[0018] In some embodiments, the second region is electrically connected to the first conductive structure, and the fourth region is electrically connected to the second conductive structure.
[0019] In some embodiments, the first conductivity type region and the second conductivity type region have opposite conductivity types.
[0020] In some embodiments, the first conductive type region is of N-type conductive type, and the second conductive type region is of P-type conductive type.
[0021] Through one or more of the above embodiments of the present invention, at least the following technical effects can be achieved:
[0022] This invention optimizes the structure and fabrication process of photodetector devices by creating trenches in silicon and related processes to facilitate the formation of germanium in specific desired areas. This also offers numerous advantages, such as reducing defects and optimizing lattice quality, thereby improving device performance in multiple aspects. Furthermore, a vertical Si / Ge / Si structure photodetector is proposed, optimizing the electrical contact and, consequently, the performance of the photodetector. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] The technical solutions and other beneficial effects of the present invention will be made apparent by describing in detail the specific embodiments of the present invention in conjunction with the accompanying drawings.
[0024] Figure 1 A schematic structural diagram of a photoelectric detector provided in an embodiment of the present invention;
[0025] Figure 2 A flowchart of the steps of a method for manufacturing a photodetector provided in an embodiment of the present invention;
[0026] Figure 3 A schematic structural diagram of a substrate provided in an embodiment of the present invention;
[0027] Figure 4 A schematic diagram of forming a first conductivity type region by using a first silicon layer according to an embodiment of the present invention;
[0028] Figure 5 A schematic diagram of forming a first silicon oxide layer on a first silicon layer according to an embodiment of the present invention;
[0029] Figure 6 A schematic diagram of forming a trench in a first silicon layer according to an embodiment of the present invention;
[0030] Figure 7 A schematic diagram of growing a first germanium layer on a trench according to an embodiment of the present invention;
[0031] Figure 8 A schematic diagram of forming an intrinsic region provided in an embodiment of the present invention;
[0032] Figure 9 A schematic diagram of forming a second conductivity type region by using a second silicon layer according to an embodiment of the present invention;
[0033] The meanings of the figure marks are as follows: first conductive type region-100; first region 110; second region 120; intrinsic region-200; second conductive type region 300; third region 310; fourth region 320; first conductive structure 400; second conductive structure 500; underlying silicon 11; buried oxide layer 12; first silicon layer 13; trench 131; first germanium layer 20; second silicon layer 30; dielectric layer 40; first silicon oxide layer 50. DETAILED DESCRIPTION
[0034] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of this application.
[0035] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the said features. In the description of the present application, "multiple" means two or more, unless otherwise clearly and specifically defined.
[0036] In the description of this application, it should be noted that, unless otherwise expressly specified or limited, the terms "installed," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections, electrical connections, or mutual communication; they can refer to direct connections or indirect connections through an intermediate medium; they can refer to internal communication between two components or the interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on specific circumstances.
[0037] In this application, unless otherwise expressly specified or limited, a first feature being "above" or "below" a second feature may include the first and second features being in direct contact, or may include the first and second features being in contact not directly but through another feature between them. Moreover, a first feature being "above," "above," and "above" a second feature may include the first feature being directly above or obliquely above the second feature, or may simply mean that the first feature is higher in level than the second feature. A first feature being "below," "below," and "below" a second feature may include the first feature being directly below or obliquely below the second feature, or may simply mean that the first feature is lower in level than the second feature.
[0038] The disclosure below provides many different embodiments or examples for realizing different structures of the present application. In order to simplify the disclosure of the present application, the components and settings of specific examples are described below. Of course, they are merely examples and are not intended to limit the present application. In addition, the present application may repeat reference numbers and / or reference letters in different examples, and such repetition is for the purpose of simplicity and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the present application provides examples of various specific processes and materials, but those of ordinary skill in the art will appreciate the application of other processes and / or the use of other materials.
[0039] The inventors discovered that conventional vertical germanium photodetectors, which employ a vertically arranged Ge / Ge / Si structure from top to bottom and use germanium as one of the metal electrode connections, achieve high bandwidth but result in low photoresponsivity. The present invention forms a vertical Si / Ge / Si photodetector, optimizing the electrical contacts and performance. Furthermore, by creating trenches in the silicon and using related processes to facilitate the formation of germanium in specific desired areas, the device structure and fabrication process are optimized. This further enhances device performance in multiple ways, including reducing defect states and optimizing lattice quality.
[0040] Example 1
[0041] The present invention provides a photodetector 1000, Figure 1 This is a structural diagram of a photodetector 1000 provided in one embodiment of the present application.
[0042] like Figure 1 As shown, the photodetector 1000 includes a first conductivity type region 100, an intrinsic region 200, and a second conductivity type region 300. The first conductivity type region 100 is fabricated based on a first silicon layer 13, the intrinsic region 200 is fabricated based on a first germanium layer, and the second conductivity type region 300 is fabricated based on a second silicon layer. The first silicon layer 13, the first germanium layer, and the second silicon layer are sequentially arranged in the thickness direction of the photodetector 1000.
[0043] In an embodiment of the present invention, there is incident light in a direction perpendicular to the photodetector 1000. The incident light enters the intrinsic region through a silicon waveguide and is photodetected by the vertically arranged silicon-germanium-silicon PIN structure. Compared with the structure in which a P-type region is arranged on a germanium layer, the connection ends of the metal electrodes in the present invention are all silicon layers, avoiding direct contact between the germanium layer and the metal electrode, thereby effectively improving the light response of the photodetector.
[0044] In some embodiments, on a plane perpendicular to the thickness direction of the photodetector 1000 or on a plane parallel to the first silicon layer 13, the projection of the first conductive type region 100 and the projection of the intrinsic region 200 at least partially overlap, and the projection of the second conductive type region 300 and the projection of the intrinsic region 200 at least partially overlap. The position where the projection of the first conductive type region 100 overlaps with the projection of the intrinsic region 200 is the contact area between the two. In some embodiments, on a plane perpendicular to the thickness direction of the photodetector 1000, the projection of the first conductive type region 100, the projection of the intrinsic region 200, and the projection of the second conductive type region 300 at least partially overlap. Figure 1 In the illustrated embodiment, the projections of the first conductive type region 100 , the intrinsic region 200 and the second conductive type region 300 have a common overlapping portion, and the projection of the intrinsic region 200 completely overlaps with the projection of the first conductive type region 100 and / or the second conductive type region 300 .
[0045] In some embodiments, the intrinsic region 200 is at least partially embedded in the first conductive type region 100. Figure 1 As shown, a trench 131 is provided on the first conductive type region 100 , and the intrinsic region 200 fills the trench 131 , and its surface exceeds the first conductive type region 100 by a certain height.
[0046] In some embodiments, the photodetector 1000 further includes a first conductive structure 400 and a second conductive structure 500. The first conductive structure 400 is electrically connected to the first conductivity type region 100, and the second conductive structure 500 is electrically connected to the second conductivity type region 300. Photogenerated carriers generated by the intrinsic region 200 during light absorption are output as current under an electric field, thereby enabling photodetection by converting optical signals into electrical signals. For example, the first and second conductive structures may be made of metal materials, such as tungsten.
[0047] Using silicon as the second conductivity type region 300 makes it more suitable for manufacturing using silicon semiconductor processes, thereby forming a vertical silicon / germanium / silicon photodetector from top to bottom. Furthermore, the second conductivity type region 300 can also be better doped based on the silicon material doping process to form a good electrical contact.
[0048] In some embodiments, the first conductive type region 100 includes a first region 110 and a second region 120 doped with a first dopant, wherein the second region 120 is connected to a side of the first region 110 relatively far from the second conductive type region 300. The second conductive type region 300 includes a third region 310 and a fourth region 320 doped with a second dopant, wherein the fourth region 320 is connected to a side of the third region 310 relatively far from the first conductive type region 100. The doping concentration of the first region 110 is lower than that of the second region 120; the doping concentration of the third region 310 is lower than that of the fourth region 320. The second region 120 is electrically connected to the first conductive structure 400, and the fourth region 320 is electrically connected to the second conductive structure 500.
[0049] In the first conductive type region 100 and the second conductive type region 300, the first region 110 and the third region 310 with low doping concentration have semiconductor properties and are used to constitute the P-type region or N-type region of the PIN photodetector 1000 to collect photogenerated carriers, and the second region 120 and the fourth region 320 with high doping concentration are used to make metal connections with the conductive structure to achieve ohmic contact.
[0050] In some embodiments, the first conductive type region 100 and the second conductive type region 300 have opposite conductive types. The opposite conductive types of the first conductive type region 100 and the second conductive type region 300 can be achieved through a doping process such as ion implantation. That is, the first conductive type region 100 and the second conductive type region 300 are doped to exhibit opposite conductive types. Conductive types include P-type and N-type. In some embodiments, to make a conductive type region exhibit N-type conductivity, N-type impurities and P-type impurities can be doped simultaneously. For example, the concentration of N-type impurities can be selected to be much greater than the concentration of P-type impurities. In other embodiments, to make a conductive type region exhibit P-type conductivity, N-type impurities and P-type impurities can be doped simultaneously. For example, the concentration of N-type impurities can be selected to be much greater than the concentration of P-type impurities.
[0051] In some embodiments, the first conductive type region 100 may be doped to exhibit an N-type conductive type, and the second conductive type region 300 may be doped to exhibit a P-type conductive type.
[0052] In some embodiments, as Figure 1 As shown, the photodetector 1000 includes a dielectric layer 40, which is arranged on the surface of the substrate 10. For example, the dielectric layer 40 covers the surface of the substrate 10, encapsulating the first conductive type region 100, the intrinsic region 200, the second conductive type region 300, the first conductive structure 400 and the second conductive structure 500. The conductive structure is electrically connected to the outside world through a contact hole opened on the dielectric layer 40.
[0053] The present invention also provides a method for manufacturing a photodetector 1000, which is used to prepare the photodetector 1000 provided in the above embodiments. The photodetector 1000 includes a first conductive type region 100, an intrinsic region 200 and a second conductive type region 300. Figure 2 As shown, the manufacturing method includes steps 101 to 103.
[0054] Step 101: providing a substrate, the substrate including a first silicon layer, and forming a first conductivity type region using the first silicon layer.
[0055] like Figure 3 As shown, the substrate may be a silicon-on-insulator (SOI) substrate, comprising a bottom silicon layer 11 and a buried oxide layer 12, and a first silicon layer 13 disposed on the buried oxide layer 12. For example, the buried oxide layer 12 has a thickness of 2 μm, and the first silicon layer 13 has a thickness of 220 nm.
[0056] like Figure 4 As shown, the step of forming the first conductive type region 100 using the first silicon layer 13 includes: doping the first conductive type region 100 to form a first region 110 having a first doping concentration. Doping a portion of the first region 110 to form a second region 120 having a second doping concentration. For example, a second silicon oxide layer can be first formed on the surface of the first silicon layer 13 by surface thermal oxidation, and then etching, doping, and other processes can be used to form the first region 110 having the first doping concentration and the second region 120 having the second doping concentration.
[0057] Step 102: growing a first germanium layer on the first silicon layer, and forming an intrinsic region using the first germanium layer.
[0058] The steps of growing the first germanium layer 20 on the first silicon layer 13 and forming the intrinsic region 200 using the first germanium layer 20 include:
[0059] like Figure 5 As shown, a first silicon oxide layer 50 is formed on the first silicon layer 13. For example, the first silicon oxide layer 50 can be formed by a deposition process.
[0060] Further, if Figure 6As shown, a groove 131 is formed in the first silicon layer 13, and the groove 131 can be used to accommodate germanium. Forming the groove 131 may include etching the first silicon layer 13 and etching a portion of the first silicon oxide layer. The first silicon oxide layer 50 covers the surface of the first silicon layer 13 except the groove 131. For example, the groove 131 can be formed in the first silicon layer 13 by an etching process. In some embodiments, after the groove 131 is formed in the first silicon layer 13, the groove 131 is thermally oxidized to repair the silicon layer on the surface of the groove 131, reduce the interface defect state density during the subsequent heteroepitaxial germanium layer in the groove 131, improve the quality of the grown germanium layer, and thus reduce the dark current of the photodetector 1000, wherein the dark current of the photodetector 1000 refers to the current flowing in the photodetector 1000 under no light (light entering) conditions.
[0061] Further, if Figure 7 As shown, a first germanium layer 20 is grown on the groove 131. In some embodiments, the first germanium layer 20 can be grown on the first trench 131 until the height of the first germanium layer 20 is not lower than the first silicon layer 13, so as to utilize the overgrowth of the first germanium layer 20 to form a first germanium layer 20 embedded in the groove 131 of the first silicon layer 13 but with a surface higher than the first silicon layer 13.
[0062] In the embodiment of the present application, due to the process and growth characteristics of germanium growth, germanium cannot grow on the first silicon oxide layer 50, and can only grow on the surface of the first silicon layer exposed by the groove. Therefore, by utilizing the groove in the first silicon layer 13 and performing a certain amount of overgrowth in this process, the lattice quality of the germanium layer in the intrinsic region can be improved, thereby improving the bandwidth of the photodetector.
[0063] Further, if Figure 8 As shown, the surface of the first germanium layer 20 is planarized, the first silicon oxide layer 50 is removed, and the intrinsic region 200 is formed. For example, the surface of the first germanium layer 20 can be planarized and the first silicon oxide layer 50 can be removed by chemical means or mechanical grinding. It should be noted that the portion of the first germanium layer 20 that spreads to the surface of the first silicon oxide layer 50 during overgrowth can be removed together when the first silicon oxide layer 50 is removed, and does not need to be removed separately. The thickness of the first germanium layer 20 is determined by the thickness of the trench 131 and the height of the first germanium layer 20 exceeding the surface of the trench 131, wherein the thickness of the trench 131 is determined when the trench 131 is formed, and the height exceeding the surface of the trench 131 is determined when the surface of the first germanium layer 20 is planarized.
[0064] Step 103: growing a second silicon layer on the first germanium layer and the first silicon layer, and forming a second conductivity type region using the second silicon layer.
[0065] After growing the second silicon layer 30, as Figure 9As shown, forming the second conductive type region 300 using the second silicon layer 30 includes: doping the second conductive type region 300 to form a third region 310 having a third doping concentration, and doping a portion of the third region 310 to form a fourth region 320 having a fourth doping concentration.
[0066] In some embodiments, after step 103, the above manufacturing method further includes completing subsequent process flows such as metal silicide self-alignment, manufacturing an etch stop layer, manufacturing a dielectric layer 40, and manufacturing a metal contact hole, so as to obtain Figure 1 Photodetector 1000 is shown.
[0067] In the above steps, the specific steps for depositing each layer can be designed according to actual needs and are not specifically limited in the embodiments of the present application. The specific steps for etching each layer can be designed according to actual needs and are not specifically limited in the embodiments of the present application. The specific steps for doping each layer can also be designed according to actual needs, wherein the number of doped regions, the doping concentration of each doped region, and the doping ions can be determined according to actual needs.
[0068] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant description of other embodiments.
[0069] This document uses specific examples to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the technical solutions and core ideas of the present application. Ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or replace some of the technical features therein with equivalents; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.
Claims
1. A method for manufacturing a photodetector, characterized in that: The photodetector includes a first conductive type region, an intrinsic region, and a second conductive type region, and the method includes: Providing a substrate, the substrate comprising a first silicon layer, and forming a first conductivity type region using the first silicon layer; growing a first germanium layer on the first silicon layer, and forming an intrinsic region using the first germanium layer; A second silicon layer is grown on the first germanium layer and the first silicon layer, and a second conductive type region is formed using the second silicon layer.
2. The manufacturing method according to claim 1, wherein The step of growing a first germanium layer on the first silicon layer comprises: forming a first silicon oxide layer on the first silicon layer; forming a trench in the first silicon layer, comprising etching the first silicon oxide layer and the first silicon layer, and making the first silicon oxide layer cover the surface of the first silicon layer except the trench; A first germanium layer is grown on the trench.
3. The manufacturing method according to claim 2, wherein: After growing the first germanium layer on the trench, the method further includes: The surface of the first germanium layer is planarized, and the first silicon oxide layer is removed to form an intrinsic region.
4. The manufacturing method according to claim 2, wherein: The step of growing a first germanium layer on the trench comprises: A first germanium layer is grown on the first trench until a height of the first germanium layer is not lower than that of the first silicon layer.
5. The manufacturing method according to claim 1, wherein: The substrate is a silicon-on-insulator (SOI) substrate, and further comprises a bottom silicon layer and a buried oxide layer which are sequentially arranged, and the first silicon layer is arranged on the buried oxide layer.
6. The manufacturing method according to claim 1, wherein: The step of forming a first conductivity type region using the first silicon layer further includes: doping the first conductive type region to form a first region with a first doping concentration; A portion of the first region is doped to form a second region with a second doping concentration.
7. The manufacturing method according to claim 1, wherein: The step of forming a second conductivity type region using the second silicon layer further includes: doping the second conductive type region to form a third region with a third doping concentration; A portion of the third region is doped to form a fourth region with a fourth doping concentration.
8. A photoelectric detector, characterized in that: include: a first conductivity type region, an intrinsic region, and a second conductivity type region; Among them, the first conductive type region is manufactured based on a first silicon layer, the intrinsic region is manufactured based on a first germanium layer, and the second conductive type region is manufactured based on a second silicon layer. The first silicon layer, the first germanium layer and the second silicon layer are arranged in sequence in the thickness direction of the photodetector.
9. The photodetector according to claim 8, wherein On a plane perpendicular to the thickness direction of the photodetector, a projection of the first conductive type region and a projection of the intrinsic region at least partially overlap, and a projection of the second conductive type region and a projection of the intrinsic region at least partially overlap.
10. The photodetector according to claim 8, wherein On a plane perpendicular to the thickness direction of the photodetector, a projection of the first conductive type region, a projection of the intrinsic region, and a projection of the second conductive type region at least partially overlap.
11. The photodetector according to claim 8, wherein The intrinsic region is at least partially embedded in the first conductive type region.
12. The photodetector according to claim 8, wherein Also includes: A first conductive structure and a second conductive structure; the first conductive structure is electrically connected to the first conductive type region, and the second conductive structure is electrically in contact with the second conductive type region.
13. The photodetector according to claim 8, wherein The first conductive type region includes a first region doped with a first dopant and a second region, wherein the second region is connected to a side of the first region relatively far from the second conductive type region; The second conductive type region includes a third region and a fourth region doped with a second dopant, the fourth region being connected to a side of the third region relatively away from the first conductive type region; the doping concentration of the first region is less than that of the second region; and the doping concentration of the third region is less than that of the fourth region.
14. The photodetector according to claim 13, wherein The second region is electrically connected to the first conductive structure, and the fourth region is electrically connected to the second conductive structure.
15. The photodetector according to claim 8, wherein The first conductive type region and the second conductive type region have opposite conductive types.
16. The photodetector according to claim 8, wherein The first conductive type region is of N-type conductive type, and the second conductive type region is of P-type conductive type.