TBC battery preparation method and TBC battery

Abstract

The invention provides a TBC battery preparation method and a TBC battery, and relates to the technical field of solar cells, and the TBC battery preparation method comprises the following steps: sequentially preparing a first tunneling oxide layer and a first polycrystalline silicon layer on the back surface of a silicon substrate, preparing a mask layer in a preset positive electrode region of the first polycrystalline silicon layer, and preparing a second tunneling oxide layer in a preset negative electrode region of the first polycrystalline silicon layer; then removing the first tunneling oxide layer and the first polycrystalline silicon layer which are plated in a preset negative electrode region on the back surface of the silicon substrate and on the front surface of the silicon substrate in a winding manner; then, a second tunneling oxide layer and a second polycrystalline silicon layer are sequentially prepared in a preset negative electrode area on the back face of the silicon substrate, a mask layer is prepared in a preset negative electrode area of the second polycrystalline silicon layer, and then a preset positive electrode area on the back face of the silicon substrate and the second tunneling oxide layer and the second polycrystalline silicon layer which are plated on the front face of the silicon substrate in a winding mode are removed; and then removing the mask layer on the back surface of the silicon substrate. According to the method, the mask layer is formed by adopting the laser thermal oxidation method, and the wound and plated polycrystalline silicon layer is removed separately, so that the electric leakage proportion can be reduced, and the battery yield can be improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of solar cells, in particular to a TBC cell preparation method and a TBC cell. BACKGROUND

[0002] The existing TBC cell winding degree is prepared by a boron diffusion process to prepare a mask layer. The mask layer prepared in this way has abnormal front winding degree. In the process of removing the front winding degree layer, it is difficult to remove P-Poly and N-Poly separately. In the existing scheme, P-Poly and N-Poly of the winding degree layer are removed together. This winding degree layer removal scheme is easy to cause B / P and other impurity atoms to mix, and has the risk of electric leakage.

[0003] Therefore, the present application is proposed. SUMMARY

[0004] One of the purposes of the present application is to provide a TBC cell preparation method. The TBC cell preparation method adopts a laser thermal oxidation method to form a mask layer, and separates and removes the first and second polycrystalline silicon layers wound and plated, so as to reduce the proportion of electric leakage and improve the cell yield;

[0005] The second purpose of the present application is to provide a TBC cell. The TBC cell has a low proportion of electric leakage and a high cell yield.

[0006] In order to achieve the above-mentioned purposes of the present application, the following technical solutions are adopted:

[0007] In a first aspect, the present application provides a TBC cell preparation method, which comprises the following steps:

[0008] (a) preparing a first tunneling oxide layer and a first polycrystalline silicon layer (P-Poly-Si) on the back surface of a silicon substrate in sequence, preparing a first mask layer on a preset positive electrode area (P area) of the first polycrystalline silicon layer by a laser thermal oxidation method, and then removing the first tunneling oxide layer and the first polycrystalline silicon layer in the preset negative electrode area on the back surface of the silicon substrate and the first tunneling oxide layer and the first polycrystalline silicon layer wound and plated on the front surface of the silicon substrate;

[0009] (b) preparing a second tunneling oxide layer and a second polycrystalline silicon layer (N-Poly-Si) on the preset negative electrode area of the back surface of the silicon substrate in sequence, preparing a second mask layer on a preset negative electrode area (N area) of the second polycrystalline silicon layer by a laser thermal oxidation method, and then removing the second tunneling oxide layer and the second polycrystalline silicon layer in the preset positive electrode area on the back surface of the silicon substrate and the second tunneling oxide layer and the second polycrystalline silicon layer wound and plated on the front surface of the silicon substrate;

[0010] (c) then removing the first mask layer and the second mask layer on the back surface of the silicon substrate;

[0011] (d) sequentially preparing an AlOx film and an SiNx film on the silicon substrate, and then printing an electrode on the back surface of the silicon substrate to form a cell piece.

[0012] In the present application, a mask layer is formed by a laser oxidation process. The laser oxidation process can be used to locally and accurately prepare the mask layer. The process does not have the BSG / PSG wrap problem (i.e., no mask layer front wrap problem). Therefore, the first and second polycrystalline silicon layers (P-Poly-Si and N-Poly-Si) of the wrap layer can be separated and removed cleanly, reducing the leakage ratio and improving the cell yield. If the first and second polycrystalline silicon layers (P-Poly-Si and N-Poly-Si) are not separated and removed, there will be a B and P impurity mixing situation in the polishing tank, increasing the risk of leakage.

[0013] Preferably, preparing the first tunneling oxide layer on the back surface of the silicon substrate comprises: introducing O2 into an LPCVD device to deposit the first tunneling oxide layer on the back surface of the silicon substrate;

[0014] Preferably, the thickness of the first tunneling oxide layer is 1.2-1.8nm, for example, it can be 1.2nm, 1.3nm, 1.4nm, 1.5nm, 1.6nm, 1.7nm, 1.8nm, etc.

[0015] Preferably, the gas flow of O2 is 20000-30000sccm, for example, it can be 20000sccm, 21000sccm, 22000sccm, 23000sccm, 24000sccm, 25000sccm, 26000sccm, 27000sccm, 28000sccm, 29000sccm, 30000sccm, etc., the deposition time is 400-600s, for example, it can be 400s, 450s, 500s, 550s, 600s, etc., and the deposition temperature is 500-700℃, for example, it can be 500℃, 550℃, 600℃, 650℃, 700℃, etc.

[0016] Preferably, preparing the first polycrystalline silicon layer comprises: preparing a first amorphous silicon layer (i-Poly-Si) on the first tunneling oxide layer, and then using a boron diffusion process to prepare the first amorphous silicon layer into a first polycrystalline silicon layer;

[0017] Preferably, SiH4 and N2 are introduced into the LPCVD device to prepare the first amorphous silicon layer;

[0018] Preferably, the thickness of the first amorphous silicon layer is 80-150nm, for example, it can be 80nm, 90nm, 100nm, 110nm, 120nm, 130nm, 140nm, 150nm, etc.

[0019] Preferably, the gas flow of SiH4 is 10000-20000sccm, for example, it can be 10000sccm, 11000sccm, 12000sccm, 13000sccm, 14000sccm, 15000sccm, 16000sccm, 17000sccm, 18000sccm, 19000sccm, 20000sccm, etc., the gas flow of N2 is 15000-30000sccm, for example, it can be 15000sccm, 16000sccm, 17000sccm, 18000sccm, 19000sccm, 20000sccm, 21000sccm, 22000sccm, 23000sccm, 24000sccm, 25000sccm, 26000sccm, 27000sccm, 28000sccm, 29000sccm, 30000sccm, etc., the deposition time is 1000-2000s, for example, it can be 1000s, 1100s, 1200s, 1300s, 1400s, 1500s, 1600s, 1700s, 1800s, 1900s, 2000s, etc., the deposition temperature is 500-700℃, for example, it can be 500℃, 550℃, 600℃, 650℃, 700℃, etc.;

[0020] Preferably, the gas BCl3, O2 and N2 are introduced to prepare the first amorphous silicon layer into the first polysilicon layer;

[0021] Preferably, the thickness of the first polysilicon layer is 80-150nm, for example, it can be 80nm, 90nm, 100nm, 110nm, 120nm, 130nm, 140nm, 150nm, etc.;

[0022] Preferably, the gas flow of BCl3 is 100-600 sccm, for example, it can be 100 sccm, 150 sccm, 200 sccm, 250 sccm, 300 sccm, 350 sccm, 400 sccm, 450 sccm, 500 sccm, 550 sccm, 600 sccm, etc., the gas flow of O2 is 500-2000 sccm, for example, it can be 500 sccm, 600 sccm, 700 sccm, 800 sccm, 900 sccm, 1000 sccm, 1100 sccm, 1200 sccm, 1300 sccm, 1400 sccm, 1500 sccm, 1600 sccm, 1700 sccm, 18000 sccm, 1900 sccm, 2000 sccm, etc., the gas flow of N2 is 15000-30000 sccm, for example, it can be 15000 sccm, 16000 sccm, 17000 sccm, 18000 sccm, 19000 sccm, 20000 sccm, 21000 sccm, 22000 sccm, 23000 sccm, 24000 sccm, 25000 sccm, 26000 sccm, 27000 sccm, 28000 sccm, 29000 sccm, 30000 sccm, etc.

[0023] Preferably, the width of the first mask layer is 400-600 nm, for example, it can be 400 nm, 450 nm, 500 nm, 550 nm, 600 nm, etc., and the thickness is 5-20 nm, for example, it can be 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, 10 nm, 11 nm, 12 nm, 13 nm, 14 nm, 15 nm, 16 nm, 17 nm, 18 nm, 19 nm, 20 nm, etc.

[0024] Preferably, the laser power percentage is 30-70%, for example, it can be 30%, 35%, 40%, 45%, 50%, 55%, 60%, 65%, 70%, etc., and the scanning speed is 30000-45000 mm / s, for example, it can be 30000 mm / s, 35000 mm / s, 40000 mm / s, 45000 mm / s, etc.

[0025] Preferably, the groove polishing cleaning process is used to remove the first tunneling oxide layer and the first polycrystalline silicon layer plated around the front surface of the silicon substrate in the preset negative electrode area of the back surface of the silicon substrate.

[0026] Preferably, the alkali etching formula components used in the groove polishing cleaning process include, in terms of mass percentage concentration, 3-5% KOH, 1-2% corrosion inhibitor, 2-4% catalyst, 0.1-0.5% surfactant, and 0.5-2% inorganic salt.

[0027] Based on the total mass of the alkaline etching formula being 100%, the mass percentage concentration of KOH is 3-5%, for example, 3%, 3.5%, 4%, 4.5%, 5%, etc.;

[0028] Based on the total mass of the alkaline etching formula as 100%, the mass percentage concentration of the corrosion inhibitor is 1-2%, for example, it can be 1%, 1.1%, 1.2%, 1.3%, 1.4%, 1.5%, 1.6%, 1.7%, 1.8%, 1.9%, 2%, etc.;

[0029] Based on the total mass of the alkaline etching formula being 100%, the mass percentage concentration of the catalyst is 2-4%, for example, 2%, 2.5%, 3%, 3.5%, 4%, etc.;

[0030] Based on the total mass of the alkaline etching formula being 100%, the mass percentage concentration of the surfactant is 0.1-0.5%, for example, 0.1%, 0.2%, 0.3%, 0.4%, 0.5%, etc.;

[0031] Based on the total mass of the alkaline etching formula as 100%, the mass percentage concentration of the inorganic salt is 0.5-2%, for example, it can be 0.5%, 0.6%, 0.7%, 0.8%, 0.9%, 1%, 1.1%, 1.2%, 1.3%, 1.4%, 1.5%, 1.6%, 1.7%, 1.8%, 1.9%, 2%, etc.;

[0032] In the alkaline etching formula of the present invention, the corrosion inhibitor is dimethylethanolamine (DMAE) and / or triethanolamine (TEA), the catalyst is hydrogen peroxide, the surfactant is sodium dodecylbenzenesulfonate (SDBS), and the inorganic salt is sodium chloride.

[0033] Preferably, the reaction temperature is 50-80°C, for example, 50°C, 55°C, 60°C, 65°C, 70°C, 75°C, 80°C, etc., and the reaction time is 300-600s, for example, 300s, 350s, 400s, 450s, 500s, 550s, 600s, etc.

[0034] Preferably, preparing the second tunneling oxide layer in the preset negative electrode region on the back side of the silicon substrate comprises: introducing O2 into an LPCVD device to deposit the second tunneling oxide layer in the preset negative electrode region;

[0035] Preferably, the thickness of the second tunnel oxide layer is 1.2-1.8 nm, for example, 1.2 nm, 1.3 nm, 1.4 nm, 1.5 nm, 1.6 nm, 1.7 nm, 1.8 nm, etc.;

[0036] Preferably, the gas flow of O2 is 20000-30000sccm, for example, it can be 20000sccm, 21000sccm, 22000sccm, 23000sccm, 24000sccm, 25000sccm, 26000sccm, 27000sccm, 28000sccm, 29000sccm, 30000sccm, etc., the deposition time is 400-600s, for example, it can be 400s, 450s, 500s, 550s, 600s, etc., the deposition temperature is 500-700℃, for example, it can be 500℃, 550℃, 600℃, 650℃, 700℃, etc.;

[0037] Preferably, the preparation of the second polysilicon layer comprises: preparing a second amorphous silicon layer (i-Poly-Si) on the second tunneling oxide layer, and then using a phosphorus diffusion process to prepare the second amorphous silicon layer into a second polysilicon layer;

[0038] Preferably, SiH4 and N2 are introduced into the LPCVD device to prepare the second amorphous silicon layer;

[0039] Preferably, the thickness of the second amorphous silicon layer is 80-150nm, for example, it can be 80nm, 90nm, 100nm, 110nm, 120nm, 130nm, 140nm, 150nm, etc.;

[0040] Preferably, the gas flow of SiH4 is 10000-20000sccm, for example, it can be 10000sccm, 11000sccm, 12000sccm, 13000sccm, 14000sccm, 15000sccm, 16000sccm, 17000sccm, 18000sccm, 19000sccm, 20000sccm, etc., the gas flow of N2 is 15000-30000sccm, for example, it can be 15000sccm, 16000sccm, 17000sccm, 18000sccm, 19000sccm, 20000sccm, 21000sccm, 22000sccm, 23000sccm, 24000sccm, 25000sccm, 26000sccm, 27000sccm, 28000sccm, 29000sccm, 30000sccm, etc., the deposition time is 1000-2000s, for example, it can be 1000s, 1100s, 1200s, 1300s, 1400s, 1500s, 1600s, 1700s, 1800s, 1900s, 2000s, etc., the deposition temperature is 500-700℃, for example, it can be 500℃, 550℃, 600℃, 650℃, 700℃, etc.;

[0041] Preferably, the gases POCI3, O2 and N2 are ventilated to prepare the second amorphous silicon layer into a second polysilicon layer;

[0042] Preferably, the thickness of the second polysilicon layer is 80-150 nm, for example, it can be 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, etc.

[0043] Preferably, the gas flow of POCI3 is 8000-12000 sccm, for example, it can be 8000 sccm, 9000 sccm, 10000 sccm, 11000 sccm, 12000 sccm, etc., the gas flow of O2 is 8000-12000 sccm, for example, it can be 8000 sccm, 9000 sccm, 10000 sccm, 11000 sccm, 12000 sccm, etc., the gas flow of N2 is 15000-30000 sccm, for example, it can be 15000 sccm, 16000 sccm, 17000 sccm, 18000 sccm, 19000 sccm, 20000 sccm, 21000 sccm, 22000 sccm, 23000 sccm, 24000 sccm, 25000 sccm, 26000 sccm, 27000 sccm, 28000 sccm, 29000 sccm, 30000 sccm, etc.

[0044] Preferably, the thickness of the second mask layer is 300-400 nm, for example, it can be 300 nm, 310 nm, 320 nm, 330 nm, 340 nm, 350 nm, 360 nm, 370 nm, 380 nm, 390 nm, 400 nm, etc., and the thickness is 5-20 nm, for example, it can be 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, 10 nm, 11 nm, 12 nm, 13 nm, 14 nm, 15 nm, 16 nm, 17 nm, 18 nm, 19 nm, 20 nm, etc.

[0045] Preferably, the laser power percentage is 30-70%, for example, it can be 30%, 35%, 40%, 45%, 50%, 55%, 60%, 65%, 70%, etc., and the scanning speed is 30000-45000 mm / s, for example, it can be 30000 mm / s, 35000 mm / s, 40000 mm / s, 45000 mm / s, etc.

[0046] Preferably, a groove polishing texturing process is used to remove the second tunneling oxide layer and the second polysilicon layer in the predetermined positive electrode area on the back surface of the silicon substrate and around the plated second tunneling oxide layer and the second polysilicon layer on the front surface of the silicon substrate, and the front surface of the silicon substrate is textured.

[0047] In the present application, the front surface is formed with a pyramid texture structure by adopting the texturing process to reduce the reflection.

[0048] Preferably, the slot polishing texturing process is an alkali slot polishing texturing process, and the formula components of the alkali slot polishing texturing process include, in terms of mass percentage concentration, 3-5% KOH, 4-8% H2O2, 1-2% corrosion inhibitor, 2-4% catalyst, 0.1-0.5% surfactant, and 0.5-2% inorganic salt, and the reaction temperature is 60-80℃, such as 60℃, 65℃, 70℃, 75℃, 80℃, etc.

[0049] In terms of the total mass of the formula of the alkali slot polishing texturing process being 100%, the mass percentage concentration of KOH is 3-5%, such as 3%, 3.5%, 4%, 4.5%, 5%, etc.

[0050] In terms of the total mass of the formula of the alkali slot polishing texturing process being 100%, the mass percentage concentration of H2O2 is 4-8%, such as 4%, 4.5%, 5%, 5.5%, 6%, 6.5%, 7%, 7.5%, 8%, etc.

[0051] In terms of the total mass of the formula of the alkali slot polishing texturing process being 100%, the mass percentage concentration of the corrosion inhibitor is 1-2%, such as 1%, 1.1%, 1.2%, 1.3%, 1.4%, 1.5%, 1.6%, 1.7%, 1.8%, 1.9%, 2%, etc.

[0052] In terms of the total mass of the formula of the alkali slot polishing texturing process being 100%, the mass percentage concentration of the catalyst is 2-4%, such as 2%, 2.5%, 3%, 3.5%, 4%, etc.

[0053] In terms of the total mass of the formula of the alkali slot polishing texturing process being 100%, the mass percentage concentration of the surfactant is 0.1-0.5%, such as 0.1%, 0.2%, 0.3%, 0.4%, 0.5%, etc.

[0054] In terms of the total mass of the formula of the alkali slot polishing texturing process being 100%, the mass percentage concentration of the inorganic salt is 0.5-2%, such as 0.5%, 0.6%, 0.7%, 0.8%, 0.9%, 1%, 1.1%, 1.2%, 1.3%, 1.4%, 1.5%, 1.6%, 1.7%, 1.8%, 1.9%, 2%, etc.

[0055] In the present application, in the formula of the alkali slot polishing texturing process, the corrosion inhibitor is dimethyl ethanolamine (DMAE) and / or triethanolamine (TEA), the catalyst is hydrogen peroxide and / or ammonia water, the surfactant is sodium dodecyl benzene sulfonate (SDBS), and the inorganic salt is sodium chloride.

[0056] Preferably, the time for alkaline tank polishing is 300-500s, for example, it can be 300s, 350s, 400s, 450s, 500s, etc., and the time for alkaline tank texturing is 400-600s, for example, it can be 400s, 450s, 500s, 550s, 600s, etc.

[0057] Preferably, the first mask layer and the second mask layer on the back surface of the silicon substrate are removed by using the acid tank polishing process.

[0058] Preferably, the formula components of the acid tank polishing process include 4-8% HF and 1-2% HCl in terms of mass percentage concentration.

[0059] In terms of the total mass of the formula of the acid tank polishing process being 100%, the mass percentage concentration of HF is 4-8%, for example, it can be 4%, 4.5%, 5%, 5.5%, 6%, 6.5%, 7%, 7.5%, 8%, etc.

[0060] In terms of the total mass of the formula of the acid tank polishing process being 100%, the mass percentage concentration of HCl is 1-2%, for example, it can be 1%, 1.5%, 2%, etc.

[0061] Preferably, the AlOx film is deposited on the front surface and the back surface of the silicon substrate by using the atomic layer deposition process.

[0062] Preferably, the thickness of the AlOx film is 3-6nm, for example, it can be 3nm, 4nm, 5nm, 6nm, etc.

[0063] Preferably, the flow ratio of the gases TMA and water required for depositing the AlOx film is (1-2):(3-5), the deposition temperature is 100-300℃, for example, it can be 100℃, 150℃, 200℃, 250℃, 300℃, etc., and the deposition time is 20-50min, for example, it can be 20min, 25min, 30min, 35min, 40min, 45min, 50min, etc.

[0064] Wherein, "1-2" can be 1, 1.5, 2, etc.

[0065] Wherein, "3-5" can be 3, 3.5, 4, 4.5, 5, etc.

[0066] Preferably, the SiNx film is deposited on the AlOx film by using the PECVD process.

[0067] Preferably, the thickness of the SiNx film is 60-100nm, for example, it can be 60nm, 65nm, 70nm, 75nm, 80nm, 85nm, 90nm, 95nm, 100nm, etc.

[0068] Preferably, the flow ratio of the gases NH3, SiH4 and N2O required for depositing the SiNx film is (1-3):(5-15):(3-13), the deposition temperature is 350-500℃, for example, it can be 350℃, 400℃, 450℃, 500℃, etc., and the deposition time is 30-80min, for example, it can be 30min, 35min, 40min, 45min, 50min, 55min, 60min, 65min, 70min, 75min, 80min, etc.

[0069] wherein "1-3" can be 1, 1.5, 2, 2.5, 3, etc.

[0070] wherein "5-15" can be 5, 5.5, 6, 6.5, 7, 7.5, 8, 8.5, 9, 9.5, 10, 10.5, 11, 11.5, 12, 12.5, 13, 13.5, 14, 14.5, 15, etc.

[0071] wherein "3-13" can be 3, 3.5, 4, 4.5, 5, 5.5, 6, 6.5, 7, 7.5, 8, 8.5, 9, 9.5, 10, 10.5, 11, 11.5, 12, 12.5, 13, etc.

[0072] Preferably, printing the electrode on the back surface of the silicon substrate comprises: printing silver paste on the preset positive electrode area and the preset negative electrode area on the back surface of the silicon substrate and performing sintering annealing treatment.

[0073] Preferably, after the SiNx film is prepared, before the electrode is printed on the back surface of the silicon substrate, a paraffin mask layer is printed on the surface of the SiNx film in the preset positive electrode area and the preset negative electrode area on the back surface of the silicon substrate, then the preset positive electrode area and the preset negative electrode area on the back surface of the silicon substrate are isolated, and then the paraffin mask layer is removed.

[0074] In the present application, the SiNx, AlOx and P-Poly-Si, N-Poly-Si, tunneling oxide layer in the non-paraffin protection area are removed to isolate the P area and the N area, preventing leakage when conduction occurs. The present application adds a paraffin mask layer to solve the abnormal leakage of the back surface P area / N area and improve the yield. The purpose of removing the paraffin mask layer after that is to remove the paraffin after the P area and the N area are isolated and perform metallization treatment.

[0075] Preferably, the width of the paraffin mask layer is 250-400nm, for example, it can be 250nm, 300nm, 350nm, 400nm, etc., and the thickness is 10-40nm, for example, it can be 10nm, 15nm, 20nm, 25nm, 30nm, 35nm, 40nm, etc.

[0076] Preferably, the preset positive electrode region and the preset negative electrode region on the back surface of the silicon substrate are isolated by wet chemical method, preferably chain acid tank process;

[0077] In the present application, the P region and the N region on the back surface are isolated by chemical etching to reduce the battery leakage.

[0078] Preferably, the formula components of the chain acid tank process include 5-8% HNO3 and 4-8% HF in terms of mass percentage concentration, the reaction temperature is 40-70℃, and the reaction time is 200-500s;

[0079] In terms of the total mass of the formula of the chain acid tank process as 100%, the mass percentage concentration of HNO3 is 5-8%, for example, it can be 5%, 5.5%, 6%, 6.5%, 7%, 7.5%, 8%, etc.

[0080] In terms of the total mass of the formula of the chain acid tank process as 100%, the mass percentage concentration of HF is 4-8%, for example, it can be 4%, 4.5%, 5%, 5.5%, 6%, 6.5%, 7%, 7.5%, 8%, etc.

[0081] Preferably, the paraffin mask layer is removed by chain alkali tank process, the solution formula of the chain alkali tank process uses KOH with a concentration of 3-5%, for example, it can be 3%, 3.5%, 4%, 4.5%, 5%, etc., the reaction temperature is 60-80℃, for example, it can be 60℃, 65℃, 70℃, 75℃, 80℃, etc., and the reaction time is 400-600s, for example, it can be 400s, 450s, 500s, 550s, 600s, etc.

[0082] Further, the TBC battery preparation method comprises the following steps:

[0083] Step 1: providing a silicon substrate and performing double-sided polishing treatment on the silicon substrate;

[0084] Step 2: sequentially depositing a first tunneling oxide layer and a first amorphous silicon layer (i-Poly-Si) on the back surface of the silicon substrate by using LPCVD process;

[0085] Step 3: preparing the first amorphous silicon layer in step 2 into a first polycrystalline silicon layer (P-Poly-Si) by using boron extension process;

[0086] Step 4: forming a first mask layer on the positive electrode region (P region) on the surface of the first polycrystalline silicon layer in step 3 by using laser thermal oxidation process;

[0087] Step 5: remove the first tunneling oxide layer and P-Poly-Si of the negative electrode area (N area) and the first tunneling oxide layer and P-Poly-Si layer of the front side by using a slot polishing cleaning process;

[0088] Step 6: sequentially prepare a second tunneling oxide layer and a second amorphous silicon layer (i-Poly-Si) on the back surface of the silicon substrate in the negative electrode area by using an LPCVD process;

[0089] Step 7: prepare a second polysilicon layer (N-Poly-Si) from the amorphous silicon layer of the N area in step 6 by using a phosphorus expansion process;

[0090] Step 8: form a second mask layer on the surface of the second polysilicon layer in step 8 in the N area by using a laser thermal oxidation process;

[0091] Step 9: remove the SiO2 tunneling oxide layer, N-Poly-Si layer on the surface of the back surface P area mask layer, the SiO2 tunneling oxide layer, N-Poly-Si layer of the front side and all the mask layers on the back surface by using a slot polishing texturing process, and form a pyramid textured structure on the front surface by using a texturing process;

[0092] Step 10: deposit an AlOx film on the front and back surfaces by using an atomic layer deposition process;

[0093] Step 11: deposit a SiNx film on the front and back surfaces by using a PECVD process;

[0094] Step 12: print a paraffin mask layer on the outermost SiNx surface of the back surface P area and N area by using a screen printing process;

[0095] Step 13: isolate the P area and N area on the back surface by chemical etching by using a wet chemical method;

[0096] Step 14: print silver paste on the back surface P area and N area of the silicon substrate, and perform sintering annealing treatment to form a complete cell piece.

[0097] In a second aspect, the present application provides a TBC cell prepared by using the TBC cell preparation method.

[0098] Compared with the prior art, the present application has the following beneficial effects:

[0099] The application provides a TBC battery preparation method, a mask layer is formed by adopting a laser oxidation process, a first polycrystalline silicon layer (P-Poly-Si) and a second polycrystalline silicon layer (N-Poly-Si) of a wrap-plated layer are separated and removed, the proportion of electric leakage is reduced, and the yield of the battery is improved; if the first polycrystalline silicon layer (P-Poly-Si) and the second polycrystalline silicon layer (N-Poly-Si) are not separated and removed, there is a B and P impurity intermixing condition in a polishing tank body, and the risk of electric leakage is increased. DETAILED DESCRIPTION

[0100] Unless otherwise defined, scientific and technical terms used in connection with the present application shall have the meanings that are commonly understood by a person of ordinary skill in the art. The meaning and scope of the terms should be clear; however, in the event of any latent ambiguity, the definitions provided herein take precedence over any dictionary or extrinsic definition. In this application, the use of "or" means "and / or" unless otherwise stated. Moreover, the use of the term "including" as well as other forms such as "include", is not limiting.

[0101] The technical solutions of the present application will be described clearly and completely in connection with the embodiments. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without creative labor are within the scope of protection of the present application.

[0102] The present application will be further described by the following examples. Unless otherwise specified, the materials in the examples are prepared according to the existing methods or directly purchased from the market.

[0103] Example 1

[0104] The present embodiment provides a TBC battery preparation method, comprising the following steps:

[0105] Step 1: providing a silicon substrate, and performing double-sided polishing treatment on the silicon substrate;

[0106] Step 2: depositing a SiO2 tunneling oxide layer and an amorphous silicon layer (i-Poly-Si) on the back of the silicon substrate in sequence by adopting an LPCVD process;

[0107] The thickness of the tunneling oxide layer is 1.2 nm, the gas used is O2, the gas flow is 30000 sccm, the deposition time is 400 s, and the deposition temperature is 700 DEG C.

[0108] The thickness of the i-Poly-Si layer is 80 nm, the gases used are SiH4 and N2, the gas flow is 10000 sccm and 30000 sccm respectively, the deposition time is 1000 s, and the deposition temperature is 700 DEG C.

[0109] Step 3: The amorphous silicon layer described in Step 2 is prepared into a polysilicon layer (P-Poly-Si) by using a boron expansion process;

[0110] The P-Poly layer has a thickness of 80 nm, and the gas used for deposition is BCl3, O2 and N2, the flow rate of BCl3 gas is 600 sccm, the flow rate of O2 is 500 sccm, and the flow rate of N2 is 30000 sccm.

[0111] Step 4: A mask layer is formed on the surface of the polysilicon layer described in Step 3 in the positive electrode area (P area) by using a laser thermal oxidation process;

[0112] The mask layer has a width of 400 nm and a thickness of 5 nm, and the laser power percentage is 70%, and the scanning speed is 30000 mm / s.

[0113] Step 5: The tunnel oxide layer and P-Poly-Si in the negative electrode area (N area) and the tunnel oxide layer and P-Poly-Si layer on the front side are removed by using a slot polishing cleaning process;

[0114] The slot polishing cleaning process is to remove the tunnel oxide layer and P-Poly-Si layer by alkali etching, and the alkali etching formula is 3% KOH, 1% corrosion inhibitor (dimethyl ethanolamine), 4% catalyst (hydrogen peroxide), 0.1% surfactant (sodium dodecyl benzene sulfonate), 2% inorganic salt (sodium chloride), temperature 50°C, time 600s;

[0115] Step 6: A tunnel oxide layer and an amorphous silicon layer (i-Poly-Si) are sequentially prepared on the back surface of the silicon substrate in the negative electrode area by using an LPCVD process;

[0116] The SiO2 tunnel oxide layer has a thickness of 1.2 nm, and the gas used is O2, and the gas flow rate is 30000 sccm, and the deposition time is 400s, and the deposition temperature is 700°C.

[0117] The i-Poly-Si layer has a thickness of 80 nm, and the gas used is SiH4 and N2, and the gas flow rates are 10000 sccm and 30000 sccm respectively, and the deposition time is 1000s, and the deposition temperature is 700°C.

[0118] Step 7: The amorphous silicon layer in the N area described in Step 6 is prepared into a polysilicon layer (N-Poly-Si) by using a phosphorus expansion process;

[0119] The gas used for deposition is POCl3, O2 and N2, the flow rate of POCl3 gas is 8000 sccm, the flow rate of O2 is 12000 sccm, and the flow rate of N2 is 15000 sccm.

[0120] Step 8: Form a mask layer on the surface of the N region of the polysilicon layer in step 8 by a laser thermal oxidation process;

[0121] The mask layer has a width of 300 nm, a thickness of 5 nm, a laser power percentage of 70%, and a scanning speed of 30000 mm / s.

[0122] Step 9: Remove the SiO2 tunnel oxide layer, N-Poly-Si layer on the surface of the mask layer of the back P region, SiO2 tunnel oxide layer, N-Poly-Si layer on the front side, and all mask layers on the back side by a slot polishing texturing process, and form a pyramid textured structure on the front side by a texturing process.

[0123] The SiO2 tunnel oxide layer, N-Poly-Si layer on the surface of the mask layer of the back P region, SiO2 tunnel oxide layer, N-Poly-Si layer on the front side are removed by an alkali tank polishing process with a formula of 3% KOH, 4% H2O2, 1% corrosion inhibitor (dimethyl ethanolamine), 4% catalyst (ammonia), 0.1% surfactant (sodium dodecyl benzene sulfonate), 2% inorganic salt (sodium chloride), a temperature of 80°C, and a time of 300s.

[0124] The front side texturing is performed by an alkali tank texturing process with a formula of 3% KOH, 4% H2O2, 1% corrosion inhibitor (dimethyl ethanolamine), 4% catalyst (ammonia), 0.1% surfactant (sodium dodecyl benzene sulfonate), 2% inorganic salt (sodium chloride), a temperature of 80°C, and a time of 400s.

[0125] The process formula for removing the mask layer is an HF / HCl mixed solution with concentrations of 4% and 2%, respectively.

[0126] Step 10: Deposit an AlOx film on the front and back sides by an atomic layer deposition process.

[0127] The AlOx film has a thickness of 3 nm, a deposition temperature of 300°C, a time of 20 min, and a flow ratio of TMA and water required for the AlOx film of 1:5.

[0128] Step 11: Deposit a SiNx film on the front and back sides by a PECVD process.

[0129] The SiNx film has a thickness of 60 nm, a deposition temperature of 500°C, a time of 30 min, and a flow ratio of NH3, SiH4, and N2O required for the SiNx film of 1:15:3.

[0130] Step 12: Print a paraffin mask layer on the outermost SiNx surface of the back P region and N region by a screen printing process.

[0131] The paraffin mask layer has a width of 250 nm and a thickness of 40 nm.

[0132] Step 13: The P region and the N region on the back surface are isolated by chemical etching through a wet chemical method.

[0133] The P region and the N region on the back surface are isolated by a chain acid tank process, the acid tank has a HNO3 concentration of 5%, a HF concentration of 8%, a temperature of 40°C, and a time of 500 s.

[0134] The paraffin is removed by a chain alkali tank process, the solution formula has a concentration of 3% KOH, a temperature of 80°C, and a time of 400 s.

[0135] Step 14: Silver paste is printed on the P region and the N region on the back surface of the silicon substrate, and sintering annealing treatment is performed to form a complete battery piece.

[0136] Example 2

[0137] The embodiment provides a TBC battery preparation method, including the following steps:

[0138] Step 1: A silicon substrate is provided, and the silicon substrate is subjected to double-sided polishing treatment.

[0139] Step 2: A SiO2 tunneling oxide layer and an amorphous silicon layer (i-Poly-Si) are sequentially deposited on the back surface of the silicon substrate by an LPCVD process.

[0140] The tunneling oxide layer has a thickness of 1.8 nm, the gas used is O2, the gas flow is 20000 sccm, the deposition time is 600 s, and the deposition temperature is 500°C.

[0141] The i-Poly-Si layer has a thickness of 150 nm, the gases used are SiH4 and N2, the gas flow is 20000 sccm and 15000 sccm, respectively, the deposition time is 2000 s, and the deposition temperature is 500°C.

[0142] Step 3: The amorphous silicon layer in step 2 is prepared into a polycrystalline silicon layer (P-Poly-Si) by a boron diffusion process.

[0143] The P-Poly layer has a thickness of 150 nm, and the gases used for deposition are BCl3, O2 and N2, the BCl3 gas flow is 100 sccm, the O2 flow is 2000 sccm, and the N2 flow is 15000 sccm.

[0144] Step 4: A mask layer is formed on the surface of the polycrystalline silicon layer in step 3 in the positive electrode region (P region) by a laser thermal oxidation process.

[0145] The mask layer has a width of 600 nm and a thickness of 20 nm, the laser power percentage is 30%, and the scanning speed is 45000 mm / s.

[0146] Step 5: removing the tunnel oxide layer and P-Poly-Si of the negative electrode region (N region) and the tunnel oxide layer and P-Poly-Si layer of the front side wrap plating by adopting a slot polishing cleaning process;

[0147] The slot polishing cleaning process is removing the tunnel oxide layer and P-Poly-Si layer by alkali etching, the alkali etching formula is 5% KOH, 2% corrosion inhibitor (triethanolamine), 2% catalyst (ammonia), 0.5% surfactant (sodium dodecyl benzene sulfonate), 0.5% inorganic salt (sodium chloride), the temperature is 80℃, and the time is 300s;

[0148] Step 6: preparing a tunnel oxide layer and an amorphous silicon layer (i-Poly-Si) on the back surface of the negative electrode region of the silicon substrate in sequence by adopting an LPCVD process;

[0149] The SiO2 tunnel oxide layer has a thickness of 1.8 nm, the gas used is O2, the gas flow is 20000 sccm, the deposition time is 600s, and the deposition temperature is 500℃;

[0150] The i-Poly-Si layer has a thickness of 150 nm, the gases used are SiH4 and N2, the gas flow is respectively 20000 sccm and 15000 sccm, the deposition time is 2000s, and the deposition temperature is 500℃;

[0151] Step 7: preparing the amorphous silicon layer of the N region in step 6 into a polysilicon layer (N-Poly-Si) by adopting a phosphorus diffusion process;

[0152] The gases used for deposition are POCl3, O2 and N2, the POCl3 gas flow is 12000 sccm, the O2 flow is 8000 sccm, and the N2 flow is 30000 sccm;

[0153] Step 8: forming a mask layer on the surface of the polysilicon layer of step 8 in the N region by adopting a laser thermal oxidation process;

[0154] The mask layer has a width of 400 nm and a thickness of 20 nm, the laser power percentage is 30%, and the scanning speed is 45000 mm / s;

[0155] Step 9: remove the SiO2tunneling oxide layer, N-Poly-Si layer on the surface of the back P region mask layer, the front wrap-plated SiO2tunneling oxide layer, N-Poly-Si layer, and all mask layers on the back surface by using a slot polishing texturing process, and form a pyramid textured structure on the front surface by using a texturing process;

[0156] The SiO2tunneling oxide layer, N-Poly-Si layer on the surface of the back P region mask layer, the front wrap-plated SiO2tunneling oxide layer, N-Poly-Si layer are removed by using an alkali tank polishing process, and the formula is 5% KOH, 8% H2O2, 2% corrosion inhibitor (dimethyl ethanolamine), 2% catalyst (ammonia), 0.5% surfactant (sodium dodecyl benzene sulfonate), 0.5% inorganic salt (sodium chloride), the temperature is 60°C, and the time is 500s;

[0157] The front surface texturing is performed by using an alkali tank texturing process, and the formula is 5% KOH, 8% H2O2, 2% corrosion inhibitor (dimethyl ethanolamine), 2% catalyst (ammonia), 0.5% surfactant (sodium dodecyl benzene sulfonate), 0.5% inorganic salt (sodium chloride), the temperature is 60°C, and the time is 600s;

[0158] The process formula for removing the mask layer is an HF / HCl mixed solution, and the concentrations are 8% and 1% respectively;

[0159] Step 10: deposit an AlOx film on the front and back surfaces by using an atomic layer deposition process;

[0160] The thickness of the AlOx film layer is 6nm, the deposition temperature is 100°C, the time is 50min, and the flow ratio of the required gases TMA and water for the AlOx film is 2:3;

[0161] Step 11: deposit a SiNx film on the front and back surfaces by using a PECVD process;

[0162] The thickness of the SiNx film layer is 100nm, the deposition temperature is 350°C, the time is 80min, and the flow ratio of the required gases NH3, SiH4, N2O for the SiNx film is 3:5:13;

[0163] Step 12: print a paraffin mask layer on the outermost SiNx surface of the back P region and N region by using a screen printing process;

[0164] The width of the paraffin mask layer is 400nm, and the thickness is 10nm;

[0165] Step 13: isolate the P region and N region on the back surface by chemical etching by using a wet chemical method;

[0166] The P region and the N region on the back surface are isolated by adopting a chain acid tank process, the acid tank is HNO3 with a concentration of 8%, HF with a concentration of 4%, the temperature is 70 DEG C, and the time is 200 s;

[0167] The paraffin is removed by adopting a chain alkali tank process, the solution formula is 5% KOH with a concentration, the temperature is 60 DEG C, and the time is 600 s;

[0168] Step 14: silver paste is printed on the P region and the N region on the back surface of the silicon substrate respectively, and sintering annealing treatment is performed, so that a complete battery piece is formed.

[0169] Example 3

[0170] The embodiment provides a TBC battery preparation method, which comprises the following steps:

[0171] Step 1: a silicon substrate is provided, and the silicon substrate is subjected to double-sided polishing treatment;

[0172] Step 2: a SiO2 tunneling oxide layer and an amorphous silicon layer (i-Poly-Si) are sequentially deposited on the back surface of the silicon substrate by adopting an LPCVD process;

[0173] The thickness of the tunneling oxide layer is 1.5 nm, the gas used is O2, the gas flow is 25000 sccm, the deposition time is 500 s, and the deposition temperature is 600 DEG C;

[0174] The thickness of the i-Poly-Si layer is 115 nm, the gases used are SiH4 and N2, the gas flow is 15000 sccm and 22500 sccm respectively, the deposition time is 1500 s, and the deposition temperature is 600 DEG C;

[0175] Step 3: the amorphous silicon layer in step 2 is prepared into a polycrystalline silicon layer (P-Poly-Si) by adopting a boron diffusion process;

[0176] The thickness of the P-Poly layer is 115 nm, the gases used for deposition are BCl3, O2 and N2, the BCl3 gas flow is 350 sccm, the O2 flow is 1250 sccm, and the N2 flow is 22500 sccm;

[0177] Step 4: a mask layer is formed on the surface of the polycrystalline silicon layer in step 3 in the positive electrode area (P region) by adopting a laser thermal oxidation process;

[0178] The width of the mask layer is 500 nm, the thickness is 12 nm, the laser power percentage is 50%, and the scanning speed is 37500 mm / s;

[0179] Step 5: remove the tunnel oxide layer and P-Poly-Si of the negative electrode area (N area) and the tunnel oxide layer and P-Poly-Si layer of the front side wrap plating by using a slot polishing cleaning process;

[0180] The slot polishing cleaning process is to remove the tunnel oxide layer and P-Poly-Si layer by alkali etching, the alkali etching formula is 4% KOH, 1.5% corrosion inhibitor (dimethyl ethanolamine), 3% catalyst (hydrogen peroxide), 0.3% surfactant (sodium dodecyl benzene sulfonate), 1.2% inorganic salt (sodium chloride), temperature 65℃, time 450s;

[0181] Step 6: prepare a tunnel oxide layer and an amorphous silicon layer (i-Poly-Si) in the negative electrode area of the back surface of the silicon substrate in sequence by using an LPCVD process;

[0182] The thickness of the SiO2 tunnel oxide layer is 1.5nm, the gas used is O2, the gas flow is 25000sccm, the deposition time is 500s, and the deposition temperature is 600℃;

[0183] The thickness of the i-Poly-Si layer is 115nm, the gas used is SiH4 and N2, the gas flow is 15000sccm, 22500sccm respectively, the deposition time is 1500s, and the deposition temperature is 600℃;

[0184] Step 7: prepare a polycrystalline silicon layer (N-Poly-Si) from the amorphous silicon layer of the N area described in step 6 by using a phosphorus diffusion process;

[0185] The gas used for deposition is POCl3, O2 and N2, the POCl3 gas flow is 10000sccm, the O2 flow is 10000sccm, and the N2 flow is 22500sccm;

[0186] Step 8: form a mask layer on the surface of the polycrystalline silicon layer of the N area described in step 8 by using a laser thermal oxidation process;

[0187] The width of the mask layer is 350nm, the thickness is 12nm, the laser power percentage is 50%, and the scanning speed is 37500mm / s;

[0188] Step 9: remove the SiO2 tunnel oxide layer, N-Poly-Si layer on the surface of the back P area mask layer, the front side wrap plated SiO2 tunnel oxide layer, N-Poly-Si layer and all mask layers on the back surface by using a slot polishing texturing process, and form a pyramid textured structure on the front surface by using a texturing process;

[0189] The SiO2tunnel oxide layer, the N-Poly-Si layer, the front side wrap plated SiO2tunnel oxide layer and the N-Poly-Si layer on the surface of the back surface P region mask layer are removed by an alkali tank polishing process, and the formula is 4% KOH, 6% H2O2, 1.5% corrosion inhibitor (dimethyl ethanolamine), 3% catalyst (ammonia), 0.3% surfactant (sodium dodecyl benzene sulfonate), 1.2% inorganic salt (sodium chloride), the temperature is 70°C, and the time is 400s;

[0190] The front surface is textured by an alkali tank texturing process, and the formula is 4% KOH, 6% H2O2, 1.5% corrosion inhibitor (dimethyl ethanolamine), 3% catalyst (ammonia), 0.3% surfactant (sodium dodecyl benzene sulfonate), 1.2% inorganic salt (sodium chloride), the temperature is 70°C, and the time is 500s;

[0191] The process formula for removing the mask layer is an HF / HCl mixed solution, and the concentrations are 6% and 1.5% respectively;

[0192] Step 10: An AlOx film is deposited on the front and back surfaces by an atomic layer deposition process;

[0193] The thickness of the AlOx film layer is 4.5nm, the deposition temperature is 200°C, the time is 35min, and the flow ratio of the required gases TMA and water of the AlOx film is 1.5:4;

[0194] Step 11: A SiNx film is deposited on the front and back surfaces by a PECVD process;

[0195] The thickness of the SiNx film layer is 80nm, the deposition temperature is 425°C, the time is 55min, and the flow ratio of the required gases NH3, SiH4 and N2O of the SiNx film is 2:10:8;

[0196] Step 12: A paraffin mask layer is printed on the outermost SiNx surface of the back surface P region and N region by a screen printing process;

[0197] The width of the paraffin mask layer is 325nm, and the thickness is 25nm;

[0198] Step 13: The back surface P region and N region are isolated by chemical etching by a wet chemical method;

[0199] The back surface P region and N region are isolated by a chain acid tank process, the acid tank is HNO3 with a concentration of 6.5%, the HF concentration is 6%, the temperature is 55°C, and the time is 350s;

[0200] The paraffin is removed by a chain alkali tank process, and the solution formula is 4% KOH with a temperature of 70°C and a time of 500s;

[0201] Step 14: Print silver paste on the back surface P region and N region of the silicon substrate respectively, and perform sintering annealing treatment to form a complete battery piece.

[0202] Example 4

[0203] The embodiment provides a TBC battery preparation method, which is different from the embodiment 3 in that steps 12 and 13 are not performed.

[0204] Example 5

[0205] The embodiment provides a TBC battery preparation method, which is different from the embodiment 3 in that the laser power percentage in step 4 is 28%.

[0206] Example 6

[0207] The embodiment provides a TBC battery preparation method, which is different from the embodiment 3 in that the laser power percentage in step 4 is 72%.

[0208] Example 7

[0209] The embodiment provides a TBC battery preparation method, which is different from the embodiment 3 in that the laser power percentage in step 8 is 28%.

[0210] Example 8

[0211] The embodiment provides a TBC battery preparation method, which is different from the embodiment 3 in that the laser power percentage in step 8 is 72%.

[0212] Comparative Example 1

[0213] The comparative example provides a TBC battery preparation method, which is different from the embodiment 3 in that after the preparation of the P-Poly-Si, a boron diffusion process deposition method is used to prepare a mask layer, and after the preparation of the N-Poly-Si, a phosphorus diffusion process deposition method is used to prepare a mask layer, and then a chain type acid tank process is used to remove the front side around plated mask layer, P-Poly and N-Poly at the same time, wherein the acid tank cleaning process formula adopts HNO3 and HF process formula.

[0214] Test Example

[0215] Test Sample: The TBC batteries prepared by the embodiments 1-8 and the TBC battery prepared by the comparative example 1.

[0216] Test Method: The Halm tester is used to measure the leakage ratio and yield of the solar cell piece.

[0217] The test results are shown in Table 1.

[0218] Table 1

[0219]

[0220] As can be seen from Table 1, it can be known from the data of Example 3 and Comparative Example 1 that the TBC battery prepared by the TBC battery preparation method provided in the embodiment of the application has a lower leakage ratio and a higher battery yield; meanwhile, it can be known from the data of Example 3 and Example 4 that when the paraffin mask layer is not treated, the battery has a large leakage ratio and a low yield.

[0221] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, but not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A method of TBC cell preparation, characterized in that, The TBC battery preparation method comprises the following steps: (a) sequentially preparing a first tunneling oxide layer and a first polysilicon layer on the back surface of a silicon substrate, preparing a first mask layer on a preset positive electrode area of the first polysilicon layer by using a laser thermal oxidation method, and then removing the first tunneling oxide layer and the first polysilicon layer in a preset negative electrode area on the back surface of the silicon substrate and the first tunneling oxide layer and the first polysilicon layer that are plated around the front surface of the silicon substrate; (b) sequentially preparing a second tunneling oxide layer and a second polysilicon layer on the preset negative electrode area on the back surface of the silicon substrate after the treatment in step (a), preparing a second mask layer on a preset negative electrode area of the second polysilicon layer by using a laser thermal oxidation method, and then removing the second tunneling oxide layer and the second polysilicon layer in a preset positive electrode area on the back surface of the silicon substrate and the second tunneling oxide layer and the second polysilicon layer that are plated around the front surface of the silicon substrate; (c) removing the first mask layer and the second mask layer on the back surface of the silicon substrate; (d) sequentially preparing an AlOx film and an SiNx film on the silicon substrate, and then printing an electrode on the back surface of the silicon substrate to form a battery piece.

2. The TBC cell preparation method of claim 1, wherein, Preferably, the thickness of the first tunneling oxide layer is 1.2-1.8 nm; Preferably, the gas flow of O2 is 20000-30000 sccm, the deposition time is 400-600 s, and the deposition temperature is 500-700 ℃; Preferably, the preparation of the first polysilicon layer comprises: preparing a first amorphous silicon layer on the first tunneling oxide layer, and then preparing the first amorphous silicon layer into the first polysilicon layer by using a boron diffusion process; Preferably, SiH4 and N2 are introduced into the LPCVD device to prepare the first amorphous silicon layer; Preferably, the thickness of the first amorphous silicon layer is 80-150 nm; Preferably, the gas flow of SiH4 is 10000-20000 sccm, the gas flow of N2 is 15000-30000 sccm, the deposition time is 1000-2000 s, and the deposition temperature is 500-700 ℃; Preferably, the first amorphous silicon layer is prepared into the first polysilicon layer by introducing the gases BCl3, O2 and N2; Preferably, the thickness of the first polysilicon layer is 80-150 nm; Preferably, the gas flow of BCl3 is 100-600 sccm, the gas flow of O2 is 500-2000 sccm, and the gas flow of N2 is 15000-30000 sccm. The width of the first mask layer is 400-600 nm, and the thickness is 5-20 nm; 3. The TBC cell fabrication method of claim 1, wherein, Preferably, the laser power percentage is 30-70%, and the scanning speed is 30000-45000 mm / s. The first tunneling oxide layer and the first polysilicon layer in the preset negative electrode area on the back surface of the silicon substrate and the first tunneling oxide layer and the first polysilicon layer that are plated around the front surface of the silicon substrate are removed by using a slot polishing cleaning process.

4. The TBC cell fabrication method of claim 1, wherein, ​ Preferably, the alkali etching formula components used in the groove polishing cleaning process include, in terms of mass percentage concentration, 3-5% KOH, 1-2% corrosion inhibitor, 2-4% catalyst, 0.1-0.5% surfactant and 0.5-2% inorganic salt; Preferably, the reaction temperature is 50-80℃, and the reaction time is 300-600s.

5. The TBC cell fabrication method of claim 1, wherein, Preparation of the second tunneling oxide layer in the preset negative electrode area on the back of the silicon substrate includes: introducing O2 into the LPCVD device to deposit the second tunneling oxide layer in the preset negative electrode area; Preferably, the thickness of the second tunneling oxide layer is 1.2-1.8nm; Preferably, the gas flow of O2 is 20000-30000sccm, the deposition time is 400-600s, and the deposition temperature is 500-700℃; Preferably, the preparation of the second polysilicon layer includes: preparing a second amorphous silicon layer on the second tunneling oxide layer, and then using a phosphorus diffusion process to prepare the second amorphous silicon layer into a second polysilicon layer; Preferably, SiH4 and N2 are introduced into the LPCVD device to prepare the second amorphous silicon layer; Preferably, the thickness of the second amorphous silicon layer is 80-150nm; Preferably, the gas flow of SiH4 is 10000-20000sccm, the gas flow of N2 is 15000-30000sccm, the deposition time is 1000-2000s, and the deposition temperature is 500-700℃; Preferably, the gas POCl3, O2 and N2 are introduced to prepare the second amorphous silicon layer into a second polysilicon layer; Preferably, the thickness of the second polysilicon layer is 80-150nm; Preferably, the gas flow of POCl3 is 8000-12000sccm, the gas flow of O2 is 8000-12000sccm, and the gas flow of N2 is 15000-30000sccm.

6. The TBC cell fabrication method of claim 1, wherein, The thickness of the second mask layer is 300-400nm, and the thickness is 5-20nm; Preferably, the laser power percentage is 30-70%, and the scanning speed is 30000-45000mm / s.

7. The TBC cell fabrication method of claim 1, wherein, The groove polishing texturing process is used to remove the second tunneling oxide layer and the second polysilicon layer in the preset positive electrode area on the back of the silicon substrate and the second tunneling oxide layer and the second polysilicon layer that are plated around the front of the silicon substrate, and at the same time, the front of the silicon substrate is textured; Preferably, the groove polishing texturing process is an alkali groove polishing texturing process, and the formula components of the alkali groove polishing texturing process include, in terms of mass percentage concentration, 3-5% KOH, 4-8% H2O2, 1-2% corrosion inhibitor, 2-4% catalyst, 0.1-0.5% surfactant and 0.5-2% inorganic salt, and the reaction temperature is 60-80℃; Preferably, the time of alkali groove polishing is 300-500s, and the time of alkali groove texturing is 400-600s; Preferably, an acid groove polishing process is used to remove the first mask layer and the second mask layer on the back of the silicon substrate; Preferably, the formula components of the acid groove polishing process include, in terms of mass percentage concentration, 4-8% HF and 1-2% HCl.

8. The TBC cell fabrication method of claim 7, wherein, An atomic layer deposition process is used to deposit an AlOx film on the front and back of the silicon substrate; Preferably, the thickness of the AlOx film is 3-6nm; Preferably, the flow ratio of the gases TMA and water required for depositing the AlOx film is (1-2):(3-5), the deposition temperature is 100-300℃, and the deposition time is 20-50min; Preferably, a SiNx film is deposited on the AlOx film by PECVD process; Preferably, the thickness of the SiNx film is 60-100nm; Preferably, the flow ratio of the gases NH3, SiH4 and N2O required for depositing the SiNx film is (1-3):(5-15):(3-13), the deposition temperature is 350-500℃, and the deposition time is 30-80min; Preferably, printing electrodes on the back surface of the silicon substrate comprises printing silver paste on the preset positive electrode area and the preset negative electrode area of the back surface of the silicon substrate and performing sintering annealing treatment.

9. The TBC cell fabrication method of claim 1, wherein, After the SiNx film is prepared, before printing electrodes on the back surface of the silicon substrate, a paraffin mask layer is printed on the surface of the SiNx film in the preset positive electrode area and the preset negative electrode area of the back surface of the silicon substrate, then the preset positive electrode area and the preset negative electrode area of the back surface of the silicon substrate are isolated, and then the paraffin mask layer is removed; Preferably, the width of the paraffin mask layer is 250-400nm, and the thickness is 10-40nm; Preferably, the preset positive electrode area and the preset negative electrode area of the back surface of the silicon substrate are isolated by wet chemical method, and the wet chemical method is preferably chain acid tank process; Preferably, the chain acid tank process comprises 5-8% HNO3 and 4-8% HF in terms of mass percentage concentration, the reaction temperature is 40-70℃, and the reaction time is 200-500s; Preferably, the paraffin mask layer is removed by chain alkali tank process, and the solution formula of the chain alkali tank process uses KOH with a concentration of 3-5%, the reaction temperature is 60-80℃, and the reaction time is 400-600s.

10. A TBC battery prepared by the TBC battery preparation method of any one of claims 1-9.

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