Multilayer ceramic capacitor
By introducing a conductive resin layer and metal filler into the external electrodes of a multilayer ceramic capacitor, and configuring a Ni-plated layer and a Sn-plated layer on its surface, the problems of insufficient mechanical strength and high ESR in the prior art are solved, and the impact resistance and thermal cycling performance of the capacitor are improved.
Patent Information
- Application Number
- CN202480021008.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-03-29
- Filing Date
- 2024-02-16
- Publication Date
- 2025-10-24
AI Technical Summary
Existing multilayer ceramic capacitors have high contact resistance and ESR (equivalent series resistance) after forming an epoxy thermosetting resin layer between the electrode layer and the Ni plating layer, resulting in insufficient mechanical strength.
A conductive resin layer and a metal filler are introduced into the external electrode of a multilayer ceramic capacitor, and a Ni-plated layer and a Sn-plated layer are deposited on its surface to form a Ni-coated filler layer, which improves mechanical strength and reduces ESR.
This achieves improved mechanical strength and reduced ESR, enhancing the resistance of multilayer ceramic capacitors to physical shock and thermal cycling, and reducing the contact resistance of the electrode layers.
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Figure CN120836069A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to a multilayer ceramic capacitor. BACKGROUND
[0002] In recent years, ceramic electronic components typified by multilayer ceramic capacitors are increasingly used in more severe environments than ever before. For example, for electronic components used in mobile devices such as portable telephones, portable music players, and the like, it is required that they can withstand impact at the time of falling. Specifically, it is necessary to make the electronic components such that even if subjected to falling impact, they do not fall off the mounting substrate, or cracks are not generated in the electronic components.
[0003] Further, for electronic components used in vehicle-mounted devices such as ECUs (Electronic Control Units), it is required that they can withstand impact of thermal cycles. Specifically, it is necessary to make the electronic components such that even if subjected to a flexural stress generated by thermal expansion and contraction of the mounting substrate due to thermal cycles, cracks are not generated in the electronic components.
[0004] In view of this, a scheme of using a thermosetting conductive resin paste for the external electrode of a ceramic electronic component has been proposed. For example, in Patent Literature 1, a countermeasure is taken in which an epoxy-based thermosetting resin layer is formed between the electrode layer of the related art and the Ni plating layer, and cracks are not generated in the capacitor main body even in a severe environment. That is, a countermeasure for improving flexural resistance is taken.
[0005] In such a structure, when a stress caused by impact at the time of falling, a flexural stress generated by thermal expansion and contraction of the mounting substrate due to thermal cycles is generated, for the stress transmitted to the mounting substrate, in other words, the deformation of the mounting substrate, the stress is released by peeling between the electrode layer and the epoxy-based thermosetting resin layer with the leading end of the epoxy-based thermosetting resin layer as a base point, and generation of cracks in the ceramic electronic component main body is suppressed.
[0006] PRIOR ART DOCUMENTS
[0007] PATENT LITERATURE
[0008] Patent Literature 1: Japanese Patent Application Laid-Open No. 11-162771 SUMMARY
[0009] PROBLEMS TO BE SOLVED BY THE INVENTION
[0010] However, in the design in which the epoxy-based thermosetting resin layer is formed between the electrode layer and the Ni plating layer in the multilayer ceramic electronic component like that of Patent Literature 1, there is a problem that the contact resistance of the epoxy-based thermosetting resin layer and the Ni plating layer becomes high and the ESR (Equivalent Series Resistance) becomes high.
[0011] Therefore, the present application has an object to provide a laminated ceramic electronic component, particularly a laminated ceramic capacitor having high mechanical strength and reduced ESR.
[0012] Technical solution for solving the problem
[0013] The laminated ceramic capacitor of the present application has: a laminate including a plurality of dielectric layers laminated, and having a first main surface and a second main surface opposing in a height direction, a first side surface and a second side surface opposing in a width direction orthogonal to the height direction, and a first end surface and a second end surface opposing in a length direction orthogonal to the height direction and the width direction; a first internal electrode layer disposed on the plurality of dielectric layers and exposed at the first end surface; a second internal electrode layer disposed on the plurality of dielectric layers and exposed at the second end surface; a first external electrode disposed on the first end surface; and a second external electrode disposed on the second end surface, wherein the first external electrode and the second external electrode have: a base electrode layer including a metal component; a conductive resin layer disposed on the base electrode layer and including a thermosetting resin and a metal filler; a Ni plating layer disposed on the conductive resin layer; and a Sn plating layer disposed on the Ni plating layer, at least a part of a surface of the metal filler being provided with Ni as a component of the Ni plating layer.
[0014] Effects of the invention
[0015] According to the present application, it is possible to provide a laminated ceramic capacitor having high mechanical strength and reduced ESR. BRIEF DESCRIPTION OF DRAWINGS
[0016] Figure 1 is a perspective view of the laminated ceramic capacitor of the present embodiment.
[0017] Figure 2 is a cross-sectional view taken along line I-I of Figure 1
[0018] Figure 3 is a cross-sectional view taken along line II-II of Figure 1
[0019] Figure 4 is an enlarged view of the frame surrounding portion R1 of Figure 1
[0020] Figure 5A is an enlarged view of the frame surrounding portion R2 of Figure 4
[0021] is a view showing one example of Ni-coated filler. Figure 5B
[0022] Figure 5C is a view showing one example of the Ni-coated filler.
[0023] Figure 5D is a view showing one example of the Ni-coated filler.
[0024] Figure 5E is a view showing one example of the Ni-coated filler.
[0025] Figure 5F is a view showing one example of the Ni-coated filler.
[0026] Figure 6 is a view showing characteristics of the embodiment and the comparative examples. DETAILED DESCRIPTION
[0027] Based on Figure 1 to explain a manner for carrying out the invention. Figure 1 is a perspective view of a multilayer ceramic capacitor 1 according to an embodiment of the present invention.
[0028] (Laminate)
[0029] The laminate 2 includes a plurality of dielectric layers and a plurality of internal electrode layers laminated. The laminate 2 has a substantially rectangular parallelepiped shape. In the laminate 2, a direction in which the dielectric layers and the internal electrode layers are laminated is set as a height direction T. A direction orthogonal to the height direction T is set as a width direction W. A direction orthogonal to the height direction T and the width direction W is set as a length direction L.
[0030] In the laminate 2, one of two faces facing each other in the height direction T is set as a first main face Ml. The remaining one is set as a second main face M2. In the laminate 2, one of two faces facing each other in the width direction W is set as a first side face SI. The remaining one is set as a second side face. In the laminate 2, one of two faces facing each other in the length direction L is set as a first end face El. The remaining one is set as a second end face E2. The mounting face of the multilayer ceramic capacitor 1 is the second main face M2. The mounting face means a face facing a wiring substrate or the like when the multilayer ceramic capacitor 1 is mounted to the wiring substrate or the like.
[0031] Regarding the cross section of the laminate 2, a cross section of the I-I line of Figure 1 is set as an LT cross section. Regarding the cross section of the laminate 2, a cross section of the II-II line of Figure 1 is set as a WT cross section.
[0032] A portion where three faces of the laminate 2 intersect is set as a corner portion of the laminate 2, and a portion where two faces of the laminate 2 intersect is set as an edge line portion of the laminate 2. It is preferable that a round corner is provided at the corner portion and the edge line portion.
[0033] (Dielectric Layer)
[0034] The total number of pieces of the dielectric layers laminated in the laminate 2 is preferably 15 or more and 2000 or less. The main material of the dielectric layer is a ceramic material. Examples of the ceramic material are dielectric ceramics in which BaTiO3, CaTiO3, SrTiO3, CaZrO3, or the like is the main component. The ceramic material can also be dielectric ceramics in which a Mn compound, a Fe compound, a Cr compound, a Co compound, a Ni compound, or the like is added as a subcomponent to these main components.
[0035] The thickness of one layer of the dielectric layer is preferably 0.5 μm or more and 10 μm or less.
[0036] (Division of the laminate)
[0037] Based on Figure 2 The division of the length direction L of the laminate 2 will be described. Figure 2 is Figure 1 is a cross-sectional view taken along the line I-I of the laminate 2. The laminate 2 can be divided in the height direction T into a first main surface side outer layer portion OLI, an inner layer range IL, and a second main surface side outer layer portion OL2. The first main surface side outer layer portion OLI, the inner layer range IL, and the second main surface side outer layer portion OL2 are arranged in order in the height direction T from the first main surface Ml toward the second main surface M2.
[0038] The first main surface side outer layer portion OLI is a portion between the inner electrode layer closest to the first main surface Ml and the first main surface Ml. The inner layer range IL is a range in which the inner electrode layers are opposed to each other. The second main surface side outer layer portion OL2 is a portion between the inner electrode layer closest to the second main surface M2 and the second main surface M2.
[0039] The first main surface side outer layer portion OLI is located on the first main surface Ml side of the laminate 2. The first main surface side outer layer portion OLI is formed of a collection of a plurality of dielectric layers located between the first main surface Ml and the inner electrode layer closest to the first main surface Ml. The first main surface side outer layer portion OLI is formed of a plurality of dielectric layers located between the first main surface Ml and the outermost surface of the inner layer range IL on the first main surface Ml side and an extension line of the outermost surface thereof.
[0040] The second main surface side outer layer portion OL2 is located on the second main surface M2 side of the laminate 2. The second main surface side outer layer portion OL2 is formed of a collection of a plurality of dielectric layers located between the second main surface M2 and the inner electrode layer closest to the second main surface M2. The second main surface side outer layer portion OL2 is formed of a plurality of dielectric layers located between the second main surface M2 and the outermost surface of the inner layer range IL on the second main surface M2 side and an extension line of the outermost surface thereof.
[0041] The inner layer range IL is a range sandwiched by the first main surface side outer layer portion OLI and the second main surface side outer layer portion OL2.
[0042] The dielectric layer disposed on the first main surface side outer layer portion OL1 and the second main surface side outer layer portion OL2 is an outer layer dielectric layer 3. The dielectric layer disposed in the inner layer range IL is an inner layer dielectric layer 4.
[0043] In the description of length and position, the following terms are sometimes used.
[0044] The length in the length direction L is the length direction length. The length in the width direction W is the width direction length. The length in the height direction T is the height direction length.
[0045] The position of the length that is half of the length direction length is the central position in the length direction L. The central position in the length direction L is the length direction central position.
[0046] The position of the length that is half of the width direction length is the central position in the width direction W. The central position in the width direction W is the width direction central position.
[0047] The position of the length that is half of the height direction length is the central position in the height direction T. The central position in the height direction T is the height direction central position.
[0048] The end in the length direction L is the length direction end. The end in the width direction W is the width direction end. The end in the height direction T is the height direction end.
[0049] The size of the laminate 2 is not particularly limited. The length direction length of the laminate is preferably 0.2 mm or more and 10 mm or less. The width direction length of the laminate 2 is preferably 0.1 mm or more and 5 mm or less. The height direction length of the laminate 2 is preferably 0.1 mm or more and 5 mm or less.
[0050] (L gap)
[0051] The division of the length direction L of the laminate 2 is described. The laminate 2 can be divided into a first end surface side outer layer portion LG1, a length direction opposing portion LF, and a second end surface side outer layer portion LG2 in the length direction L. The first end surface side outer layer portion LG1, the length direction opposing portion LF, and the second end surface side outer layer portion LG2 are arranged in order from the first end surface E1 toward the second end surface E2 in the length direction L.
[0052] The length direction facing portion LF is a portion in which the internal electrode layers face each other in the height direction T. The first end surface side outer layer portion LG1 is a portion between the length direction facing portion LF and the first end surface E1. The second end surface side outer layer portion LG2 is a portion between the length direction facing portion LF and the second end surface E2. The length direction facing portion LF is a portion corresponding to the facing electrode portion of the internal electrode layer. The first end surface side outer layer portion LG1 and the second end surface side outer layer portion LG2 are portions corresponding to the lead electrode portion of the internal electrode layer. The first end surface side outer layer portion LG1 and the second end surface side outer layer portion LG2 are also referred to as L-gaps.
[0053] In addition, the facing electrode portion includes the first facing electrode portion 7a and the second facing electrode portion 7b. Furthermore, the lead electrode portion includes the first lead electrode portion 8a and the second lead electrode portion 8b. The facing electrode portion and the lead electrode portion will be described later.
[0054] The first end surface side outer layer portion LG1 is located on the first end surface E1 side. The first end surface side outer layer portion LG1 is located between the first end surface E1 and the end of the first end surface E1 side of the second internal electrode layer 6b.
[0055] The second end surface side outer layer portion LG2 is located on the second end surface E2 side. The second end surface side outer layer portion LG2 is located between the second end surface E2 and the end of the second end surface E2 side of the first internal electrode layer 6a.
[0056] (W-gaps)
[0057] Based on Figure 3 The division of the width direction W of the laminate 2 will be described. Figure 3 is Figure 1 II-II line sectional view of the laminate 2. The laminate 2 can be divided into the first side surface side outer layer portion WG1, the width direction facing portion WF, and the second side surface side outer layer portion WG2 in the width direction W. The first side surface side outer layer portion WG1, the width direction facing portion WF, and the second side surface side outer layer portion WG2 are arranged in order from the first side surface S1 toward the second side surface S2 in the width direction W.
[0058] The width direction facing portion WF is a portion in which the internal electrode layers face each other in the height direction T. The first side surface side outer layer portion WG1 is a portion between the width direction facing portion WF and the first side surface S1. The second side surface side outer layer portion WG2 is a portion between the width direction facing portion WF and the second side surface S2. The first side surface side outer layer portion WG1 and the second side surface side outer layer portion WG2 are also referred to as W-gaps.
[0059] The first side surface side outer layer portion WG1 and the second side surface side outer layer portion WG2 are portions in which the internal electrode layer does not exist in the height direction T. The first side surface side outer layer portion WG1 is located on the first side surface S1 side. The first side surface side outer layer portion WG1 is formed of a plurality of dielectric layers located between the most surface and the first side surface S1 of the width direction facing portion WF on the first side surface S1 side.
[0060] The second side surface side outer layer portion WG2 is located on the second side surface S2 side. The second side surface side outer layer portion WG2 is formed of a plurality of dielectric layers located between the most surface and the second side surface S2 of the width direction facing portion WF on the second side surface S2 side.
[0061] (The internal electrode layer)
[0062] The internal electrode layer includes a plurality of first internal electrode layers 6a and a plurality of second internal electrode layers 6b. The first internal electrode layer 6a is an internal electrode layer exposed at the first end surface E1. The second internal electrode layer 6b is an internal electrode layer exposed at the second end surface E2.
[0063] The first internal electrode layer 6a can be divided into a first facing electrode portion 7a and a first lead electrode portion 8a. The first facing electrode portion 7a is a portion facing the second internal electrode layer 6b. The first lead electrode portion 8a is a portion led out from the first facing electrode portion 7a to the first end surface E1 of the laminate 2.
[0064] Regarding the first lead electrode portion 8a, the end on the first end surface E1 side is led out to the surface of the first end surface E1 of the laminate 2. The end of the first lead electrode portion 8a led out to the first end surface E1 forms an exposed portion at the first end surface E1.
[0065] The second internal electrode layer 6b can be divided into a second facing electrode portion 7b and a second lead electrode portion 8b. The second facing electrode portion 7b is a portion facing the first internal electrode layer 6a. The second lead electrode portion 8b is a portion led out from the second facing electrode portion 7b to the second end surface E2 of the laminate 2.
[0066] Regarding the second lead electrode portion 8b, the end on the second end surface E2 side is led out to the surface of the second end surface E2 of the laminate 2. The end of the second lead electrode portion 8b led out to the second end surface E2 forms an exposed portion at the second end surface E2.
[0067] The shape of the first facing electrode portion 7a and the shape of the second facing electrode portion 7b are not particularly limited. The shape of the first facing electrode portion 7a and the shape of the second facing electrode portion 7b are preferably rectangular. The corner portions of the first facing electrode portion 7a and the corner portions of the second facing electrode portion 7b can also be rounded. The corner portions of the first facing electrode portion 7a and the corner portions of the second facing electrode portion 7b can also be formed obliquely. By obliquely formed, it means formed in a tapered shape.
[0068] The shapes of the first lead-out electrode portion 8a and the second lead-out electrode portion 8b are not particularly limited. The shapes of the first lead-out electrode portion 8a and the second lead-out electrode portion 8b are preferably rectangular. The corners of the first lead-out electrode portion 8a and the second lead-out electrode portion 8b may be rounded. The corners of the first lead-out electrode portion 8a and the second lead-out electrode portion 8b may also be formed obliquely. The so-called oblique formation means forming into a tapered shape.
[0069] The width of the first counter electrode portion 7a and the width of the first lead electrode portion 8a may be the same, or one of the widths of the first counter electrode portion 7a and the first lead electrode portion 8a may be narrower than the other.
[0070] The width of the second counter electrode portion 7b and the width of the second lead electrode portion 8b may be the same, or one of the widths of the second counter electrode portion 7b and the second lead electrode portion 8b may be narrower than the other.
[0071] The first and second internal electrode layers 6a and 6b can be made of metals such as Ni, Cu, Ag, Pd, and Au. They can also be made of alloys containing at least one of the aforementioned metals such as Ag-Pd alloy.
[0072] In the multilayer ceramic capacitor 1, the first counter electrode portion 7a and the second counter electrode portion 7b face each other with the inner dielectric layer 4 interposed therebetween, thereby forming capacitance.
[0073] The thickness of the first internal electrode layer 6a and the thickness of the second internal electrode layer 6b are preferably about 0.2 μm or more and 2.0 μm or less. The total number of the first internal electrode layers 6a and the second internal electrode layers 6b is preferably 15 or more and 2000 or less.
[0074] (Inner layer)
[0075] The portion where the first internal electrode layer 6a and the second internal electrode layer 6b face each other is referred to as an inner layer portion 10. The inner layer portion 10 is Figure 2 The longitudinal direction opposing portion LF shown and Figure 3 The width direction opposing portion WF shown intersects the inner layer range IL. The shape of the inner layer portion 10 is a roughly rectangular parallelepiped. Figure 2 In FIG, the portion where the longitudinal direction facing portion LF and the inner layer range IL intersect is shown as the inner layer portion 10. Figure 3In FIG. 1 , the inner layer portion 10 is a portion where the widthwise facing portion WF and the inner layer range IL intersect.
[0076] (External electrode)
[0077] The external electrodes are described below. The external electrodes include a first external electrode 20a and a second external electrode 20b. The first external electrode 20a is connected to the first internal electrode layer 6a. The first external electrode 20a is disposed on the first end face E1, a portion of the first principal surface M1, a portion of the second principal surface M2, a portion of the first side surface S1, and a portion of the second side surface S2.
[0078] The second external electrode 20b is connected to the second internal electrode layer 6b and is arranged on the second end surface E2, a portion of the first main surface M1, a portion of the second main surface M2, a portion of the first side surface S1, and a portion of the second side surface S2.
[0079] The external electrode preferably includes a base electrode layer, a conductive resin layer, and a plating layer. The plating layer preferably includes a Ni plating layer and a Sn plating layer. The external electrode including the base electrode layer, the conductive resin layer, the Ni plating layer, and the Sn plating layer is described below.
[0081] (Base electrode layer)
[0082] The foundation electrode layer includes a first foundation electrode layer 21a and a second foundation electrode layer 21b. The first foundation electrode layer 21a is disposed on the first end face E1, a portion of the first principal face M1, a portion of the second principal face M2, a portion of the first side face S1, and a portion of the second side face S2. The second foundation electrode layer 21b is disposed on the second end face E2, a portion of the first principal face M1, a portion of the second principal face M2, a portion of the first side face S1, and a portion of the second side face S2.
[0083] The base electrode layer includes a conductive metal and a glass component. The conductive metal is at least one of Cu, Ni, Ag, Pd, an Ag-Pd alloy, and Au. The glass component is at least one of B, Si, Ba, Mg, Al, and Li.
[0084] The base electrode layer can also be formed with multiple layers. The base electrode layer can be formed by applying a conductive paste containing a glass component and a metal to the laminate and then firing it. The base electrode layer can be fired simultaneously with the internal electrode layers. Alternatively, the base electrode layer can be fired separately after the internal electrode layers are fired.
[0085] In the case where the base electrode layer and the internal electrode layer are simultaneously fired, it is preferable to add a dielectric material in place of a glass component in the conductive paste. Thereby, the adhesion of the base electrode layer and the laminate 2 can be improved.
[0086] The thickness of the base electrode layer at the heightwise central position of the first end surface E1 or the first end surface E2 is preferably 10 μm or more and 150 μm or less.
[0087] In the case where the base electrode layer is provided on the first main surface M1, the second main surface M2, the first side surface S1, and the second side surface S2, the thickness of the base electrode layer at the lengthwise central position of the first main surface M1, the second main surface M2, the first side surface S1, and the second side surface S2 is preferably 5 μm or more and 50 μm or less.
[0088] In addition, the base electrode layer can also be provided as a thin film layer. In the case where the base electrode layer is provided as a thin film layer, the thin film layer can be formed by a thin film formation method such as a sputtering method or an evaporation method. The formed thin film layer becomes a layer in which metal particles are deposited. The thickness of the thin film layer is preferably 1 μm or less.
[0089] (Conductive resin layer)
[0090] A conductive resin layer is disposed on the base electrode layer. The conductive resin layer includes a resin component and a metal component. The conductive resin layer includes a first conductive resin layer 22a and a second conductive resin layer 22b.
[0091] The first conductive resin layer 22a is disposed on the first base electrode layer 21a. The first conductive resin layer 22a covers the first base electrode layer 21a. The second conductive resin layer 22b is disposed on the second base electrode layer 21b. The second conductive resin layer 22b covers the second base electrode layer 21b. The end of the conductive resin layer is preferably in contact with the laminate 2.
[0092] The conductive resin layer includes a thermosetting resin. By including the thermosetting resin, the conductive resin layer is softer than the base electrode layer.
[0093] The conductive resin layer functions as a buffer layer. Therefore, in the case where a flexural stress is applied to a mounting substrate and a physical impact is applied to the laminate ceramic capacitor 1 due to the stress, a crack is less likely to occur in the laminate ceramic capacitor 1. In the case where an impact due to thermal cycling is applied to the laminate ceramic capacitor 1, a crack is less likely to occur in the laminate ceramic capacitor 1.
[0094] The thermosetting resin included in the conductive resin layer can employ an epoxy resin, a phenol resin, a polyurethane resin, a silicone resin, a polyimide resin, or the like. Among these resins, an epoxy resin is one of the most suitable resins. An epoxy resin is excellent in heat resistance, moisture resistance, adhesion, and the like.
[0095] The conductive resin layer preferably includes a curing agent in addition to the thermosetting resin. In the case where an epoxy resin is used as the thermosetting resin, the curing agent can employ a phenol-based, amine-based, acid anhydride-based, imidazole-based, active ester-based, amide imide-based, or the like.
[0096] As described above, the metal component is included in the conductive resin layer. Since the metal component is included in the conductive resin layer, the conductive resin layer becomes capable of conducting electricity. The metal component included in the conductive resin layer is included in the conductive resin layer as a metal filler. The metal filler and the contact of the metal filler form a conduction path inside the conductive resin layer. Through the formed conduction path, the conductive resin layer becomes capable of conducting electricity. The metal component will be described later.
[0097] The thickness of the conductive resin layer at the height direction central position of the first end surface El or the second end surface E2 is preferably 10 μm or more and 200 μm or less.
[0098] In the case where the conductive resin layer is provided on the first main surface Ml, the second main surface M2, the first side surface Sl, and the second side surface S2, the thickness of the conductive resin layer at the length direction central position of the first main surface Ml, the second main surface M2, the first side surface Sl, and the second side surface S2 is preferably 10 μm or more and 200 μm or less.
[0099] (Plating layer)
[0100] The plating layer will be described. The plating layer includes a Ni plating layer and a Sn plating layer.
[0101] (Ni plating layer)
[0102] The Ni plating layer is disposed on the conductive resin layer. The Ni plating layer covers at least a part of the conductive resin layer. The Ni plating layer includes a first Ni plating layer 23a and a second Ni plating layer 23b. The first Ni plating layer 23a is disposed on the first conductive resin layer 22a. The second Ni plating layer 23b is disposed on the second conductive resin layer 22b.
[0103] The Ni plating layer suppresses the base electrode layer and the like from being corroded by solder at the time of mounting the multilayer ceramic capacitor 1.
[0104] (Sn plating layer)
[0105] The Sn plating layer is disposed on the Ni plating layer. The Sn plating layer covers at least a portion of the Ni plating layer. The Sn plating layer includes a first Sn plating layer 24a and a second Sn plating layer 24b. The first Sn plating layer 24a is disposed on the first Ni plating layer 23a. The second Sn plating layer 24b is disposed on the second Ni plating layer 23b.
[0106] The Sn plating layer has good solder wettability and facilitates mounting of the multilayer ceramic capacitor 1 on a substrate or the like.
[0107] The thickness of each of the Ni plating layer and the Sn plating layer is preferably 2 μm or more and 15 μm or less.
[0108] The size of the multilayer ceramic capacitor 1 is not particularly limited. The preferred longitudinal length of the multilayer ceramic capacitor 1, including the multilayer body 2 and the external electrodes, is 0.2 mm to 10 mm. The preferred height length of the multilayer ceramic capacitor 1, including the multilayer body 2 and the external electrodes, is 0.1 mm to 5 mm. The preferred width length of the multilayer ceramic capacitor 1, including the multilayer body 2 and the external electrodes, is 0.1 mm to 10 mm.
[0109] (metal component)
[0110] The metal component contained in the conductive resin layer will be described. The conductive resin layer contains the metal component in order to impart conductivity to the conductive resin layer.
[0111] The metal component contained in the conductive resin layer can be Ag, Cu, Ni, Sn, Bi, or an alloy thereof. The metal component particularly preferably contains Ag. Ag can be a single substance or an alloy containing Ag.
[0112] As described above, the metal component is contained in the conductive resin layer as a metal filler. Figure 4 yes Figure 1 The following description will be made using the second conductive resin layer 22b as an example of the conductive resin layer. However, the following description also applies to the first conductive resin layer 22a.
[0113] like Figure 4 As shown in FIG. 2 , metal fillers 30 are arranged in the second conductive resin layer 22 b. The metal fillers 30 are dispersed in the conductive resin 38 .
[0114] The shape of the metal filler 30 included in the conductive resin layer is not particularly limited. The metal filler 30 may be spherical or flat. The metal filler 30 may be a mixture of spherical metal powder and flat metal powder.
[0115] In Figure 4 The metal filler 30 is exemplified as a flat shape.
[0116] The average particle diameter of the metal filler 30 included in the conductive resin layer is not particularly limited. The average particle diameter of the metal filler 30 can be, for example, 0.1 pm or more and 1 pm or less. The average particle diameter of the metal filler included in the conductive resin layer can be found by calculation based on the laser diffraction particle size measurement method (based on IOS 13320). The method of finding the average particle diameter can be applied regardless of the shape of the filler.
[0117] The amount of the resin included in the conductive resin layer is preferably 25 vmol% or more and 65 vmol% or less with respect to the volume of the entire conductive resin layer.
[0118] The amount of the metal component included in the conductive resin layer is preferably 35 vmol% or more and 75 vmol% or less with respect to the volume of the entire conductive resin layer.
[0119] (Metal filler surface)
[0120] In the metal filler 30 of the present embodiment, Ni is disposed on at least a part of the surface of the metal filler 30. Figure 5A is Figure 4 An enlarged view of the frame-enclosed portion R2 of FIG. 4. The Ni disposed on the surface of the metal filler 30 is denoted as a Ni portion 32. In the metal filler 30 illustrated in FIG. 5, the Ni portion 32 is disposed on the entire surface of the metal filler 30. In the metal filler 30 of the present embodiment, Sn can also be further disposed on at least a part of the surface of the metal filler 30 or at least a part of the outer surface of the Ni portion 32. The Sn disposed on the surface of the metal filler 30 is denoted as a Sn portion 34. In the metal filler 30 illustrated in FIG. 6, the Sn portion 34 is disposed on a part of the outer surface of the Ni portion 32. Figure 5A In the metal filler 30 illustrated in FIG. 6, the Sn portion 34 is disposed on a part of the outer surface of the Ni portion 32.
[0121] As illustrated in FIG. 7, the Ni portion 32 and the Sn portion 34 are disposed on the surface of the metal filler 30. Figure 5A
[0122] In the example illustrated in FIG. 8, the Ni portion 32 is disposed on the entire outer periphery of the metal filler 30. However, the Ni portion 32 need not be disposed on the entire outer periphery of the metal filler 30, but can be disposed on at least a part of the outer periphery. Figure 5A
[0123] Further, in the example illustrated in FIG. 9, the Sn portion 34 is disposed on a part of the outer periphery of the metal filler 30. Figure 5A In the example shown, the Sn portion 34 is disposed on the outer surface of the Ni portion 32. However, the Sn portion 34 does not need to be disposed on the outer surface of the Ni portion 32, and may be disposed on the surface of the metal filler 30. Furthermore, the Sn portion 34 may be disposed on the outer surface of the Ni portion 32 as well as on the surface of the metal filler 30.
[0124] The Ni portion 32 disposed on the surface of the metal filler 30 is formed from Ni, which is a component of the Ni plating layer. The term "Ni, which is a component of the Ni plating layer" refers to the Ni material used to form the Ni plating layer. In this case, the Ni portion 32 is formed simultaneously with the Ni plating layer.
[0125] The Ni portion 32 is formed of Ni, which is a component of the Ni plating layer, thereby increasing the electrical connection between the resin electrode layer and the plating layer. Furthermore, the Sn portion 34 further increases the electrical connection between the resin electrode layer and the plating layer.
[0126] In the metal filler 30 of the present embodiment, at least a portion of the surface of the metal filler 30 is covered with the Ni portion 32. The metal filler 30 in which at least a portion of the surface of the metal filler 30 is covered with the Ni portion 32 is referred to as a Ni-coated filler 36.
[0127] exist Figure 5A In the Ni-coated filler 36 shown, the entire surface of the metal filler 30 is covered with the Ni portion 32, and the Sn portion 34 is arranged on a portion of the outer surface of the Ni portion 32. The structure of the Ni-coated filler 36 is not limited to this structure. Figure 5B to Figure 5F : is a diagram showing an example of the Ni-coated filler 36. For example, the Ni-coated filler 36 may be Figure 5B to Figure 5F The form shown. Figure 5B In the example shown, the entire surface of the metal filler 30 is covered with the Ni portion 32. More specifically, the entire surface of the metal filler 30 is covered only with the Ni portion 32. Figure 5C In the example shown, the entire surface of the metal filler 30 is covered with the Ni portion 32, and the Sn portion 34 is arranged on at least a portion of the outer surface of the Ni portion 32. More specifically, the Sn portion 34 is arranged only on a portion of the outer surface of the Ni portion 32. Figure 5D In the example shown, the entire surface of the metal filler 30 is covered with the Ni portion 32, and the entire outer surface of the Ni portion 32 is covered with the Sn portion 34. Figure 5E In the example shown, a Ni portion 32 is disposed on a portion of the surface of the metal filler 30, and the entire outer surface of the Ni portion 32 is covered with a Sn portion 34. Figure 5FIn the example shown, the Ni portion 32 is provided on a part of the surface of the metal filler 30, and the Sn portion 34 is provided on another part of the surface of the metal filler 30. The Sn portion 34 can also be provided on at least a part of the surface of the metal filler 30, or at least a part of the outer surface of the Ni portion 32. Further, the entire surface of the metal filler 30 can be covered with the Ni portion 32 or the Sn portion 34. For example, a part of the surface of the metal filler 30 can be covered with the Ni portion 32, and the remaining other surface can be covered with the Sn portion 34. As such, the metal filler 30 of the present embodiment can be provided with the Ni portion 32 on at least a part of the surface of the metal filler 30.
[0128] (Ni-coated filler layer)
[0129] In the resin electrode layer, a layer in which the Ni-coated filler 36 is present is referred to as a Ni-coated filler layer. In the present embodiment, the Ni-coated filler 36 is provided on at least a part of the surface of the metal filler 30. Figure 5A In the example shown, the range belonging to the same position as the position in the height direction T in which the Ni-coated filler 36 is present becomes the Ni-coated filler layer.
[0130] By further providing the metal filler 30 with the Ni portion 32, and more preferably with the Sn portion 34, it is possible to reduce the ESR (Equivalent Series Resistance).
[0131] This is because the Ni contained in the Ni portion 32 is Ni that is a component of the Ni plating layer, and by further preferably providing the Sn portion 34, it is possible to increase the electrical junction of the resin electrode layer and the plating layer.
[0132] Figure 5A A state in which the Ni portion 32 of the metal filler 30 is in contact with the second plating layer 23b is exemplified. Further, a state in which the Sn portion 34 of the metal filler 30 is not in contact with other metal fillers 30 is exemplified. Figure 5A A state in which the Sn portion 34 of the metal filler 30 is not in contact with other metal fillers 30 is shown. However, the portion in which the metal filler 30 is in contact with the metal filler 30 is not always observed depending on the cross section observed. In other words, by changing the cross section observed, it is possible to observe the portion in which the metal filler 30 is in contact with the metal filler 30. In the resin electrode layer, by the metal filler 30 being in contact with the other metal filler 30, the electrical conductivity of the resin electrode layer is improved.
[0133] The region in which the Ni-coated filler layer is provided is preferably provided in a range in which the direction toward the inside of the laminate 2 from the interface of the conductive resin layer and the Ni plating layer is 5.0 μm or less in the height direction T. In other words, the region in which the Ni-coated filler layer is provided is preferably provided in a range in which the depth direction toward the inside of the laminate 2 from the interface of the conductive resin layer and the Ni plating layer is 5.0 μm or less.
[0134] Further, the region in which the Ni-coated filler layer is disposed is more preferably disposed in a range of 0.5 μm or more and 5.0 μm or less in the direction toward the inside of the laminate 2 in the height direction T from the interface between the electrically conductive resin layer and the Ni plating layer. Note that the region in which the Ni-coated filler layer is disposed refers to the range in the height direction T at the position where the Ni-coated filler layer is disposed.
[0135] Based on Figure 4 , the second electrically conductive resin layer 22b is taken as an example of the electrically conductive resin layer, and the second Ni plating layer 23b is taken as an example of the Ni plating layer. Figure 4 The line A in FIG. 2 is a line showing the interface between the second electrically conductive resin layer 22b and the second Ni plating layer 23b. Figure 4 The arrow B in FIG. 2 is an arrow showing the direction toward the inside of the laminate 2 in the height direction T from the interface A between the second electrically conductive resin layer 22b and the second Ni plating layer 23b.
[0136] By disposing the Ni-coated filler layer in a range of 5.0 μm or less in the direction B toward the inside of the laminate 2 from the interface A between the second electrically conductive resin layer 22b and the second Ni plating layer 23b, it is possible to obtain a reduction effect in ESR while ensuring the mechanical strength of the multilayer ceramic capacitor.
[0137] Further, by disposing the Ni-coated filler layer in a range of 0.5 μm or more and 5.0 μm or less in the direction B toward the inside of the laminate 2 from the interface A between the second electrically conductive resin layer 22b and the second Ni plating layer 23b, it is possible to further increase the electrical bonding of the second electrically conductive resin layer 22b and the second Ni plating layer 23b or the second Sn plating layer 24b, and further reduce ESR.
[0138] Figure 6 FIG. 2 is a diagram showing the example of the embodiment of the present application and the comparative example. The so-called Figure 6 The depth of presence shown in FIG. 2 is the depth of the Ni-coated filler 36, and is the distance of the Ni-coated filler layer in the direction B toward the inside of the laminate 2 from the interface A between the electrically conductive resin layer and the Ni plating layer.
[0139] The conditions of the multilayer ceramic capacitors used for evaluation were as follows. Regarding the size of the multilayer ceramic capacitor, the length in the length direction was 3.2 mm, the length in the width direction was 1.6 mm, and the length in the height direction was 1.6 mm. The static capacitance of the multilayer ceramic capacitor was 0.01 μF. The rated voltage of the multilayer ceramic capacitor was 630 V.
[0140] The measurement method of ESR and the determination criteria are as follows. As for the measurement of ESR, the laminated ceramic capacitor was heat-treated at 150°C for 1 hour in an air atmosphere before the measurement, and then mounted on a measurement substrate. The measurement was performed using a network analyzer 24 ± 2 hours after the completion of the heat treatment, with the measurement frequency set to 1 MHz. Figure 6 The value of ESR shown is the value obtained by measuring 100 ESRs and averaging the values.
[0141] The case where the average of 100 ESR measurement values is 250 mΩ or less is set to O, the case where the average of 100 ESR measurement values is more than 250 mΩ and 300 mΩ or less is set to Δ, and the case where the average of 100 ESR measurement values is more than 300 mΩ is set to X.
[0142] The evaluation method of mechanical strength and the determination criteria are as follows. The mechanical strength was evaluated by the easiness of crack generation. As for the mechanical strength, 30 laminated ceramic capacitors after plating were subjected to a flexural test by the method of JIS C 6484, and the number of cracks generated when the flexural amount was fixed to 5 mm was measured.
[0143] As for 30 laminated ceramic capacitors, the case where no crack was generated is set to O, the case where a crack was generated but the crack did not reach the internal electrode layer even if it was one is set to Δ, and the case where a crack reached the internal electrode layer even if it was one is set to X.
[0144] The comprehensive determination is the result of comprehensive determination based on the value of ESR and the generation state of cracks. Good is set to O, there is no particular problem is set to Δ, and there is a problem is set to X.
[0145] As shown in Comparative Example 1, the laminated ceramic capacitor of the comparative example was not provided with a Ni-coated filler layer. As for the laminated ceramic capacitor of the comparative example, the ESR determination was X, and the comprehensive determination was also X. Figure 6
[0146] On the other hand, in the examples, a Ni-coated filler layer having a given depth of presence was provided. As shown in Examples 2 to 10, in the case where the depth of presence was 0.5 μm or more and 10 μm or less, the ESR determination was O. Further, as shown in Example 1, in the case where the depth of presence was 0.4 μm or less, the ESR determination was Δ. In addition, it can be considered that in the case where the depth of presence was 0.4 μm or less, the bonding area between the fillers via the Ni portion and the bonding area between the fillers and the plating layer decreased, and thus the electric loss became large, and the ESR increased.
[0147] As to the mechanical strength, as shown in Examples 1 to 9, the mechanical strength was determined as O in the presence of a depth of 5.0 μm or less. Further, as shown in Example 10, the mechanical strength was determined as Δ in the presence of a depth of 10 μm. It is considered that, in the presence of a depth exceeding 5.0 μm, the hard metal component as a component of the plating layer penetrates into the conductive resin layer, and thus the conductive resin layer becomes hard, whereby the stress relaxation becomes impossible, and the mechanical strength decreases.
[0148] Based on the ESR determination and the mechanical strength determination as above, in the comprehensive determination, Examples 2 to 9 were set as O, and Examples 1 and 10 were set as Δ.
[0149] As shown in Examples 1 to 9, the mechanical strength was determined as O in the presence of a depth of 5.0 μm or less. Further, as shown in Example 10, the mechanical strength was determined as Δ in the presence of a depth of 10 μm. It is considered that, in the presence of a depth exceeding 5.0 μm, the hard metal component as a component of the plating layer penetrates into the conductive resin layer, and thus the conductive resin layer becomes hard, whereby the stress relaxation becomes impossible, and the mechanical strength decreases. Figure 6 Further, as shown in Examples 1 to 9, the mechanical strength was determined as O in the presence of a depth of 5.0 μm or less. Further, as shown in Example 10, the mechanical strength was determined as Δ in the presence of a depth of 10 μm. It is considered that, in the presence of a depth exceeding 5.0 μm, the hard metal component as a component of the plating layer penetrates into the conductive resin layer, and thus the conductive resin layer becomes hard, whereby the stress relaxation becomes impossible, and the mechanical strength decreases.
[0150] (Procedure of Measurement)
[0151] Further, as shown in Examples 1 to 9, the mechanical strength was determined as O in the presence of a depth of 5.0 μm or less. Further, as shown in Example 10, the mechanical strength was determined as Δ in the presence of a depth of 10 μm. It is considered that, in the presence of a depth exceeding 5.0 μm, the hard metal component as a component of the plating layer penetrates into the conductive resin layer, and thus the conductive resin layer becomes hard, whereby the stress relaxation becomes impossible, and the mechanical strength decreases.
[0152] Figure 4 Further, as shown in Examples 1 to 9, the mechanical strength was determined as O in the presence of a depth of 5.0 μm or less. Further, as shown in Example 10, the mechanical strength was determined as Δ in the presence of a depth of 10 μm. It is considered that, in the presence of a depth exceeding 5.0 μm, the hard metal component as a component of the plating layer penetrates into the conductive resin layer, and thus the conductive resin layer becomes hard, whereby the stress relaxation becomes impossible, and the mechanical strength decreases.
[0153] (Procedure of Manufacturing the Multilayer Ceramic Capacitor)
[0154] The procedure of manufacturing the multilayer ceramic capacitor 1 will be described.
[0155] (1) A dielectric sheet and a conductive paste for internal electrode layer were prepared. The conductive paste for internal electrode layer contains a binder and a solvent. The binder and the solvent can be a publicly known organic binder and organic solvent, or the like.
[0156] (2) The conductive paste for internal electrode layer was printed on the dielectric sheet in a given pattern. The internal electrode layer pattern was formed by the printing of the conductive paste. The printing can be performed by screen printing or gravure printing, or the like.
[0157] (3) The dielectric sheets for the outer layer part are stacked to a given number of sheets. The dielectric sheets for the outer layer part are not printed with the internal electrode layer pattern. The dielectric sheets printed with the internal electrode layer pattern are stacked one after another on the stacked dielectric sheets. Further, the dielectric sheets for the outer layer part are stacked to a given number of sheets thereon. The stacked sheets are manufactured by the stacking thereof.
[0158] (4) The stacked block is manufactured by pressing the stacked sheets in the height direction. The method of pressing can employ isostatic pressing.
[0159] (5) The stacked block is cut to a given size. By the cutting, the stacked small pieces are cut out. At the time of cutting, the corner portions and the ridge line portions of the stacked small pieces can also be rounded. The method of rounding can employ barrel grinding.
[0160] (6) The stacked small pieces are fired. The stacked body is manufactured by the firing. The preferable firing temperature is 900°C or higher and 1200°C or lower. The firing temperature can be changed depending on the materials of the dielectric and the internal electrode layer.
[0161] The external electrode is provided to the stacked body.
[0162] (7) The conductive paste to become the base electrode is applied to both end surfaces of the stacked body. The conductive paste contains a glass component and a metal. The method of application can employ, for example, the dipping method. The firing treatment is performed after the application. The base electrode layer is formed by the firing treatment. The preferable temperature of the firing treatment is 700°C or higher and 900°C or lower. The base electrode layer is a fired layer.
[0163] (8) The conductive resin layer is formed on the base electrode layer. The conductive resin paste is prepared. The conductive resin paste contains a resin component and a metal filler. The conductive resin paste is applied to the base electrode layer. The method of application can employ the dipping method.
[0164] In the present embodiment, as the solvent of the conductive resin paste, a solvent in which 250°C or higher high-boiling-point solvent shown below is added to diethylene glycol monobutyl ether (molecular weight: 162.23, boiling point: 230°C) is used.
[0165] • dibutyl sebacate (molecular weight: 314.47, boiling point: 345°C)
[0166] • diethyl sebacate (molecular weight: 258.36, boiling point: 309°C)
[0167] • dibutyl adipate (molecular weight: 258.36, boiling point: 305°C)
[0168] • dimethyl sebacate (molecular weight: 230.30, boiling point: 294°C)
[0169] • Succinic acid dibutyl ester (molecular weight: 230.30, boiling point: 274°C)
[0170] • Succinic acid dibutyl ester (molecular weight: 230.30, boiling point: 274°C)
[0171] • Succinic acid dibutyl ester (molecular weight: 230.30, boiling point: 274°C)
[0172] The high-boiling-point solvent can be added singly, or a plurality of them can be added. In the present embodiment, for example, succinic acid dibutyl ester (molecular weight: 258.36, boiling point: 305°C) can be used.
[0173] After the application, heat treatment is performed. As the heat treatment, drying is performed at 150°C or higher and 180°C or lower for 10 minutes in a hot-air oven. Then, curing is performed at 200°C or higher and 280°C or lower for 60 minutes in an air atmosphere. The conductive electrode layer is formed by this heat curing.
[0174] By adding the high-boiling-point solvent as described above and setting the heat treatment conditions, it is possible to form voids in the vicinity of the metal filler. Ni flows into the voids in the Ni plating to be described later, thereby forming a Ni-coated filler, and further forming a Ni-coated filler layer.
[0175] In addition, the atmosphere at the time of heat treatment is preferably a nitrogen gas atmosphere. The preferable oxygen concentration is 100 ppm or lower. This oxygen concentration makes it difficult for the resin to scatter. Furthermore, this oxygen concentration makes it difficult for the various metal components to oxidize.
[0176] (9) After the conductive resin layer is formed, a Ni plating layer is formed on the surface of the conductive resin layer. This Ni plating layer becomes the first Ni plating layer and the second Ni plating layer.
[0177] The method of forming the Ni plating layer can employ electrolytic plating. The preferable plating method is barrel plating.
[0178] (10) A Sn plating layer is formed on the Ni plating layer. A first Sn plating layer is formed on the first Ni plating layer. A second Sn plating layer is formed on the second Ni plating layer. By forming the Sn plating layer, it is possible to improve the wettability of the solder used for mounting when the multilayer ceramic capacitor 1 is mounted on a substrate or the like. It becomes easy to mount the multilayer ceramic capacitor 1 on a substrate or the like. The method of forming the Sn plating layer can employ electrolytic plating. The preferable plating method is barrel plating.
[0179] In the present embodiment, when Ni plating and Sn plating are performed, the Ni plating component flows into the gap near the metal filler. Thus, the Ni-coated filler is formed, and the Ni-coated filler layer is formed in the resin electrode layer. The region where the Ni-coated filler layer is formed can be controlled by controlling the current at the time of Ni plating. In the case where the Sn portion is arranged on the surface of the metal filler in addition to the Ni portion, the Sn medium can be mixed at the time of Ni plating using a roller. Thus, the Ni portion is arranged on the surface of the metal filler, and the Sn portion is arranged. However, the method of arranging the Sn portion is not limited thereto.
[0180] The embodiments of the present application have been described above, but the present application is not limited to the foregoing embodiments, and various changes and modifications can be made.
[0181] Explanation of Reference Numerals
[0182] 1: laminated ceramic capacitor
[0183] 2: laminate
[0184] 3: outer dielectric layer
[0185] 4: inner dielectric layer
[0186] 5a: first dielectric layer
[0187] 5b: second dielectric layer
[0188] 6a: first internal electrode layer
[0189] 6b: second internal electrode layer
[0190] 10: inner layer portion
[0191] 20a: first external electrode
[0192] 20b: second external electrode
[0193] 21a: first base electrode layer
[0194] 21b: second base electrode layer
[0195] 22a: first conductive resin layer
[0196] 22b: second conductive resin layer
[0197] 23a: first Ni plating layer
[0198] 23b: second Ni plating layer
[0199] 24a: first Sn plating layer
[0200] 24b: second Sn plating layer
[0201] 30: metal filler;
[0202] 32: Ni portion;
[0203] 34: Sn portion;
[0204] 36: Ni-coated filler;
[0205] 38: electrically conductive resin;
[0206] 40: void;
[0207] 42: outer periphery of the filler.
Claims
1. A multilayer ceramic capacitor, comprising: a multilayer body including a plurality of dielectric layers laminated, and having a first main surface and a second main surface opposed in a height direction, a first side surface and a second side surface opposed in a width direction orthogonal to the height direction, and a first end surface and a second end surface opposed in a length direction orthogonal to the height direction and the width direction; a first internal electrode layer disposed on the plurality of dielectric layers and exposed at the first end surface; a second internal electrode layer disposed on the plurality of dielectric layers and exposed at the second end surface; a first external electrode disposed on the first end surface; and a second external electrode disposed on the second end surface, wherein the first external electrode and the second external electrode have: a base electrode layer including a metal component; a conductive resin layer disposed on the base electrode layer and including a thermosetting resin and a metal filler; a Ni plating layer disposed on the conductive resin layer; and a Sn plating layer disposed on the Ni plating layer, wherein Ni as a component of the Ni plating layer is disposed on at least a part of a surface of the metal filler.
2. The multilayer ceramic capacitor according to claim 1, wherein an entire surface of the metal filler is covered with Ni as a component of the Ni plating layer.
3. The multilayer ceramic capacitor according to claim 2, wherein Sn is disposed on at least a part of an outer surface of the Ni covering the surface of the metal filler.
4. The multilayer ceramic capacitor according to claim 2, wherein an entire outer surface of the Ni covering the surface of the metal filler is covered with Sn.
5. The multilayer ceramic capacitor according to claim 1, wherein Ni as a component of the Ni plating layer is disposed on a part of the surface of the metal filler, and an entire outer surface of the Ni disposed on the surface of the metal filler is covered with Sn.
6. The multilayer ceramic capacitor according to claim 1, wherein Sn is disposed on at least a part of the surface of the metal filler or at least a part of an outer surface of the Ni disposed on the surface of the metal filler.
7. The multilayer ceramic capacitor according to claim 1, wherein an entire surface of the metal filler is covered with Ni or Sn.
8. The multilayer ceramic capacitor according to any one of claims 1 to 7, wherein a Ni-coated filler layer is present, the Ni-coated filler layer being a layer in which a surface of the metal filler of the conductive resin layer is coated with Ni as a component of the Ni plating layer.
9. The multilayer ceramic capacitor according to claim 8, wherein a region in which the Ni-coated filler layer is disposed is disposed in a range of 5.0 μm or less from an interface of the conductive resin layer and the Ni plating layer toward an inside of the multilayer body in the height direction.
10. The multilayer ceramic capacitor according to claim 8, wherein The region configured with the Ni-coated filler layer is configured in a range of 0.5 μm or more and 5.0 μm or less in the height direction toward the inside of the laminate from the interface of the conductive resin layer and the Ni-plated layer. The region configured with the Ni-coated filler layer is configured in a range of 0.5 μm or more and 5.0 μm or less in the height direction toward the inside of the laminate from the interface of the conductive resin layer and the Ni-plated layer.
Citation Information
Patent Citations
Laminated ceramic capacitor
JP1999162771A