Aging detection method and system for diode in semiconductor device

Abstract

The invention discloses an aging detection method and system for diodes in a semiconductor device, and relates to the related technical field of diode detection, and the method comprises the steps: obtaining a diode access circuit of a target semiconductor device, and deploying a micro self-detector to execute the state self-detection and judgment of each diode; if the self-checking result is abnormal, triggering inquiry verification verification; comprising the following steps: generating an inquiry instruction, sending the inquiry instruction to a micro self-detector, integrating synchronous operation condition parameters, and importing the synchronous operation condition parameters into an upper computer in a multi-thread parallel manner; gradient consistency mutual verification is executed, an aging detection result is determined, if gradients are inconsistent, it is judged that individual aging fails, and if gradients are consistent, it is judged that collective drift fails. The technical problem that in the prior art, individual aging failure and collective performance drifting cannot be efficiently and accurately distinguished in a redundant / parallel diode circuit, so that the reliability and the real-time performance of aging detection are insufficient is solved. The technical effects that the fault modes are accurately distinguished, and the reliability and the real-time performance of diode aging detection are improved are achieved.

Description

Technical Field

[0001] This application relates to the field of diode testing technology, specifically to an aging test method and system for diodes in semiconductor devices. Background Technology

[0002] As a fundamental semiconductor component, the performance and reliability of diodes directly affect the stability and lifespan of the entire circuit system. However, during long-term operation, diodes are prone to aging due to factors such as electrical stress, thermal stress, and material degradation. This can lead to increased forward voltage drop and reverse leakage current, resulting in decreased device performance or even functional failure. Aging issues are particularly prominent in high-temperature, high-humidity, or high-switching-frequency applications, potentially causing system malfunctions. Traditional diode aging detection mainly relies on periodic shutdown testing or external testing equipment, such as multimeters or oscilloscopes, for parameter measurement. This is not only inefficient but also makes real-time monitoring and early warning difficult. Furthermore, in circuits with multiple redundant or parallel diodes, there is a lack of effective handling for the coordinated aging of multiple diodes in redundant or parallel structures. Due to the mutual influence between diodes, individual aging may be masked, making it impossible to accurately distinguish between individual aging and collective performance drift, resulting in insufficient reliability, real-time performance, and parallelism of the test results.

[0003] Therefore, current technologies suffer from the inability to efficiently and accurately distinguish between individual aging failures and collective performance drift in redundant / parallel diode circuits, resulting in insufficient reliability and real-time performance of aging detection. Summary of the Invention

[0004] This application provides an aging detection method and system for diodes in semiconductor devices, which solves the technical problem in the prior art that it is impossible to efficiently and accurately distinguish between individual aging failures and collective performance drift in redundant / parallel diode circuits, resulting in insufficient reliability and real-time performance of aging detection. It achieves the technical effect of accurately distinguishing fault modes and improving the reliability and real-time performance of diode aging detection.

[0005] This application provides an aging detection method for diodes in semiconductor devices. The method includes: acquiring the diode access circuit of a target semiconductor device; deploying micro-testers to perform state self-testing and judgment on each diode, and determining the self-test result; wherein the diode access circuit is a redundant or parallel connection of multiple diodes; if the self-test result is abnormal, triggering an interrogation verification test; wherein each micro-tester performs self-testing and judgment relatively independently; wherein the interrogation verification test step includes: a first micro-tester generating an interrogation command and sending it to the micro-testers of at least two neighboring diodes, integrating synchronization status parameters of synchronization timestamps, and importing them into a host computer in parallel via multiple threads; wherein the first micro-tester is the micro-tester with an abnormal self-test result, corresponding to the first diode; the host computer performing gradient consistency mutual verification under normalized conditions to determine the aging detection result of the first diode; wherein if the gradient is inconsistent, it is determined to be an individual aging failure; if the gradient is consistent, it is determined to be a collective drift failure.

[0006] In a possible implementation, the aging detection method for diodes in a semiconductor device further includes the following steps: for each connected diode, determining the diode specifications and aging trend curve, wherein the aging trend curve is a standardized curve and each node represents the operation of the aging stage; based on the diode specifications and aging trend curve, constructing a micro self-test device and a host device, wherein the micro self-test device and the host device are deployed in the integrated circuit central control.

[0007] In a possible implementation, the aging detection method for diodes in a semiconductor device further includes the following steps: determining multiple mapping groups by mapping the diode specifications to the aging trend curve, wherein each diode connected to the circuit corresponds to one mapping group; performing dynamic self-test training under a time series for the first mapping group to determine a first micro-self-tester, and using the first micro-self-tester as the intelligent agent of the first diode; traversing the multiple mapping groups until the construction of the Nth micro-self-tester is completed, which serves as the intelligent agent of the Nth diode; and embedding the first micro-self-tester up to the Nth micro-self-tester into the integrated circuit control unit.

[0008] In a possible implementation, the aging detection method for diodes in a semiconductor device further includes the following processing: arranging the aging trend curves of each diode in parallel, performing normalization processing and establishing a time series curve mapping as a detection baseline; constructing the host device with any two diode operating parameter sets as inputs and mutual verification based on the detection baseline as the verification method, wherein the host device is deployed in the integrated circuit central control and the verification result of the micro self-test device is used as the trigger condition.

[0009] In a possible implementation, the aging detection method for a diode in a semiconductor device further includes the following processing: as the semiconductor device operates, the first diode performs real-time operating parameter acquisition and imports it into the first micro self-tester; node matching and parameter deviation determination are performed on the first aging trend curve; if parameter deviation exists, the deviation gradient vector is determined and an inquiry command is generated.

[0010] In a possible implementation, the aging detection method for diodes in a semiconductor device further performs the following processing: taking the adjacent diodes of the first diode as the interrogation target, sending the interrogation command to the micro self-testers of the adjacent diodes, wherein the number of adjacent diodes being interrogated is at least two; the micro self-testers corresponding to the adjacent diodes receive the interrogation command, the second micro self-tester organizes the second gradient vector under the synchronization timestamp constraint, and the third micro self-tester organizes the third gradient vector under the synchronization timestamp constraint, wherein the second micro self-tester and the third micro self-tester are intelligent agents corresponding to the adjacent diodes.

[0011] In a possible implementation, the aging detection method for a diode in a semiconductor device further includes the following processing: based on the interactive connection between the micro self-tester and the host computer, performing multi-threaded parallel import of the deviation gradient vector, the second gradient vector, and the third gradient vector, and performing mutual verification under normalization conditions; and determining the aging failure of the first diode based on gradient consistency.

[0012] In a possible implementation, the aging detection method for a diode in a semiconductor device further performs the following processing: if the gradients are inconsistent, and the gradient value of the normalized deviation gradient vector is higher than the normalized second gradient vector and the third gradient vector, and the gradient threshold is met, it is determined to be a local individual failure, and the first diode is marked as an aging failure diode; if the gradients are consistent, it is determined to be a collective drift failure at the whole machine level, and the first diode is marked as a normal aging diode.

[0013] In a possible implementation, the aging detection method for diodes in a semiconductor device further performs the following processing: by identification, if it is a normally aging diode, no response is made; if it is an aging failure diode, a failure alarm message is generated based on the circuit connection location and diode code, and the alarm is displayed on the terminal interface.

[0014] This application also provides an aging detection system for diodes in semiconductor devices. The system includes: a self-test result determination module, used to acquire the diode access circuit of the target semiconductor device, and to perform state self-testing and judgment of each diode by deploying micro self-testers to determine the self-test result, wherein the diode access circuit is a redundant or parallel connection of multiple diodes; an interrogation verification module, used to trigger interrogation verification if the self-test result is abnormal, wherein each micro self-tester performs self-testing and judgment relatively independently; wherein the interrogation verification step includes: an interrogation instruction generation submodule, used to generate an interrogation instruction from the first micro self-tester, send it to the micro self-testers of at least two neighboring diodes, integrate the synchronization status parameters of the synchronization timestamp, and import them into the host computer in parallel via multi-threading, wherein the first micro self-tester is the micro self-tester with self-testing abnormality, corresponding to the first diode; and an aging detection result determination submodule, used by the host computer to perform gradient consistency mutual verification under normalized conditions to determine the aging detection result of the first diode, wherein if the gradient is inconsistent, it is determined to be an individual aging failure, and if the gradient is consistent, it is determined to be a collective drift failure.

[0015] This application proposes a method and system for aging detection of diodes in semiconductor devices. The method involves acquiring the diode connection circuit of a target semiconductor device, deploying a micro-self-tester (MST) to perform self-testing and judgment of the status of each diode, and triggering an interrogation verification if the self-test result is abnormal. This includes generating an interrogation command and sending it to the MST, integrating synchronous operating parameters, and importing them into the host computer in parallel via multiple threads. Gradient consistency mutual verification is then performed to determine the aging detection result; if the gradients are inconsistent, it is determined to be an individual aging failure; if the gradients are consistent, it is determined to be a collective drift failure. This method solves the technical problem in existing technologies where it is impossible to efficiently and accurately distinguish between individual aging failures and collective performance drift in redundant / parallel diode circuits, leading to insufficient reliability and real-time performance of aging detection. It achieves the technical effect of accurately distinguishing fault modes and improving the reliability and real-time performance of diode aging detection. Attached Figure Description

[0016] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings of the embodiments of this disclosure will be briefly described below. Flowcharts are used in this application to illustrate the operations performed by the system according to the embodiments of this application. It should be understood that the preceding or following operations are not necessarily performed precisely in sequence. Instead, various steps can be processed in reverse order or simultaneously as needed. Furthermore, other operations can be added to these processes, or one or more steps can be removed from these processes.

[0017] Figure 1 This is a schematic flowchart of an aging detection method for a diode in a semiconductor device provided in an embodiment of this application.

[0018] Figure 2This is a schematic diagram of an aging detection system for a diode in a semiconductor device, provided as an embodiment of this application.

[0019] Explanation of reference numerals in the attached diagram: Self-test result determination module 10, Inquiry verification and calibration module 20, Inquiry instruction generation submodule 21, Aging test result determination submodule 22. Detailed Implementation

[0020] The above description is merely an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, specific embodiments of this application are given below.

[0021] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description of this application will be provided in conjunction with the accompanying drawings. The described embodiments should not be considered as limitations on this application. All other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0022] In the following description, references to "some embodiments" describe a subset of all possible embodiments. However, it is understood that "some embodiments" can be the same or different subsets of all possible embodiments and can be combined with each other without conflict. The terms "first" and "second" are used merely to distinguish similar objects and do not represent a specific ordering of objects. The terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or server that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or modules not explicitly listed or inherent to these processes, methods, products, or devices. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only.

[0023] This application provides an aging detection method for diodes in semiconductor devices, such as... Figure 1 As shown, the method includes: Step S100: Obtain the diode access circuit of the target semiconductor device, and perform state self-test and judgment of each diode by deploying a micro self-tester to determine the self-test result. The diode access circuit is a redundant connection or parallel connection of multiple diodes.

[0024] Preferably, the target semiconductor device may be an IGBT power module, a rectifier bridge, or a specific integrated circuit chip. The diode connection circuit of the target semiconductor device is obtained, that is, the diode connection method in the device circuit is obtained. Specifically, the diode connection circuit uses multiple diodes in a redundant or parallel connection. Redundant connection means that multiple diodes perform the same functional role in the circuit to improve system reliability. Even if one diode fails, the other diodes can still maintain the basic function of the circuit. The connection points in the circuit may be the same, or there may be a logical backup relationship. Parallel connection means that the anodes and cathodes of multiple diodes are directly connected together. The purpose is to share large currents, reduce the conduction losses and thermal stress of individual diodes, and improve the overall current handling capacity. Next, a micro-test unit, or micro-detection unit, is assigned to each diode in the circuit. This unit could be a small embedded program, a logic circuit unit, or a micro-hardware unit that integrates sensors and processing functions. Then, the micro-test unit performs self-testing and judgment on the status of each diode. Each micro-test unit independently, continuously, or periodically monitors the key operating parameters of its corresponding diode, including forward voltage drop, reverse leakage current, junction temperature, etc. Each micro-test unit compares the monitored operating parameters with the normal parameter range preset in the micro-test unit for the corresponding diode. Based on the comparison result, it outputs a normal or abnormal binary judgment result as the self-test result and outputs it.

[0025] Furthermore, step S100 also includes step S110, determining the diode specifications and aging trend curves for each connected diode, wherein the aging trend curves are standardized curves, and each node represents the operating status of the aging stage; step S120, constructing a micro self-tester and a host device based on the diode specifications and aging trend curves, wherein the micro self-tester and the host device are deployed in the integrated circuit central control.

[0026] Preferably, the diode specifications are determined for each connected diode. This involves obtaining and clarifying the specific electrical parameters and physical characteristics of each diode in the circuit through the diode's datasheet, including but not limited to rated forward current, reverse breakdown voltage, typical / maximum forward voltage drop, thermal resistance, etc., as benchmark reference values ​​for judging whether the diode's current state is normal. The aging trend curve of the diode is obtained under standardized test conditions such as specified ambient temperature, operating current, and switching frequency. Each node in the aging trend curve usually corresponds to a time point or cumulative stress level, characterizing the operating condition of the aging stage, that is, the expected key operating parameters of the diode at that time point / stress level, usually the change in forward voltage drop or the increase in reverse leakage current. For example, a diode aging trend curve may be described as follows: at a junction temperature of 125°C and rated current, after 1000 hours of operation, the forward voltage drop is expected to increase by 5%; after 2000 hours of operation, the forward voltage drop is expected to increase by 10%, depicting the expected path of the diode's performance parameters gradually drifting over aging time.

[0027] Preferably, based on diode specifications and aging trend curves, an independent detection logic is created for each diode. Specifically, the normal parameter range and expected aging degree of the diode under standard conditions are configured. That is, based on the aging trend curve, the allowable drift of operating parameters within the normal aging range under the current operating time or stress is determined, and a micro self-test is constructed. The micro self-test collects the parameters of the bound diodes in real time and compares them with dynamic judgment thresholds that change with the expected lifespan to make a preliminary judgment of normal or abnormal. Based on diode specifications and aging trend curves, a central processing logic responsible for collaborative verification is created. Specifically, the aging trend curves of all diodes are aligned and normalized to make the parameter changes between different diodes comparable, and gradient consistency mutual verification rules are configured. Specifically, this involves determining whether the data discrepancies among multiple micro-testers originate from the failure of a single diode or from environmental stress or overall lifespan degradation experienced by all diodes. The deployment of the micro-testers and host controller within an integrated circuit central control unit means that the decision logic of the micro-testers and the verification logic of the host controller are integrated into the integrated circuit central control unit in the form of embedded software or hardware logic circuits. The integrated circuit central control unit is a centralized, integrated circuit-based control unit, which may include a control chip integrated within the semiconductor device itself or a microcontroller, application-specific integrated circuit, or programmable logic device closely connected to the diode within the same package or on the same PCB board. This enables on-chip testing, eliminating the need for external testing equipment and achieving miniaturization, embedding, real-time operation, and high reliability in semiconductor diode aging detection.

[0028] Furthermore, step S120 also includes step S121, determining multiple mapping groups by mapping the diode specifications to the aging trend curve, wherein each diode connected to the circuit corresponds to one mapping group; step S122, performing dynamic self-test training under time series for the first mapping group to determine the first micro self-tester, and using the first micro self-tester as the intelligent agent of the first diode; step S123, traversing the multiple mapping groups until the construction of the Nth micro self-tester is completed, which serves as the intelligent agent of the Nth diode; step S124, embedding the first micro self-tester up to the Nth micro self-tester into the integrated circuit central control.

[0029] Preferably, for each diode in the circuit, it is bound to the corresponding diode specification and aging trend curve to form a corresponding mapping group. That is, each diode in the circuit corresponds to a mapping group. Then, dynamic self-test training under time series is performed on the first mapping group. The first mapping group represents the mapping data of any diode. A prediction model is built based on a long short-term memory network and trained on it using the first mapping group to simulate the state of the diode at different time points throughout its life cycle. It learns how to judge whether the parameter value conforms to the normal range predicted by the aging curve in the first mapping group based on the real-time collected operating parameters and the current running time or stress level. A set of judgment rules is generated as the core logic of the first micro self-tester. After the self-test training is completed, the first micro self-tester is generated and used as the intelligent agent of the first diode for diode state self-testing and judgment. Then, multiple mapping groups are traversed to construct the second micro-tester, the third micro-tester, and so on, until the Nth micro-tester is constructed, where N is a positive integer representing the total number of diodes in the circuit, thereby determining the intelligent agents of the N diodes; finally, the first micro-tester up to the Nth micro-tester are embedded and deployed in the integrated circuit central control. Specifically, the logic of each micro-tester may be implemented as a small piece of hardware logic circuit on the chip, and finally they work together in the central control chip to perform diode status self-testing and determination.

[0030] Furthermore, step S120 also includes step S125, which involves listing the aging trend curves of each diode, performing normalization processing, and establishing a time series curve mapping as a detection baseline; step S126, which involves constructing the host device using the operating parameter group of any at least two diodes as input and mutual verification based on the detection baseline as the verification method, wherein the host device is deployed in the integrated circuit central control and the verification result of the micro self-test device is used as the trigger condition.

[0031] Preferably, the aging trend curves of all diodes in the collection circuit are compared and analyzed. Due to manufacturing tolerances, the initial parameters of different diodes may be slightly different. Normalization processing is performed, including converting the vertical axis of each aging trend curve into a relative rate of change or percentage change. For example, increasing the forward voltage drop by 0.2V is converted into increasing the forward voltage drop by 10%. Then, the aging trend curves of all diodes are merged to establish a time series curve mapping. That is, the horizontal axis is aligned to generate a standardized reference curve that represents the expected aging behavior of the entire batch of diodes. This serves as a detection baseline to create a unified judgment standard for the host computer, used to determine whether the aging state of any diode deviates from the normal trajectory of the group. The system takes at least two diode operating parameter sets as input. These operating parameter sets refer to the data preprocessed by the micro-tester, which may include normalized parameter values, the deviation of the parameter from the detection baseline, the current running time, etc. The system then uses a cross-validation method based on the detection baseline. Specifically, when multiple diode parameter sets are received, the data is mapped to the detection baseline, and the gradients of the data points on the detection baseline are checked to see if they are consistent. Cross-validation is also performed, which compares the operating states of multiple diodes and analyzes the degree of deviation. If the deviation of one diode is much greater than that of the other diodes, it indicates that the diode has an individual aging failure problem. If the deviations of multiple input diodes increase synchronously and with similar magnitudes, it indicates that the failure is due to collective drift caused by environmental factors or collective lifespan depletion. This process is then used to construct a host computer. Like the micro self-test (MST), the host computer's decision logic is embedded in the integrated circuit control unit and coexists with the MST on the same chip, ensuring high-speed and reliable internal communication and data exchange. The host computer uses the MST's calibration result as the trigger condition. During normal operation, the host computer is in standby or low-power state. When any MST locally determines that the state of the diode it is responsible for is abnormal, the MST encodes the calibration result into a signal and sends it to the host computer, triggering the host computer to start executing collaborative verification from standby state, thus avoiding unnecessary power consumption and computing resource consumption caused by continuous operation of the host computer.

[0032] Step S200: If the self-test result is abnormal, an inquiry verification test is triggered, wherein each micro self-tester performs self-test and judgment relatively independently.

[0033] Preferably, if the self-test result is abnormal, it indicates that the forward voltage drop of the corresponding diode within the detection cycle collected by any micro self-tester exceeds the allowable normal aging range at that time point. In this case, an inquiry verification test is triggered, that is, an inquiry command is automatically generated to initiate a verification request, so as to avoid unnecessary maintenance actions caused by single-point false alarms. In this case, each micro self-tester performs self-test and judgment relatively independently. Specifically, each diode only collects the bound diode parameters and makes judgments only based on the collected diode parameters. At the same time, each micro self-tester has an independent logic unit or program thread to handle its tasks, which is not affected by others, thereby achieving accurate fault judgment and improving the reliability of self-test judgment.

[0034] The inquiry verification and testing steps include: In step S210, the first micro self-tester generates an inquiry command and sends it to the micro self-testers of at least two neighboring diodes, integrating the synchronization status parameters of the synchronization timestamp and importing them into the host computer in parallel via multiple threads. The first micro self-tester is the micro self-tester that has a self-test failure and corresponds to the first diode.

[0035] Step S210 further includes step S211, whereby the first diode collects real-time operating parameters as the semiconductor device operates and imports them into the first micro self-tester; step S212, where node matching and parameter deviation determination are performed on the first aging trend curve, and if parameter deviation exists, the deviation gradient vector is determined and an inquiry command is generated.

[0036] Preferably, the first micro-self-test (SST) generates an interrogation command. The first SST is the micro-self-test that detects an anomaly, corresponding to the first diode. Specifically, all micro-self-tests collect the real-time operating parameters of the corresponding semiconductor device's diode at the same time, using the same sampling rate and filtering algorithm, to avoid misjudgments caused by asynchronous acquisition. The real-time operating parameters refer to physical quantities generated by the diode during operation that reflect its health status, mainly including electrical data such as forward voltage drop and reverse leakage current, temperature data such as junction temperature or case temperature measured by a thermistor, and changes in power module parameters that may be caused by solder layer fatigue, bonding wire detachment, etc. Then, the second... Node matching is performed on an aging trend curve, which means locating the current diode state to its corresponding position on the pre-stored aging trend curve. At the same time, parameter deviation is determined, including comparing the newly collected real-time parameter value with the corresponding theoretical reference value on the curve and calculating the difference between the two. If the difference does not meet the preset allowable deviation threshold, it is determined that there is a parameter deviation. The deviation value and the rate of change of the deviation are calculated. Then, the deviation value, the rate of change of the deviation, the timestamp, and the corresponding diode ID are used to construct a deviation gradient vector. Finally, the deviation gradient vector is packaged as the core content into a standard format data message to determine the query command to request neighboring nodes to perform collaborative verification.

[0037] Furthermore, step S210 also includes step S213, sending the query command to the micro-tester of the adjacent diode with the adjacent diode as the query target, wherein the number of adjacent diodes being queried is at least two; step S214, the micro-tester corresponding to the adjacent diode receives the query command, the second micro-tester organizes the second gradient vector under the synchronization timestamp constraint, and the third micro-tester organizes the third gradient vector under the synchronization timestamp constraint, wherein the second micro-tester and the third micro-tester are the intelligent agents corresponding to the adjacent diode.

[0038] Preferably, the adjacent diodes of the first diode are the targets of inquiry. The adjacent diodes refer to other diodes that are closest to the first diode in terms of physical layout or circuit connection. For example, diodes connected in parallel in the same power module or diodes that are adjacent to each other on the PCB board may share similar operating environments, such as temperature and current stress. The first micro-tester sends inquiry commands to the adjacent diodes respectively through the data communication link inside the integrated circuit. The number of adjacent diodes being queried is at least two to facilitate consistency verification. The adjacent diodes are in the most similar operating environment to the first diode. If their state is normal, the abnormality of the first diode is most likely an individual aging failure; if it also shows a similar abnormality, it may be a collective drift failure.

[0039] Preferably, the micro-tester corresponding to the adjacent diode receives the query command. The second micro-tester, the third micro-tester, etc., continuously monitor the communication link. The second micro-tester parses key information from the received query command, especially the synchronization timestamp. Then, it retrieves the operating parameters of the second diode collected at that timestamp from its local cache or register. Using the retrieved real-time parameters and its stored aging trend curve of the second diode, it performs the same calculation process as the first micro-tester, including node matching, parameter deviation judgment, calculation of deviation value and gradient, and packages it to generate a second gradient vector representing the health status of the second diode at that time. Similarly, the third micro-tester generates a third gradient vector representing the state of the third diode. The synchronization timestamp constraint ensures that the first, second, and third gradient vectors describe the state of all diodes at the same time. The second and third micro-testers are the intelligent agents corresponding to the adjacent diodes.

[0040] Furthermore, step S210 also includes step S215, which involves performing multi-threaded parallel import of the deviation gradient vector, the second gradient vector, and the third gradient vector based on the interactive connection between the micro self-tester and the host computer, and performing mutual verification under normalization conditions; step S216, which involves determining the aging failure of the first diode based on gradient consistency.

[0041] Preferably, the interactive connection between the micro-self-tester and the host computer refers to the physical communication path between the micro-self-tester and the host computer, or other high-speed data links, to ensure fast data transmission. Different diodes have different specifications, and their corresponding aging judgments differ. For example, the aging standards corresponding to the same gradient may be different. Therefore, multi-threaded parallel import of deviation gradient vectors, second gradient vectors, and third gradient vectors is performed. That is, the deviation gradient vectors, second gradient vectors, and third gradient vectors are imported in parallel through a shared communication link. This means that the host computer can simultaneously receive and process data from multiple micro-self-testers, improving processing efficiency and response speed. Mutual verification under normalization conditions is performed, including dividing the absolute deviation value in each gradient vector by the initial rated value of its corresponding diode, converting it into a relative rate of change, and then performing mutual verification, i.e., the host computer compares the results to obtain gradient consistency verification results. Based on gradient consistency, the first diode is judged for aging failure. If the gradient is inconsistent, that is, the normalized gradient value of the first diode is greater than the normalized gradient values ​​of the second and third diodes, it indicates that the behavior of the first diode deviates from the group trend and is judged as an individual aging failure. If the gradient is consistent, and the normalized gradient values ​​of the first, second and third diodes are very close, it indicates that the behavior of all diodes is synchronized, and it is determined that it is not a problem of a single diode, but a collective drift failure caused by a common cause.

[0042] In step S220, the host computer performs gradient consistency mutual verification under normalization conditions to determine the aging detection result of the first diode. If the gradient is inconsistent, it is determined to be an individual aging failure; if the gradient is consistent, it is determined to be a collective drift failure.

[0043] Step S220 further includes step S221, if the gradients are inconsistent and the gradient value of the normalized deviation gradient vector is higher than the normalized second gradient vector and the third gradient vector, and the gradient threshold is met, it is determined to be a local individual failure, and the first diode is marked as an aging failure diode; step S222, if the gradients are consistent, it is determined to be a collective drift failure at the whole machine level, and the first diode is marked as a normal aging diode.

[0044] Preferably, if the gradients are inconsistent, and the normalized gradient value of the first diode is significantly greater than that of the second and third diodes, and the gradient threshold is met, it indicates that the first diode is a localized aging failure. The gradient threshold is a preset critical value used to prevent misjudgment caused by noise interference and to ensure the reliability of the judgment. Then, the first diode is marked as an aging failure diode. If the gradients are consistent, that is, the normalized gradient values ​​of the first, second, and third diodes are very close, it indicates that the behavior of all diodes is synchronized. It is judged as a collective drift failure, such as the overall lifespan loss caused by a general increase in ambient temperature and increased system load. Then, the first diode is marked as a normal aging diode. Finally, the aging test result of the first diode is determined.

[0045] Furthermore, step S220 also includes step S223, which involves identifying the diode and, if it is a normal aging diode, not responding; and step S224, which involves generating a failure alarm message based on the circuit connection location and the diode code, and displaying the alarm on the terminal interface.

[0046] Preferably, after the host computer completes gradient consistency mutual verification and concludes that the diodes are collectively drifting, it updates the status flag of the first diode from self-test abnormal to normal aging diode and identifies it. When the first diode is identified as a normal aging diode, its internal logic executes a non-response instruction to prevent unnecessary fault alarms due to normal, synchronous performance degradation. After the host computer identifies the first diode as an aging failure diode, it generates failure alarm information based on the circuit access location and diode code, including at least the failure diode, the corresponding diode code, the specific location in the circuit, the fault time, failure parameters, and severity level. Finally, it sends the information to the user interactive terminal device through the communication interface. After receiving and parsing the failure alarm information, the terminal displays the alarm in a pop-up window, with sound prompts and red highlighting in the list, thereby achieving accurate differentiation of fault modes, improving the reliability and real-time performance of diode aging detection, and realizing predictive and accurate maintenance of semiconductor device diodes.

[0047] In the above text, refer to Figure 1 An aging detection method for a diode in a semiconductor device according to an embodiment of the present invention is described in detail. Next, reference will be made to... Figure 2 An aging detection system for a diode in a semiconductor device according to an embodiment of the present invention is described.

[0048] An aging detection system for diodes in a semiconductor device according to an embodiment of the present invention addresses the technical problem in the prior art that it is impossible to efficiently and accurately distinguish between individual aging failures and collective performance drift in redundant / parallel diode circuits, resulting in insufficient reliability and real-time performance of aging detection. The system achieves the technical effect of accurately distinguishing fault modes and improving the reliability and real-time performance of diode aging detection. Figure 2 As shown, an aging test system for diodes in a semiconductor device includes: a self-test result determination module 10, an inquiry verification and calibration module 20, an inquiry instruction generation submodule 21, and an aging test result determination submodule 22.

[0049] The self-test result determination module 10 is used to acquire the diode access circuit of the target semiconductor device, and to determine the self-test result by deploying micro self-testers to perform state self-testing and judgment of each diode. The diode access circuit is a redundant or parallel connection of multiple diodes. The query verification module 20 is used to trigger query verification if the self-test result is abnormal. Each micro self-tester performs self-testing and judgment relatively independently. The query verification steps include: query instruction generation submodule 21, which is used for the first micro self-tester to generate query instructions, send them to the micro self-testers of at least two neighboring diodes, integrate the synchronization status parameters of the synchronization timestamp, and import them into the host computer in parallel through multiple threads. The first micro self-tester is the micro self-tester with self-test abnormality, corresponding to the first diode. The aging test result determination submodule 22 is used for the host computer to perform gradient consistency mutual verification under normalization conditions to determine the aging test result of the first diode. If the gradient is inconsistent, it is determined to be an individual aging failure. If the gradient is consistent, it is determined to be a collective drift failure.

[0050] The specific configuration of the self-test result determination module 10 will be described in detail below. The self-test result determination module 10 further includes: determining the diode specifications and aging trend curves for each connected diode, wherein the aging trend curves are standardized curves, and each node represents the operating status of the aging stage; constructing a micro self-tester and a host device based on the diode specifications and aging trend curves, wherein the micro self-tester and the host device are deployed in the integrated circuit central control.

[0051] The specific configuration of the self-test result determination module 10 will be described in detail below. The self-test result determination module 10 further includes: determining multiple mapping groups by mapping the diode specifications to the aging trend curve, wherein each diode connected to the circuit corresponds to one mapping group; performing dynamic self-test training under a time series for the first mapping group to determine a first micro-self-tester, using the first micro-self-tester as the intelligent agent of the first diode; traversing the multiple mapping groups until the construction of the Nth micro-self-tester is completed, using it as the intelligent agent of the Nth diode; and embedding the first micro-self-tester up to the Nth micro-self-tester into the integrated circuit control unit.

[0052] The specific configuration of the self-test result determination module 10 will be described in detail below. The self-test result determination module 10 further includes: aging trend curves of each diode in parallel, normalizing them and establishing a time series curve mapping as a detection baseline; constructing the host device with operating parameter sets of any at least two diodes as input and mutual verification based on the detection baseline as the verification method, wherein the host device is deployed in the integrated circuit central control and the verification result of the micro self-tester is used as the trigger condition.

[0053] The specific configuration of the query instruction generation submodule 21 will be described in detail below. The query instruction generation submodule 21 further includes: real-time acquisition of operating parameters of the first diode as the semiconductor device operates, and importing them into the first micro self-test device; node matching and parameter deviation determination are performed on the first aging trend curve; if parameter deviation exists, the deviation gradient vector is determined and a query instruction is generated.

[0054] The specific configuration of the query instruction generation submodule 21 will be described in detail below. The query instruction generation submodule 21 further includes: sending the query instruction to the micro-testers of the adjacent diodes of the first diode, with the adjacent diodes as the query targets, wherein the number of adjacent diodes being queried is at least two; the micro-testers corresponding to the adjacent diodes receiving the query instruction; the second micro-tester organizing the second gradient vector under the synchronization timestamp constraint; and the third micro-tester organizing the third gradient vector under the synchronization timestamp constraint, wherein the second and third micro-testers are the intelligent agents corresponding to the adjacent diodes.

[0055] The specific configuration of the aging test result determination submodule 22 will be described in detail below. The aging test result determination submodule 22 further includes: performing multi-threaded parallel import of the deviation gradient vector, the second gradient vector, and the third gradient vector based on the interactive connection between the micro self-tester and the host computer, and performing mutual verification under normalization conditions; and determining the aging failure of the first diode based on gradient consistency.

[0056] The specific configuration of the aging test result determination submodule 22 will be described in detail below. The aging test result determination submodule 22 further includes: if the gradients are inconsistent, and the gradient value of the normalized deviation gradient vector is higher than the normalized second gradient vector and the third gradient vector, and the gradient threshold is met, it is judged as a local individual failure, and the first diode is marked as an aging failure diode; if the gradients are consistent, it is judged as a collective drift failure at the whole machine level, and the first diode is marked as a normal aging diode.

[0057] The specific configuration of the aging test result determination submodule 22 will be described in detail below. The aging test result determination submodule 22 further includes: by performing identification, if it is a normal aging diode, no response is made; if it is an aging failure diode, failure alarm information is generated based on the circuit connection position and diode code, and the alarm is displayed on the terminal interface.

[0058] The aging detection system for diodes in semiconductor devices provided in this embodiment of the invention can execute the aging detection method for diodes in semiconductor devices provided in any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the method.

[0059] Although this application makes various references to certain modules in the system according to the embodiments of this application, any number of different modules can be used and run on user terminals and / or servers. The various units and modules included are only divided according to functional logic, but are not limited to the above division, as long as the corresponding functions can be achieved; in addition, the specific names of each functional unit are only for easy distinction between each other and are not used to limit the scope of protection of this invention.

[0060] The specific embodiments described above do not constitute a limitation on the scope of protection of this application. Those skilled in the art should understand that various modifications, combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. An aging detection method for diodes in semiconductor devices, characterized in that, The method comprises: The diode access circuit of the target semiconductor device is obtained. By deploying a micro self-tester, the status self-test and judgment of each diode are performed, and the self-test result is determined. The diode access circuit is a redundant connection or parallel connection of multiple diodes. If the self-test result is abnormal, an inquiry verification test is triggered, wherein each micro self-tester performs self-test and judgment relatively independently; The inquiry verification and testing steps include: The first micro self-tester generates an inquiry command and sends it to the micro self-testers of at least two neighboring diodes. It integrates the synchronization status parameters of the synchronization timestamp and imports them into the host computer in parallel through multiple threads. The first micro self-tester is the micro self-tester that has a self-test failure and corresponds to the first diode. The host computer performs gradient consistency mutual verification under normalization conditions to determine the aging test result of the first diode. If the gradient is inconsistent, it is determined to be an individual aging failure; if the gradient is consistent, it is determined to be a collective drift failure.

2. The aging detection method for diodes in a semiconductor device as described in claim 1, characterized in that, Deploying a micro self-test device includes: For each connected diode, the diode specifications and aging trend curves are determined. The aging trend curves are standardized curves, and each node represents the operating status of the aging stage. Based on the diode specifications and aging trend curve, a micro self-test device and a host device are constructed, wherein the micro self-test device and the host device are deployed in the integrated circuit central control.

3. The aging detection method for diodes in a semiconductor device as described in claim 2, characterized in that, Based on the diode specifications and aging trend curve, a micro self-test (PST) is constructed, including: By mapping the diode specifications to the aging trend curve, multiple mapping groups are determined, wherein each diode connected to the circuit corresponds to a mapping group. For the first mapping group, dynamic self-test training under time series is performed to determine the first micro self-tester, and the first micro self-tester is used as the intelligent agent of the first diode; Traverse the multiple mapping groups until the construction of the Nth micro self-tester is completed, which serves as the intelligent agent of the Nth diode; The first micro self-tester up to the Nth micro self-tester are embedded and deployed in the integrated circuit central control unit.

4. The aging detection method for diodes in a semiconductor device as described in claim 2, characterized in that, Based on the diode specifications and aging trend curve, the host computer is constructed, including: The aging trend curves of each diode are listed in parallel, normalized, and a time series curve mapping is established as the detection baseline. The host device is constructed by taking the operating parameter set of any two diodes as input and using mutual verification based on the detection baseline as the verification method. The host device is deployed in the integrated circuit central control and the verification result of the micro self-test device is used as the trigger condition.

5. The aging detection method for diodes in a semiconductor device as described in claim 1, characterized in that, The first micro self-tester generates an interrogation command, including: As the semiconductor device operates, the first diode collects real-time operating parameters and imports them into the first micro self-tester. In the first aging trend curve, node matching and parameter deviation determination are performed. If parameter deviation exists, the deviation gradient vector is determined and an inquiry command is generated.

6. The aging detection method for a diode in a semiconductor device as described in claim 5, characterized in that, Send synchronization status parameters, including integrated synchronization timestamps, to micro-testers of at least two neighboring diodes, including: The query command is sent to the micro self-test device of the adjacent diodes of the first diode as the query target, wherein the number of adjacent diodes being queried is at least two. The micro self-tester corresponding to the adjacent diode receives the query command, the second micro self-tester organizes the second gradient vector under the synchronization timestamp constraint, and the third micro self-tester organizes the third gradient vector under the synchronization timestamp constraint, wherein the second micro self-tester and the third micro self-tester are the intelligent agents corresponding to the adjacent diode.

7. The aging detection method for diodes in a semiconductor device as described in claim 6, characterized in that, Based on the interactive connection between the micro self-tester and the host computer, multi-threaded parallel import of the deviation gradient vector, the second gradient vector, and the third gradient vector is performed, and mutual verification under normalization conditions is performed. Based on gradient consistency, the first diode is assessed for aging failure.

8. The aging detection method for a diode in a semiconductor device as described in claim 7, characterized in that, If the gradients are inconsistent, and the gradient value of the normalized deviation gradient vector is higher than the normalized second and third gradient vectors, and the gradient threshold is met, it is judged as a local individual failure, and the first diode is marked as an aging failure diode. If the gradients are consistent, it is determined to be a collective drift failure at the system level, and the first diode is marked as a normal aging diode.

9. The aging detection method for diodes in a semiconductor device as described in claim 1, characterized in that, If the diode is identified by its markings, no response will be given if it is a normally aging diode. If the diode is an aging failure, a failure alarm message is generated based on the circuit connection location and the diode code, and the alarm is displayed on the terminal interface.

10. An aging detection system for diodes in semiconductor devices, characterized in that, The system is used to implement the aging detection method for a diode in a semiconductor device according to any one of claims 1 to 9, the system comprising: The self-test result determination module is used to obtain the diode access circuit of the target semiconductor device. By deploying a micro self-tester, it performs self-test and judgment of the status of each diode and determines the self-test result. The diode access circuit is a redundant connection or parallel connection of multiple diodes. The query verification module is used to trigger the query verification if the self-test result is abnormal. Each micro self-tester performs self-test and judgment relatively independently. The inquiry verification and testing steps include: The query instruction generation submodule is used to generate query instructions for the first micro self-tester, send them to the micro self-testers of at least two neighboring diodes, integrate the synchronization status parameters of the synchronization timestamp, and import them into the host computer in parallel through multiple threads. The first micro self-tester is the micro self-tester that has a self-test failure and corresponds to the first diode. The aging test result determination submodule is used by the host computer to perform gradient consistency mutual verification under normalization conditions to determine the aging test result of the first diode. If the gradient is inconsistent, it is determined to be an individual aging failure; if the gradient is consistent, it is determined to be a collective drift failure.

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